mirror of https://github.com/ARMmbed/mbed-os.git
K20D5M default irq handler
0xc0170
parent
15e246fc9f
commit
ee7c33d055
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@ -1,4 +1,4 @@
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/* File: startup_ARMCM4.S
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/* File: startup_MK20D5.s
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* Purpose: startup file for Cortex-M4 devices. Should use with
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* Purpose: startup file for Cortex-M4 devices. Should use with
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* GCC for ARM Embedded Processors
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* GCC for ARM Embedded Processors
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* Version: V1.3
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* Version: V1.3
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@ -134,7 +134,7 @@ __isr_vector:
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.long SWI_IRQHandler
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.long SWI_IRQHandler
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.size __isr_vector, . - __isr_vector
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.size __isr_vector, . - __isr_vector
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.text
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.section .text.Reset_Handler
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.thumb
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.thumb
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.thumb_func
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.thumb_func
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.align 2
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.align 2
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@ -152,34 +152,27 @@ Reset_Handler:
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ldr r2, =__data_start__
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ldr r2, =__data_start__
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ldr r3, =__data_end__
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ldr r3, =__data_end__
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.Lflash_to_ram_loop:
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/* Here are two copies of loop implemenations. First one favors code size
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* and the second one favors performance. Default uses the first one.
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* Change to "#if 0" to use the second one */
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.flash_to_ram_loop:
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cmp r2, r3
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cmp r2, r3
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ittt lt
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ittt lt
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ldrlt r0, [r1], #4
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ldrlt r0, [r1], #4
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strlt r0, [r2], #4
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strlt r0, [r2], #4
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blt .flash_to_ram_loop
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blt .Lflash_to_ram_loop
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.flash_to_ram_loop_end:
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.Lflash_to_ram_loop_end:
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#ifndef __NO_SYSTEM_INIT
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ldr r0, =SystemInit
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ldr r0, =SystemInit
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blx r0
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blx r0
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#endif
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ldr r0, =_start
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ldr r0, =_start
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bx r0
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bx r0
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.pool
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.pool
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.size Reset_Handler, . - Reset_Handler
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.size Reset_Handler, . - Reset_Handler
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.text
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/* Macro to define default handlers. Default handler
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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* overwritten by other handlers */
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.macro def_irq_handler handler_name
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.macro def_default_handler handler_name
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.align 1
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.align 1
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.thumb_func
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.thumb_func
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.weak \handler_name
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.weak \handler_name
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@ -189,40 +182,68 @@ Reset_Handler:
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.size \handler_name, . - \handler_name
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.size \handler_name, . - \handler_name
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.endm
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.endm
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def_irq_handler NMI_Handler
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def_default_handler NMI_Handler
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def_irq_handler HardFault_Handler
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def_default_handler HardFault_Handler
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def_irq_handler MemManage_Handler
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def_default_handler MemManage_Handler
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def_irq_handler BusFault_Handler
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def_default_handler BusFault_Handler
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def_irq_handler UsageFault_Handler
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def_default_handler UsageFault_Handler
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def_irq_handler SVC_Handler
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def_default_handler SVC_Handler
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def_irq_handler DebugMon_Handler
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def_default_handler DebugMon_Handler
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def_irq_handler PendSV_Handler
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def_default_handler PendSV_Handler
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def_irq_handler SysTick_Handler
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def_default_handler SysTick_Handler
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def_irq_handler Default_Handler
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def_default_handler Default_Handler
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def_irq_handler WDT_IRQHandler
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.macro def_irq_default_handler handler_name
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def_irq_handler RTC_IRQHandler
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.weak \handler_name
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def_irq_handler TIM0_IRQHandler
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.set \handler_name, Default_Handler
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def_irq_handler TIM2_IRQHandler
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.endm
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def_irq_handler MCIA_IRQHandler
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def_irq_handler MCIB_IRQHandler
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def_irq_default_handler DMA0_IRQHandler
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def_irq_handler UART0_IRQHandler
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def_irq_default_handler DMA1_IRQHandler
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def_irq_handler UART1_IRQHandler
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def_irq_default_handler DMA2_IRQHandler
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def_irq_handler UART2_IRQHandler
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def_irq_default_handler DMA3_IRQHandler
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def_irq_handler UART3_IRQHandler
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def_irq_default_handler DMA_Error_IRQHandler
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def_irq_handler UART4_IRQHandler
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def_irq_default_handler FTFL_IRQHandler
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def_irq_handler AACI_IRQHandler
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def_irq_default_handler Read_Collision_IRQHandler
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def_irq_handler CLCD_IRQHandler
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def_irq_default_handler LVD_LVW_IRQHandler
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def_irq_handler ENET_IRQHandler
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def_irq_default_handler LLW_IRQHandler
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def_irq_handler USBDC_IRQHandler
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def_irq_default_handler Watchdog_IRQHandler
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def_irq_handler USBHC_IRQHandler
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def_irq_default_handler I2C0_IRQHandler
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def_irq_handler CHLCD_IRQHandler
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def_irq_default_handler SPI0_IRQHandler
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def_irq_handler FLEXRAY_IRQHandler
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def_irq_default_handler I2S0_Tx_IRQHandler
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def_irq_handler CAN_IRQHandler
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def_irq_default_handler I2S0_Rx_IRQHandler
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def_irq_handler LIN_IRQHandler
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def_irq_default_handler UART0_LON_IRQHandler
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def_irq_handler I2C_IRQHandler
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def_irq_default_handler UART0_RX_TX_IRQHandler
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def_irq_handler CPU_CLCD_IRQHandler
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def_irq_default_handler UART0_ERR_IRQHandler
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def_irq_handler SPI_IRQHandler
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def_irq_default_handler UART1_RX_TX_IRQHandler
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def_irq_default_handler UART1_ERR_IRQHandler
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def_irq_default_handler UART2_RX_TX_IRQHandler
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def_irq_default_handler UART2_ERR_IRQHandler
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def_irq_default_handler ADC0_IRQHandler
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def_irq_default_handler CMP0_IRQHandler
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def_irq_default_handler CMP1_IRQHandler
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def_irq_default_handler FTM0_IRQHandler
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def_irq_default_handler FTM1_IRQHandler
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def_irq_default_handler CMT_IRQHandler
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def_irq_default_handler RTC_IRQHandler
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def_irq_default_handler RTC_Seconds_IRQHandler
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def_irq_default_handler PIT0_IRQHandler
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def_irq_default_handler PIT1_IRQHandler
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def_irq_default_handler PIT2_IRQHandler
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def_irq_default_handler PIT3_IRQHandler
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def_irq_default_handler PDB0_IRQHandler
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def_irq_default_handler USB0_IRQHandler
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def_irq_default_handler USBDCD_IRQHandler
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def_irq_default_handler TSI0_IRQHandler
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def_irq_default_handler MCG_IRQHandler
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def_irq_default_handler LPTimer_IRQHandler
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def_irq_default_handler PORTA_IRQHandler
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def_irq_default_handler PORTB_IRQHandler
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def_irq_default_handler PORTC_IRQHandler
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def_irq_default_handler PORTD_IRQHandler
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def_irq_default_handler PORTE_IRQHandler
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def_irq_default_handler SWI_IRQHandler
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def_irq_default_handler DEF_IRQHandler
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/* Flash protection region, placed at 0x400 */
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/* Flash protection region, placed at 0x400 */
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.text
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.text
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