From ee5946c990ae5ea6ad6391b93a55df875637e0dc Mon Sep 17 00:00:00 2001 From: Harrison Mutai Date: Tue, 2 Mar 2021 10:25:51 +0000 Subject: [PATCH] Add bare metal support to EFM32 targets Modify scatter files to add heap load region, and remove hard coded values. Add supported c libs and bare metal profile to `targets.json` configurations. Affects the following targets: EFM32GG_STK3700, TB_SENSE_12, and EFM32GG11_STK3701. --- .../TOOLCHAIN_ARM_STD/efm32gg.sct | 20 ++++++- .../device/TOOLCHAIN_ARM_STD/efm32gg11.sct | 21 ++++++- .../device/TOOLCHAIN_ARM_STD/efr32mg12p.sct | 19 ++++++- targets/targets.json | 57 +++++++++++++++---- 4 files changed, 97 insertions(+), 20 deletions(-) diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct index 31739ba594..f2062d7888 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_STD/efm32gg.sct @@ -11,6 +11,14 @@ #define MBED_APP_SIZE 0x00100000 #endif +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) +#define MBED_RAM_SIZE 0x20000 +#endif + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE @@ -19,19 +27,25 @@ # endif #endif +#define Vector_Size 0xE0 #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - Vector_Size - Stack_Size) +#define MBED_IRAM1_START (MBED_RAM_START + Vector_Size) +#define RAM_FIXED_SIZE (Vector_Size + Stack_Size) + LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000E0 0x0001FF20-Stack_Size { ; RW data + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (0x200000E0+0x0001FF20) EMPTY -Stack_Size { ; stack + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_IRAM1_START)) { ; heap growing up + } + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -Stack_Size { ; stack } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct index 7bd75410e2..e1b60614ff 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG11/device/TOOLCHAIN_ARM_STD/efm32gg11.sct @@ -11,6 +11,14 @@ #define MBED_APP_SIZE 0x00200000 #endif +#if !defined(MBED_RAM_) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_) +#define MBED_RAM_SIZE 0x80000 +#endif + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE @@ -19,19 +27,26 @@ # endif #endif +#define Vector_Size 0x158 #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE +#define MBED_IRAM1_START (MBED_RAM_START + Vector_Size) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - Vector_Size - Stack_Size) +#define RAM_FIXED_SIZE (Vector_Size + Stack_Size) + LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000158 0x0007FEA8-Stack_Size { ; RW data + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } - - ARM_LIB_STACK (0x20000158+0x0007FEA8) EMPTY -Stack_Size { ; stack + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_IRAM1_START)) { ; heap growing up + } + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -Stack_Size { ; stack } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct index e17d158215..2ef03c3e27 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_ARM_STD/efr32mg12p.sct @@ -11,6 +11,14 @@ #define MBED_APP_SIZE 0x00100000 #endif +#if !defined(MBED_RAM_) +#define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_) +#define MBED_RAM_SIZE 0x40000 +#endif + #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE @@ -19,18 +27,25 @@ # endif #endif +#define Vector_Size 0x110 #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE +#define MBED_IRAM1_START (MBED_RAM_START + Vector_Size) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - Vector_Size - Stack_Size) +#define RAM_FIXED_SIZE (Vector_Size + Stack_Size) + LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000110 0x0003FEF0-Stack_Size { ; RW data + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } - ARM_LIB_STACK (0x20000110+0x0003FEF0) EMPTY -Stack_Size { ; stack + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_IRAM1_START)) { ; heap growing up + } + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -Stack_Size { ; stack } } diff --git a/targets/targets.json b/targets/targets.json index 0c1dc05674..bb20e5b6df 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -5265,16 +5265,27 @@ ], "supported_toolchains": [ "GCC_ARM", - "ARM", - "uARM", - "IAR" + "ARM" ], "release_versions": [ "5" ], "device_name": "EFM32GG990F1024", "public": false, - "bootloader_supported": true + "bootloader_supported": true, + "supported_c_libs": { + "arm": [ + "std", + "small" + ], + "gcc_arm": [ + "std", + "small" + ] + }, + "supported_application_profiles": [ + "full", "bare-metal" + ] }, "EFM32GG_STK3700": { "inherits": [ @@ -5370,16 +5381,27 @@ ], "supported_toolchains": [ "GCC_ARM", - "ARM", - "uARM", - "IAR" + "ARM" ], "release_versions": [ "5" ], "device_name": "EFR32MG12P332F1024GL125", "public": false, - "bootloader_supported": true + "bootloader_supported": true, + "supported_c_libs": { + "arm": [ + "std", + "small" + ], + "gcc_arm": [ + "std", + "small" + ] + }, + "supported_application_profiles": [ + "full", "bare-metal" + ] }, "TB_SENSE_12": { "inherits": [ @@ -5470,16 +5492,27 @@ ], "supported_toolchains": [ "GCC_ARM", - "ARM", - "uARM", - "IAR" + "ARM" ], "release_versions": [ "5" ], "device_name": "EFM32GG11B820F2048GL192", "public": false, - "bootloader_supported": true + "bootloader_supported": true, + "supported_c_libs": { + "arm": [ + "std", + "small" + ], + "gcc_arm": [ + "std", + "small" + ] + }, + "supported_application_profiles": [ + "full", "bare-metal" + ] }, "EFM32GG11_STK3701": { "inherits": [