Merge pull request #10796 from NXPmicro/tickless

NXP: Enable MBED_TICKLESS on various NXP platforms
pull/11334/head
Martin Kojtal 2019-08-22 10:30:14 +02:00 committed by GitHub
commit edcde1ce8c
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
38 changed files with 2883 additions and 1478 deletions

View File

@ -13,6 +13,7 @@
* See the License for the specific language governing permissions and * See the License for the specific language governing permissions and
* limitations under the License. * limitations under the License.
*/ */
#include "mbed_power_mgmt.h"
#include "common_functions.h" #include "common_functions.h"
#include "platform/arm_hal_interrupt.h" #include "platform/arm_hal_interrupt.h"
#include "platform/arm_hal_phy.h" #include "platform/arm_hal_phy.h"
@ -87,8 +88,9 @@ static uint8_t MAC64_addr[8];
static xcvrState_t mPhySeqState; static xcvrState_t mPhySeqState;
static uint8_t rf_mac_handle; static uint8_t rf_mac_handle;
volatile uint8_t rf_ed_value = 0; static volatile uint8_t rf_ed_value = 0;
static bool rf_ack_pending_state = false; static volatile bool rf_ack_pending_state = false;
static volatile bool sleep_blocked = false;
static NanostackRfPhyKw41z *rf = NULL; static NanostackRfPhyKw41z *rf = NULL;
@ -155,6 +157,11 @@ static int8_t rf_device_register(void)
static void rf_device_unregister(void) static void rf_device_unregister(void)
{ {
arm_net_phy_unregister(rf_radio_driver_id); arm_net_phy_unregister(rf_radio_driver_id);
if (sleep_blocked) {
sleep_manager_unlock_deep_sleep();
sleep_blocked = false;
}
} }
/* /*
@ -209,16 +216,29 @@ static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_
/*Reset PHY driver and set to idle*/ /*Reset PHY driver and set to idle*/
case PHY_INTERFACE_RESET: case PHY_INTERFACE_RESET:
rf_abort(); rf_abort();
if (sleep_blocked) {
sleep_manager_unlock_deep_sleep();
sleep_blocked = false;
}
break; break;
/*Disable PHY Interface driver*/ /*Disable PHY Interface driver*/
case PHY_INTERFACE_DOWN: case PHY_INTERFACE_DOWN:
rf_abort(); rf_abort();
if (sleep_blocked) {
sleep_manager_unlock_deep_sleep();
sleep_blocked = false;
}
break; break;
/*Enable PHY Interface driver*/ /*Enable PHY Interface driver*/
case PHY_INTERFACE_UP: case PHY_INTERFACE_UP:
if (PhyPlmeSetCurrentChannelRequest(rf_channel, 0)) { if (PhyPlmeSetCurrentChannelRequest(rf_channel, 0)) {
return 1; return 1;
} }
if (!sleep_blocked) {
/* Disable enter to deep sleep when transfer active */
sleep_manager_lock_deep_sleep();
sleep_blocked = true;
}
rf_receive(); rf_receive();
break; break;
/*Enable wireless interface ED scan mode*/ /*Enable wireless interface ED scan mode*/
@ -226,6 +246,11 @@ static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_
if (PhyPlmeSetCurrentChannelRequest(rf_channel, 0)) { if (PhyPlmeSetCurrentChannelRequest(rf_channel, 0)) {
return 1; return 1;
} }
if (!sleep_blocked) {
/* Disable enter to deep sleep when transfer active */
sleep_manager_lock_deep_sleep();
sleep_blocked = true;
}
rf_abort(); rf_abort();
rf_mac_ed_state_enable(); rf_mac_ed_state_enable();
break; break;
@ -234,6 +259,11 @@ static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_
if (PhyPlmeSetCurrentChannelRequest(rf_channel, 0)) { if (PhyPlmeSetCurrentChannelRequest(rf_channel, 0)) {
return 1; return 1;
} }
if (!sleep_blocked) {
/* Disable enter to deep sleep when transfer active */
sleep_manager_lock_deep_sleep();
sleep_blocked = true;
}
rf_receive(); rf_receive();
break; break;
} }

View File

@ -46,6 +46,7 @@
#include "kinetis_emac_config.h" #include "kinetis_emac_config.h"
#include "kinetis_emac.h" #include "kinetis_emac.h"
#include "mbed_power_mgmt.h"
enet_handle_t g_handle; enet_handle_t g_handle;
// TX Buffer descriptors // TX Buffer descriptors
@ -496,6 +497,9 @@ bool Kinetis_EMAC::power_up()
return false; return false;
} }
// Can't enter deep sleep as long as Ethernet is active
sleep_manager_lock_deep_sleep();
/* Worker thread */ /* Worker thread */
thread = create_new_thread("Kinetis_EMAC_thread", &Kinetis_EMAC::thread_function, this, THREAD_STACKSIZE, THREAD_PRIORITY, &thread_cb); thread = create_new_thread("Kinetis_EMAC_thread", &Kinetis_EMAC::thread_function, this, THREAD_STACKSIZE, THREAD_PRIORITY, &thread_cb);
@ -580,7 +584,8 @@ void Kinetis_EMAC::set_all_multicast(bool all)
void Kinetis_EMAC::power_down() void Kinetis_EMAC::power_down()
{ {
/* No-op at this stage */ // Ethernet went down, can enter deep sleep
sleep_manager_unlock_deep_sleep();
} }
void Kinetis_EMAC::set_memory_manager(EMACMemoryManager &mem_mngr) void Kinetis_EMAC::set_memory_manager(EMACMemoryManager &mem_mngr)

View File

@ -46,6 +46,7 @@
#include "imx_emac_config.h" #include "imx_emac_config.h"
#include "imx_emac.h" #include "imx_emac.h"
#include "mbed_power_mgmt.h"
enet_handle_t g_handle; enet_handle_t g_handle;
// RX packet buffer pointers // RX packet buffer pointers
@ -500,6 +501,9 @@ bool Kinetis_EMAC::power_up()
return false; return false;
} }
// Can't enter deep sleep as long as Ethernet is active
sleep_manager_lock_deep_sleep();
/* Worker thread */ /* Worker thread */
thread = create_new_thread("Kinetis_EMAC_thread", &Kinetis_EMAC::thread_function, this, THREAD_STACKSIZE, THREAD_PRIORITY, &thread_cb); thread = create_new_thread("Kinetis_EMAC_thread", &Kinetis_EMAC::thread_function, this, THREAD_STACKSIZE, THREAD_PRIORITY, &thread_cb);
@ -584,7 +588,8 @@ void Kinetis_EMAC::set_all_multicast(bool all)
void Kinetis_EMAC::power_down() void Kinetis_EMAC::power_down()
{ {
/* No-op at this stage */ // Ethernet went down, can enter deep sleep
sleep_manager_unlock_deep_sleep();
} }
void Kinetis_EMAC::set_memory_manager(EMACMemoryManager &mem_mngr) void Kinetis_EMAC::set_memory_manager(EMACMemoryManager &mem_mngr)

View File

@ -1,37 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP * Copyright 2016-2017 NXP
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_flash.h" #include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -42,53 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void) void SMC_PreEnterStopModes(void)
{ {
flash_prefetch_speculation_status_t speculationStatus = g_savedPrimask = DisableGlobalIRQ();
{
kFLASH_prefetchSpeculationOptionDisable, /* Disable instruction speculation.*/
kFLASH_prefetchSpeculationOptionDisable, /* Disable data speculation.*/
};
__disable_irq();
__ISB(); __ISB();
/*
* Before enter stop modes, the flash cache prefetch should be disabled.
* Otherwise the prefetch might be interrupted by stop, then the data and
* and instruction from flash are wrong.
*/
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
} }
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void) void SMC_PostExitStopModes(void)
{ {
flash_prefetch_speculation_status_t speculationStatus = EnableGlobalIRQ(g_savedPrimask);
{
kFLASH_prefetchSpeculationOptionEnable, /* Enable instruction speculation.*/
kFLASH_prefetchSpeculationOptionEnable, /* Enable data speculation.*/
};
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
__enable_irq();
__ISB(); __ISB();
} }
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -96,13 +170,19 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
@ -114,22 +194,29 @@ status_t SMC_SetPowerModeWait(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -137,12 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -152,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -172,18 +263,24 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* configure VLPW mode */ /* configure VLPW mode */
@ -196,14 +293,20 @@ status_t SMC_SetPowerModeVlpw(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -211,12 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -227,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -239,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -267,12 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -284,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -296,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -319,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -332,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -383,12 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP * Copyright 2016-2017 NXP
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,15 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.3. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 3)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -64,18 +41,14 @@ typedef enum _smc_power_mode_protection
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -324,11 +297,7 @@ void SMC_PostExitStopModes(void);
* *
* This function should be called before entering WAIT/VLPW modes. * This function should be called before entering WAIT/VLPW modes.
*/ */
static inline void SMC_PreEnterWaitModes(void) void SMC_PreEnterWaitModes(void);
{
__disable_irq();
__ISB();
}
/*! /*!
* @brief Recovers after wake up from stop modes. * @brief Recovers after wake up from stop modes.
@ -336,11 +305,7 @@ static inline void SMC_PreEnterWaitModes(void)
* This function should be called after wake up from WAIT/VLPW modes. * This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes. * It is used with @ref SMC_PreEnterWaitModes.
*/ */
static inline void SMC_PostExitWaitModes(void) void SMC_PostExitWaitModes(void);
{
__enable_irq();
__ISB();
}
/*! /*!
* @brief Configures the system to RUN power mode. * @brief Configures the system to RUN power mode.

View File

@ -340,4 +340,14 @@ const PinMap *serial_rts_pinmap()
return PinMap_UART_RTS; return PinMap_UART_RTS;
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
UART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kUART_TransmissionCompleteFlag & UART_GetStatusFlags((UART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,37 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_flash.h" #include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -42,53 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void) void SMC_PreEnterStopModes(void)
{ {
flash_prefetch_speculation_status_t speculationStatus = g_savedPrimask = DisableGlobalIRQ();
{
kFLASH_prefetchSpeculationOptionDisable, /* Disable instruction speculation.*/
kFLASH_prefetchSpeculationOptionDisable, /* Disable data speculation.*/
};
__disable_irq();
__ISB(); __ISB();
/*
* Before enter stop modes, the flash cache prefetch should be disabled.
* Otherwise the prefetch might be interrupted by stop, then the data and
* and instruction from flash are wrong.
*/
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
} }
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void) void SMC_PostExitStopModes(void)
{ {
flash_prefetch_speculation_status_t speculationStatus = EnableGlobalIRQ(g_savedPrimask);
{
kFLASH_prefetchSpeculationOptionEnable, /* Enable instruction speculation.*/
kFLASH_prefetchSpeculationOptionEnable, /* Enable data speculation.*/
};
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
__enable_irq();
__ISB(); __ISB();
} }
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -96,13 +170,19 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
@ -114,22 +194,29 @@ status_t SMC_SetPowerModeWait(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -137,12 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -152,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -172,18 +263,24 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* configure VLPW mode */ /* configure VLPW mode */
@ -196,14 +293,20 @@ status_t SMC_SetPowerModeVlpw(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -211,12 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -227,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -239,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -267,12 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -284,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -296,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -319,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -332,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -383,12 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,15 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.3. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 3)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -64,18 +41,14 @@ typedef enum _smc_power_mode_protection
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -324,11 +297,7 @@ void SMC_PostExitStopModes(void);
* *
* This function should be called before entering WAIT/VLPW modes. * This function should be called before entering WAIT/VLPW modes.
*/ */
static inline void SMC_PreEnterWaitModes(void) void SMC_PreEnterWaitModes(void);
{
__disable_irq();
__ISB();
}
/*! /*!
* @brief Recovers after wake up from stop modes. * @brief Recovers after wake up from stop modes.
@ -336,11 +305,7 @@ static inline void SMC_PreEnterWaitModes(void)
* This function should be called after wake up from WAIT/VLPW modes. * This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes. * It is used with @ref SMC_PreEnterWaitModes.
*/ */
static inline void SMC_PostExitWaitModes(void) void SMC_PostExitWaitModes(void);
{
__enable_irq();
__ISB();
}
/*! /*!
* @brief Configures the system to RUN power mode. * @brief Configures the system to RUN power mode.

View File

@ -332,4 +332,14 @@ const PinMap *serial_rts_pinmap()
return PinMap_UART_RTS; return PinMap_UART_RTS;
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
LPUART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kLPUART_TransmissionCompleteFlag & LPUART_GetStatusFlags((LPUART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,36 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -41,20 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -62,38 +170,53 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
__DSB();
__WFI(); __WFI();
__ISB();
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -101,10 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -114,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -134,42 +263,50 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* Power mode transaction to VLPW can only happen in VLPR mode */
if (kSMC_PowerStateVlpr != SMC_GetPowerModeState(base))
{
return kStatus_Fail;
}
/* configure VLPW mode */ /* configure VLPW mode */
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
__DSB();
__WFI(); __WFI();
__ISB();
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -177,10 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -191,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -203,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -231,10 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -246,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -258,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -281,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -294,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -345,10 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,16 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/*! @file */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.1. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -54,29 +30,25 @@
typedef enum _smc_power_mode_protection typedef enum _smc_power_mode_protection
{ {
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */ kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-low-leakage Stop Mode. */
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */ kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-leakage Stop Mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */ kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-power Mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */ kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High-speed Run mode. */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -107,10 +79,10 @@ typedef enum _smc_power_state
*/ */
typedef enum _smc_run_mode typedef enum _smc_run_mode
{ {
kSMC_RunNormal = 0U, /*!< normal RUN mode. */ kSMC_RunNormal = 0U, /*!< Normal RUN mode. */
kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */ kSMC_RunVlpr = 2U, /*!< Very-low-power RUN mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */ kSMC_Hsrun = 3U /*!< High-speed Run mode (HSRUN). */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
} smc_run_mode_t; } smc_run_mode_t;
@ -120,12 +92,12 @@ typedef enum _smc_run_mode
typedef enum _smc_stop_mode typedef enum _smc_stop_mode
{ {
kSMC_StopNormal = 0U, /*!< Normal STOP mode. */ kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */ kSMC_StopVlps = 2U, /*!< Very-low-power STOP mode. */
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */ kSMC_StopLls = 3U, /*!< Low-leakage Stop mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */ kSMC_StopVlls = 4U /*!< Very-low-leakage Stop mode. */
#endif #endif
} smc_stop_mode_t; } smc_stop_mode_t;
@ -155,7 +127,7 @@ typedef enum _smc_partial_stop_mode
} smc_partial_stop_option_t; } smc_partial_stop_option_t;
/*! /*!
* @brief SMC configuration status * @brief SMC configuration status.
*/ */
enum _smc_status enum _smc_status
{ {
@ -190,7 +162,7 @@ typedef struct _smc_param
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
/*! /*!
* @brief SMC Low-Leakage Stop power mode config * @brief SMC Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_lls_config typedef struct _smc_power_mode_lls_config
{ {
@ -205,7 +177,7 @@ typedef struct _smc_power_mode_lls_config
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief SMC Very Low-Leakage Stop power mode config * @brief SMC Very Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_vlls_config typedef struct _smc_power_mode_vlls_config
{ {
@ -242,10 +214,10 @@ extern "C" {
* @brief Gets the SMC version ID. * @brief Gets the SMC version ID.
* *
* This function gets the SMC version ID, including major version number, * This function gets the SMC version ID, including major version number,
* minor version number and feature specification number. * minor version number, and feature specification number.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param versionId Pointer to version ID structure. * @param versionId Pointer to the version ID structure.
*/ */
static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId) static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
{ {
@ -257,10 +229,10 @@ static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
/*! /*!
* @brief Gets the SMC parameter. * @brief Gets the SMC parameter.
* *
* This function gets the SMC parameter, including the enabled power mdoes. * This function gets the SMC parameter including the enabled power mdoes.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param param Pointer to SMC param structure. * @param param Pointer to the SMC param structure.
*/ */
void SMC_GetParam(SMC_Type *base, smc_param_t *param); void SMC_GetParam(SMC_Type *base, smc_param_t *param);
#endif #endif
@ -274,7 +246,7 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param);
* system level initialization stage. See the reference manual for details. * system level initialization stage. See the reference manual for details.
* This register can only write once after the power reset. * This register can only write once after the power reset.
* *
* The allowed modes are passed as bit map, for example, to allow LLS and VLLS, * The allowed modes are passed as bit map. For example, to allow LLS and VLLS,
* use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps). * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
* To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll). * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
* *
@ -289,13 +261,13 @@ static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedMod
/*! /*!
* @brief Gets the current power mode status. * @brief Gets the current power mode status.
* *
* This function returns the current power mode stat. Once application * This function returns the current power mode status. After the application
* switches the power mode, it should always check the stat to check whether it * switches the power mode, it should always check the status to check whether it
* runs into the specified mode or not. An application should check * runs into the specified mode or not. The application should check
* this mode before switching to a different mode. The system requires that * this mode before switching to a different mode. The system requires that
* only certain modes can switch to other specific modes. See the * only certain modes can switch to other specific modes. See the
* reference manual for details and the smc_power_state_t for information about * reference manual for details and the smc_power_state_t for information about
* the power stat. * the power status.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return Current power mode status. * @return Current power mode status.
@ -306,7 +278,37 @@ static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
} }
/*! /*!
* @brief Configure the system to RUN power mode. * @brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with @ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void);
/*!
* @brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void);
/*!
* @brief Configures the system to RUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -315,7 +317,7 @@ status_t SMC_SetPowerModeRun(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*! /*!
* @brief Configure the system to HSRUN power mode. * @brief Configures the system to HSRUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -324,7 +326,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*! /*!
* @brief Configure the system to WAIT power mode. * @brief Configures the system to WAIT power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -332,7 +334,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
status_t SMC_SetPowerModeWait(SMC_Type *base); status_t SMC_SetPowerModeWait(SMC_Type *base);
/*! /*!
* @brief Configure the system to Stop power mode. * @brief Configures the system to Stop power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param option Partial Stop mode option. * @param option Partial Stop mode option.
@ -342,7 +344,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode. * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
@ -351,7 +353,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode); status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
#else #else
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -360,7 +362,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/*! /*!
* @brief Configure the system to VLPW power mode. * @brief Configures the system to VLPW power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -368,7 +370,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
status_t SMC_SetPowerModeVlpw(SMC_Type *base); status_t SMC_SetPowerModeVlpw(SMC_Type *base);
/*! /*!
* @brief Configure the system to VLPS power mode. * @brief Configures the system to VLPS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -379,7 +381,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The LLS power mode configuration structure * @param config The LLS power mode configuration structure
@ -388,7 +390,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config); status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
#else #else
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -399,7 +401,7 @@ status_t SMC_SetPowerModeLls(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief Configure the system to VLLS power mode. * @brief Configures the system to VLLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The VLLS power mode configuration structure. * @param config The VLLS power mode configuration structure.

View File

@ -288,4 +288,14 @@ const PinMap *serial_rts_pinmap()
return PinMap_UART_RTS; return PinMap_UART_RTS;
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
LPUART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kLPUART_TransmissionCompleteFlag & LPUART_GetStatusFlags((LPUART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,36 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -41,20 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -62,38 +170,53 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
__DSB();
__WFI(); __WFI();
__ISB();
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -101,10 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -114,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -134,42 +263,50 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* Power mode transaction to VLPW can only happen in VLPR mode */
if (kSMC_PowerStateVlpr != SMC_GetPowerModeState(base))
{
return kStatus_Fail;
}
/* configure VLPW mode */ /* configure VLPW mode */
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
__DSB();
__WFI(); __WFI();
__ISB();
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -177,10 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -191,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -203,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -231,10 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -246,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -258,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -281,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -294,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -345,10 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,16 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/*! @file */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.1. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -54,29 +30,25 @@
typedef enum _smc_power_mode_protection typedef enum _smc_power_mode_protection
{ {
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */ kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-low-leakage Stop Mode. */
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */ kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-leakage Stop Mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */ kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-power Mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */ kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High-speed Run mode. */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -107,10 +79,10 @@ typedef enum _smc_power_state
*/ */
typedef enum _smc_run_mode typedef enum _smc_run_mode
{ {
kSMC_RunNormal = 0U, /*!< normal RUN mode. */ kSMC_RunNormal = 0U, /*!< Normal RUN mode. */
kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */ kSMC_RunVlpr = 2U, /*!< Very-low-power RUN mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */ kSMC_Hsrun = 3U /*!< High-speed Run mode (HSRUN). */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
} smc_run_mode_t; } smc_run_mode_t;
@ -120,12 +92,12 @@ typedef enum _smc_run_mode
typedef enum _smc_stop_mode typedef enum _smc_stop_mode
{ {
kSMC_StopNormal = 0U, /*!< Normal STOP mode. */ kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */ kSMC_StopVlps = 2U, /*!< Very-low-power STOP mode. */
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */ kSMC_StopLls = 3U, /*!< Low-leakage Stop mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */ kSMC_StopVlls = 4U /*!< Very-low-leakage Stop mode. */
#endif #endif
} smc_stop_mode_t; } smc_stop_mode_t;
@ -155,7 +127,7 @@ typedef enum _smc_partial_stop_mode
} smc_partial_stop_option_t; } smc_partial_stop_option_t;
/*! /*!
* @brief SMC configuration status * @brief SMC configuration status.
*/ */
enum _smc_status enum _smc_status
{ {
@ -190,7 +162,7 @@ typedef struct _smc_param
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
/*! /*!
* @brief SMC Low-Leakage Stop power mode config * @brief SMC Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_lls_config typedef struct _smc_power_mode_lls_config
{ {
@ -205,7 +177,7 @@ typedef struct _smc_power_mode_lls_config
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief SMC Very Low-Leakage Stop power mode config * @brief SMC Very Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_vlls_config typedef struct _smc_power_mode_vlls_config
{ {
@ -242,10 +214,10 @@ extern "C" {
* @brief Gets the SMC version ID. * @brief Gets the SMC version ID.
* *
* This function gets the SMC version ID, including major version number, * This function gets the SMC version ID, including major version number,
* minor version number and feature specification number. * minor version number, and feature specification number.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param versionId Pointer to version ID structure. * @param versionId Pointer to the version ID structure.
*/ */
static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId) static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
{ {
@ -257,10 +229,10 @@ static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
/*! /*!
* @brief Gets the SMC parameter. * @brief Gets the SMC parameter.
* *
* This function gets the SMC parameter, including the enabled power mdoes. * This function gets the SMC parameter including the enabled power mdoes.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param param Pointer to SMC param structure. * @param param Pointer to the SMC param structure.
*/ */
void SMC_GetParam(SMC_Type *base, smc_param_t *param); void SMC_GetParam(SMC_Type *base, smc_param_t *param);
#endif #endif
@ -274,7 +246,7 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param);
* system level initialization stage. See the reference manual for details. * system level initialization stage. See the reference manual for details.
* This register can only write once after the power reset. * This register can only write once after the power reset.
* *
* The allowed modes are passed as bit map, for example, to allow LLS and VLLS, * The allowed modes are passed as bit map. For example, to allow LLS and VLLS,
* use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps). * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
* To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll). * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
* *
@ -289,13 +261,13 @@ static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedMod
/*! /*!
* @brief Gets the current power mode status. * @brief Gets the current power mode status.
* *
* This function returns the current power mode stat. Once application * This function returns the current power mode status. After the application
* switches the power mode, it should always check the stat to check whether it * switches the power mode, it should always check the status to check whether it
* runs into the specified mode or not. An application should check * runs into the specified mode or not. The application should check
* this mode before switching to a different mode. The system requires that * this mode before switching to a different mode. The system requires that
* only certain modes can switch to other specific modes. See the * only certain modes can switch to other specific modes. See the
* reference manual for details and the smc_power_state_t for information about * reference manual for details and the smc_power_state_t for information about
* the power stat. * the power status.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return Current power mode status. * @return Current power mode status.
@ -306,7 +278,37 @@ static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
} }
/*! /*!
* @brief Configure the system to RUN power mode. * @brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with @ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void);
/*!
* @brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void);
/*!
* @brief Configures the system to RUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -315,7 +317,7 @@ status_t SMC_SetPowerModeRun(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*! /*!
* @brief Configure the system to HSRUN power mode. * @brief Configures the system to HSRUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -324,7 +326,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*! /*!
* @brief Configure the system to WAIT power mode. * @brief Configures the system to WAIT power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -332,7 +334,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
status_t SMC_SetPowerModeWait(SMC_Type *base); status_t SMC_SetPowerModeWait(SMC_Type *base);
/*! /*!
* @brief Configure the system to Stop power mode. * @brief Configures the system to Stop power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param option Partial Stop mode option. * @param option Partial Stop mode option.
@ -342,7 +344,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode. * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
@ -351,7 +353,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode); status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
#else #else
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -360,7 +362,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/*! /*!
* @brief Configure the system to VLPW power mode. * @brief Configures the system to VLPW power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -368,7 +370,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
status_t SMC_SetPowerModeVlpw(SMC_Type *base); status_t SMC_SetPowerModeVlpw(SMC_Type *base);
/*! /*!
* @brief Configure the system to VLPS power mode. * @brief Configures the system to VLPS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -379,7 +381,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The LLS power mode configuration structure * @param config The LLS power mode configuration structure
@ -388,7 +390,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config); status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
#else #else
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -399,7 +401,7 @@ status_t SMC_SetPowerModeLls(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief Configure the system to VLLS power mode. * @brief Configures the system to VLLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The VLLS power mode configuration structure. * @param config The VLLS power mode configuration structure.

View File

@ -300,4 +300,14 @@ const PinMap *serial_rts_pinmap()
return PinMap_UART_RTS; return PinMap_UART_RTS;
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
LPUART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kLPUART_TransmissionCompleteFlag & LPUART_GetStatusFlags((LPUART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,36 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -41,20 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -62,13 +170,19 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
@ -80,22 +194,29 @@ status_t SMC_SetPowerModeWait(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -103,12 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -118,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -138,18 +263,24 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* configure VLPW mode */ /* configure VLPW mode */
@ -162,14 +293,20 @@ status_t SMC_SetPowerModeVlpw(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -177,12 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -193,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -205,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -233,12 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -250,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -262,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -285,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -298,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -349,12 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,15 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.2. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -53,29 +30,25 @@
typedef enum _smc_power_mode_protection typedef enum _smc_power_mode_protection
{ {
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */ kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-low-leakage Stop Mode. */
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */ kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-leakage Stop Mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */ kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-power Mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */ kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High-speed Run mode. */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -106,10 +79,10 @@ typedef enum _smc_power_state
*/ */
typedef enum _smc_run_mode typedef enum _smc_run_mode
{ {
kSMC_RunNormal = 0U, /*!< normal RUN mode. */ kSMC_RunNormal = 0U, /*!< Normal RUN mode. */
kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */ kSMC_RunVlpr = 2U, /*!< Very-low-power RUN mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */ kSMC_Hsrun = 3U /*!< High-speed Run mode (HSRUN). */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
} smc_run_mode_t; } smc_run_mode_t;
@ -119,12 +92,12 @@ typedef enum _smc_run_mode
typedef enum _smc_stop_mode typedef enum _smc_stop_mode
{ {
kSMC_StopNormal = 0U, /*!< Normal STOP mode. */ kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */ kSMC_StopVlps = 2U, /*!< Very-low-power STOP mode. */
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */ kSMC_StopLls = 3U, /*!< Low-leakage Stop mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */ kSMC_StopVlls = 4U /*!< Very-low-leakage Stop mode. */
#endif #endif
} smc_stop_mode_t; } smc_stop_mode_t;
@ -154,7 +127,7 @@ typedef enum _smc_partial_stop_mode
} smc_partial_stop_option_t; } smc_partial_stop_option_t;
/*! /*!
* @brief SMC configuration status * @brief SMC configuration status.
*/ */
enum _smc_status enum _smc_status
{ {
@ -189,7 +162,7 @@ typedef struct _smc_param
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
/*! /*!
* @brief SMC Low-Leakage Stop power mode config * @brief SMC Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_lls_config typedef struct _smc_power_mode_lls_config
{ {
@ -204,7 +177,7 @@ typedef struct _smc_power_mode_lls_config
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief SMC Very Low-Leakage Stop power mode config * @brief SMC Very Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_vlls_config typedef struct _smc_power_mode_vlls_config
{ {
@ -241,10 +214,10 @@ extern "C" {
* @brief Gets the SMC version ID. * @brief Gets the SMC version ID.
* *
* This function gets the SMC version ID, including major version number, * This function gets the SMC version ID, including major version number,
* minor version number and feature specification number. * minor version number, and feature specification number.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param versionId Pointer to version ID structure. * @param versionId Pointer to the version ID structure.
*/ */
static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId) static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
{ {
@ -256,10 +229,10 @@ static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
/*! /*!
* @brief Gets the SMC parameter. * @brief Gets the SMC parameter.
* *
* This function gets the SMC parameter, including the enabled power mdoes. * This function gets the SMC parameter including the enabled power mdoes.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param param Pointer to SMC param structure. * @param param Pointer to the SMC param structure.
*/ */
void SMC_GetParam(SMC_Type *base, smc_param_t *param); void SMC_GetParam(SMC_Type *base, smc_param_t *param);
#endif #endif
@ -273,7 +246,7 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param);
* system level initialization stage. See the reference manual for details. * system level initialization stage. See the reference manual for details.
* This register can only write once after the power reset. * This register can only write once after the power reset.
* *
* The allowed modes are passed as bit map, for example, to allow LLS and VLLS, * The allowed modes are passed as bit map. For example, to allow LLS and VLLS,
* use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps). * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
* To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll). * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
* *
@ -288,13 +261,13 @@ static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedMod
/*! /*!
* @brief Gets the current power mode status. * @brief Gets the current power mode status.
* *
* This function returns the current power mode stat. Once application * This function returns the current power mode status. After the application
* switches the power mode, it should always check the stat to check whether it * switches the power mode, it should always check the status to check whether it
* runs into the specified mode or not. An application should check * runs into the specified mode or not. The application should check
* this mode before switching to a different mode. The system requires that * this mode before switching to a different mode. The system requires that
* only certain modes can switch to other specific modes. See the * only certain modes can switch to other specific modes. See the
* reference manual for details and the smc_power_state_t for information about * reference manual for details and the smc_power_state_t for information about
* the power stat. * the power status.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return Current power mode status. * @return Current power mode status.
@ -305,7 +278,37 @@ static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
} }
/*! /*!
* @brief Configure the system to RUN power mode. * @brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with @ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void);
/*!
* @brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void);
/*!
* @brief Configures the system to RUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -314,7 +317,7 @@ status_t SMC_SetPowerModeRun(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*! /*!
* @brief Configure the system to HSRUN power mode. * @brief Configures the system to HSRUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -323,7 +326,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*! /*!
* @brief Configure the system to WAIT power mode. * @brief Configures the system to WAIT power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -331,7 +334,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
status_t SMC_SetPowerModeWait(SMC_Type *base); status_t SMC_SetPowerModeWait(SMC_Type *base);
/*! /*!
* @brief Configure the system to Stop power mode. * @brief Configures the system to Stop power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param option Partial Stop mode option. * @param option Partial Stop mode option.
@ -341,7 +344,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode. * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
@ -350,7 +353,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode); status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
#else #else
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -359,7 +362,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/*! /*!
* @brief Configure the system to VLPW power mode. * @brief Configures the system to VLPW power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -367,7 +370,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
status_t SMC_SetPowerModeVlpw(SMC_Type *base); status_t SMC_SetPowerModeVlpw(SMC_Type *base);
/*! /*!
* @brief Configure the system to VLPS power mode. * @brief Configures the system to VLPS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -378,7 +381,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The LLS power mode configuration structure * @param config The LLS power mode configuration structure
@ -387,7 +390,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config); status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
#else #else
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -398,7 +401,7 @@ status_t SMC_SetPowerModeLls(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief Configure the system to VLLS power mode. * @brief Configures the system to VLLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The VLLS power mode configuration structure. * @param config The VLLS power mode configuration structure.

View File

@ -328,4 +328,14 @@ const PinMap *serial_rts_pinmap()
return PinMap_UART_RTS; return PinMap_UART_RTS;
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
LPUART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kLPUART_TransmissionCompleteFlag & LPUART_GetStatusFlags((LPUART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,36 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -41,20 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -62,13 +170,19 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
@ -80,22 +194,29 @@ status_t SMC_SetPowerModeWait(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -103,12 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -118,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -138,18 +263,24 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* configure VLPW mode */ /* configure VLPW mode */
@ -162,14 +293,20 @@ status_t SMC_SetPowerModeVlpw(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -177,12 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -193,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -205,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -233,12 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -250,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -262,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -285,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -298,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -349,12 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,15 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.2. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -53,29 +30,25 @@
typedef enum _smc_power_mode_protection typedef enum _smc_power_mode_protection
{ {
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */ kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-low-leakage Stop Mode. */
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */ kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-leakage Stop Mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */ kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-power Mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */ kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High-speed Run mode. */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -106,10 +79,10 @@ typedef enum _smc_power_state
*/ */
typedef enum _smc_run_mode typedef enum _smc_run_mode
{ {
kSMC_RunNormal = 0U, /*!< normal RUN mode. */ kSMC_RunNormal = 0U, /*!< Normal RUN mode. */
kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */ kSMC_RunVlpr = 2U, /*!< Very-low-power RUN mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */ kSMC_Hsrun = 3U /*!< High-speed Run mode (HSRUN). */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
} smc_run_mode_t; } smc_run_mode_t;
@ -119,12 +92,12 @@ typedef enum _smc_run_mode
typedef enum _smc_stop_mode typedef enum _smc_stop_mode
{ {
kSMC_StopNormal = 0U, /*!< Normal STOP mode. */ kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */ kSMC_StopVlps = 2U, /*!< Very-low-power STOP mode. */
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */ kSMC_StopLls = 3U, /*!< Low-leakage Stop mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */ kSMC_StopVlls = 4U /*!< Very-low-leakage Stop mode. */
#endif #endif
} smc_stop_mode_t; } smc_stop_mode_t;
@ -154,7 +127,7 @@ typedef enum _smc_partial_stop_mode
} smc_partial_stop_option_t; } smc_partial_stop_option_t;
/*! /*!
* @brief SMC configuration status * @brief SMC configuration status.
*/ */
enum _smc_status enum _smc_status
{ {
@ -189,7 +162,7 @@ typedef struct _smc_param
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
/*! /*!
* @brief SMC Low-Leakage Stop power mode config * @brief SMC Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_lls_config typedef struct _smc_power_mode_lls_config
{ {
@ -204,7 +177,7 @@ typedef struct _smc_power_mode_lls_config
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief SMC Very Low-Leakage Stop power mode config * @brief SMC Very Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_vlls_config typedef struct _smc_power_mode_vlls_config
{ {
@ -241,10 +214,10 @@ extern "C" {
* @brief Gets the SMC version ID. * @brief Gets the SMC version ID.
* *
* This function gets the SMC version ID, including major version number, * This function gets the SMC version ID, including major version number,
* minor version number and feature specification number. * minor version number, and feature specification number.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param versionId Pointer to version ID structure. * @param versionId Pointer to the version ID structure.
*/ */
static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId) static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
{ {
@ -256,10 +229,10 @@ static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
/*! /*!
* @brief Gets the SMC parameter. * @brief Gets the SMC parameter.
* *
* This function gets the SMC parameter, including the enabled power mdoes. * This function gets the SMC parameter including the enabled power mdoes.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param param Pointer to SMC param structure. * @param param Pointer to the SMC param structure.
*/ */
void SMC_GetParam(SMC_Type *base, smc_param_t *param); void SMC_GetParam(SMC_Type *base, smc_param_t *param);
#endif #endif
@ -273,7 +246,7 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param);
* system level initialization stage. See the reference manual for details. * system level initialization stage. See the reference manual for details.
* This register can only write once after the power reset. * This register can only write once after the power reset.
* *
* The allowed modes are passed as bit map, for example, to allow LLS and VLLS, * The allowed modes are passed as bit map. For example, to allow LLS and VLLS,
* use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps). * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
* To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll). * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
* *
@ -288,13 +261,13 @@ static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedMod
/*! /*!
* @brief Gets the current power mode status. * @brief Gets the current power mode status.
* *
* This function returns the current power mode stat. Once application * This function returns the current power mode status. After the application
* switches the power mode, it should always check the stat to check whether it * switches the power mode, it should always check the status to check whether it
* runs into the specified mode or not. An application should check * runs into the specified mode or not. The application should check
* this mode before switching to a different mode. The system requires that * this mode before switching to a different mode. The system requires that
* only certain modes can switch to other specific modes. See the * only certain modes can switch to other specific modes. See the
* reference manual for details and the smc_power_state_t for information about * reference manual for details and the smc_power_state_t for information about
* the power stat. * the power status.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return Current power mode status. * @return Current power mode status.
@ -305,7 +278,37 @@ static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
} }
/*! /*!
* @brief Configure the system to RUN power mode. * @brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with @ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void);
/*!
* @brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void);
/*!
* @brief Configures the system to RUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -314,7 +317,7 @@ status_t SMC_SetPowerModeRun(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*! /*!
* @brief Configure the system to HSRUN power mode. * @brief Configures the system to HSRUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -323,7 +326,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*! /*!
* @brief Configure the system to WAIT power mode. * @brief Configures the system to WAIT power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -331,7 +334,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
status_t SMC_SetPowerModeWait(SMC_Type *base); status_t SMC_SetPowerModeWait(SMC_Type *base);
/*! /*!
* @brief Configure the system to Stop power mode. * @brief Configures the system to Stop power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param option Partial Stop mode option. * @param option Partial Stop mode option.
@ -341,7 +344,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode. * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
@ -350,7 +353,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode); status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
#else #else
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -359,7 +362,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/*! /*!
* @brief Configure the system to VLPW power mode. * @brief Configures the system to VLPW power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -367,7 +370,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
status_t SMC_SetPowerModeVlpw(SMC_Type *base); status_t SMC_SetPowerModeVlpw(SMC_Type *base);
/*! /*!
* @brief Configure the system to VLPS power mode. * @brief Configures the system to VLPS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -378,7 +381,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The LLS power mode configuration structure * @param config The LLS power mode configuration structure
@ -387,7 +390,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config); status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
#else #else
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -398,7 +401,7 @@ status_t SMC_SetPowerModeLls(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief Configure the system to VLLS power mode. * @brief Configures the system to VLLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The VLLS power mode configuration structure. * @param config The VLLS power mode configuration structure.

View File

@ -327,4 +327,14 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
#endif #endif
void serial_wait_tx_complete(uint32_t uart_index)
{
UART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kUART_TransmissionCompleteFlag & UART_GetStatusFlags((UART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,36 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -41,20 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -62,13 +170,19 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
@ -80,22 +194,29 @@ status_t SMC_SetPowerModeWait(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -103,12 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -118,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -138,18 +263,24 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* configure VLPW mode */ /* configure VLPW mode */
@ -162,14 +293,20 @@ status_t SMC_SetPowerModeVlpw(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -177,12 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -193,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -205,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -233,12 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -250,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -262,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -285,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -298,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -349,12 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,15 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.2. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -53,29 +30,25 @@
typedef enum _smc_power_mode_protection typedef enum _smc_power_mode_protection
{ {
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */ kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-low-leakage Stop Mode. */
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */ kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-leakage Stop Mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */ kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-power Mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */ kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High-speed Run mode. */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -106,10 +79,10 @@ typedef enum _smc_power_state
*/ */
typedef enum _smc_run_mode typedef enum _smc_run_mode
{ {
kSMC_RunNormal = 0U, /*!< normal RUN mode. */ kSMC_RunNormal = 0U, /*!< Normal RUN mode. */
kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */ kSMC_RunVlpr = 2U, /*!< Very-low-power RUN mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */ kSMC_Hsrun = 3U /*!< High-speed Run mode (HSRUN). */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
} smc_run_mode_t; } smc_run_mode_t;
@ -119,12 +92,12 @@ typedef enum _smc_run_mode
typedef enum _smc_stop_mode typedef enum _smc_stop_mode
{ {
kSMC_StopNormal = 0U, /*!< Normal STOP mode. */ kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */ kSMC_StopVlps = 2U, /*!< Very-low-power STOP mode. */
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */ kSMC_StopLls = 3U, /*!< Low-leakage Stop mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */ kSMC_StopVlls = 4U /*!< Very-low-leakage Stop mode. */
#endif #endif
} smc_stop_mode_t; } smc_stop_mode_t;
@ -154,7 +127,7 @@ typedef enum _smc_partial_stop_mode
} smc_partial_stop_option_t; } smc_partial_stop_option_t;
/*! /*!
* @brief SMC configuration status * @brief SMC configuration status.
*/ */
enum _smc_status enum _smc_status
{ {
@ -189,7 +162,7 @@ typedef struct _smc_param
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
/*! /*!
* @brief SMC Low-Leakage Stop power mode config * @brief SMC Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_lls_config typedef struct _smc_power_mode_lls_config
{ {
@ -204,7 +177,7 @@ typedef struct _smc_power_mode_lls_config
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief SMC Very Low-Leakage Stop power mode config * @brief SMC Very Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_vlls_config typedef struct _smc_power_mode_vlls_config
{ {
@ -241,10 +214,10 @@ extern "C" {
* @brief Gets the SMC version ID. * @brief Gets the SMC version ID.
* *
* This function gets the SMC version ID, including major version number, * This function gets the SMC version ID, including major version number,
* minor version number and feature specification number. * minor version number, and feature specification number.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param versionId Pointer to version ID structure. * @param versionId Pointer to the version ID structure.
*/ */
static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId) static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
{ {
@ -256,10 +229,10 @@ static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
/*! /*!
* @brief Gets the SMC parameter. * @brief Gets the SMC parameter.
* *
* This function gets the SMC parameter, including the enabled power mdoes. * This function gets the SMC parameter including the enabled power mdoes.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param param Pointer to SMC param structure. * @param param Pointer to the SMC param structure.
*/ */
void SMC_GetParam(SMC_Type *base, smc_param_t *param); void SMC_GetParam(SMC_Type *base, smc_param_t *param);
#endif #endif
@ -273,7 +246,7 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param);
* system level initialization stage. See the reference manual for details. * system level initialization stage. See the reference manual for details.
* This register can only write once after the power reset. * This register can only write once after the power reset.
* *
* The allowed modes are passed as bit map, for example, to allow LLS and VLLS, * The allowed modes are passed as bit map. For example, to allow LLS and VLLS,
* use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps). * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
* To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll). * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
* *
@ -288,13 +261,13 @@ static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedMod
/*! /*!
* @brief Gets the current power mode status. * @brief Gets the current power mode status.
* *
* This function returns the current power mode stat. Once application * This function returns the current power mode status. After the application
* switches the power mode, it should always check the stat to check whether it * switches the power mode, it should always check the status to check whether it
* runs into the specified mode or not. An application should check * runs into the specified mode or not. The application should check
* this mode before switching to a different mode. The system requires that * this mode before switching to a different mode. The system requires that
* only certain modes can switch to other specific modes. See the * only certain modes can switch to other specific modes. See the
* reference manual for details and the smc_power_state_t for information about * reference manual for details and the smc_power_state_t for information about
* the power stat. * the power status.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return Current power mode status. * @return Current power mode status.
@ -305,7 +278,37 @@ static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
} }
/*! /*!
* @brief Configure the system to RUN power mode. * @brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with @ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void);
/*!
* @brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void);
/*!
* @brief Configures the system to RUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -314,7 +317,7 @@ status_t SMC_SetPowerModeRun(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*! /*!
* @brief Configure the system to HSRUN power mode. * @brief Configures the system to HSRUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -323,7 +326,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*! /*!
* @brief Configure the system to WAIT power mode. * @brief Configures the system to WAIT power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -331,7 +334,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
status_t SMC_SetPowerModeWait(SMC_Type *base); status_t SMC_SetPowerModeWait(SMC_Type *base);
/*! /*!
* @brief Configure the system to Stop power mode. * @brief Configures the system to Stop power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param option Partial Stop mode option. * @param option Partial Stop mode option.
@ -341,7 +344,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode. * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
@ -350,7 +353,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode); status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
#else #else
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -359,7 +362,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/*! /*!
* @brief Configure the system to VLPW power mode. * @brief Configures the system to VLPW power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -367,7 +370,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
status_t SMC_SetPowerModeVlpw(SMC_Type *base); status_t SMC_SetPowerModeVlpw(SMC_Type *base);
/*! /*!
* @brief Configure the system to VLPS power mode. * @brief Configures the system to VLPS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -378,7 +381,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The LLS power mode configuration structure * @param config The LLS power mode configuration structure
@ -387,7 +390,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config); status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
#else #else
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -398,7 +401,7 @@ status_t SMC_SetPowerModeLls(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief Configure the system to VLLS power mode. * @brief Configures the system to VLLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The VLLS power mode configuration structure. * @param config The VLLS power mode configuration structure.

View File

@ -282,4 +282,14 @@ const PinMap *serial_rts_pinmap()
return PinMap_UART_RTS; return PinMap_UART_RTS;
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
LPUART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kLPUART_TransmissionCompleteFlag & LPUART_GetStatusFlags((LPUART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,36 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -41,20 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -62,38 +170,53 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
__DSB();
__WFI(); __WFI();
__ISB();
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -101,10 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -114,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -134,42 +263,50 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* Power mode transaction to VLPW can only happen in VLPR mode */
if (kSMC_PowerStateVlpr != SMC_GetPowerModeState(base))
{
return kStatus_Fail;
}
/* configure VLPW mode */ /* configure VLPW mode */
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
__DSB();
__WFI(); __WFI();
__ISB();
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -177,10 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -191,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -203,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -231,10 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -246,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -258,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -281,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -294,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -345,10 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__WFI(); SMC_EnterStopRamFunc();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,16 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/*! @file */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.1. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -54,29 +30,25 @@
typedef enum _smc_power_mode_protection typedef enum _smc_power_mode_protection
{ {
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-Low-Leakage Stop Mode. */ kSMC_AllowPowerModeVlls = SMC_PMPROT_AVLLS_MASK, /*!< Allow Very-low-leakage Stop Mode. */
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-Leakage Stop Mode. */ kSMC_AllowPowerModeLls = SMC_PMPROT_ALLS_MASK, /*!< Allow Low-leakage Stop Mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-Power Mode. */ kSMC_AllowPowerModeVlp = SMC_PMPROT_AVLP_MASK, /*!< Allow Very-Low-power Mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High Speed Run mode. */ kSMC_AllowPowerModeHsrun = SMC_PMPROT_AHSRUN_MASK, /*!< Allow High-speed Run mode. */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -107,10 +79,10 @@ typedef enum _smc_power_state
*/ */
typedef enum _smc_run_mode typedef enum _smc_run_mode
{ {
kSMC_RunNormal = 0U, /*!< normal RUN mode. */ kSMC_RunNormal = 0U, /*!< Normal RUN mode. */
kSMC_RunVlpr = 2U, /*!< Very-Low-Power RUN mode. */ kSMC_RunVlpr = 2U, /*!< Very-low-power RUN mode. */
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
kSMC_Hsrun = 3U /*!< High Speed Run mode (HSRUN). */ kSMC_Hsrun = 3U /*!< High-speed Run mode (HSRUN). */
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
} smc_run_mode_t; } smc_run_mode_t;
@ -120,12 +92,12 @@ typedef enum _smc_run_mode
typedef enum _smc_stop_mode typedef enum _smc_stop_mode
{ {
kSMC_StopNormal = 0U, /*!< Normal STOP mode. */ kSMC_StopNormal = 0U, /*!< Normal STOP mode. */
kSMC_StopVlps = 2U, /*!< Very-Low-Power STOP mode. */ kSMC_StopVlps = 2U, /*!< Very-low-power STOP mode. */
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
kSMC_StopLls = 3U, /*!< Low-Leakage Stop mode. */ kSMC_StopLls = 3U, /*!< Low-leakage Stop mode. */
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
kSMC_StopVlls = 4U /*!< Very-Low-Leakage Stop mode. */ kSMC_StopVlls = 4U /*!< Very-low-leakage Stop mode. */
#endif #endif
} smc_stop_mode_t; } smc_stop_mode_t;
@ -155,7 +127,7 @@ typedef enum _smc_partial_stop_mode
} smc_partial_stop_option_t; } smc_partial_stop_option_t;
/*! /*!
* @brief SMC configuration status * @brief SMC configuration status.
*/ */
enum _smc_status enum _smc_status
{ {
@ -190,7 +162,7 @@ typedef struct _smc_param
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)
/*! /*!
* @brief SMC Low-Leakage Stop power mode config * @brief SMC Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_lls_config typedef struct _smc_power_mode_lls_config
{ {
@ -205,7 +177,7 @@ typedef struct _smc_power_mode_lls_config
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief SMC Very Low-Leakage Stop power mode config * @brief SMC Very Low-Leakage Stop power mode configuration.
*/ */
typedef struct _smc_power_mode_vlls_config typedef struct _smc_power_mode_vlls_config
{ {
@ -242,10 +214,10 @@ extern "C" {
* @brief Gets the SMC version ID. * @brief Gets the SMC version ID.
* *
* This function gets the SMC version ID, including major version number, * This function gets the SMC version ID, including major version number,
* minor version number and feature specification number. * minor version number, and feature specification number.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param versionId Pointer to version ID structure. * @param versionId Pointer to the version ID structure.
*/ */
static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId) static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
{ {
@ -257,10 +229,10 @@ static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)
/*! /*!
* @brief Gets the SMC parameter. * @brief Gets the SMC parameter.
* *
* This function gets the SMC parameter, including the enabled power mdoes. * This function gets the SMC parameter including the enabled power mdoes.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param param Pointer to SMC param structure. * @param param Pointer to the SMC param structure.
*/ */
void SMC_GetParam(SMC_Type *base, smc_param_t *param); void SMC_GetParam(SMC_Type *base, smc_param_t *param);
#endif #endif
@ -274,7 +246,7 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param);
* system level initialization stage. See the reference manual for details. * system level initialization stage. See the reference manual for details.
* This register can only write once after the power reset. * This register can only write once after the power reset.
* *
* The allowed modes are passed as bit map, for example, to allow LLS and VLLS, * The allowed modes are passed as bit map. For example, to allow LLS and VLLS,
* use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps). * use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps).
* To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll). * To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).
* *
@ -289,13 +261,13 @@ static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedMod
/*! /*!
* @brief Gets the current power mode status. * @brief Gets the current power mode status.
* *
* This function returns the current power mode stat. Once application * This function returns the current power mode status. After the application
* switches the power mode, it should always check the stat to check whether it * switches the power mode, it should always check the status to check whether it
* runs into the specified mode or not. An application should check * runs into the specified mode or not. The application should check
* this mode before switching to a different mode. The system requires that * this mode before switching to a different mode. The system requires that
* only certain modes can switch to other specific modes. See the * only certain modes can switch to other specific modes. See the
* reference manual for details and the smc_power_state_t for information about * reference manual for details and the smc_power_state_t for information about
* the power stat. * the power status.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return Current power mode status. * @return Current power mode status.
@ -306,7 +278,37 @@ static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)
} }
/*! /*!
* @brief Configure the system to RUN power mode. * @brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with @ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void);
/*!
* @brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void);
/*!
* @brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void);
/*!
* @brief Configures the system to RUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -315,7 +317,7 @@ status_t SMC_SetPowerModeRun(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*! /*!
* @brief Configure the system to HSRUN power mode. * @brief Configures the system to HSRUN power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -324,7 +326,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*! /*!
* @brief Configure the system to WAIT power mode. * @brief Configures the system to WAIT power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -332,7 +334,7 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base);
status_t SMC_SetPowerModeWait(SMC_Type *base); status_t SMC_SetPowerModeWait(SMC_Type *base);
/*! /*!
* @brief Configure the system to Stop power mode. * @brief Configures the system to Stop power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param option Partial Stop mode option. * @param option Partial Stop mode option.
@ -342,7 +344,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode. * @param wakeupMode Enter Normal Run mode if true, else stay in VLPR mode.
@ -351,7 +353,7 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option);
status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode); status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode);
#else #else
/*! /*!
* @brief Configure the system to VLPR power mode. * @brief Configures the system to VLPR power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -360,7 +362,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/*! /*!
* @brief Configure the system to VLPW power mode. * @brief Configures the system to VLPW power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -368,7 +370,7 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base);
status_t SMC_SetPowerModeVlpw(SMC_Type *base); status_t SMC_SetPowerModeVlpw(SMC_Type *base);
/*! /*!
* @brief Configure the system to VLPS power mode. * @brief Configures the system to VLPS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -379,7 +381,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The LLS power mode configuration structure * @param config The LLS power mode configuration structure
@ -388,7 +390,7 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base);
status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config); status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config);
#else #else
/*! /*!
* @brief Configure the system to LLS power mode. * @brief Configures the system to LLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @return SMC configuration error code. * @return SMC configuration error code.
@ -399,7 +401,7 @@ status_t SMC_SetPowerModeLls(SMC_Type *base);
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*! /*!
* @brief Configure the system to VLLS power mode. * @brief Configures the system to VLLS power mode.
* *
* @param base SMC peripheral base address. * @param base SMC peripheral base address.
* @param config The VLLS power mode configuration structure. * @param config The VLLS power mode configuration structure.

View File

@ -302,4 +302,14 @@ const PinMap *serial_rts_pinmap()
return PinMap_UART_RTS; return PinMap_UART_RTS;
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
UART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kUART_TransmissionCompleteFlag & UART_GetStatusFlags((UART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,37 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP * Copyright 2016-2017 NXP
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_flash.h" #include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -42,53 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void) void SMC_PreEnterStopModes(void)
{ {
flash_prefetch_speculation_status_t speculationStatus = g_savedPrimask = DisableGlobalIRQ();
{
kFLASH_prefetchSpeculationOptionDisable, /* Disable instruction speculation.*/
kFLASH_prefetchSpeculationOptionDisable, /* Disable data speculation.*/
};
__disable_irq();
__ISB(); __ISB();
/*
* Before enter stop modes, the flash cache prefetch should be disabled.
* Otherwise the prefetch might be interrupted by stop, then the data and
* and instruction from flash are wrong.
*/
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
} }
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void) void SMC_PostExitStopModes(void)
{ {
flash_prefetch_speculation_status_t speculationStatus = EnableGlobalIRQ(g_savedPrimask);
{
kFLASH_prefetchSpeculationOptionEnable, /* Enable instruction speculation.*/
kFLASH_prefetchSpeculationOptionEnable, /* Enable data speculation.*/
};
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
__enable_irq();
__ISB(); __ISB();
} }
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -96,13 +170,19 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
@ -114,22 +194,29 @@ status_t SMC_SetPowerModeWait(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -137,12 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -152,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -172,18 +263,24 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* configure VLPW mode */ /* configure VLPW mode */
@ -196,14 +293,20 @@ status_t SMC_SetPowerModeVlpw(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -211,12 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -227,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -239,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -267,12 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -284,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -296,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -319,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -332,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -383,12 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP * Copyright 2016-2017 NXP
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,15 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.3. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 3)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -64,18 +41,14 @@ typedef enum _smc_power_mode_protection
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -324,11 +297,7 @@ void SMC_PostExitStopModes(void);
* *
* This function should be called before entering WAIT/VLPW modes. * This function should be called before entering WAIT/VLPW modes.
*/ */
static inline void SMC_PreEnterWaitModes(void) void SMC_PreEnterWaitModes(void);
{
__disable_irq();
__ISB();
}
/*! /*!
* @brief Recovers after wake up from stop modes. * @brief Recovers after wake up from stop modes.
@ -336,11 +305,7 @@ static inline void SMC_PreEnterWaitModes(void)
* This function should be called after wake up from WAIT/VLPW modes. * This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes. * It is used with @ref SMC_PreEnterWaitModes.
*/ */
static inline void SMC_PostExitWaitModes(void) void SMC_PostExitWaitModes(void);
{
__enable_irq();
__ISB();
}
/*! /*!
* @brief Configures the system to RUN power mode. * @brief Configures the system to RUN power mode.

View File

@ -723,4 +723,14 @@ void serial_rx_abort_asynch(serial_t *obj)
} }
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
UART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kUART_TransmissionCompleteFlag & UART_GetStatusFlags((UART_Type *)base)))
{
}
}
#endif #endif

View File

@ -1,37 +1,86 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_flash.h" #include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.smc"
#endif
typedef void (*smc_stop_ram_func_t)(void);
/*******************************************************************************
* Prototypes
******************************************************************************/
static void SMC_EnterStopRamFunc(void);
/*******************************************************************************
* Variables
******************************************************************************/
static uint32_t g_savedPrimask;
/*
* The ram function code is:
*
* uint32_t i;
* for (i=0; i<0x8; i++)
* {
* __NOP();
* }
* __DSB();
* __WFI();
* __ISB();
*
* When entring the stop modes, the flash prefetch might be interrupted, thus
* the prefetched code or data might be broken. To make sure the flash is idle
* when entring the stop modes, the code is moved to ram. And delay for a while
* before WFI to make sure previous flash prefetch is finished.
*
* Only need to do like this when code is in flash, if code is in rom or ram,
* this is not necessary.
*/
static uint16_t s_stopRamFuncArray[] = {
0x2000, /* MOVS R0, #0 */
0x2808, /* CMP R0, #8 */
0xD202, /* BCS.N */
0xBF00, /* NOP */
0x1C40, /* ADDS R0, R0, #1 */
0xE7FA, /* B.N */
0xF3BF, 0x8F4F, /* DSB */
0xBF30, /* WFI */
0xF3BF, 0x8F6F, /* ISB */
0x4770, /* BX LR */
};
/*******************************************************************************
* Code
******************************************************************************/
static void SMC_EnterStopRamFunc(void)
{
uint32_t ramFuncEntry = ((uint32_t)(s_stopRamFuncArray)) + 1U;
smc_stop_ram_func_t stopRamFunc = (smc_stop_ram_func_t)ramFuncEntry;
stopRamFunc();
}
#if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM) #if (defined(FSL_FEATURE_SMC_HAS_PARAM) && FSL_FEATURE_SMC_HAS_PARAM)
/*!
* brief Gets the SMC parameter.
*
* This function gets the SMC parameter including the enabled power mdoes.
*
* param base SMC peripheral base address.
* param param Pointer to the SMC param structure.
*/
void SMC_GetParam(SMC_Type *base, smc_param_t *param) void SMC_GetParam(SMC_Type *base, smc_param_t *param)
{ {
uint32_t reg = base->PARAM; uint32_t reg = base->PARAM;
@ -42,53 +91,78 @@ void SMC_GetParam(SMC_Type *base, smc_param_t *param)
} }
#endif /* FSL_FEATURE_SMC_HAS_PARAM */ #endif /* FSL_FEATURE_SMC_HAS_PARAM */
/*!
* brief Prepares to enter stop modes.
*
* This function should be called before entering STOP/VLPS/LLS/VLLS modes.
*/
void SMC_PreEnterStopModes(void) void SMC_PreEnterStopModes(void)
{ {
flash_prefetch_speculation_status_t speculationStatus = g_savedPrimask = DisableGlobalIRQ();
{
kFLASH_prefetchSpeculationOptionDisable, /* Disable instruction speculation.*/
kFLASH_prefetchSpeculationOptionDisable, /* Disable data speculation.*/
};
__disable_irq();
__ISB(); __ISB();
/*
* Before enter stop modes, the flash cache prefetch should be disabled.
* Otherwise the prefetch might be interrupted by stop, then the data and
* and instruction from flash are wrong.
*/
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
} }
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from STOP/VLPS/LLS/VLLS modes.
* It is used with ref SMC_PreEnterStopModes.
*/
void SMC_PostExitStopModes(void) void SMC_PostExitStopModes(void)
{ {
flash_prefetch_speculation_status_t speculationStatus = EnableGlobalIRQ(g_savedPrimask);
{
kFLASH_prefetchSpeculationOptionEnable, /* Enable instruction speculation.*/
kFLASH_prefetchSpeculationOptionEnable, /* Enable data speculation.*/
};
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
__enable_irq();
__ISB(); __ISB();
} }
/*!
* brief Prepares to enter wait modes.
*
* This function should be called before entering WAIT/VLPW modes.
*/
void SMC_PreEnterWaitModes(void)
{
g_savedPrimask = DisableGlobalIRQ();
__ISB();
}
/*!
* brief Recovers after wake up from stop modes.
*
* This function should be called after wake up from WAIT/VLPW modes.
* It is used with ref SMC_PreEnterWaitModes.
*/
void SMC_PostExitWaitModes(void)
{
EnableGlobalIRQ(g_savedPrimask);
__ISB();
}
/*!
* brief Configures the system to RUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeRun(SMC_Type *base) status_t SMC_SetPowerModeRun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure Normal RUN mode */ /* configure Normal RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunNormal << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
/*!
* brief Configures the system to HSRUN power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeHsrun(SMC_Type *base) status_t SMC_SetPowerModeHsrun(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
@ -96,13 +170,19 @@ status_t SMC_SetPowerModeHsrun(SMC_Type *base)
reg = base->PMCTRL; reg = base->PMCTRL;
/* configure High Speed RUN mode */ /* configure High Speed RUN mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_Hsrun << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
/*!
* brief Configures the system to WAIT power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeWait(SMC_Type *base) status_t SMC_SetPowerModeWait(SMC_Type *base)
{ {
/* configure Normal Wait mode */ /* configure Normal Wait mode */
@ -114,22 +194,29 @@ status_t SMC_SetPowerModeWait(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to Stop power mode.
*
* param base SMC peripheral base address.
* param option Partial Stop mode option.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option) status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
{ {
uint8_t reg; uint8_t reg;
#if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO) #if (defined(FSL_FEATURE_SMC_HAS_PSTOPO) && FSL_FEATURE_SMC_HAS_PSTOPO)
/* configure the Partial Stop mode in Noraml Stop mode */ /* configure the Partial Stop mode in Normal Stop mode */
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_PSTOPO_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_PSTOPO_MASK;
reg |= ((uint32_t)option << SMC_STOPCTRL_PSTOPO_SHIFT); reg |= ((uint8_t)option << SMC_STOPCTRL_PSTOPO_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif #endif
/* configure Normal Stop mode */ /* configure Normal Stop mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopNormal << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */ /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
@ -137,12 +224,10 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter Stop mode succeed */ /* check whether the power mode enter Stop mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -152,6 +237,12 @@ status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)
} }
} }
/*!
* brief Configures the system to VLPR power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpr(SMC_Type *base status_t SMC_SetPowerModeVlpr(SMC_Type *base
#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
, ,
@ -172,18 +263,24 @@ status_t SMC_SetPowerModeVlpr(SMC_Type *base
else else
{ {
/* remains in VLP mode on an interrupt */ /* remains in VLP mode on an interrupt */
reg &= ~SMC_PMCTRL_LPWUI_MASK; reg &= ~(uint8_t)SMC_PMCTRL_LPWUI_MASK;
} }
#endif /* FSL_FEATURE_SMC_HAS_LPWUI */ #endif /* FSL_FEATURE_SMC_HAS_LPWUI */
/* configure VLPR mode */ /* configure VLPR mode */
reg &= ~SMC_PMCTRL_RUNM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_RUNM_MASK;
reg |= (kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT); reg |= ((uint8_t)kSMC_RunVlpr << SMC_PMCTRL_RUNM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPW power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlpw(SMC_Type *base) status_t SMC_SetPowerModeVlpw(SMC_Type *base)
{ {
/* configure VLPW mode */ /* configure VLPW mode */
@ -196,14 +293,20 @@ status_t SMC_SetPowerModeVlpw(SMC_Type *base)
return kStatus_Success; return kStatus_Success;
} }
/*!
* brief Configures the system to VLPS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlps(SMC_Type *base) status_t SMC_SetPowerModeVlps(SMC_Type *base)
{ {
uint8_t reg; uint8_t reg;
/* configure VLPS mode */ /* configure VLPS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlps << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* Set the SLEEPDEEP bit to enable deep sleep mode */ /* Set the SLEEPDEEP bit to enable deep sleep mode */
@ -211,12 +314,10 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter VLPS mode succeed */ /* check whether the power mode enter VLPS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -227,6 +328,12 @@ status_t SMC_SetPowerModeVlps(SMC_Type *base)
} }
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to LLS power mode.
*
* param base SMC peripheral base address.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeLls(SMC_Type *base status_t SMC_SetPowerModeLls(SMC_Type *base
#if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \ #if ((defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) || \
(defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO)) (defined(FSL_FEATURE_SMC_HAS_LPOPO) && FSL_FEATURE_SMC_HAS_LPOPO))
@ -239,15 +346,15 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* configure to LLS mode */ /* configure to LLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopLls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure LLS sub-mode*/ /* configure LLS sub-mode*/
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
@ -267,12 +374,10 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }
@ -284,6 +389,13 @@ status_t SMC_SetPowerModeLls(SMC_Type *base
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
/*!
* brief Configures the system to VLLS power mode.
*
* param base SMC peripheral base address.
* param config The VLLS power mode configuration structure.
* return SMC configuration error code.
*/
status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config) status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)
{ {
uint8_t reg; uint8_t reg;
@ -296,12 +408,12 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#endif #endif
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enablePorDetectInVlls0) if (true == config->enablePorDetectInVlls0)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_PORPO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_PORPO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_PORPO_MASK;
#endif #endif
} }
else else
@ -319,7 +431,7 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
else if (config->subMode == kSMC_StopSub2) else if (config->subMode == kSMC_StopSub2)
{ {
/* configure whether the Por Detect work in Vlls0 mode */ /* configure whether the Por Detect work in Vlls0 mode */
if (config->enableRam2InVlls2) if (true == config->enableRam2InVlls2)
{ {
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL |= SMC_VLLSCTRL_RAM2PO_MASK;
@ -332,37 +444,38 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK; base->VLLSCTRL &= ~SMC_VLLSCTRL_RAM2PO_MASK;
#else #else
base->STOPCTRL &= ~SMC_STOPCTRL_RAM2PO_MASK; base->STOPCTRL &= ~(uint8_t)SMC_STOPCTRL_RAM2PO_MASK;
#endif #endif
} }
} }
else else
{ {
/* Add this to fix MISRA C2012 rule15.7 issue: Empty else without comment. */
} }
#endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */ #endif /* FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION */
/* configure to VLLS mode */ /* configure to VLLS mode */
reg = base->PMCTRL; reg = base->PMCTRL;
reg &= ~SMC_PMCTRL_STOPM_MASK; reg &= ~(uint8_t)SMC_PMCTRL_STOPM_MASK;
reg |= (kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT); reg |= ((uint8_t)kSMC_StopVlls << SMC_PMCTRL_STOPM_SHIFT);
base->PMCTRL = reg; base->PMCTRL = reg;
/* configure the VLLS sub-mode */ /* configure the VLLS sub-mode */
#if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG) #if (defined(FSL_FEATURE_SMC_USE_VLLSCTRL_REG) && FSL_FEATURE_SMC_USE_VLLSCTRL_REG)
reg = base->VLLSCTRL; reg = base->VLLSCTRL;
reg &= ~SMC_VLLSCTRL_VLLSM_MASK; reg &= ~SMC_VLLSCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_VLLSCTRL_VLLSM_SHIFT);
base->VLLSCTRL = reg; base->VLLSCTRL = reg;
#else #else
#if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE) #if (defined(FSL_FEATURE_SMC_HAS_LLS_SUBMODE) && FSL_FEATURE_SMC_HAS_LLS_SUBMODE)
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_LLSM_MASK; reg &= ~(uint8_t)SMC_STOPCTRL_LLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_LLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#else #else
reg = base->STOPCTRL; reg = base->STOPCTRL;
reg &= ~SMC_STOPCTRL_VLLSM_MASK; reg &= ~SMC_STOPCTRL_VLLSM_MASK;
reg |= ((uint32_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT); reg |= ((uint8_t)config->subMode << SMC_STOPCTRL_VLLSM_SHIFT);
base->STOPCTRL = reg; base->STOPCTRL = reg;
#endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */ #endif /* FSL_FEATURE_SMC_HAS_LLS_SUBMODE */
#endif #endif
@ -383,12 +496,10 @@ status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t
/* read back to make sure the configuration valid before enter stop mode */ /* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL; (void)base->PMCTRL;
__DSB(); SMC_EnterStopRamFunc();
__WFI();
__ISB();
/* check whether the power mode enter LLS mode succeed */ /* check whether the power mode enter LLS mode succeed */
if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK) if (0U != (base->PMCTRL & SMC_PMCTRL_STOPA_MASK))
{ {
return kStatus_SMC_StopAbort; return kStatus_SMC_StopAbort;
} }

View File

@ -1,31 +1,9 @@
/* /*
* Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without modification, * SPDX-License-Identifier: BSD-3-Clause
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#ifndef _FSL_SMC_H_ #ifndef _FSL_SMC_H_
@ -36,15 +14,14 @@
/*! @addtogroup smc */ /*! @addtogroup smc */
/*! @{ */ /*! @{ */
/******************************************************************************* /*******************************************************************************
* Definitions * Definitions
******************************************************************************/ ******************************************************************************/
/*! @name Driver version */ /*! @name Driver version */
/*@{*/ /*@{*/
/*! @brief SMC driver version 2.0.3. */ /*! @brief SMC driver version 2.0.5. */
#define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 3)) #define FSL_SMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
/*@}*/ /*@}*/
/*! /*!
@ -64,18 +41,14 @@ typedef enum _smc_power_mode_protection
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
kSMC_AllowPowerModeAll = (0U kSMC_AllowPowerModeAll = (0U
#if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_VERY_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_AVLLS_MASK
SMC_PMPROT_AVLLS_MASK
#endif #endif
#if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) #if (defined(FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE) && FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE)
| | SMC_PMPROT_ALLS_MASK
SMC_PMPROT_ALLS_MASK
#endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */ #endif /* FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE */
| | SMC_PMPROT_AVLP_MASK
SMC_PMPROT_AVLP_MASK
#if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) #if (defined(FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE)
| | kSMC_AllowPowerModeHsrun
kSMC_AllowPowerModeHsrun
#endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */ #endif /* FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE */
) /*!< Allow all power mode. */ ) /*!< Allow all power mode. */
} smc_power_mode_protection_t; } smc_power_mode_protection_t;
@ -324,11 +297,7 @@ void SMC_PostExitStopModes(void);
* *
* This function should be called before entering WAIT/VLPW modes. * This function should be called before entering WAIT/VLPW modes.
*/ */
static inline void SMC_PreEnterWaitModes(void) void SMC_PreEnterWaitModes(void);
{
__disable_irq();
__ISB();
}
/*! /*!
* @brief Recovers after wake up from stop modes. * @brief Recovers after wake up from stop modes.
@ -336,11 +305,7 @@ static inline void SMC_PreEnterWaitModes(void)
* This function should be called after wake up from WAIT/VLPW modes. * This function should be called after wake up from WAIT/VLPW modes.
* It is used with @ref SMC_PreEnterWaitModes. * It is used with @ref SMC_PreEnterWaitModes.
*/ */
static inline void SMC_PostExitWaitModes(void) void SMC_PostExitWaitModes(void);
{
__enable_irq();
__ISB();
}
/*! /*!
* @brief Configures the system to RUN power mode. * @brief Configures the system to RUN power mode.

View File

@ -24,6 +24,7 @@
#include <string.h> #include <string.h>
#include "cmsis.h" #include "cmsis.h"
#include "mbed_power_mgmt.h"
#include "pinmap.h" #include "pinmap.h"
#include "fsl_uart.h" #include "fsl_uart.h"
#include "peripheral_clock_defines.h" #include "peripheral_clock_defines.h"
@ -543,6 +544,9 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
/* Start the transfer */ /* Start the transfer */
serial_send_asynch(obj); serial_send_asynch(obj);
/* Can't enter deep sleep as long as UART transmit is active */
sleep_manager_lock_deep_sleep();
return 0; return 0;
} }
@ -608,6 +612,9 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_widt
/* Start the transfer */ /* Start the transfer */
serial_receive_asynch(obj); serial_receive_asynch(obj);
/* Can't enter deep sleep as long as UART transfer is active */
sleep_manager_lock_deep_sleep();
} }
uint8_t serial_tx_active(serial_t *obj) uint8_t serial_tx_active(serial_t *obj)
@ -640,11 +647,15 @@ int serial_irq_handler_asynch(serial_t *obj)
if ((obj->serial.txstate != kUART_TxIdle) && (obj->serial.uart_dma_handle.txState == kUART_TxIdle)) { if ((obj->serial.txstate != kUART_TxIdle) && (obj->serial.uart_dma_handle.txState == kUART_TxIdle)) {
obj->serial.txstate = kUART_TxIdle; obj->serial.txstate = kUART_TxIdle;
status |= SERIAL_EVENT_TX_COMPLETE; status |= SERIAL_EVENT_TX_COMPLETE;
/* Transmit is complete, re-enable entry to deep sleep mode */
sleep_manager_unlock_deep_sleep();
} }
if ((obj->serial.rxstate != kUART_RxIdle) && (obj->serial.uart_dma_handle.rxState == kUART_RxIdle)) { if ((obj->serial.rxstate != kUART_RxIdle) && (obj->serial.uart_dma_handle.rxState == kUART_RxIdle)) {
obj->serial.rxstate = kUART_RxIdle; obj->serial.rxstate = kUART_RxIdle;
status |= SERIAL_EVENT_RX_COMPLETE; status |= SERIAL_EVENT_RX_COMPLETE;
/* Receive is complete, re-enable entry to deep sleep mode */
sleep_manager_unlock_deep_sleep();
} }
/* Release the dma channels if they were opportunistically allocated */ /* Release the dma channels if they were opportunistically allocated */
@ -661,11 +672,15 @@ int serial_irq_handler_asynch(serial_t *obj)
if ((obj->serial.txstate != kUART_TxIdle) && (obj->serial.uart_transfer_handle.txState == kUART_TxIdle)) { if ((obj->serial.txstate != kUART_TxIdle) && (obj->serial.uart_transfer_handle.txState == kUART_TxIdle)) {
obj->serial.txstate = kUART_TxIdle; obj->serial.txstate = kUART_TxIdle;
status |= SERIAL_EVENT_TX_COMPLETE; status |= SERIAL_EVENT_TX_COMPLETE;
/* Transmit is complete, re-enable entry to deep sleep mode */
sleep_manager_unlock_deep_sleep();
} }
if ((obj->serial.rxstate != kUART_RxIdle) && (obj->serial.uart_transfer_handle.rxState == kUART_RxIdle)) { if ((obj->serial.rxstate != kUART_RxIdle) && (obj->serial.uart_transfer_handle.rxState == kUART_RxIdle)) {
obj->serial.rxstate = kUART_RxIdle; obj->serial.rxstate = kUART_RxIdle;
status |= SERIAL_EVENT_RX_COMPLETE; status |= SERIAL_EVENT_RX_COMPLETE;
/* Receive is complete, re-enable entry to deep sleep mode */
sleep_manager_unlock_deep_sleep();
} }
} }
#if 0 #if 0
@ -697,6 +712,11 @@ int serial_irq_handler_asynch(serial_t *obj)
void serial_tx_abort_asynch(serial_t *obj) void serial_tx_abort_asynch(serial_t *obj)
{ {
// If we're not currently transferring, then there's nothing to do here
if (serial_tx_active(obj) == 0) {
return;
}
if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED || obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) { if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED || obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
UART_TransferAbortSendEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle); UART_TransferAbortSendEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle);
/* Release the dma channels if they were opportunistically allocated */ /* Release the dma channels if they were opportunistically allocated */
@ -711,10 +731,20 @@ void serial_tx_abort_asynch(serial_t *obj)
} else { } else {
UART_TransferAbortSend(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle); UART_TransferAbortSend(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle);
} }
obj->serial.txstate = kUART_TxIdle;
/* Re-enable entry to deep sleep mode */
sleep_manager_unlock_deep_sleep();
} }
void serial_rx_abort_asynch(serial_t *obj) void serial_rx_abort_asynch(serial_t *obj)
{ {
// If we're not currently transferring, then there's nothing to do here
if (serial_rx_active(obj) == 0) {
return;
}
if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED || obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) { if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED || obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
UART_TransferAbortReceiveEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle); UART_TransferAbortReceiveEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle);
/* Release the dma channels if they were opportunistically allocated */ /* Release the dma channels if they were opportunistically allocated */
@ -729,6 +759,21 @@ void serial_rx_abort_asynch(serial_t *obj)
} else { } else {
UART_TransferAbortReceive(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle); UART_TransferAbortReceive(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle);
} }
obj->serial.rxstate = kUART_RxIdle;
/* Re-enable entry to deep sleep mode */
sleep_manager_unlock_deep_sleep();
}
void serial_wait_tx_complete(uint32_t uart_index)
{
UART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kUART_TransmissionCompleteFlag & UART_GetStatusFlags((UART_Type *)base)))
{
}
} }
#endif #endif

View File

@ -23,6 +23,7 @@
#include "cmsis.h" #include "cmsis.h"
#include "pinmap.h" #include "pinmap.h"
#include "mbed_error.h" #include "mbed_error.h"
#include "mbed_power_mgmt.h"
#include "fsl_dspi.h" #include "fsl_dspi.h"
#include "peripheral_clock_defines.h" #include "peripheral_clock_defines.h"
#include "dma_reqs.h" #include "dma_reqs.h"
@ -369,6 +370,9 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
/* Start the transfer */ /* Start the transfer */
if (spi_master_transfer_asynch(obj) != kStatus_Success) { if (spi_master_transfer_asynch(obj) != kStatus_Success) {
obj->spi.status = kDSPI_Idle; obj->spi.status = kDSPI_Idle;
} else {
// Can't enter deep sleep as long as SPI transfer is active
sleep_manager_lock_deep_sleep();
} }
} }
@ -428,12 +432,18 @@ uint32_t spi_irq_handler_asynch(spi_t *obj)
} }
obj->spi.status = kDSPI_Idle; obj->spi.status = kDSPI_Idle;
// SPI transfer done, can enter deep sleep
sleep_manager_unlock_deep_sleep();
return SPI_EVENT_COMPLETE; return SPI_EVENT_COMPLETE;
} }
} else { } else {
/* Interrupt implementation */ /* Interrupt implementation */
obj->spi.status = kDSPI_Idle; obj->spi.status = kDSPI_Idle;
// SPI transfer done, can enter deep sleep
sleep_manager_unlock_deep_sleep();
return SPI_EVENT_COMPLETE; return SPI_EVENT_COMPLETE;
} }
} }
@ -462,6 +472,9 @@ void spi_abort_asynch(spi_t *obj)
} }
obj->spi.status = kDSPI_Idle; obj->spi.status = kDSPI_Idle;
// SPI transfer done, can enter deep sleep
sleep_manager_unlock_deep_sleep();
} }
uint8_t spi_active(spi_t *obj) uint8_t spi_active(spi_t *obj)

View File

@ -17,6 +17,11 @@
#include "cmsis.h" #include "cmsis.h"
#include "fsl_smc.h" #include "fsl_smc.h"
#include "fsl_clock_config.h" #include "fsl_clock_config.h"
#include "pinmap.h"
#include "fsl_port.h"
#include "PeripheralPins.h"
extern void serial_wait_tx_complete(uint32_t uart_index);
void hal_sleep(void) void hal_sleep(void)
{ {
@ -25,50 +30,35 @@ void hal_sleep(void)
SMC_SetPowerModeWait(SMC); SMC_SetPowerModeWait(SMC);
} }
static void PreEnterStopModes(void)
{
flash_prefetch_speculation_status_t speculationStatus =
{
kFLASH_prefetchSpeculationOptionDisable, /* Disable instruction speculation.*/
kFLASH_prefetchSpeculationOptionDisable, /* Disable data speculation.*/
};
__ISB();
/*
* Before enter stop modes, the flash cache prefetch should be disabled.
* Otherwise the prefetch might be interrupted by stop, then the data and
* and instruction from flash are wrong.
*/
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
}
static void PostExitStopModes(void)
{
flash_prefetch_speculation_status_t speculationStatus =
{
kFLASH_prefetchSpeculationOptionEnable, /* Enable instruction speculation.*/
kFLASH_prefetchSpeculationOptionEnable, /* Enable data speculation.*/
};
FLASH_PflashSetPrefetchSpeculation(&speculationStatus);
__ISB();
}
void hal_deepsleep(void) void hal_deepsleep(void)
{ {
uint32_t pin_func;
#if (defined(FSL_FEATURE_SOC_MCG_COUNT) && FSL_FEATURE_SOC_MCG_COUNT) #if (defined(FSL_FEATURE_SOC_MCG_COUNT) && FSL_FEATURE_SOC_MCG_COUNT)
#if (defined(FSL_FEATURE_MCG_HAS_PLL) && FSL_FEATURE_MCG_HAS_PLL) #if (defined(FSL_FEATURE_MCG_HAS_PLL) && FSL_FEATURE_MCG_HAS_PLL)
mcg_mode_t mode = CLOCK_GetMode(); smc_power_state_t original_power_state;
original_power_state = SMC_GetPowerModeState(SMC);
#endif // FSL_FEATURE_MCG_HAS_PLL #endif // FSL_FEATURE_MCG_HAS_PLL
#endif // FSL_FEATURE_SOC_MCG_COUNT #endif // FSL_FEATURE_SOC_MCG_COUNT
SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll); SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
PreEnterStopModes(); /* Wait till debug UART is done transmitting */
serial_wait_tx_complete(STDIO_UART);
/*
* Set pin for current leakage.
* Debug console RX pin: Set to pinmux to disable.
* Debug console TX pin: Don't need to change.
*/
pin_function(STDIO_UART_RX, (int)kPORT_PinDisabledOrAnalog);
SMC_PreEnterStopModes();
SMC_SetPowerModeVlps(SMC); SMC_SetPowerModeVlps(SMC);
PostExitStopModes(); SMC_PostExitStopModes();
pin_func = pinmap_find_function(STDIO_UART_RX, PinMap_UART_RX);
pin_function(STDIO_UART_RX, pin_func);
#if (defined(FSL_FEATURE_SOC_MCG_COUNT) && FSL_FEATURE_SOC_MCG_COUNT) #if (defined(FSL_FEATURE_SOC_MCG_COUNT) && FSL_FEATURE_SOC_MCG_COUNT)
#if (defined(FSL_FEATURE_MCG_HAS_PLL) && FSL_FEATURE_MCG_HAS_PLL) #if (defined(FSL_FEATURE_MCG_HAS_PLL) && FSL_FEATURE_MCG_HAS_PLL)
@ -76,8 +66,12 @@ void hal_deepsleep(void)
* If enter stop modes when MCG in PEE mode, then after wakeup, the MCG is in PBE mode, * If enter stop modes when MCG in PEE mode, then after wakeup, the MCG is in PBE mode,
* need to enter PEE mode manually. * need to enter PEE mode manually.
*/ */
if (mode == kMCG_ModePEE) { if (original_power_state == kSMC_PowerStateRun) {
BOARD_BootClockRUN(); /* Wait for PLL lock. */
while (!(kMCG_Pll0LockFlag & CLOCK_GetStatusFlags()))
{
}
CLOCK_SetPeeMode();
} }
#endif // FSL_FEATURE_MCG_HAS_PLL #endif // FSL_FEATURE_MCG_HAS_PLL
#endif // FSL_FEATURE_SOC_MCG_COUNT #endif // FSL_FEATURE_SOC_MCG_COUNT

View File

@ -316,4 +316,14 @@ const PinMap *serial_rts_pinmap()
return PinMap_UART_RTS; return PinMap_UART_RTS;
} }
void serial_wait_tx_complete(uint32_t uart_index)
{
LPUART_Type *base = uart_addrs[uart_index];
/* Wait till data is flushed out of transmit buffer */
while (!(kLPUART_TransmissionCompleteFlag & LPUART_GetStatusFlags((LPUART_Type *)base)))
{
}
}
#endif #endif

View File

@ -19,6 +19,7 @@
extern void vPortPRE_SLEEP_PROCESSING(clock_mode_t powermode); extern void vPortPRE_SLEEP_PROCESSING(clock_mode_t powermode);
extern void vPortPOST_SLEEP_PROCESSING(clock_mode_t powermode); extern void vPortPOST_SLEEP_PROCESSING(clock_mode_t powermode);
extern void serial_wait_tx_complete(uint32_t uart_index);
void hal_sleep(void) void hal_sleep(void)
@ -36,6 +37,9 @@ void hal_deepsleep(void)
{ {
vPortPRE_SLEEP_PROCESSING(kCLOCK_ModeStop); vPortPRE_SLEEP_PROCESSING(kCLOCK_ModeStop);
/* Wait till debug UART is done transmitting */
serial_wait_tx_complete(STDIO_UART);
__DSB(); __DSB();
__WFI(); __WFI();
__ISB(); __ISB();

View File

@ -1220,7 +1220,7 @@
], ],
"is_disk_virtual": true, "is_disk_virtual": true,
"public": false, "public": false,
"macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"], "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED", "MBED_TICKLESS"],
"inherits": ["Target"], "inherits": ["Target"],
"detect_code": ["0231"], "detect_code": ["0231"],
"device_has": [ "device_has": [
@ -1321,7 +1321,7 @@
"core": "Cortex-M0+", "core": "Cortex-M0+",
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"], "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"], "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
"macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"], "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED", "MBED_TICKLESS"],
"is_disk_virtual": true, "is_disk_virtual": true,
"inherits": ["Target"], "inherits": ["Target"],
"detect_code": ["0218"], "detect_code": ["0218"],
@ -1363,7 +1363,7 @@
"supported_toolchains": ["ARM", "GCC_ARM", "IAR"], "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"], "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
"is_disk_virtual": true, "is_disk_virtual": true,
"macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"], "macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED", "MBED_TICKLESS"],
"inherits": ["Target"], "inherits": ["Target"],
"detect_code": ["0250"], "detect_code": ["0250"],
"device_has": [ "device_has": [
@ -1401,7 +1401,7 @@
"supported_toolchains": ["ARM", "GCC_ARM", "IAR"], "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM", "FRAMEWORK_5_3_3", "NXP"], "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM", "FRAMEWORK_5_3_3", "NXP"],
"is_disk_virtual": true, "is_disk_virtual": true,
"macros": ["CPU_MKW41Z512VHT4", "FSL_RTOS_MBED"], "macros": ["CPU_MKW41Z512VHT4", "FSL_RTOS_MBED", "MBED_TICKLESS"],
"inherits": ["Target"], "inherits": ["Target"],
"detect_code": ["0201"], "detect_code": ["0201"],
"device_has": [ "device_has": [
@ -1497,7 +1497,8 @@
"PSA" "PSA"
], ],
"is_disk_virtual": true, "is_disk_virtual": true,
"macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "MBED_SPLIT_HEAP"],
"macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "MBED_SPLIT_HEAP", "MBED_TICKLESS"],
"inherits": ["Target"], "inherits": ["Target"],
"detect_code": ["0240"], "detect_code": ["0240"],
"device_has": [ "device_has": [
@ -1652,7 +1653,7 @@
"MCU_K64F" "MCU_K64F"
], ],
"supported_toolchains": ["ARM", "GCC_ARM", "IAR"], "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
"macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"], "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F", "MBED_TICKLESS"],
"is_disk_virtual": true, "is_disk_virtual": true,
"default_toolchain": "ARM", "default_toolchain": "ARM",
"detect_code": ["0214"], "detect_code": ["0214"],
@ -1789,7 +1790,7 @@
"PSA" "PSA"
], ],
"is_disk_virtual": true, "is_disk_virtual": true,
"macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED", "MBED_SPLIT_HEAP"], "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED", "MBED_SPLIT_HEAP", "MBED_TICKLESS"],
"inherits": ["Target"], "inherits": ["Target"],
"detect_code": ["0311"], "detect_code": ["0311"],
"device_has": [ "device_has": [
@ -1829,7 +1830,7 @@
"supported_toolchains": ["ARM", "GCC_ARM", "IAR"], "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"], "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
"is_disk_virtual": true, "is_disk_virtual": true,
"macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"], "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED", "MBED_TICKLESS"],
"inherits": ["Target"], "inherits": ["Target"],
"detect_code": ["0217"], "detect_code": ["0217"],
"device_has": [ "device_has": [
@ -1941,7 +1942,8 @@
"XIP_BOOT_HEADER_DCD_ENABLE=1", "XIP_BOOT_HEADER_DCD_ENABLE=1",
"SKIP_SYSCLK_INIT", "SKIP_SYSCLK_INIT",
"FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE", "FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE",
"MBED_MPU_CUSTOM" "MBED_MPU_CUSTOM",
"MBED_TICKLESS"
], ],
"inherits": ["Target"], "inherits": ["Target"],
"detect_code": ["0227"], "detect_code": ["0227"],