ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge pull request #12992 from jeromecoutant/PR_BAREMETAL_SUPPORT_STEP1 

STM32 baremetal support step1 (F0/F1/F3/H7/L0)
pull/13069/head
Martin Kojtal 2020-06-04 15:22:06 +02:00 committed by GitHub
parent 096b3e80ec b57b12cc9f
commit ed0cadfa9e
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
44 changed files with 1570 additions and 1100 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

78
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM/stm32f070xb.sct
View File

@ -1,54 +1,52 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2014, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2014-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_APP_START)
#define MBED_BOOT_STACK_SIZE 0x400 #define MBED_APP_START MBED_ROM_START
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
; STM32F070RB: 128KB FLASH (0x20000) + 16KB RAM (0x4000) #if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
LR_IROM1 0x08000000 0x20000 { ; load region size_region /* Round up VECTORS_SIZE to 8 bytes */
ER_IROM1 0x08000000 0x20000 { ; load address = execution address #define NVIC_NUM_VECTORS 48
*.o (RESET, +First) #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
*(InRoot$$Sections)
.ANY (+RO) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
} }
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0-Stack_Size) { ; RW data .ANY (+RW +ZI)
.ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x4000) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

94
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld
View File

@ -1,22 +1,50 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 #if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
StackSize = MBED_BOOT_STACK_SIZE; #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define NVIC_NUM_VECTORS 48
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128k FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (xrw) : ORIGIN = 0x200000C0, LENGTH = 16k - 0x0C0 RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler * Reset_Handler : Entry of reset handler
* *
* It defines following symbols, which code can use without definition: * It defines following symbols, which code can use without definition:
* __exidx_start * __exidx_start
* __exidx_end * __exidx_end
@ -47,6 +75,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -83,7 +112,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -104,7 +133,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -120,20 +148,19 @@ SECTIONS
} > RAM } > RAM
/* .stack section doesn't contains any symbols. It is only /* Uninitialized data section
* used for linker to reserve space for the main stack section * This region is not initialized by the C/C++ library and can be used to
*/ * store state across soft reboots. */
.stack (NOLOAD): .uninitialized (NOLOAD):
{ {
__StackLimit = .; . = ALIGN(32);
*(.stack*); __uninitialized_start = .;
. += StackSize - (. - __StackLimit); *(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM } > RAM
__StackTop = ADDR(.stack) + StackSize;
_estack = __StackTop;
__StackLimit = ADDR(.stack);
PROVIDE(__stack = __StackTop);
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -149,14 +176,27 @@ SECTIONS
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*); *(.heap*)
. += (ORIGIN(RAM) + LENGTH(RAM) - .); . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
PROVIDE(__heap_size = SIZEOF(.heap)); /* .stack_dummy section doesn't contains any symbols. It is only
PROVIDE(__mbed_sbrk_start = ADDR(.heap)); * used for linker to calculate size of stack sections, and assign
PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap)); * values to stack symbols later */
.stack_dummy (COPY):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop;
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
} }

67
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf
View File

@ -1,36 +1,59 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/ /* Linker script to configure memory regions.
/*-Editor annotation file-*/ *
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ * SPDX-License-Identifier: BSD-3-Clause
/*-Specials-*/ ******************************************************************************
define symbol __ICFEDIT_intvec_start__ = 0x08000000; * @attention
/*-Memory Regions-*/ *
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; * Copyright (c) 2016-2020 STMicroelectronics.
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; * All rights reserved.
define symbol __ICFEDIT_region_RAM_start__ = 0x200000C0; *
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; * This software component is licensed by ST under BSD 3-Clause license,
/*-Sizes-*/ * the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define symbol HEAP_SIZE = 0x1000;
/* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0xC00; /* Round up VECTORS_SIZE to 8 bytes */
/**** End of ICF editor section. ###ICF###*/ define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G; define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite }; initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, place in RAM_region { readwrite,
block CSTACK, block HEAP }; block CSTACK, block HEAP };
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;

37
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/cmsis_nvic.h
View File

@ -1,33 +1,18 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors * SPDX-License-Identifier: BSD-3-Clause
******************************************************************************* ******************************************************************************
* Copyright (c) 2015, STMicroelectronics * @attention
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2015-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H

78
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM/stm32f072rb.sct
View File

@ -1,54 +1,52 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2014, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2014-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_APP_START)
#define MBED_BOOT_STACK_SIZE 0x400 #define MBED_APP_START MBED_ROM_START
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
; STM32F072RB: 128KB FLASH (0x20000) + 16KB RAM (0x4000) #if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
LR_IROM1 0x08000000 0x20000 { ; load region size_region /* Round up VECTORS_SIZE to 8 bytes */
ER_IROM1 0x08000000 0x20000 { ; load address = execution address #define NVIC_NUM_VECTORS 48
*.o (RESET, +First) #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
*(InRoot$$Sections)
.ANY (+RO) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
} }
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0-Stack_Size) { ; RW data .ANY (+RW +ZI)
.ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x4000) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

94
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld
View File

@ -1,22 +1,50 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 #if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
StackSize = MBED_BOOT_STACK_SIZE; #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define NVIC_NUM_VECTORS 48
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128k FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (xrw) : ORIGIN = 0x200000C0, LENGTH = 16k - 0x0C0 RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler * Reset_Handler : Entry of reset handler
* *
* It defines following symbols, which code can use without definition: * It defines following symbols, which code can use without definition:
* __exidx_start * __exidx_start
* __exidx_end * __exidx_end
@ -47,6 +75,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -83,7 +112,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -104,7 +133,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -120,20 +148,19 @@ SECTIONS
} > RAM } > RAM
/* .stack section doesn't contains any symbols. It is only /* Uninitialized data section
* used for linker to reserve space for the main stack section * This region is not initialized by the C/C++ library and can be used to
*/ * store state across soft reboots. */
.stack (NOLOAD): .uninitialized (NOLOAD):
{ {
__StackLimit = .; . = ALIGN(32);
*(.stack*); __uninitialized_start = .;
. += StackSize - (. - __StackLimit); *(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM } > RAM
__StackTop = ADDR(.stack) + StackSize;
_estack = __StackTop;
__StackLimit = ADDR(.stack);
PROVIDE(__stack = __StackTop);
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -149,14 +176,27 @@ SECTIONS
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*); *(.heap*)
. += (ORIGIN(RAM) + LENGTH(RAM) - .); . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
PROVIDE(__heap_size = SIZEOF(.heap)); /* .stack_dummy section doesn't contains any symbols. It is only
PROVIDE(__mbed_sbrk_start = ADDR(.heap)); * used for linker to calculate size of stack sections, and assign
PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap)); * values to stack symbols later */
.stack_dummy (COPY):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop;
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
} }

68
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf
View File

@ -1,37 +1,59 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/ /* Linker script to configure memory regions.
/*-Editor annotation file-*/ *
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ * SPDX-License-Identifier: BSD-3-Clause
/*-Specials-*/ ******************************************************************************
define symbol __ICFEDIT_intvec_start__ = 0x08000000; * @attention
/*-Memory Regions-*/ *
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; * Copyright (c) 2016-2020 STMicroelectronics.
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; * All rights reserved.
define symbol __ICFEDIT_region_RAM_start__ = 0x200000C0; *
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; * This software component is licensed by ST under BSD 3-Clause license,
/*-Sizes-*/ * the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define symbol HEAP_SIZE = 0x1000;
/* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0xC00; /* Round up VECTORS_SIZE to 8 bytes */
/**** End of ICF editor section. ###ICF###*/ define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G; define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite }; initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, place in RAM_region { readwrite,
block CSTACK, block HEAP }; block CSTACK, block HEAP };
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;

37
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/cmsis_nvic.h
View File

@ -1,33 +1,18 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors * SPDX-License-Identifier: BSD-3-Clause
******************************************************************************* ******************************************************************************
* Copyright (c) 2014, STMicroelectronics * @attention
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2014-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H

78
targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_ARM/stm32f091rc.sct
View File

@ -1,54 +1,52 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2014, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2014-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_APP_START)
#define MBED_BOOT_STACK_SIZE 0x400 #define MBED_APP_START MBED_ROM_START
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
; STM32F091RC: 256KB FLASH (0x40000) + 32KB RAM (0x8000) #if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
LR_IROM1 0x08000000 0x40000 { ; load region size_region /* Round up VECTORS_SIZE to 8 bytes */
ER_IROM1 0x08000000 0x40000 { ; load address = execution address #define NVIC_NUM_VECTORS 47
*.o (RESET, +First) #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
*(InRoot$$Sections)
.ANY (+RO) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
} }
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
RW_IRAM1 (0x20000000+0xC0) (0x8000-0xC0-Stack_Size) { ; RW data .ANY (+RW +ZI)
.ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

65
targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld
View File

@ -1,22 +1,50 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 #if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
StackSize = MBED_BOOT_STACK_SIZE; #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define NVIC_NUM_VECTORS 47
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256k FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (xrw) : ORIGIN = 0x200000C0, LENGTH = 32k - 0x0C0 RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler * Reset_Handler : Entry of reset handler
* *
* It defines following symbols, which code can use without definition: * It defines following symbols, which code can use without definition:
* __exidx_start * __exidx_start
* __exidx_end * __exidx_end
@ -47,6 +75,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -83,7 +112,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -104,7 +133,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -120,6 +148,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -135,9 +176,9 @@ SECTIONS
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - StackSize; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -153,7 +194,7 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - StackSize; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */

67
targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/TOOLCHAIN_IAR/stm32f091xc.icf
View File

@ -1,36 +1,59 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/ /* Linker script to configure memory regions.
/*-Editor annotation file-*/ *
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ * SPDX-License-Identifier: BSD-3-Clause
/*-Specials-*/ ******************************************************************************
define symbol __ICFEDIT_intvec_start__ = 0x08000000; * @attention
/*-Memory Regions-*/ *
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; * Copyright (c) 2016-2020 STMicroelectronics.
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; * All rights reserved.
define symbol __ICFEDIT_region_RAM_start__ = 0x200000C0; *
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; * This software component is licensed by ST under BSD 3-Clause license,
/*-Sizes-*/ * the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol VECTORS = 47; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define symbol HEAP_SIZE = 0x2000;
/* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x2000; /* Round up VECTORS_SIZE to 8 bytes */
/**** End of ICF editor section. ###ICF###*/ define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G; define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite }; initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, place in RAM_region { readwrite,
block CSTACK, block HEAP }; block CSTACK, block HEAP };
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;

37
targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/device/cmsis_nvic.h
View File

@ -1,33 +1,18 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors * SPDX-License-Identifier: BSD-3-Clause
******************************************************************************* ******************************************************************************
* Copyright (c) 2015, STMicroelectronics * @attention
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2015-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H

77
targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM/stm32f103xb.sct
View File

@ -1,56 +1,53 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2016, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2016-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) #if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
ER_IROM1 0x08000000 0x20000 { ; load address = execution address /* Round up VECTORS_SIZE to 8 bytes */
*.o (RESET, +First) #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
*(InRoot$$Sections)
.ANY (+RO) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
} }
; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0 RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
RW_IRAM1 (0x20000000+0xF0) (0x5000-0xF0-Stack_Size) { ; RW data .ANY (+RW +ZI)
.ANY (+RW +ZI)
} }
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000+0x5000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)-0xF0) { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
} }
ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

74
targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld
View File

@ -1,23 +1,51 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/* 0xEC reserved for vectors; 8-byte aligned = 0xF0 */ /*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
STACK_SIZE = MBED_BOOT_STACK_SIZE; #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = 0x200000F0, LENGTH = 20K - (0xEC+0x4) RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler * Reset_Handler : Entry of reset handler
* *
* It defines following symbols, which code can use without definition: * It defines following symbols, which code can use without definition:
* __exidx_start * __exidx_start
* __exidx_end * __exidx_end
@ -48,6 +76,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -70,7 +99,7 @@ SECTIONS
KEEP(*(.eh_frame*)) KEEP(*(.eh_frame*))
} > FLASH } > FLASH
.ARM.extab : .ARM.extab :
{ {
*(.ARM.extab* .gnu.linkonce.armextab.*) *(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH } > FLASH
@ -84,7 +113,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -105,7 +134,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -121,6 +149,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -132,13 +173,13 @@ SECTIONS
__bss_end__ = .; __bss_end__ = .;
_ebss = .; _ebss = .;
} > RAM } > RAM
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -154,10 +195,9 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - STACK_SIZE; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
} }

68
targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf
View File

@ -1,35 +1,59 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/ /* Linker script to configure memory regions.
/*-Editor annotation file-*/ *
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ * SPDX-License-Identifier: BSD-3-Clause
/*-Specials-*/ ******************************************************************************
define symbol __ICFEDIT_intvec_start__ = 0x08000000; * @attention
/*-Memory Regions-*/ *
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; * Copyright (c) 2016-2020 STMicroelectronics.
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; * All rights reserved.
define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000; *
define symbol __ICFEDIT_region_NVIC_end__ = 0x200000F0 - 0x1; * This software component is licensed by ST under BSD 3-Clause license,
define symbol __ICFEDIT_region_RAM_start__ = 0x200000F0; /* 8-byte aligned (0xEC) = 0xF0 */ * the "License"; You may not use this file except in compliance with the
define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; * License. You may obtain a copy of the License at:
/*-Sizes-*/ * opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol VECTORS = 59; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define symbol HEAP_SIZE = 0x1000;
/* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x1400; /* Round up VECTORS_SIZE to 8 bytes */
/**** End of ICF editor section. ###ICF###*/ define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G; define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite }; initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, place in RAM_region { readwrite,
block HEAP, block CSTACK }; block CSTACK, block HEAP };

59
targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/cmsis_nvic.h
View File

@ -1,40 +1,39 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
******************************************************************************* * SPDX-License-Identifier: BSD-3-Clause
* Copyright (c) 2016, STMicroelectronics ******************************************************************************
* All rights reserved. * @attention
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// CORE: 16 vectors (= 64 bytes from 0x00 to 0x3F) #if !defined(MBED_ROM_START)
// MCU Peripherals: 43 vectors (= 172 bytes from 0x40 to 0xEB) #define MBED_ROM_START 0x8000000
// Total: 236 bytes to be reserved in RAM (see scatter file) #endif
#define NVIC_NUM_VECTORS (16 + 43)
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM #if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x20000 // 128 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x5000 // 20 KB
#endif
#define NVIC_NUM_VECTORS 59
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

83
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM/stm32f303x8.sct
View File

@ -1,76 +1,53 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2014, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2016-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE #include "../cmsis_nvic.h"
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000 #define MBED_APP_START MBED_ROM_START
#endif #endif
; STM32F303K8: 64KB FLASH (0x10000)
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x10000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
;12KB SRAM (0x3000)
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x3000
#endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
; 60 Non-Core vectors + 16 ARM Core System Handler Vectors vectors + reserved areas = 98 vectors 392 bytes (0x188) to be reserved in RAM /* Round up VECTORS_SIZE to 8 bytes */
#define VECTOR_SIZE 0x188 #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(InRoot$$Sections)
*.o (RESET, +First) .ANY (+RO)
*(InRoot$$Sections)
.ANY (+RO)
} }
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
} }
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

75
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_GCC_ARM/STM32F303X8.ld
View File

@ -1,24 +1,51 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
STACK_SIZE = MBED_BOOT_STACK_SIZE; #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
/* 60 Non-Core vectors + 16 ARM Core System Handler Vectors vectors + reserved areas = 392 bytes (0x188) to be reserved in RAM */
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 4K RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
RAM (rwx) : ORIGIN = 0x20000188, LENGTH = 12K - 0x188
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler * Reset_Handler : Entry of reset handler
* *
* It defines following symbols, which code can use without definition: * It defines following symbols, which code can use without definition:
* __exidx_start * __exidx_start
* __exidx_end * __exidx_end
@ -49,6 +76,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -71,7 +99,7 @@ SECTIONS
KEEP(*(.eh_frame*)) KEEP(*(.eh_frame*))
} > FLASH } > FLASH
.ARM.extab : .ARM.extab :
{ {
*(.ARM.extab* .gnu.linkonce.armextab.*) *(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH } > FLASH
@ -85,7 +113,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -106,7 +134,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -122,6 +149,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -133,13 +173,13 @@ SECTIONS
__bss_end__ = .; __bss_end__ = .;
_ebss = .; _ebss = .;
} > RAM } > RAM
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -155,10 +195,9 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - STACK_SIZE; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
} }

72
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf
View File

@ -1,37 +1,59 @@
/* [ROM = 64kb = 0x10000] */ /* Linker script to configure memory regions.
define symbol __intvec_start__ = 0x08000000; *
define symbol __region_ROM_start__ = 0x08000000; * SPDX-License-Identifier: BSD-3-Clause
define symbol __region_ROM_end__ = 0x0800FFFF; ******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
define symbol __region_CCMRAM_start__ = 0x10000000; /* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol __region_CCMRAM_end__ = 0x10000FFF;
/* [RAM = 12kb = 0x3000] Vector table dynamic copy: 98 vectors = 392 bytes (0x188) to be reserved in RAM */ define symbol VECTORS = 98; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define symbol __NVIC_start__ = 0x20000000; define symbol HEAP_SIZE = 0x1000;
define symbol __NVIC_end__ = 0x20000187; /* No need to add 4 more bytes to be aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x20000188;
define symbol __region_RAM_end__ = 0x20002FFF;
/* Memory regions */ /* Common - Do not change */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; if (!isdefinedsymbol(MBED_APP_START)) {
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; define symbol MBED_APP_START = MBED_ROM_START;
define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__]; }
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xC00;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite }; /* Round up VECTORS_SIZE to 8 bytes */
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G;
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in RAM_region { readwrite,
block CSTACK, block HEAP };

54
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/cmsis_nvic.h
View File

@ -1,37 +1,39 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
******************************************************************************* * SPDX-License-Identifier: BSD-3-Clause
* Copyright (c) 2014, STMicroelectronics ******************************************************************************
* All rights reserved. * @attention
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x10000 // 64 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x3000 // 12 KB
#endif
#define NVIC_NUM_VECTORS 98 #define NVIC_NUM_VECTORS 98
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

87
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM/stm32f303xe.sct
View File

@ -1,81 +1,54 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2014, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2016-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE #include "../cmsis_nvic.h"
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000 #define MBED_APP_START MBED_ROM_START
#endif #endif
; STM32F303RE: 512KB FLASH (0x80000)
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x80000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
;64KB SRAM (0x10000)
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x10000
#endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
; 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM /* Round up VECTORS_SIZE to 8 bytes */
#define VECTOR_SIZE 0x198 #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(InRoot$$Sections)
*.o (RESET, +First) .ANY (+RO)
*(InRoot$$Sections)
.ANY (+RO)
} }
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
} }
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
CCMRAM (0x10000000) (0x4000) {
.ANY (CCMRAM)
} }
} }

88
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_GCC_ARM/STM32F303XE.ld
View File

@ -1,32 +1,51 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
STACK_SIZE = MBED_BOOT_STACK_SIZE; /* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
/* 0x194 resevered for vectors; 8-byte aligned = 0x198 (0x194 + 0x4)*/
#ifndef MBED_APP_START
#define MBED_APP_START 0x08000000
#endif
#ifndef MBED_APP_SIZE
#define MBED_APP_SIZE 512K
#endif
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 16K RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 64K - (0x194+0x4)
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler * Reset_Handler : Entry of reset handler
* *
* It defines following symbols, which code can use without definition: * It defines following symbols, which code can use without definition:
* __exidx_start * __exidx_start
* __exidx_end * __exidx_end
@ -57,6 +76,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -79,7 +99,7 @@ SECTIONS
KEEP(*(.eh_frame*)) KEEP(*(.eh_frame*))
} > FLASH } > FLASH
.ARM.extab : .ARM.extab :
{ {
*(.ARM.extab* .gnu.linkonce.armextab.*) *(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH } > FLASH
@ -93,7 +113,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -114,7 +134,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -130,6 +149,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -141,13 +173,13 @@ SECTIONS
__bss_end__ = .; __bss_end__ = .;
_ebss = .; _ebss = .;
} > RAM } > RAM
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -163,17 +195,9 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - STACK_SIZE; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
.CCMRAM (NOLOAD):
{
Image$$RW_IRAM2$$Base = . ;
*(CCMRAM)
Image$$RW_IRAM2$$ZI$$Limit = .;
} > CCM
} }

75
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf
View File

@ -1,42 +1,59 @@
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; } /* Linker script to configure memory regions.
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; } *
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* [ROM = 512kb = 0x80000] */ /* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __region_CCMRAM_start__ = 0x10000000; define symbol VECTORS = 101; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define symbol __region_CCMRAM_end__ = 0x10003FFF; define symbol HEAP_SIZE = 0x4000;
/* [RAM = 64kb = 0x10000] Vector table dynamic copy: 101 vectors = 404 bytes (0x194) to be reserved in RAM */ /* Common - Do not change */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x20000197; /* Add 4 more bytes to be aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x20000198;
define symbol __region_RAM_end__ = 0x2000FFFF;
/* Memory regions */ if (!isdefinedsymbol(MBED_APP_START)) {
define memory mem with size = 4G; define symbol MBED_APP_START = MBED_ROM_START;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; }
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMRAM_end__]; if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x5000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite }; /* Round up VECTORS_SIZE to 8 bytes */
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G;
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
do not initialize { section CCMRAM };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in RAM_region { readwrite,
place in CCMRAM_region { section CCMRAM }; block CSTACK, block HEAP };

58
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/cmsis_nvic.h
View File

@ -1,41 +1,39 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
******************************************************************************* * SPDX-License-Identifier: BSD-3-Clause
* Copyright (c) 2014, STMicroelectronics ******************************************************************************
* All rights reserved. * @attention
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// STM32F303RE #if !defined(MBED_ROM_START)
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F #define MBED_ROM_START 0x8000000
// MCU Peripherals: 85 vectors = 340 bytes from 0x40 to 0x193 #endif
// Total: 101 vectors = 404 bytes (0x194) to be reserved in RAM
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x80000 // 512 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x10000 // 64 KB
#endif
#define NVIC_NUM_VECTORS 101 #define NVIC_NUM_VECTORS 101
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

43
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM/stm32h743xI.sct
View File

@ -1,9 +1,11 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;
; SPDX-License-Identifier: BSD-3-Clause
;****************************************************************************** ;******************************************************************************
;* @attention ;* @attention
;* ;*
;* Copyright (c) 2018-2019 STMicroelectronics. ;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved. ;* All rights reserved.
;* ;*
;* This software component is licensed by ST under BSD 3-Clause license, ;* This software component is licensed by ST under BSD 3-Clause license,
@ -13,45 +15,46 @@
;* ;*
;****************************************************************************** ;******************************************************************************
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000 #define MBED_APP_START MBED_ROM_START
#endif #endif
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x200000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE /* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define MBED_RAM_START 0x24000000 #define MBED_CRASH_REPORT_RAM_START (NVIC_RAM_VECTOR_ADDRESS + VECTORS_SIZE)
#define MBED_RAM_SIZE 0x80000
#define MBED_VECTTABLE_RAM_START 0x20000000
#define MBED_VECTTABLE_RAM_SIZE 0x298
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100 #define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_RAM_START)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First) *.o (RESET, +First)
*(InRoot$$Sections) *(InRoot$$Sections)
.ANY (+RO) .ANY (+RO)
} }
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
} }
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data RW_IRAM1 (MBED_RAM_START) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
RW_DMARxDscrTab 0x30040000 0x60 { RW_DMARxDscrTab 0x30040000 0x60 {

39
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/cmsis_nvic.h Normal file
View File

@ -0,0 +1,39 @@
/* mbed Microcontroller Library
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8000000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x24000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x80000 // 128 KB
#endif
#define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
#endif

46
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct
View File

@ -1,9 +1,11 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;
; SPDX-License-Identifier: BSD-3-Clause
;****************************************************************************** ;******************************************************************************
;* @attention ;* @attention
;* ;*
;* Copyright (c) 2019 STMicroelectronics. ;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved. ;* All rights reserved.
;* ;*
;* This software component is licensed by ST under BSD 3-Clause license, ;* This software component is licensed by ST under BSD 3-Clause license,
@ -13,39 +15,39 @@
;* ;*
;****************************************************************************** ;******************************************************************************
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08100000 #define MBED_APP_START MBED_ROM_START
#endif #endif
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x100000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE /* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define MBED_RAM_START 0x10000000 LR_IROM1 MBED_APP_START MBED_APP_SIZE {
#define MBED_RAM_SIZE 0x48000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x298
#define MBED_RAM0_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(InRoot$$Sections)
*.o (RESET, +First) .ANY (+RO)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
.ANY (+RW +ZI)
} }
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

40
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/cmsis_nvic.h Normal file
View File

@ -0,0 +1,40 @@
/* mbed Microcontroller Library
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8100000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x100000 // 1.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x10000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x48000 // 288 KB
#endif
#define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif

42
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/TOOLCHAIN_ARM/stm32h745xI.sct
View File

@ -1,9 +1,11 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;
; SPDX-License-Identifier: BSD-3-Clause
;****************************************************************************** ;******************************************************************************
;* @attention ;* @attention
;* ;*
;* Copyright (c) 2018-2019 STMicroelectronics. ;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved. ;* All rights reserved.
;* ;*
;* This software component is licensed by ST under BSD 3-Clause license, ;* This software component is licensed by ST under BSD 3-Clause license,
@ -13,40 +15,40 @@
;* ;*
;****************************************************************************** ;******************************************************************************
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000 #define MBED_APP_START MBED_ROM_START
#endif #endif
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x100000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE /* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define MBED_RAM_START 0x24000000 LR_IROM1 MBED_APP_START MBED_APP_SIZE {
#define MBED_RAM_SIZE 0x80000
#define MBED_VECTTABLE_RAM_START 0x20000000
#define MBED_VECTTABLE_RAM_SIZE 0x298
#define MBED_RAM0_START (MBED_RAM_START)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(InRoot$$Sections)
*.o (RESET, +First) .ANY (+RO)
*(InRoot$$Sections)
.ANY (+RO)
} }
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data RW_IRAM1 (MBED_RAM_START) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
RW_DMARxDscrTab 0x30040000 0x60 { RW_DMARxDscrTab 0x30040000 0x60 {

24
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/cmsis_nvic.h → targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/cmsis_nvic.h
View File

@ -16,10 +16,24 @@
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F #if !defined(MBED_ROM_START)
// MCU Peripherals: 150 vectors = 600 bytes from 0x40 to 0x297 #define MBED_ROM_START 0x8000000
// Total: 166 vectors = 664 bytes (0x298) to be reserved in RAM #endif
#define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of DTCM RAM #if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x100000 // 1.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x24000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x80000 // 512 KB
#endif
#define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
#endif #endif

46
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct
View File

@ -1,9 +1,11 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;
; SPDX-License-Identifier: BSD-3-Clause
;****************************************************************************** ;******************************************************************************
;* @attention ;* @attention
;* ;*
;* Copyright (c) 2019 STMicroelectronics. ;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved. ;* All rights reserved.
;* ;*
;* This software component is licensed by ST under BSD 3-Clause license, ;* This software component is licensed by ST under BSD 3-Clause license,
@ -13,39 +15,39 @@
;* ;*
;****************************************************************************** ;******************************************************************************
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08100000 #define MBED_APP_START MBED_ROM_START
#endif #endif
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x100000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE /* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define MBED_RAM_START 0x10000000 LR_IROM1 MBED_APP_START MBED_APP_SIZE {
#define MBED_RAM_SIZE 0x48000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x298
#define MBED_RAM0_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(InRoot$$Sections)
*.o (RESET, +First) .ANY (+RO)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
.ANY (+RW +ZI)
} }
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

40
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/cmsis_nvic.h Normal file
View File

@ -0,0 +1,40 @@
/* mbed Microcontroller Library
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#if !defined(MBED_ROM_START)
#define MBED_ROM_START 0x8100000
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x100000 // 1.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x10000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x48000 // 288 KB
#endif
#define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif

42
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/TOOLCHAIN_ARM/stm32h747xI.sct
View File

@ -1,9 +1,11 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;
; SPDX-License-Identifier: BSD-3-Clause
;****************************************************************************** ;******************************************************************************
;* @attention ;* @attention
;* ;*
;* Copyright (c) 2018-2019 STMicroelectronics. ;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved. ;* All rights reserved.
;* ;*
;* This software component is licensed by ST under BSD 3-Clause license, ;* This software component is licensed by ST under BSD 3-Clause license,
@ -13,40 +15,40 @@
;* ;*
;****************************************************************************** ;******************************************************************************
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000 #define MBED_APP_START MBED_ROM_START
#endif #endif
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x100000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE /* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define MBED_RAM_START 0x24000000 LR_IROM1 MBED_APP_START MBED_APP_SIZE {
#define MBED_RAM_SIZE 0x80000
#define MBED_VECTTABLE_RAM_START 0x20000000
#define MBED_VECTTABLE_RAM_SIZE 0x298
#define MBED_RAM0_START (MBED_RAM_START)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(InRoot$$Sections)
*.o (RESET, +First) .ANY (+RO)
*(InRoot$$Sections)
.ANY (+RO)
} }
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data RW_IRAM1 (MBED_RAM_START) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
RW_DMARxDscrTab 0x30040000 0x60 { RW_DMARxDscrTab 0x30040000 0x60 {

27
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/cmsis_nvic.h → targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/cmsis_nvic.h
View File

@ -16,15 +16,24 @@
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F #if !defined(MBED_ROM_START)
// MCU Peripherals: 150 vectors = 600 bytes from 0x40 to 0x297 #define MBED_ROM_START 0x8000000
// Total: 166 vectors = 664 bytes (0x298) to be reserved in RAM
#define NVIC_NUM_VECTORS 166
#ifdef CORE_CM7
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of DTCM RAM
#else
#define NVIC_RAM_VECTOR_ADDRESS 0x10000000 // Vectors positioned at start of D2 RAM (CM4)
#endif #endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x100000 // 1.0 MB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x24000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x80000 // 512 KB
#endif
#define NVIC_NUM_VECTORS 166
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
#endif #endif

30
targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/cmsis_nvic.h
View File

@ -1,30 +0,0 @@
/*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2018-2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
// MCU Peripherals: 150 vectors = 600 bytes from 0x40 to 0x297
// Total: 166 vectors = 664 bytes (0x298) to be reserved in RAM
#define NVIC_NUM_VECTORS 166
#ifdef CORE_CM7
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of DTCM RAM
#else
#define NVIC_RAM_VECTOR_ADDRESS 0x10000000 // Vectors positioned at start of D2 RAM (CM4)
#endif
#endif

83
targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM/stm32l073xz.sct
View File

@ -1,76 +1,53 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2016-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE #include "../cmsis_nvic.h"
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_APP_START) #if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000 #define MBED_APP_START MBED_ROM_START
#endif #endif
; STM32L073RZ: 192KB FLASH (0x30000)
#if !defined(MBED_APP_SIZE) #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x30000 #define MBED_APP_SIZE MBED_ROM_SIZE
#endif #endif
; 20KB RAM (0x5000)
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x5000
#endif
#if !defined(MBED_BOOT_STACK_SIZE) #if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400 /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif #endif
; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM /* Round up VECTORS_SIZE to 8 bytes */
#define VECTOR_SIZE 0xC0 #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(InRoot$$Sections)
*.o (RESET, +First) .ANY (+RO)
*(InRoot$$Sections)
.ANY (+RO)
} }
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
.ANY (+RW +ZI) .ANY (+RW +ZI)
} }
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
} }
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

90
targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_GCC_ARM/STM32L073XZ.ld
View File

@ -1,3 +1,46 @@
/* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
}
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM. * with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code: * It references following symbols, which must be defined in code:
@ -25,28 +68,6 @@
* __stack * __stack
* _estack * _estack
*/ */
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x30000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = 0x200000C0, LENGTH = 20K - 0xC0
}
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
SECTIONS SECTIONS
@ -55,6 +76,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -77,7 +99,7 @@ SECTIONS
KEEP(*(.eh_frame*)) KEEP(*(.eh_frame*))
} > FLASH } > FLASH
.ARM.extab : .ARM.extab :
{ {
*(.ARM.extab* .gnu.linkonce.armextab.*) *(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH } > FLASH
@ -91,7 +113,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -112,7 +134,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -128,6 +149,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -143,9 +177,9 @@ SECTIONS
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -161,7 +195,7 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - STACK_SIZE; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */

75
targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf
View File

@ -1,40 +1,59 @@
if (!isdefinedsymbol(MBED_APP_START)) { /* Linker script to configure memory regions.
define symbol MBED_APP_START = 0x08000000; *
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define symbol HEAP_SIZE = 0x1000;
/* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
} }
if (!isdefinedsymbol(MBED_APP_SIZE)) { if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0x30000; define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
} }
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
/* [RAM = 20kb = 0x5000] Vector table dynamic copy: 48 vectors = 192 bytes (0xC0) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x200000BF; /* Aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x200000C0;
define symbol __region_RAM_end__ = 0x20004FFF;
/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x1000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite }; /* Round up VECTORS_SIZE to 8 bytes */
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G;
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in RAM_region { readwrite,
block CSTACK, block HEAP };

57
targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/cmsis_nvic.h
View File

@ -1,40 +1,39 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
******************************************************************************* * SPDX-License-Identifier: BSD-3-Clause
* Copyright (c) 2014, STMicroelectronics ******************************************************************************
* All rights reserved. * @attention
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F #if !defined(MBED_ROM_START)
// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF #define MBED_ROM_START 0x8000000
// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM #endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x30000 // 192 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x5000 // 20 KB
#endif
#define NVIC_NUM_VECTORS 48 #define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

79
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM/stm32l072xz.sct
View File

@ -1,54 +1,53 @@
#! armcc -E #! armcc -E
; Scatter-Loading Description File ; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics
; All rights reserved.
; ;
; Redistribution and use in source and binary forms, with or without ; SPDX-License-Identifier: BSD-3-Clause
; modification, are permitted provided that the following conditions are met: ;******************************************************************************
; ;* @attention
; 1. Redistributions of source code must retain the above copyright notice, ;*
; this list of conditions and the following disclaimer. ;* Copyright (c) 2016-2020 STMicroelectronics.
; 2. Redistributions in binary form must reproduce the above copyright notice, ;* All rights reserved.
; this list of conditions and the following disclaimer in the documentation ;*
; and/or other materials provided with the distribution. ;* This software component is licensed by ST under BSD 3-Clause license,
; 3. Neither the name of STMicroelectronics nor the names of its contributors ;* the "License"; You may not use this file except in compliance with the
; may be used to endorse or promote products derived from this software ;* License. You may obtain a copy of the License at:
; without specific prior written permission. ;* opensource.org/licenses/BSD-3-Clause
; ;*
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ;******************************************************************************
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
#define Stack_Size MBED_BOOT_STACK_SIZE #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
; STM32L072CZ: 192KB FLASH (0x30000) + 20KB RAM (0x5000) #if !defined(MBED_BOOT_STACK_SIZE)
LR_IROM1 0x08000000 0x30000 { ; load region size_region /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
ER_IROM1 0x08000000 0x30000 { ; load address = execution address /* Round up VECTORS_SIZE to 8 bytes */
*.o (RESET, +First) #define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
*(InRoot$$Sections)
.ANY (+RO) LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
} }
; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0-Stack_Size) { ; RW data .ANY (+RW +ZI)
.ANY (+RW +ZI)
} }
ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
}
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
} }
} }

64
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_GCC_ARM/STM32L072XZ.ld
View File

@ -1,15 +1,44 @@
/* Linker script to configure memory regions. */ /* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#if !defined(MBED_BOOT_STACK_SIZE) #include "../cmsis_nvic.h"
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif #endif
STACK_SIZE = MBED_BOOT_STACK_SIZE; #if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 192k FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM (rwx) : ORIGIN = 0x200000C0, LENGTH = 20K - 0xC0 RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
@ -47,6 +76,7 @@ SECTIONS
{ {
KEEP(*(.isr_vector)) KEEP(*(.isr_vector))
*(.text*) *(.text*)
KEEP(*(.init)) KEEP(*(.init))
KEEP(*(.fini)) KEEP(*(.fini))
@ -69,7 +99,7 @@ SECTIONS
KEEP(*(.eh_frame*)) KEEP(*(.eh_frame*))
} > FLASH } > FLASH
.ARM.extab : .ARM.extab :
{ {
*(.ARM.extab* .gnu.linkonce.armextab.*) *(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH } > FLASH
@ -83,7 +113,7 @@ SECTIONS
__etext = .; __etext = .;
_sidata = .; _sidata = .;
.data : AT (__etext) .data : AT (__etext)
{ {
__data_start__ = .; __data_start__ = .;
@ -104,7 +134,6 @@ SECTIONS
KEEP(*(.init_array)) KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .); PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(8); . = ALIGN(8);
/* finit data */ /* finit data */
PROVIDE_HIDDEN (__fini_array_start = .); PROVIDE_HIDDEN (__fini_array_start = .);
@ -120,6 +149,19 @@ SECTIONS
} > RAM } > RAM
/* Uninitialized data section
* This region is not initialized by the C/C++ library and can be used to
* store state across soft reboots. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss : .bss :
{ {
. = ALIGN(8); . = ALIGN(8);
@ -135,9 +177,9 @@ SECTIONS
.heap (COPY): .heap (COPY):
{ {
__end__ = .; __end__ = .;
end = __end__; PROVIDE(end = .);
*(.heap*) *(.heap*)
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
__HeapLimit = .; __HeapLimit = .;
} > RAM } > RAM
@ -153,7 +195,7 @@ SECTIONS
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - STACK_SIZE; __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */ /* Check if data + heap + stack exceeds RAM limit */

70
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_IAR/stm32l072xx.icf
View File

@ -1,33 +1,59 @@
/* [ROM = 192kb = 0x30000] */ /* Linker script to configure memory regions.
define symbol __intvec_start__ = 0x08000000; *
define symbol __region_ROM_start__ = 0x08000000; * SPDX-License-Identifier: BSD-3-Clause
define symbol __region_ROM_end__ = 0x0802FFFF; ******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Device specific values */
/* [RAM = 20kb = 0x5000] Vector table dynamic copy: 48 vectors = 192 bytes (0xC0) to be reserved in RAM */ /* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x200000BF; /* Aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x200000C0;
define symbol __region_RAM_end__ = 0x20004FFF;
/* Memory regions */ define symbol VECTORS = 48; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
define memory mem with size = 4G; define symbol HEAP_SIZE = 0x1000;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; /* Common - Do not change */
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
/* Stack and Heap */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_BOOT_STACK_SIZE = 0x400; define symbol MBED_BOOT_STACK_SIZE = 0x400;
} }
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x1000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite }; /* Round up VECTORS_SIZE to 8 bytes */
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
define memory mem with size = 4G;
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 8, size = HEAP_SIZE { };
initialize by copy { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem: MBED_APP_START { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in RAM_region { readwrite,
block CSTACK, block HEAP };

60
targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/cmsis_nvic.h
View File

@ -1,41 +1,39 @@
/* mbed Microcontroller Library /* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors * SPDX-License-Identifier: BSD-3-Clause
******************************************************************************* ******************************************************************************
* Copyright (c) 2017, STMicroelectronics * @attention
* All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
* modification, are permitted provided that the following conditions are met: * All rights reserved.</center></h2>
* *
* 1. Redistributions of source code must retain the above copyright notice, * This software component is licensed by ST under BSD 3-Clause license,
* this list of conditions and the following disclaimer. * the "License"; You may not use this file except in compliance with the
* 2. Redistributions in binary form must reproduce the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer in the documentation * opensource.org/licenses/BSD-3-Clause
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ******************************************************************************
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE */
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H #ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F #if !defined(MBED_ROM_START)
// MCU Peripherals: 32 vectors = 128 bytes from 0x40 to 0xBF #define MBED_ROM_START 0x8000000
// Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM #endif
#define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM #if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x30000 // 192 KB
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x5000 // 20 KB
#endif
#define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

3
targets/targets.json
View File

@ -1368,6 +1368,9 @@
"macro_name": "CLOCK_SOURCE" "macro_name": "CLOCK_SOURCE"
} }
}, },
"overrides": {
"tickless-from-us-ticker": true
},
"detect_code": [ "detect_code": [
"0700" "0700"
], ],