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Add force/release reset during Serial init phase

pull/1894/head
bcostm 2016-06-10 11:26:15 +02:00
parent 24e767c10f
commit ec36ce72c8
1 changed files with 12 additions and 0 deletions
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12
hal/targets/hal/TARGET_STM/TARGET_STM32F3/serial_api.c
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@ -85,17 +85,25 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
// Enable USART clock + switch to SystemClock
if (obj->uart == UART_1) {
__USART1_FORCE_RESET();
__USART1_RELEASE_RESET();
__USART1_CLK_ENABLE();
__HAL_RCC_USART1_CONFIG(RCC_USART1CLKSOURCE_SYSCLK);
obj->index = 0;
}
#if defined(USART2_BASE)
if (obj->uart == UART_2) {
__USART2_FORCE_RESET();
__USART2_RELEASE_RESET();
__USART2_CLK_ENABLE();
__HAL_RCC_USART2_CONFIG(RCC_USART2CLKSOURCE_SYSCLK);
obj->index = 1;
}
#endif
#if defined(USART3_BASE)
if (obj->uart == UART_3) {
__USART3_FORCE_RESET();
__USART3_RELEASE_RESET();
__USART3_CLK_ENABLE();
__HAL_RCC_USART3_CONFIG(RCC_USART3CLKSOURCE_SYSCLK);
obj->index = 2;
@ -103,6 +111,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
#endif
#if defined(UART4_BASE)
if (obj->uart == UART_4) {
__UART4_FORCE_RESET();
__UART4_RELEASE_RESET();
__UART4_CLK_ENABLE();
__HAL_RCC_UART4_CONFIG(RCC_UART4CLKSOURCE_SYSCLK);
obj->index = 3;
@ -110,6 +120,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
#endif
#if defined(UART5_BASE)
if (obj->uart == UART_5) {
__HAL_RCC_UART5_FORCE_RESET();
__HAL_RCC_UART5_RELEASE_RESET();
__UART5_CLK_ENABLE();
__HAL_RCC_UART5_CONFIG(RCC_UART5CLKSOURCE_SYSCLK);
obj->index = 4;