diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 29893d151c..70e0e7dc3a 100644
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -112,7 +112,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
     ('RBLAB_BLENANO', ('ARM', 'GCC_ARM')),
     ('WALLBOT_BLE',  ('ARM', 'GCC_ARM')),
     ('DELTA_DFCM_NNN40',  ('ARM', 'GCC_ARM')),
-    ('NRF51_MICROBIT',      ('ARM',)),
+    ('NRF51_MICROBIT',      ('ARM','GCC_ARM')),
     ('NRF51_MICROBIT_B',      ('ARM',)),
     ('TY51822R3',     ('ARM', 'GCC_ARM')),
 
diff --git a/workspace_tools/export/gcc_arm_nrf51_microbit.tmpl b/workspace_tools/export/gcc_arm_nrf51_microbit.tmpl
new file mode 100644
index 0000000000..8071c9b0bb
--- /dev/null
+++ b/workspace_tools/export/gcc_arm_nrf51_microbit.tmpl
@@ -0,0 +1,14 @@
+{% extends "gcc_arm_common.tmpl" %}
+
+{% block additional_variables %}
+SOFTDEVICE = mbed/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex
+{% endblock %}
+
+{% block additional_executables %}
+SREC_CAT = srec_cat
+{% endblock %}
+
+{% block additional_targets %}
+merge:
+	$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
+{% endblock %}
diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py
index cc6a2fbe43..1fd1cf4214 100755
--- a/workspace_tools/export/gccarm.py
+++ b/workspace_tools/export/gccarm.py
@@ -95,6 +95,7 @@ class GccArm(Exporter):
         'NUCLEO_L152RE',
         'NRF51_DK',
         'NRF51_DONGLE',
+        'NRF51_MICROBIT',
         'SEEED_TINY_BLE',
         'DISCO_F401VC',
         'DELTA_DFCM_NNN40',