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Add bootloader support for the LPC55S69 board 

bla
pull/10086/head
David Saada 2019-03-07 18:00:20 +02:00
parent d6088e5017
commit eb5cef84fd
11 changed files with 1933 additions and 14 deletions
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1877
features/FEATURE_BOOTLOADER/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/mbed-bootloader-lpc55s69-v1_0_0.hex Normal file
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10
features/FEATURE_BOOTLOADER/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/mbed_lib.json Normal file
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@ -0,0 +1,10 @@
{
"name": "bootloader_LPC55S69",
"target_overrides": {
"*": {
"target.app_offset": "0x8400",
"target.header_offset": "0x8000",
"target.bootloader_img": "mbed-bootloader-lpc55s69-v1_0_0.hex"
}
}
}

4
platform/mbed_application.c
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@ -106,7 +106,7 @@ static void powerdown_nvic()
NVIC->ICER[i] = 0xFFFFFFFF;
NVIC->ICPR[i] = 0xFFFFFFFF;
for (j = 0; j < 8; j++) {
#if defined(__CORTEX_M23)
#if defined(__CORTEX_M23) || defined(__CORTEX_M33)
NVIC->IPR[i * 8 + j] = 0x00000000;
#else
NVIC->IP[i * 8 + j] = 0x00000000;
@ -132,7 +132,7 @@ static void powerdown_scb(uint32_t vtor)
num_pri_reg = 12;
#endif
for (i = 0; i < num_pri_reg; i++) {
#if defined(__CORTEX_M7) || defined(__CORTEX_M23)
#if defined(__CORTEX_M7) || defined(__CORTEX_M23) || defined(__CORTEX_M33)
SCB->SHPR[i] = 0x00;
#else
SCB->SHP[i] = 0x00;

2
platform/mbed_application.h
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@ -21,7 +21,7 @@
#include<stdint.h>
#if defined(__CORTEX_M0PLUS) || defined(__CORTEX_M3) || defined(__CORTEX_M4) || defined(__CORTEX_M7)\
|| defined(__CORTEX_M23) || defined(__CORTEX_A9)
|| defined(__CORTEX_M23) || defined(__CORTEX_A9) || defined(__CORTEX_M33)
#define MBED_APPLICATION_SUPPORT 1
#else
#define MBED_APPLICATION_SUPPORT 0

14
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct
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@ -57,10 +57,18 @@
#define MBED_ROM_START NS_CODE_START
#endif
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE NS_CODE_SIZE
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START NS_DATA_START
#endif
@ -70,11 +78,11 @@
#endif
#define m_interrupts_start MBED_ROM_START
#define m_interrupts_start MBED_APP_START
#define m_interrupts_size 0x140
#define m_text_start MBED_ROM_START + 0x140
#define m_text_size MBED_ROM_SIZE - 0x140
#define m_text_start MBED_APP_START + 0x140
#define m_text_size MBED_APP_SIZE - 0x140
#define m_interrupts_ram_start MBED_RAM_START
#define m_interrupts_ram_size __ram_vector_table_size__

12
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_GCC_ARM/LPC55S69_cm33_core0_flash.ld
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@ -33,10 +33,18 @@ __ram_vector_table__ = 1;
#define MBED_ROM_START NS_CODE_START
#endif
#if !defined(MBED_APP_START)
#define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE NS_CODE_SIZE
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_RAM_START)
#define MBED_RAM_START NS_DATA_START
#endif
@ -56,8 +64,8 @@ M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x200 : 0x0;
MEMORY
{
m_interrupts (RX) : ORIGIN = MBED_ROM_START, LENGTH = 0x140
m_text (RX) : ORIGIN = MBED_ROM_START + 0x140, LENGTH = MBED_ROM_SIZE - 0x140
m_interrupts (RX) : ORIGIN = MBED_APP_START, LENGTH = 0x140
m_text (RX) : ORIGIN = MBED_APP_START + 0x140, LENGTH = MBED_APP_SIZE - 0x140
m_data (RW) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
m_usb_sram (RW) : ORIGIN = 0x40100000, LENGTH = 0x00004000
}

16
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_IAR/LPC55S69_cm33_core0_flash.icf
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@ -34,10 +34,18 @@ if (!isdefinedsymbol(MBED_ROM_START)) {
define symbol MBED_ROM_START = NS_CODE_START;
}
if (!isdefinedsymbol(MBED_APP_START)) {
define symbol MBED_APP_START = MBED_ROM_START;
}
if (!isdefinedsymbol(MBED_ROM_SIZE)) {
define symbol MBED_ROM_SIZE = NS_CODE_SIZE;
}
if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
}
if (!isdefinedsymbol(MBED_RAM_START)) {
define symbol MBED_RAM_START = NS_DATA_START;
}
@ -72,11 +80,11 @@ if (isdefinedsymbol(__heap_size__)) {
define symbol __size_heap__ = 0x0400;
}
define symbol m_interrupts_start = MBED_ROM_START;
define symbol m_interrupts_end = (MBED_ROM_START + 0x13F);
define symbol m_interrupts_start = MBED_APP_START;
define symbol m_interrupts_end = (MBED_APP_START + 0x13F);
define symbol m_text_start = (MBED_ROM_START + 0x140);
define symbol m_text_end = (MBED_ROM_START + MBED_ROM_SIZE - 1);
define symbol m_text_start = (MBED_APP_START + 0x140);
define symbol m_text_end = (MBED_APP_START + MBED_APP_SIZE - 1);
define symbol m_interrupts_ram_start = MBED_RAM_START;
define symbol m_interrupts_ram_end = (MBED_RAM_START + __ram_vector_table_size__ - 1);

4
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/cmsis_nvic_virtual.c
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@ -17,7 +17,9 @@
*/
#include "cmsis_nvic_virtual.h"
#include "psa/lifecycle.h"
#include "mbed_toolchain.h"
MBED_NORETURN void mbed_psa_system_reset();
void __NVIC_TFMSystemReset(void)
{

3
targets/targets.json
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@ -2102,7 +2102,8 @@
"secure-ram-start": "0x30000000",
"secure-ram-size": "0x22000"
},
"OUTPUT_EXT": "hex"
"OUTPUT_EXT": "hex",
"bootloader_supported": true
},
"LPC55S69_S": {
"inherits": ["SPE_Target", "LPC55S69"],

2
tools/psa/__init__.py
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@ -21,6 +21,8 @@ from tools.resources import FileType
def find_secure_image(notify, resources, ns_image_path, configured_s_image_filename, image_type):
""" Find secure image. """
if configured_s_image_filename is None:
return None
assert ns_image_path and configured_s_image_filename, 'ns_image_path and configured_s_image_path are mandatory'
assert image_type in [FileType.BIN, FileType.HEX], 'image_type must be of type BIN or HEX'

3
tools/targets/LPC55S69.py
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@ -26,6 +26,9 @@ LPC55S69_BASE = path_join(MBED_OS_ROOT, 'targets', 'TARGET_NXP', 'TARGET_MCUXpre
def lpc55s69_complete(t_self, non_secure_bin, secure_bin):
if secure_bin is None:
return None
assert os.path.isfile(secure_bin)
assert os.path.isfile(non_secure_bin)