mirror of https://github.com/ARMmbed/mbed-os.git
Add support for 1_1_2 and 1_2_2 modes in HAL
parent
d8ba8b3b06
commit
eb3fc1334a
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@ -100,11 +100,31 @@ qspi_status_t qspi_prepare_command(qspi_t *obj, const qspi_command_t *command, b
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} else {
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} else {
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config.prot_if.readoc = NRF_QSPI_READOC_READ4IO;
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config.prot_if.readoc = NRF_QSPI_READOC_READ4IO;
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}
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}
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// 1-1-2
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} else if (command->instruction.bus_width == QSPI_CFG_BUS_SINGLE &&
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command->address.bus_width == QSPI_CFG_BUS_SINGLE &&
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command->data.bus_width == QSPI_CFG_BUS_DUAL) {
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// 1-1-2
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if (write) {
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config.prot_if.writeoc = NRF_QSPI_WRITEOC_PP2O;
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} else {
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config.prot_if.readoc = NRF_QSPI_READOC_READ2O;
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}
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// 1-2-2
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} else if (command->instruction.bus_width == QSPI_CFG_BUS_SINGLE &&
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command->address.bus_width == QSPI_CFG_BUS_DUAL &&
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command->data.bus_width == QSPI_CFG_BUS_DUAL) {
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// 1-2-2
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if (write) {
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//Currently NRF52840 does not define PP2IO, so use PP2O for 1-2-2 mode
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config.prot_if.writeoc = NRF_QSPI_WRITEOC_PP2O;
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} else {
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config.prot_if.readoc = NRF_QSPI_READOC_READ2IO;
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}
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}
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}
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}
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}
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qspi_status_t ret = QSPI_STATUS_OK;
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qspi_status_t ret = QSPI_STATUS_OK;
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// supporting only 24 or 32 bit address
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// supporting only 24 or 32 bit address
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if (command->address.size == QSPI_CFG_ADDR_SIZE_24) {
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if (command->address.size == QSPI_CFG_ADDR_SIZE_24) {
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config.prot_if.addrmode = NRF_QSPI_ADDRMODE_24BIT;
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config.prot_if.addrmode = NRF_QSPI_ADDRMODE_24BIT;
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