From ea81d4bcd89068b2946557bfda8e75da0dd609ef Mon Sep 17 00:00:00 2001 From: Toyomasa Watarai Date: Thu, 7 Jun 2018 13:56:01 +0900 Subject: [PATCH] Add volatile modifier for CP15 accessors Add volatile modifier to prevent ARM compiler to remove inline function calls for __set_CP and __get_CP. --- cmsis/TARGET_CORTEX_A/cmsis_armcc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cmsis/TARGET_CORTEX_A/cmsis_armcc.h b/cmsis/TARGET_CORTEX_A/cmsis_armcc.h index 7c4c948345..313d7435b3 100644 --- a/cmsis/TARGET_CORTEX_A/cmsis_armcc.h +++ b/cmsis/TARGET_CORTEX_A/cmsis_armcc.h @@ -451,8 +451,8 @@ __STATIC_INLINE void __set_FPEXC(uint32_t fpexc) * Include common core functions to access Coprocessor 15 registers */ -#define __get_CP(cp, op1, Rt, CRn, CRm, op2) do { register uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); (Rt) = tmp; } while(0) -#define __set_CP(cp, op1, Rt, CRn, CRm, op2) do { register uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); tmp = (Rt); } while(0) +#define __get_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); (Rt) = tmp; } while(0) +#define __set_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":" # op1 ":c" # CRn ":c" # CRm ":" # op2); tmp = (Rt); } while(0) #define __get_CP64(cp, op1, Rt, CRm) \ do { \ uint32_t ltmp, htmp; \