From ea196e2adb54f011ceb1e8799da49cdb7a9bdc04 Mon Sep 17 00:00:00 2001 From: Olaf Hagendorf Date: Wed, 15 Jun 2016 16:28:22 +0200 Subject: [PATCH] fpu with single/double precision - bugfix and extension - creating new core name Cortex_M7F_DP for a target with a double precision fpu - adding new core name to arm.py to set compiler/linker flags to a double precision fpu when configured in target.json - up to now: gcc wrote flag for a double precision fpu -> target with STM32F746 didn't run when using double variables - mcu has only single precision fpu - changing gcc.py to use single precision for Cortex-M7 und double precision for Cortex_M7F_DP tested with NUCLEO_F746, NUCLEO_F767 and build.py+make.py and exporting with project.py + compiling/flashing - iar.py need a similar extention - I didn't change that yet because - did not run at the moment - python exception - currently worked on in PR #1948 --- hal/targets.json | 2 +- tools/targets.py | 1 + tools/toolchains/__init__.py | 1 + tools/toolchains/arm.py | 2 ++ tools/toolchains/gcc.py | 7 +++++++ 5 files changed, 12 insertions(+), 1 deletion(-) diff --git a/hal/targets.json b/hal/targets.json index 515a430afd..aecf231c40 100644 --- a/hal/targets.json +++ b/hal/targets.json @@ -815,7 +815,7 @@ }, "NUCLEO_F767ZI": { "inherits": ["Target"], - "core": "Cortex-M7F", + "core": "Cortex-M7F_DP", "extra_labels": ["STM", "STM32F7", "STM32F767", "STM32F767ZI"], "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "default_toolchain": "ARM", diff --git a/tools/targets.py b/tools/targets.py index 953523f6c7..a57ea6a475 100644 --- a/tools/targets.py +++ b/tools/targets.py @@ -25,6 +25,7 @@ CORE_LABELS = { "Cortex-M4F" : ["M4", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M4"], "Cortex-M7" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"], "Cortex-M7F" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"], + "Cortex-M7F_DP" : ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7"], "Cortex-A9" : ["A9", "CORTEX_A", "LIKE_CORTEX_A9"] } diff --git a/tools/toolchains/__init__.py b/tools/toolchains/__init__.py index b801a1a011..1ce7b25953 100644 --- a/tools/toolchains/__init__.py +++ b/tools/toolchains/__init__.py @@ -219,6 +219,7 @@ class mbedToolchain: "Cortex-M4F" : ["__CORTEX_M4", "ARM_MATH_CM4", "__FPU_PRESENT=1", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], "Cortex-M7" : ["__CORTEX_M7", "ARM_MATH_CM7", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], "Cortex-M7F" : ["__CORTEX_M7", "ARM_MATH_CM7", "__FPU_PRESENT=1", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], + "Cortex-M7F_DP" : ["__CORTEX_M7", "ARM_MATH_CM7", "__FPU_PRESENT=1", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], "Cortex-A9" : ["__CORTEX_A9", "ARM_MATH_CA9", "__FPU_PRESENT", "__CMSIS_RTOS", "__EVAL", "__MBED_CMSIS_RTOS_CA9"], } diff --git a/tools/toolchains/arm.py b/tools/toolchains/arm.py index 1b94a0b5bd..0c3a20bc0f 100644 --- a/tools/toolchains/arm.py +++ b/tools/toolchains/arm.py @@ -51,6 +51,8 @@ class ARM(mbedToolchain): cpu = "Cortex-M4.fp" elif target.core == "Cortex-M7F": cpu = "Cortex-M7.fp.sp" + elif target.core == "Cortex-M7F_DP": + cpu = "Cortex-M7.fp.dp" else: cpu = target.core diff --git a/tools/toolchains/gcc.py b/tools/toolchains/gcc.py index 6b3fa21fe8..c5261b0660 100644 --- a/tools/toolchains/gcc.py +++ b/tools/toolchains/gcc.py @@ -52,6 +52,8 @@ class GCC(mbedToolchain): cpu = "cortex-m4" elif target.core == "Cortex-M7F": cpu = "cortex-m7" + elif target.core == "Cortex-M7F_DP": + cpu = "cortex-m7" else: cpu = target.core.lower() @@ -62,7 +64,12 @@ class GCC(mbedToolchain): if target.core == "Cortex-M4F": self.cpu.append("-mfpu=fpv4-sp-d16") self.cpu.append("-mfloat-abi=softfp") + elif target.core == "Cortex-M7F": + self.cpu.append("-mfpu=fpv5-sp-d16") + self.cpu.append("-mfloat-abi=softfp") + + elif target.core == "Cortex-M7F_DP": self.cpu.append("-mfpu=fpv5-d16") self.cpu.append("-mfloat-abi=softfp")