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F7 ST CUBE V1.10.0 F7 HAL driver V1.2.5

pull/6201/head
bcostm 2018-02-08 14:13:02 +01:00 committed by Cruz Monrreal II
parent 5860dc08e4
commit ea00afbaad
194 changed files with 11847 additions and 8818 deletions
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2
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/stm32f746xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f746xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
*
* This file contains:

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/stm32f7xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
@ -111,11 +109,11 @@
#endif /* USE_HAL_DRIVER */
/**
* @brief CMSIS Device version number V1.2.0
* @brief CMSIS Device version number V1.2.2
*/
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@ -165,20 +163,20 @@
*/
typedef enum
{
RESET = 0,
RESET = 0U,
SET = !RESET
} FlagStatus, ITStatus;
typedef enum
{
DISABLE = 0,
DISABLE = 0U,
ENABLE = !DISABLE
} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum
{
ERROR = 0,
ERROR = 0U,
SUCCESS = !ERROR
} ErrorStatus;
@ -223,7 +221,7 @@ typedef enum
* @}
*/
/**
/**
* @}
*/

2
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/system_stm32f7xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f7xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
******************************************************************************
* @attention

2
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/stm32f756xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f756xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
*
* This file contains:

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/stm32f7xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
@ -111,11 +109,11 @@
#endif /* USE_HAL_DRIVER */
/**
* @brief CMSIS Device version number V1.2.0
* @brief CMSIS Device version number V1.2.2
*/
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@ -165,20 +163,20 @@
*/
typedef enum
{
RESET = 0,
RESET = 0U,
SET = !RESET
} FlagStatus, ITStatus;
typedef enum
{
DISABLE = 0,
DISABLE = 0U,
ENABLE = !DISABLE
} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum
{
ERROR = 0,
ERROR = 0U,
SUCCESS = !ERROR
} ErrorStatus;
@ -223,7 +221,7 @@ typedef enum
* @}
*/
/**
/**
* @}
*/

2
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/system_stm32f7xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f7xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
******************************************************************************
* @attention

2
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/stm32f767xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f767xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
*
* This file contains:

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/stm32f7xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
@ -111,11 +109,11 @@
#endif /* USE_HAL_DRIVER */
/**
* @brief CMSIS Device version number V1.2.0
* @brief CMSIS Device version number V1.2.2
*/
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@ -165,20 +163,20 @@
*/
typedef enum
{
RESET = 0,
RESET = 0U,
SET = !RESET
} FlagStatus, ITStatus;
typedef enum
{
DISABLE = 0,
DISABLE = 0U,
ENABLE = !DISABLE
} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum
{
ERROR = 0,
ERROR = 0U,
SUCCESS = !ERROR
} ErrorStatus;
@ -223,7 +221,7 @@ typedef enum
* @}
*/
/**
/**
* @}
*/

2
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/system_stm32f7xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f7xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
******************************************************************************
* @attention

2
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/stm32f769xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f769xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
*
* This file contains:

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/stm32f7xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
*
* The file is the unique include file that the application programmer
@ -111,11 +109,11 @@
#endif /* USE_HAL_DRIVER */
/**
* @brief CMSIS Device version number V1.2.0
* @brief CMSIS Device version number V1.2.2
*/
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@ -165,20 +163,20 @@
*/
typedef enum
{
RESET = 0,
RESET = 0U,
SET = !RESET
} FlagStatus, ITStatus;
typedef enum
{
DISABLE = 0,
DISABLE = 0U,
ENABLE = !DISABLE
} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum
{
ERROR = 0,
ERROR = 0U,
SUCCESS = !ERROR
} ErrorStatus;
@ -223,7 +221,7 @@ typedef enum
* @}
*/
/**
/**
* @}
*/

2
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/system_stm32f7xx.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file system_stm32f7xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
******************************************************************************
* @attention

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targets/TARGET_STM/TARGET_STM32F7/device/Release_Notes_stm32f7xx_hal.html
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198
targets/TARGET_STM/TARGET_STM32F7/device/stm32_hal_legacy.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32_hal_legacy.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief This file contains aliases definition for the STM32Cube HAL constants
* macros and functions maintained for legacy purpose.
******************************************************************************
@ -138,7 +136,9 @@
#define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5
#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
#define COMP_LPTIMCONNECTION_ENABLED COMP_LPTIMCONNECTION_IN1_ENABLED /*!< COMPX output is connected to LPTIM input 1 */
#if defined(STM32L0)
#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */
#endif
#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
#if defined(STM32F373xC) || defined(STM32F378xx)
#define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1
@ -265,7 +265,6 @@
#define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7
#define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67
#define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67
#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
#define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76
#define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6
#define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7
@ -382,7 +381,7 @@
/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
* @{
*/
#if defined(STM32L4) || defined(STM32F7)
#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
@ -432,12 +431,12 @@
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7)
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4)
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 */
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 */
#if defined(STM32L1)
#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
@ -457,6 +456,78 @@
* @}
*/
/** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose
* @{
*/
#if defined(STM32H7)
#define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE
#define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE
#define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET
#define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET
#define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE
#define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE
#define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1
#define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2
#define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX
#define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX
#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
#define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
#define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
#define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT
#define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0
#define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO HAL_DMAMUX1_REQ_GEN_TIM12_TRGO
#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT
#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT
#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT
#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT
#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT
#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT
#define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT
#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT
#define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT
#define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP HAL_DMAMUX2_REQ_GEN_I2C4_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP HAL_DMAMUX2_REQ_GEN_SPI6_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT HAL_DMAMUX2_REQ_GEN_COMP1_OUT
#define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT HAL_DMAMUX2_REQ_GEN_COMP2_OUT
#define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP HAL_DMAMUX2_REQ_GEN_RTC_WKUP
#define HAL_DMAMUX2_REQUEST_GEN_EXTI0 HAL_DMAMUX2_REQ_GEN_EXTI0
#define HAL_DMAMUX2_REQUEST_GEN_EXTI2 HAL_DMAMUX2_REQ_GEN_EXTI2
#define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT
#define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT HAL_DMAMUX2_REQ_GEN_SPI6_IT
#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT
#define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT
#define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT HAL_DMAMUX2_REQ_GEN_ADC3_IT
#define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT
#define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT
#define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT
#define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT
#define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING
#define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING
#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING
#endif /* STM32H7 */
/**
* @}
*/
/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
* @{
*/
@ -670,7 +741,6 @@
#define FORMAT_BCD RTC_FORMAT_BCD
#define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
#define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
#define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
@ -678,9 +748,6 @@
#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
@ -946,9 +1013,12 @@
#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
#define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */
#if defined(STM32F1)
#else
#define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */
#define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */
#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
#endif
#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
#define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */
#define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */
@ -977,7 +1047,7 @@
* @}
*/
#if defined(STM32L4xx) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\
#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\
defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
/** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose
* @{
@ -1002,7 +1072,7 @@
/**
* @}
*/
#endif /* STM32L4xx || STM32F7*/
#endif /* STM32L4 || STM32F7*/
/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
* @{
@ -1128,6 +1198,8 @@
#define CR_OFFSET_BB PWR_CR_OFFSET_BB
#define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
#define PMODE_BIT_NUMBER VOS_BIT_NUMBER
#define CR_PMODE_BB CR_VOS_BB
#define DBP_BitNumber DBP_BIT_NUMBER
#define PVDE_BitNumber PVDE_BIT_NUMBER
@ -1187,6 +1259,9 @@
* @{
*/
#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
#define HAL_LTDC_Relaod HAL_LTDC_Reload
#define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig
#define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig
/**
* @}
*/
@ -1228,6 +1303,7 @@
#define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
#define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
#define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
#define __HAL_SYSCFG_SRAM2_WRP_ENABLE __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE
#define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
#define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
@ -1309,7 +1385,6 @@
#define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
#define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
#define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
#define __HAL_ADC_JSQR ADC_JSQR
#define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
@ -1622,7 +1697,11 @@
#define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
#define __HAL_I2C_GENERATE_START I2C_GENERATE_START
#if defined(STM32F1)
#define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE
#else
#define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
#endif /* STM32F1 */
#define __HAL_I2C_RISE_TIME I2C_RISE_TIME
#define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
#define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
@ -2040,6 +2119,21 @@
#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
#if defined(STM32WB)
#define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE
#define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE
#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE
#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE
#define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET
#define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET
#define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED
#define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED
#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED
#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED
#define QSPI_IRQHandler QUADSPI_IRQHandler
#endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */
#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
@ -2407,7 +2501,6 @@
#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
#define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
#define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
#define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
@ -2440,8 +2533,6 @@
#define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
#define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE
#define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE
#define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
#define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
#define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE
#define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE
#define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE
@ -2463,8 +2554,6 @@
#define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
#define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET
#define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET
#define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
#define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
#define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET
#define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET
#define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET
@ -2636,6 +2725,30 @@
#define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK
#endif
#if defined(STM32H7)
#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE()
#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE()
#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_DISABLE()
#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE()
#define __HAL_RCC_USB_OTG_HS_FORCE_RESET() __HAL_RCC_USB1_OTG_HS_FORCE_RESET()
#define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() __HAL_RCC_USB1_OTG_HS_RELEASE_RESET()
#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE()
#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE()
#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE()
#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE()
#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_ENABLE()
#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE()
#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_DISABLE()
#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE()
#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() __HAL_RCC_USB2_OTG_FS_FORCE_RESET()
#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() __HAL_RCC_USB2_OTG_FS_RELEASE_RESET()
#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE()
#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE()
#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE()
#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE()
#endif
#define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
#define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
@ -2689,7 +2802,12 @@
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
#if defined(STM32L4)
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
#elif defined(STM32WB) || defined(STM32G0)
#else
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
#endif
#define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1
#define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL
@ -2789,6 +2907,15 @@
#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
#define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM2AUDIOCLKSOURCE_I2S1
#define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM2AUDIOCLKSOURCE_I2S2
#define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2
#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2
#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1
/**
* @}
*/
@ -2805,8 +2932,10 @@
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
* @{
*/
#if defined (STM32G0)
#else
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
#endif
#define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
#define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
@ -2867,7 +2996,7 @@
#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
#if defined(STM32F4)
#if defined(STM32F4) || defined(STM32F2)
#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
#define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED
@ -2919,13 +3048,23 @@
#define SDIO_IRQHandler SDMMC1_IRQHandler
#endif
#if defined(STM32F7) || defined(STM32F4)
#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2)
#define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef
#define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef
#define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef
#define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef
#endif
#if defined(STM32H7)
#define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback
#define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback
#define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback
#define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback
#define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback
#define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback
#define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback
#define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback
#endif
/**
* @}
*/
@ -3114,6 +3253,10 @@
* @{
*/
#define __HAL_LTDC_LAYER LTDC_LAYER
#if defined(STM32F7)
#else
#define __HAL_LTDC_RELOAD_CONFIG __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG
#endif
/**
* @}
*/
@ -3139,6 +3282,17 @@
* @}
*/
/** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose
* @{
*/
#if defined(STM32H7)
#define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow
#define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT
#define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA
#endif
/**
* @}
*/
/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
* @{

140
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief HAL module driver.
* This is the common part of the HAL initialization
*
@ -68,11 +66,11 @@
* @{
*/
/**
* @brief STM32F7xx HAL Driver version number V1.2.2
* @brief STM32F7xx HAL Driver version number V1.2.5
*/
#define __STM32F7xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7xx_HAL_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32F7xx_HAL_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F7xx_HAL_VERSION_SUB2 (0x05) /*!< [15:8] sub2 version */
#define __STM32F7xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7xx_HAL_VERSION ((__STM32F7xx_HAL_VERSION_MAIN << 24)\
|(__STM32F7xx_HAL_VERSION_SUB1 << 16)\
@ -90,6 +88,8 @@
* @{
*/
__IO uint32_t uwTick;
uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
/**
* @}
*/
@ -106,16 +106,16 @@ __IO uint32_t uwTick;
*
@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
##### Initialization and Configuration functions #####
===============================================================================
[..] This section provides functions allowing to:
(+) Initializes the Flash interface the NVIC allocation and initial clock
configuration. It initializes the systick also when timeout is needed
and the backup domain when enabled.
(+) de-Initializes common part of the HAL
(+) Configure The time base source to have 1ms time base with a dedicated
(+) De-Initializes common part of the HAL.
(+) Configure the time base source to have 1ms time base with a dedicated
Tick interrupt priority.
(++) Systick timer is used by default as source of time base, but user
(++) SysTick timer is used by default as source of time base, but user
can eventually implement his proper time base source (a general purpose
timer for example or other time source), keeping in mind that Time base
duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
@ -153,11 +153,16 @@ __IO uint32_t uwTick;
*/
HAL_StatusTypeDef HAL_Init(void)
{
/* Configure Flash prefetch and Instruction cache through ART accelerator */
/* Configure Instruction cache through ART accelerator */
#if (ART_ACCLERATOR_ENABLE != 0)
__HAL_FLASH_ART_ENABLE();
#endif /* ART_ACCLERATOR_ENABLE */
/* Configure Flash prefetch */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
@ -202,12 +207,12 @@ HAL_StatusTypeDef HAL_DeInit(void)
}
/**
* @brief Initializes the MSP.
* @brief Initialize the MSP.
* @retval None
*/
__weak void HAL_MspInit(void)
{
/* NOTE : This function Should not be modified, when the callback is needed,
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_MspInit could be implemented in the user file
*/
}
@ -218,7 +223,7 @@ __weak void HAL_MspInit(void)
*/
__weak void HAL_MspDeInit(void)
{
/* NOTE : This function Should not be modified, when the callback is needed,
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_MspDeInit could be implemented in the user file
*/
}
@ -232,20 +237,31 @@ __weak void HAL_MspDeInit(void)
* @note In the default implementation, SysTick timer is the source of time base.
* It is used to generate interrupts at regular time intervals.
* Care must be taken if HAL_Delay() is called from a peripheral ISR process,
* The the SysTick interrupt must have higher priority (numerically lower)
* The SysTick interrupt must have higher priority (numerically lower)
* than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
* The function is declared as __weak to be overwritten in case of other
* implementation in user file.
* @param TickPriority: Tick interrupt priority.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
/*Configure the SysTick to have interrupt in 1ms time basis*/
HAL_SYSTICK_Config(SystemCoreClock/1000);
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
{
return HAL_ERROR;
}
/*Configure the SysTick IRQ priority */
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
uwTickPrio = TickPriority;
}
else
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
@ -282,14 +298,14 @@ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
* @brief This function is called to increment a global variable "uwTick"
* used as application time base.
* @note In the default implementation, this variable is incremented each 1ms
* in Systick ISR.
* in SysTick ISR.
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
uwTick++;
uwTick += uwTickFreq;
}
/**
@ -304,21 +320,66 @@ __weak uint32_t HAL_GetTick(void)
}
/**
* @brief This function provides accurate delay (in milliseconds) based
* @brief This function returns a tick priority.
* @retval tick priority
*/
uint32_t HAL_GetTickPrio(void)
{
return uwTickPrio;
}
/**
* @brief Set new tick Freq.
* @retval Status
*/
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
{
HAL_StatusTypeDef status = HAL_OK;
assert_param(IS_TICKFREQ(Freq));
if (uwTickFreq != Freq)
{
uwTickFreq = Freq;
/* Apply the new tick Freq */
status = HAL_InitTick(uwTickPrio);
}
return status;
}
/**
* @brief Return tick frequency.
* @retval tick period in Hz
*/
HAL_TickFreqTypeDef HAL_GetTickFreq(void)
{
return uwTickFreq;
}
/**
* @brief This function provides minimum delay (in milliseconds) based
* on variable incremented.
* @note In the default implementation , SysTick timer is the source of time base.
* It is used to generate interrupts at regular time intervals where uwTick
* is incremented.
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @param Delay: specifies the delay time length, in milliseconds.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(__IO uint32_t Delay)
__weak void HAL_Delay(uint32_t Delay)
{
uint32_t tickstart = 0;
tickstart = HAL_GetTick();
while((HAL_GetTick() - tickstart) < Delay)
uint32_t tickstart = HAL_GetTick();
uint32_t wait = Delay;
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
{
wait += (uint32_t)(uwTickFreq);
}
while ((HAL_GetTick() - tickstart) < wait)
{
}
}
@ -382,6 +443,33 @@ uint32_t HAL_GetDEVID(void)
return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK);
}
/**
* @brief Returns first word of the unique device identifier (UID based on 96 bits)
* @retval Device identifier
*/
uint32_t HAL_GetUIDw0(void)
{
return(READ_REG(*((uint32_t *)UID_BASE)));
}
/**
* @brief Returns second word of the unique device identifier (UID based on 96 bits)
* @retval Device identifier
*/
uint32_t HAL_GetUIDw1(void)
{
return(READ_REG(*((uint32_t *)(UID_BASE + 4U))));
}
/**
* @brief Returns third word of the unique device identifier (UID based on 96 bits)
* @retval Device identifier
*/
uint32_t HAL_GetUIDw2(void)
{
return(READ_REG(*((uint32_t *)(UID_BASE + 8U))));
}
/**
* @brief Enable the Debug Module during SLEEP mode
* @retval None

38
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief This file contains all the functions prototypes for the HAL
* module driver.
******************************************************************************
@ -57,10 +55,25 @@
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup HAL_Exported_Constants HAL Exported Constants
* @{
*/
/** @defgroup HAL_TICK_FREQ Tick Frequency
* @{
*/
typedef enum
{
HAL_TICK_FREQ_10HZ = 100U,
HAL_TICK_FREQ_100HZ = 10U,
HAL_TICK_FREQ_1KHZ = 1U,
HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
} HAL_TickFreqTypeDef;
/**
* @}
*/
/** @defgroup SYSCFG_BootMode Boot Mode
* @{
*/
@ -169,6 +182,15 @@
* @}
*/
/** @defgroup HAL_Private_Macros HAL Private Macros
* @{
*/
#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
((FREQ) == HAL_TICK_FREQ_100HZ) || \
((FREQ) == HAL_TICK_FREQ_1KHZ))
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup HAL_Exported_Functions
* @{
@ -176,12 +198,12 @@
/** @addtogroup HAL_Exported_Functions_Group1
* @{
*/
/* Initialization and de-initialization functions ******************************/
/* Initialization and Configuration functions ******************************/
HAL_StatusTypeDef HAL_Init(void);
HAL_StatusTypeDef HAL_DeInit(void);
void HAL_MspInit(void);
void HAL_MspDeInit(void);
HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
/**
* @}
*/
@ -191,13 +213,19 @@ HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
*/
/* Peripheral Control functions ************************************************/
void HAL_IncTick(void);
void HAL_Delay(__IO uint32_t Delay);
void HAL_Delay(uint32_t Delay);
uint32_t HAL_GetTick(void);
uint32_t HAL_GetTickPrio(void);
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
HAL_TickFreqTypeDef HAL_GetTickFreq(void);
void HAL_SuspendTick(void);
void HAL_ResumeTick(void);
uint32_t HAL_GetHalVersion(void);
uint32_t HAL_GetREVID(void);
uint32_t HAL_GetDEVID(void);
uint32_t HAL_GetUIDw0(void);
uint32_t HAL_GetUIDw1(void);
uint32_t HAL_GetUIDw2(void);
void HAL_DBGMCU_EnableDBGSleepMode(void);
void HAL_DBGMCU_DisableDBGSleepMode(void);
void HAL_DBGMCU_EnableDBGStopMode(void);

68
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_adc.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief This file provides firmware functions to manage the following
* functionalities of the Analog to Digital Convertor (ADC) peripheral:
* + Initialization and de-initialization functions
@ -252,7 +250,7 @@ static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
* External trigger source and edge, DMA continuous request after the
* last transfer and End of conversion selection).
*
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
@ -329,7 +327,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
/**
* @brief Deinitializes the ADCx peripheral registers to their default reset values.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
@ -376,7 +374,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
/**
* @brief Initializes the ADC MSP.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -391,7 +389,7 @@ __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
/**
* @brief DeInitializes the ADC MSP.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -430,7 +428,7 @@ __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
/**
* @brief Enables ADC and starts conversion of the regular channels.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
@ -530,7 +528,7 @@ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
*
* @note Caution: This function will stop also injected channels.
*
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
*
* @retval HAL status.
@ -573,9 +571,9 @@ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
* In this case, DMA resets the flag EOC and polling cannot be
* performed on each conversion. Nevertheless, polling can still
* be performed on the complete sequence.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param Timeout: Timeout value in millisecond.
* @param Timeout Timeout value in millisecond.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
@ -654,13 +652,13 @@ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Ti
/**
* @brief Poll for conversion event
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param EventType: the ADC event type.
* @param EventType the ADC event type.
* This parameter can be one of the following values:
* @arg ADC_AWD_EVENT: ADC Analog watch Dog event.
* @arg ADC_OVR_EVENT: ADC Overrun event.
* @param Timeout: Timeout value in millisecond.
* @param Timeout Timeout value in millisecond.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
@ -721,7 +719,7 @@ HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventTy
/**
* @brief Enables the interrupt and starts ADC conversion of regular channels.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status.
*/
@ -824,7 +822,7 @@ HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
*
* @note Caution: This function will stop also injected channels.
*
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status.
*/
@ -861,7 +859,7 @@ HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
/**
* @brief Handles ADC interrupt request
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -1004,10 +1002,10 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
/**
* @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @param pData The destination Buffer address.
* @param Length The length of data to be transferred from ADC peripheral to memory.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
@ -1125,7 +1123,7 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, ui
/**
* @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
@ -1171,7 +1169,7 @@ HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
/**
* @brief Gets the converted value from data register of regular channel.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval Converted value
*/
@ -1183,7 +1181,7 @@ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
/**
* @brief Regular conversion complete callback in non blocking mode
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -1198,7 +1196,7 @@ __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
/**
* @brief Regular conversion half DMA transfer callback in non blocking mode
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -1213,7 +1211,7 @@ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
/**
* @brief Analog watchdog callback in non blocking mode
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -1234,7 +1232,7 @@ __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
* - If needed, restart a new ADC conversion using function
* "HAL_ADC_Start_DMA()"
* (this function is also clearing overrun flag)
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -1271,9 +1269,9 @@ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
/**
* @brief Configures for the selected ADC regular channel its corresponding
* rank in the sequencer and its sample time.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param sConfig: ADC configuration structure.
* @param sConfig ADC configuration structure.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
@ -1384,9 +1382,9 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
* Considering that registers write delay may happen due to
* bus activity, this might cause an uncertainty on the
* effective timing of the new programmed threshold values.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure
* @param AnalogWDGConfig pointer to an ADC_AnalogWDGConfTypeDef structure
* that contains the configuration information of ADC analog watchdog.
* @retval HAL status
*/
@ -1468,7 +1466,7 @@ HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDG
/**
* @brief return the ADC state
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL state
*/
@ -1480,7 +1478,7 @@ uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
/**
* @brief Return the ADC error code
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval ADC Error Code
*/
@ -1506,7 +1504,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
/**
* @brief Initializes the ADCx peripheral according to the specified parameters
* in the ADC_InitStruct without initializing the ADC MSP.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -1587,7 +1585,7 @@ static void ADC_Init(ADC_HandleTypeDef* hadc)
/**
* @brief DMA transfer complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1640,7 +1638,7 @@ static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA half transfer complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1653,7 +1651,7 @@ static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA error callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/

72
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_adc.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of ADC HAL extension module.
******************************************************************************
* @attention
@ -492,60 +490,60 @@ typedef struct
*/
/** @brief Reset ADC handle state
* @param __HANDLE__: ADC handle
* @param __HANDLE__ ADC handle
* @retval None
*/
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
/**
* @brief Enable the ADC peripheral.
* @param __HANDLE__: ADC handle
* @param __HANDLE__ ADC handle
* @retval None
*/
#define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= ADC_CR2_ADON)
/**
* @brief Disable the ADC peripheral.
* @param __HANDLE__: ADC handle
* @param __HANDLE__ ADC handle
* @retval None
*/
#define __HAL_ADC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= ~ADC_CR2_ADON)
/**
* @brief Enable the ADC end of conversion interrupt.
* @param __HANDLE__: specifies the ADC Handle.
* @param __INTERRUPT__: ADC Interrupt.
* @param __HANDLE__ specifies the ADC Handle.
* @param __INTERRUPT__ ADC Interrupt.
* @retval None
*/
#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) |= (__INTERRUPT__))
/**
* @brief Disable the ADC end of conversion interrupt.
* @param __HANDLE__: specifies the ADC Handle.
* @param __INTERRUPT__: ADC interrupt.
* @param __HANDLE__ specifies the ADC Handle.
* @param __INTERRUPT__ ADC interrupt.
* @retval None
*/
#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1) &= ~(__INTERRUPT__))
/** @brief Check if the specified ADC interrupt source is enabled or disabled.
* @param __HANDLE__: specifies the ADC Handle.
* @param __INTERRUPT__: specifies the ADC interrupt source to check.
* @param __HANDLE__ specifies the ADC Handle.
* @param __INTERRUPT__ specifies the ADC interrupt source to check.
* @retval The new state of __IT__ (TRUE or FALSE).
*/
#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__))
/**
* @brief Clear the ADC's pending flags.
* @param __HANDLE__: specifies the ADC Handle.
* @param __FLAG__: ADC flag.
* @param __HANDLE__ specifies the ADC Handle.
* @param __FLAG__ ADC flag.
* @retval None
*/
#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
/**
* @brief Get the selected ADC's flag status.
* @param __HANDLE__: specifies the ADC Handle.
* @param __FLAG__: ADC flag.
* @param __HANDLE__ specifies the ADC Handle.
* @param __FLAG__ ADC flag.
* @retval None
*/
#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
@ -653,7 +651,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
/**
* @brief Verification of ADC state: enabled or disabled
* @param __HANDLE__: ADC handle
* @param __HANDLE__ ADC handle
* @retval SET (ADC enabled) or RESET (ADC disabled)
*/
#define ADC_IS_ENABLE(__HANDLE__) \
@ -663,7 +661,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
/**
* @brief Test if conversion trigger of regular group is software start
* or external trigger.
* @param __HANDLE__: ADC handle
* @param __HANDLE__ ADC handle
* @retval SET (software start) or RESET (external trigger)
*/
#define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
@ -672,7 +670,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
/**
* @brief Test if conversion trigger of injected group is software start
* or external trigger.
* @param __HANDLE__: ADC handle
* @param __HANDLE__ ADC handle
* @retval SET (software start) or RESET (external trigger)
*/
#define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \
@ -689,7 +687,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
/**
* @brief Clear ADC error code (set it to error code: "no error")
* @param __HANDLE__: ADC handle
* @param __HANDLE__ ADC handle
* @retval None
*/
#define ADC_CLEAR_ERRORCODE(__HANDLE__) \
@ -797,89 +795,89 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
/**
* @brief Set ADC Regular channel sequence length.
* @param _NbrOfConversion_: Regular channel sequence length.
* @param _NbrOfConversion_ Regular channel sequence length.
* @retval None
*/
#define ADC_SQR1(_NbrOfConversion_) (((_NbrOfConversion_) - (uint8_t)1) << 20)
/**
* @brief Set the ADC's sample time for channel numbers between 10 and 18.
* @param _SAMPLETIME_: Sample time parameter.
* @param _CHANNELNB_: Channel number.
* @param _SAMPLETIME_ Sample time parameter.
* @param _CHANNELNB_ Channel number.
* @retval None
*/
#define ADC_SMPR1(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * (((uint32_t)((uint16_t)(_CHANNELNB_))) - 10)))
/**
* @brief Set the ADC's sample time for channel numbers between 0 and 9.
* @param _SAMPLETIME_: Sample time parameter.
* @param _CHANNELNB_: Channel number.
* @param _SAMPLETIME_ Sample time parameter.
* @param _CHANNELNB_ Channel number.
* @retval None
*/
#define ADC_SMPR2(_SAMPLETIME_, _CHANNELNB_) ((_SAMPLETIME_) << (3 * ((uint32_t)((uint16_t)(_CHANNELNB_)))))
/**
* @brief Set the selected regular channel rank for rank between 1 and 6.
* @param _CHANNELNB_: Channel number.
* @param _RANKNB_: Rank number.
* @param _CHANNELNB_ Channel number.
* @param _RANKNB_ Rank number.
* @retval None
*/
#define ADC_SQR3_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * ((_RANKNB_) - 1)))
/**
* @brief Set the selected regular channel rank for rank between 7 and 12.
* @param _CHANNELNB_: Channel number.
* @param _RANKNB_: Rank number.
* @param _CHANNELNB_ Channel number.
* @param _RANKNB_ Rank number.
* @retval None
*/
#define ADC_SQR2_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * ((_RANKNB_) - 7)))
/**
* @brief Set the selected regular channel rank for rank between 13 and 16.
* @param _CHANNELNB_: Channel number.
* @param _RANKNB_: Rank number.
* @param _CHANNELNB_ Channel number.
* @param _RANKNB_ Rank number.
* @retval None
*/
#define ADC_SQR1_RK(_CHANNELNB_, _RANKNB_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * ((_RANKNB_) - 13)))
/**
* @brief Enable ADC continuous conversion mode.
* @param _CONTINUOUS_MODE_: Continuous mode.
* @param _CONTINUOUS_MODE_ Continuous mode.
* @retval None
*/
#define ADC_CR2_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 1)
/**
* @brief Configures the number of discontinuous conversions for the regular group channels.
* @param _NBR_DISCONTINUOUSCONV_: Number of discontinuous conversions.
* @param _NBR_DISCONTINUOUSCONV_ Number of discontinuous conversions.
* @retval None
*/
#define ADC_CR1_DISCONTINUOUS(_NBR_DISCONTINUOUSCONV_) (((_NBR_DISCONTINUOUSCONV_) - 1) << POSITION_VAL(ADC_CR1_DISCNUM))
#define ADC_CR1_DISCONTINUOUS(_NBR_DISCONTINUOUSCONV_) (((_NBR_DISCONTINUOUSCONV_) - 1) << ADC_CR1_DISCNUM_Pos)
/**
* @brief Enable ADC scan mode.
* @param _SCANCONV_MODE_: Scan conversion mode.
* @param _SCANCONV_MODE_ Scan conversion mode.
* @retval None
*/
#define ADC_CR1_SCANCONV(_SCANCONV_MODE_) ((_SCANCONV_MODE_) << 8)
/**
* @brief Enable the ADC end of conversion selection.
* @param _EOCSelection_MODE_: End of conversion selection mode.
* @param _EOCSelection_MODE_ End of conversion selection mode.
* @retval None
*/
#define ADC_CR2_EOCSelection(_EOCSelection_MODE_) ((_EOCSelection_MODE_) << 10)
/**
* @brief Enable the ADC DMA continuous request.
* @param _DMAContReq_MODE_: DMA continuous request mode.
* @param _DMAContReq_MODE_ DMA continuous request mode.
* @retval None
*/
#define ADC_CR2_DMAContReq(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 9)
/**
* @brief Return resolution bits in CR1 register.
* @param __HANDLE__: ADC handle
* @param __HANDLE__ ADC handle
* @retval None
*/
#define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CR1) & ADC_CR1_RES)

44
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_adc_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief This file provides firmware functions to manage the following
* functionalities of the ADC extension peripheral:
* + Extended features functions
@ -170,7 +168,7 @@ static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma);
/**
* @brief Enables the selected ADC software start conversion of the injected channels.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
@ -258,7 +256,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
/**
* @brief Enables the interrupt and starts ADC conversion of injected channels.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
*
* @retval HAL status.
@ -357,7 +355,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
* @note If injected group mode auto-injection is enabled,
* function HAL_ADC_Stop must be used.
* @note In case of auto-injection mode, HAL_ADC_Stop must be used.
* @param hadc: ADC handle
* @param hadc ADC handle
* @retval None
*/
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
@ -409,9 +407,9 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
/**
* @brief Poll for injected conversion complete
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param Timeout: Timeout value in millisecond.
* @param Timeout Timeout value in millisecond.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
@ -478,7 +476,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, u
* injected and regular groups, and disable the ADC.
* @note If injected group mode auto-injection is enabled,
* function HAL_ADC_Stop must be used.
* @param hadc: ADC handle
* @param hadc ADC handle
* @retval None
*/
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
@ -533,9 +531,9 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
/**
* @brief Gets the converted value from data register of injected channel.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param InjectedRank: the ADC injected rank.
* @param InjectedRank the ADC injected rank.
* This parameter can be one of the following values:
* @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
* @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
@ -588,10 +586,10 @@ uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRa
*
* @note Caution: This function must be used only with the ADC master.
*
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @param pData Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
* @param Length The length of data to be transferred from ADC peripheral to memory.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
@ -703,7 +701,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t
/**
* @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
@ -750,7 +748,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
/**
* @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
* data in the selected multi mode.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval The converted data value.
*/
@ -762,7 +760,7 @@ uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
/**
* @brief Injected conversion complete callback in non blocking mode
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
@ -778,9 +776,9 @@ __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
/**
* @brief Configures for the selected ADC injected channel its corresponding
* rank in the sequencer and its sample time.
* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param sConfigInjected: ADC configuration structure for injected channel.
* @param sConfigInjected ADC configuration structure for injected channel.
* @retval None
*/
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
@ -933,9 +931,9 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
/**
* @brief Configures the ADC multi-mode
* @param hadc : pointer to a ADC_HandleTypeDef structure that contains
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains
* @param multimode pointer to an ADC_MultiModeTypeDef structure that contains
* the configuration information for multimode.
* @retval HAL status
*/
@ -974,7 +972,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_
/**
* @brief DMA transfer complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1027,7 +1025,7 @@ static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA half transfer complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1040,7 +1038,7 @@ static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA error callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/

8
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_adc.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of ADC HAL module.
******************************************************************************
* @attention
@ -339,9 +337,9 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_
/**
* @brief Set the selected injected Channel rank.
* @param _CHANNELNB_: Channel number.
* @param _RANKNB_: Rank number.
* @param _JSQR_JL_: Sequence length.
* @param _CHANNELNB_ Channel number.
* @param _RANKNB_ Rank number.
* @param _JSQR_JL_ Sequence length.
* @retval None
*/
#define ADC_JSQR(_CHANNELNB_, _RANKNB_,_JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))

2755
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.c
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691
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.h
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targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can_legacy.h Normal file
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@ -0,0 +1,777 @@
/**
******************************************************************************
* @file stm32f7xx_hal_can_legacy.h
* @author MCD Application Team
* @brief Header file of CAN HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F7xx_HAL_CAN_LEGACY_H
#define __STM32F7xx_HAL_CAN_LEGACY_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f7xx_hal_def.h"
/** @addtogroup STM32F7xx_HAL_Driver
* @{
*/
/** @addtogroup CAN
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup CAN_Exported_Types CAN Exported Types
* @{
*/
/**
* @brief HAL State structures definition
*/
typedef enum
{
HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
HAL_CAN_STATE_BUSY = 0x02U, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_TX = 0x12U, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_RX0 = 0x22U, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_RX1 = 0x32U, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_TX_RX0 = 0x42U, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_TX_RX1 = 0x52U, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_RX0_RX1 = 0x62U, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_TX_RX0_RX1 = 0x72U, /*!< CAN process is ongoing */
HAL_CAN_STATE_TIMEOUT = 0x03U, /*!< CAN in Timeout state */
HAL_CAN_STATE_ERROR = 0x04U /*!< CAN error state */
}HAL_CAN_StateTypeDef;
/**
* @brief CAN init structure definition
*/
typedef struct
{
uint32_t Prescaler; /*!< Specifies the length of a time quantum.
This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
uint32_t Mode; /*!< Specifies the CAN operating mode.
This parameter can be a value of @ref CAN_operating_mode */
uint32_t SJW; /*!< Specifies the maximum number of time quanta
the CAN hardware is allowed to lengthen or
shorten a bit to perform resynchronization.
This parameter can be a value of @ref CAN_synchronisation_jump_width */
uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
This parameter can be set to ENABLE or DISABLE. */
uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
This parameter can be set to ENABLE or DISABLE */
uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
This parameter can be set to ENABLE or DISABLE */
uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
This parameter can be set to ENABLE or DISABLE */
uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
This parameter can be set to ENABLE or DISABLE */
uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
This parameter can be set to ENABLE or DISABLE */
}CAN_InitTypeDef;
/**
* @brief CAN filter configuration structure definition
*/
typedef struct
{
uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
configuration, first one for a 16-bit configuration).
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
configuration, second one for a 16-bit configuration).
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
according to the mode (MSBs for a 32-bit configuration,
first one for a 16-bit configuration).
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
according to the mode (LSBs for a 32-bit configuration,
second one for a 16-bit configuration).
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
This parameter can be a value of @ref CAN_filter_FIFO */
uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
This parameter can be a value of @ref CAN_filter_mode */
uint32_t FilterScale; /*!< Specifies the filter scale.
This parameter can be a value of @ref CAN_filter_scale */
uint32_t FilterActivation; /*!< Enable or disable the filter.
This parameter can be set to ENABLE or DISABLE. */
uint32_t BankNumber; /*!< Select the start slave bank filter.
This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
}CAN_FilterConfTypeDef;
/**
* @brief CAN Tx message structure definition
*/
typedef struct
{
uint32_t StdId; /*!< Specifies the standard identifier.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
uint32_t ExtId; /*!< Specifies the extended identifier.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
This parameter can be a value of @ref CAN_Identifier_Type */
uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
This parameter can be a value of @ref CAN_remote_transmission_request */
uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
uint8_t Data[8]; /*!< Contains the data to be transmitted.
This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
}CanTxMsgTypeDef;
/**
* @brief CAN Rx message structure definition
*/
typedef struct
{
uint32_t StdId; /*!< Specifies the standard identifier.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
uint32_t ExtId; /*!< Specifies the extended identifier.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
This parameter can be a value of @ref CAN_Identifier_Type */
uint32_t RTR; /*!< Specifies the type of frame for the received message.
This parameter can be a value of @ref CAN_remote_transmission_request */
uint32_t DLC; /*!< Specifies the length of the frame that will be received.
This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
uint8_t Data[8]; /*!< Contains the data to be received.
This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
This parameter can be CAN_FIFO0 or CAN_FIFO1 */
}CanRxMsgTypeDef;
/**
* @brief CAN handle Structure definition
*/
typedef struct
{
CAN_TypeDef *Instance; /*!< Register base address */
CAN_InitTypeDef Init; /*!< CAN required parameters */
CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure for RX FIFO0 msg */
CanRxMsgTypeDef* pRx1Msg; /*!< Pointer to reception structure for RX FIFO1 msg */
__IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
HAL_LockTypeDef Lock; /*!< CAN locking object */
__IO uint32_t ErrorCode; /*!< CAN Error code
This parameter can be a value of @ref CAN_Error_Code */
}CAN_HandleTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup CAN_Exported_Constants CAN Exported Constants
* @{
*/
/** @defgroup CAN_Error_Code CAN Error Code
* @{
*/
#define HAL_CAN_ERROR_NONE 0x00000000U /*!< No error */
#define HAL_CAN_ERROR_EWG 0x00000001U /*!< EWG error */
#define HAL_CAN_ERROR_EPV 0x00000002U /*!< EPV error */
#define HAL_CAN_ERROR_BOF 0x00000004U /*!< BOF error */
#define HAL_CAN_ERROR_STF 0x00000008U /*!< Stuff error */
#define HAL_CAN_ERROR_FOR 0x00000010U /*!< Form error */
#define HAL_CAN_ERROR_ACK 0x00000020U /*!< Acknowledgment error */
#define HAL_CAN_ERROR_BR 0x00000040U /*!< Bit recessive */
#define HAL_CAN_ERROR_BD 0x00000080U /*!< LEC dominant */
#define HAL_CAN_ERROR_CRC 0x00000100U /*!< LEC transfer error */
#define HAL_CAN_ERROR_FOV0 0x00000200U /*!< FIFO0 overrun error */
#define HAL_CAN_ERROR_FOV1 0x00000400U /*!< FIFO1 overrun error */
#define HAL_CAN_ERROR_TXFAIL 0x00000800U /*!< Transmit failure */
/**
* @}
*/
/** @defgroup CAN_InitStatus CAN InitStatus
* @{
*/
#define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */
#define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */
/**
* @}
*/
/** @defgroup CAN_operating_mode CAN Operating Mode
* @{
*/
#define CAN_MODE_NORMAL 0x00000000U /*!< Normal mode */
#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
/**
* @}
*/
/** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
* @{
*/
#define CAN_SJW_1TQ 0x00000000U /*!< 1 time quantum */
#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
/**
* @}
*/
/** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
* @{
*/
#define CAN_BS1_1TQ 0x00000000U /*!< 1 time quantum */
#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
#define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
#define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
#define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
#define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
#define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
#define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
#define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
#define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
#define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
#define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
#define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
#define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
/**
* @}
*/
/** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
* @{
*/
#define CAN_BS2_1TQ 0x00000000U /*!< 1 time quantum */
#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
#define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
#define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
#define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
#define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
/**
* @}
*/
/** @defgroup CAN_filter_mode CAN Filter Mode
* @{
*/
#define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
#define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
/**
* @}
*/
/** @defgroup CAN_filter_scale CAN Filter Scale
* @{
*/
#define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
#define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
/**
* @}
*/
/** @defgroup CAN_filter_FIFO CAN Filter FIFO
* @{
*/
#define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
#define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
/**
* @}
*/
/** @defgroup CAN_Identifier_Type CAN Identifier Type
* @{
*/
#define CAN_ID_STD 0x00000000U /*!< Standard Id */
#define CAN_ID_EXT 0x00000004U /*!< Extended Id */
/**
* @}
*/
/** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
* @{
*/
#define CAN_RTR_DATA 0x00000000U /*!< Data frame */
#define CAN_RTR_REMOTE 0x00000002U /*!< Remote frame */
/**
* @}
*/
/** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
* @{
*/
#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
/**
* @}
*/
/** @defgroup CAN_flags CAN Flags
* @{
*/
/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
and CAN_ClearFlag() functions. */
/* If the flag is 0x1XXXXXXX, it means that it can only be used with
CAN_GetFlagStatus() function. */
/* Transmit Flags */
#define CAN_FLAG_RQCP0 0x00000500U /*!< Request MailBox0 flag */
#define CAN_FLAG_RQCP1 0x00000508U /*!< Request MailBox1 flag */
#define CAN_FLAG_RQCP2 0x00000510U /*!< Request MailBox2 flag */
#define CAN_FLAG_TXOK0 0x00000501U /*!< Transmission OK MailBox0 flag */
#define CAN_FLAG_TXOK1 0x00000509U /*!< Transmission OK MailBox1 flag */
#define CAN_FLAG_TXOK2 0x00000511U /*!< Transmission OK MailBox2 flag */
#define CAN_FLAG_TME0 0x0000051AU /*!< Transmit mailbox 0 empty flag */
#define CAN_FLAG_TME1 0x0000051BU /*!< Transmit mailbox 0 empty flag */
#define CAN_FLAG_TME2 0x0000051CU /*!< Transmit mailbox 0 empty flag */
/* Receive Flags */
#define CAN_FLAG_FF0 0x00000203U /*!< FIFO 0 Full flag */
#define CAN_FLAG_FOV0 0x00000204U /*!< FIFO 0 Overrun flag */
#define CAN_FLAG_FF1 0x00000403U /*!< FIFO 1 Full flag */
#define CAN_FLAG_FOV1 0x00000404U /*!< FIFO 1 Overrun flag */
/* Operating Mode Flags */
#define CAN_FLAG_INAK 0x00000100U /*!< Initialization acknowledge flag */
#define CAN_FLAG_SLAK 0x00000101U /*!< Sleep acknowledge flag */
#define CAN_FLAG_ERRI 0x00000102U /*!< Error flag */
#define CAN_FLAG_WKU 0x00000103U /*!< Wake up flag */
#define CAN_FLAG_SLAKI 0x00000104U /*!< Sleep acknowledge flag */
/* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
In this case the SLAK bit can be polled.*/
/* Error Flags */
#define CAN_FLAG_EWG 0x00000300U /*!< Error warning flag */
#define CAN_FLAG_EPV 0x00000301U /*!< Error passive flag */
#define CAN_FLAG_BOF 0x00000302U /*!< Bus-Off flag */
/**
* @}
*/
/** @defgroup CAN_Interrupts CAN Interrupts
* @{
*/
#define CAN_IT_TME CAN_IER_TMEIE /*!< Transmit mailbox empty interrupt */
/* Receive Interrupts */
#define CAN_IT_FMP0 CAN_IER_FMPIE0 /*!< FIFO 0 message pending interrupt */
#define CAN_IT_FF0 CAN_IER_FFIE0 /*!< FIFO 0 full interrupt */
#define CAN_IT_FOV0 CAN_IER_FOVIE0 /*!< FIFO 0 overrun interrupt */
#define CAN_IT_FMP1 CAN_IER_FMPIE1 /*!< FIFO 1 message pending interrupt */
#define CAN_IT_FF1 CAN_IER_FFIE1 /*!< FIFO 1 full interrupt */
#define CAN_IT_FOV1 CAN_IER_FOVIE1 /*!< FIFO 1 overrun interrupt */
/* Operating Mode Interrupts */
#define CAN_IT_WKU CAN_IER_WKUIE /*!< Wake-up interrupt */
#define CAN_IT_SLK CAN_IER_SLKIE /*!< Sleep acknowledge interrupt */
/* Error Interrupts */
#define CAN_IT_EWG CAN_IER_EWGIE /*!< Error warning interrupt */
#define CAN_IT_EPV CAN_IER_EPVIE /*!< Error passive interrupt */
#define CAN_IT_BOF CAN_IER_BOFIE /*!< Bus-off interrupt */
#define CAN_IT_LEC CAN_IER_LECIE /*!< Last error code interrupt */
#define CAN_IT_ERR CAN_IER_ERRIE /*!< Error Interrupt */
/**
* @}
*/
/** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
* @{
*/
#define CAN_TXMAILBOX_0 ((uint8_t)0x00)
#define CAN_TXMAILBOX_1 ((uint8_t)0x01)
#define CAN_TXMAILBOX_2 ((uint8_t)0x02)
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup CAN_Exported_Macros CAN Exported Macros
* @{
*/
/** @brief Reset CAN handle state
* @param __HANDLE__ specifies the CAN Handle.
* @retval None
*/
#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
/**
* @brief Enable the specified CAN interrupts.
* @param __HANDLE__ CAN handle
* @param __INTERRUPT__ CAN Interrupt
* @retval None
*/
#define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
/**
* @brief Disable the specified CAN interrupts.
* @param __HANDLE__ CAN handle
* @param __INTERRUPT__ CAN Interrupt
* @retval None
*/
#define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
/**
* @brief Return the number of pending received messages.
* @param __HANDLE__ CAN handle
* @param __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
* @retval The number of pending message.
*/
#define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
((uint8_t)((__HANDLE__)->Instance->RF0R&0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&0x03U)))
/** @brief Check whether the specified CAN flag is set or not.
* @param __HANDLE__ CAN Handle
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg CAN_TSR_RQCP0: Request MailBox0 Flag
* @arg CAN_TSR_RQCP1: Request MailBox1 Flag
* @arg CAN_TSR_RQCP2: Request MailBox2 Flag
* @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
* @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
* @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
* @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
* @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
* @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
* @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
* @arg CAN_FLAG_FF0: FIFO 0 Full Flag
* @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
* @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
* @arg CAN_FLAG_FF1: FIFO 1 Full Flag
* @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
* @arg CAN_FLAG_WKU: Wake up Flag
* @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
* @arg CAN_FLAG_EWG: Error Warning Flag
* @arg CAN_FLAG_EPV: Error Passive Flag
* @arg CAN_FLAG_BOF: Bus-Off Flag
* @retval The new state of __FLAG__ (TRUE or FALSE).
*/
#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
/** @brief Clear the specified CAN pending flag.
* @param __HANDLE__ CAN Handle.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg CAN_TSR_RQCP0: Request MailBox0 Flag
* @arg CAN_TSR_RQCP1: Request MailBox1 Flag
* @arg CAN_TSR_RQCP2: Request MailBox2 Flag
* @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
* @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
* @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
* @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
* @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
* @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
* @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
* @arg CAN_FLAG_FF0: FIFO 0 Full Flag
* @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
* @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
* @arg CAN_FLAG_FF1: FIFO 1 Full Flag
* @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
* @arg CAN_FLAG_WKU: Wake up Flag
* @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
* @retval The new state of __FLAG__ (TRUE or FALSE).
*/
#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))))
/** @brief Check if the specified CAN interrupt source is enabled or disabled.
* @param __HANDLE__ CAN Handle
* @param __INTERRUPT__ specifies the CAN interrupt source to check.
* This parameter can be one of the following values:
* @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
* @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
* @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
* @retval The new state of __IT__ (TRUE or FALSE).
*/
#define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
/**
* @brief Check the transmission status of a CAN Frame.
* @param __HANDLE__ CAN Handle
* @param __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission.
* @retval The new status of transmission (TRUE or FALSE).
*/
#define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
/**
* @brief Release the specified receive FIFO.
* @param __HANDLE__ CAN handle
* @param __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
* @retval None
*/
#define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1))
/**
* @brief Cancel a transmit request.
* @param __HANDLE__ CAN Handle
* @param __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission.
* @retval None
*/
#define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\
((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\
((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2))
/**
* @brief Enable or disable the DBG Freeze for CAN.
* @param __HANDLE__ CAN Handle
* @param __NEWSTATE__ new state of the CAN peripheral.
* This parameter can be: ENABLE (CAN reception/transmission is frozen
* during debug. Reception FIFOs can still be accessed/controlled normally)
* or DISABLE (CAN is working during debug).
* @retval None
*/
#define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup CAN_Exported_Functions
* @{
*/
/** @addtogroup CAN_Exported_Functions_Group1
* @{
*/
/* Initialization/de-initialization functions ***********************************/
HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
/**
* @}
*/
/** @addtogroup CAN_Exported_Functions_Group2
* @{
*/
/* I/O operation functions ******************************************************/
HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
/**
* @}
*/
/** @addtogroup CAN_Exported_Functions_Group3
* @{
*/
/* Peripheral State functions ***************************************************/
uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
/**
* @}
*/
/**
* @}
*/
/* Private types -------------------------------------------------------------*/
/** @defgroup CAN_Private_Types CAN Private Types
* @{
*/
/**
* @}
*/
/* Private variables ---------------------------------------------------------*/
/** @defgroup CAN_Private_Variables CAN Private Variables
* @{
*/
/**
* @}
*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup CAN_Private_Constants CAN Private Constants
* @{
*/
#define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
#define CAN_FLAG_MASK 0x000000FFU
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup CAN_Private_Macros CAN Private Macros
* @{
*/
#define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
((MODE) == CAN_MODE_LOOPBACK)|| \
((MODE) == CAN_MODE_SILENT) || \
((MODE) == CAN_MODE_SILENT_LOOPBACK))
#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U)
#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
((MODE) == CAN_FILTERMODE_IDLIST))
#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
((SCALE) == CAN_FILTERSCALE_32BIT))
#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
((FIFO) == CAN_FILTER_FIFO1))
#define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U)
#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
#define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
#define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
((IDTYPE) == CAN_ID_EXT))
#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup CAN_Private_Functions CAN Private Functions
* @{
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F7xx_HAL_CAN_LEGACY_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

44
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_cec.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief CEC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the High Definition Multimedia Interface
@ -142,7 +140,7 @@
/**
* @brief Initializes the CEC mode according to the specified
* parameters in the CEC_InitTypeDef and creates the associated handle .
* @param hcec: CEC handle
* @param hcec CEC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
@ -212,7 +210,7 @@ HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
/**
* @brief DeInitializes the CEC peripheral
* @param hcec: CEC handle
* @param hcec CEC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
@ -266,8 +264,8 @@ HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
/**
* @brief Initializes the Own Address of the CEC device
* @param hcec: CEC handle
* @param CEC_OwnAddress: The CEC own address.
* @param hcec CEC handle
* @param CEC_OwnAddress The CEC own address.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
@ -313,7 +311,7 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
/**
* @brief CEC MSP Init
* @param hcec: CEC handle
* @param hcec CEC handle
* @retval None
*/
__weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
@ -327,7 +325,7 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
/**
* @brief CEC MSP DeInit
* @param hcec: CEC handle
* @param hcec CEC handle
* @retval None
*/
__weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
@ -379,11 +377,11 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
/**
* @brief Send data in interrupt mode
* @param hcec: CEC handle
* @param InitiatorAddress: Initiator address
* @param DestinationAddress: destination logical address
* @param pData: pointer to input byte data buffer
* @param Size: amount of data to be sent in bytes (without counting the header).
* @param hcec CEC handle
* @param InitiatorAddress Initiator address
* @param DestinationAddress destination logical address
* @param pData pointer to input byte data buffer
* @param Size amount of data to be sent in bytes (without counting the header).
* 0 means only the header is sent (ping operation).
* Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
* @retval HAL status
@ -438,7 +436,7 @@ HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t Initiator
/**
* @brief Get size of the received frame.
* @param hcec: CEC handle
* @param hcec CEC handle
* @retval Frame size
*/
uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
@ -448,8 +446,8 @@ uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
/**
* @brief Change Rx Buffer.
* @param hcec: CEC handle
* @param Rxbuffer: Rx Buffer
* @param hcec CEC handle
* @param Rxbuffer Rx Buffer
* @note This function can be called only inside the HAL_CEC_RxCpltCallback()
* @retval Frame size
*/
@ -460,7 +458,7 @@ void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
/**
* @brief This function handles CEC interrupt requests.
* @param hcec: CEC handle
* @param hcec CEC handle
* @retval None
*/
void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
@ -565,7 +563,7 @@ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
/**
* @brief Tx Transfer completed callback
* @param hcec: CEC handle
* @param hcec CEC handle
* @retval None
*/
__weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
@ -579,8 +577,8 @@ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
/**
* @brief Rx Transfer completed callback
* @param hcec: CEC handle
* @param RxFrameSize: Size of frame
* @param hcec CEC handle
* @param RxFrameSize Size of frame
* @retval None
*/
__weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
@ -595,7 +593,7 @@ __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize
/**
* @brief CEC error callbacks
* @param hcec: CEC handle
* @param hcec CEC handle
* @retval None
*/
__weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
@ -626,7 +624,7 @@ __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize
*/
/**
* @brief return the CEC state
* @param hcec: pointer to a CEC_HandleTypeDef structure that contains
* @param hcec pointer to a CEC_HandleTypeDef structure that contains
* the configuration information for the specified CEC module.
* @retval HAL state
*/
@ -641,7 +639,7 @@ HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
/**
* @brief Return the CEC error code
* @param hcec : pointer to a CEC_HandleTypeDef structure that contains
* @param hcec pointer to a CEC_HandleTypeDef structure that contains
* the configuration information for the specified CEC.
* @retval CEC Error Code
*/

48
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_cec.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of CEC HAL module.
******************************************************************************
* @attention
@ -429,7 +427,7 @@ typedef struct
*/
/** @brief Reset CEC handle gstate & RxState
* @param __HANDLE__: CEC handle.
* @param __HANDLE__ CEC handle.
* @retval None
*/
#define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \
@ -438,8 +436,8 @@ typedef struct
} while(0)
/** @brief Checks whether or not the specified CEC interrupt flag is set.
* @param __HANDLE__: specifies the CEC Handle.
* @param __FLAG__: specifies the flag to check.
* @param __HANDLE__ specifies the CEC Handle.
* @param __FLAG__ specifies the flag to check.
* @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
* @arg CEC_FLAG_TXERR: Tx Error.
* @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun.
@ -458,8 +456,8 @@ typedef struct
#define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
/** @brief Clears the interrupt or status flag when raised (write at 1)
* @param __HANDLE__: specifies the CEC Handle.
* @param __FLAG__: specifies the interrupt/status flag to clear.
* @param __HANDLE__ specifies the CEC Handle.
* @param __FLAG__ specifies the interrupt/status flag to clear.
* This parameter can be one of the following values:
* @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error
* @arg CEC_FLAG_TXERR: Tx Error.
@ -479,8 +477,8 @@ typedef struct
#define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR |= (__FLAG__))
/** @brief Enables the specified CEC interrupt.
* @param __HANDLE__: specifies the CEC Handle.
* @param __INTERRUPT__: specifies the CEC interrupt to enable.
* @param __HANDLE__ specifies the CEC Handle.
* @param __INTERRUPT__ specifies the CEC interrupt to enable.
* This parameter can be one of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable
* @arg CEC_IT_TXERR: Tx Error IT Enable
@ -500,8 +498,8 @@ typedef struct
#define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
/** @brief Disables the specified CEC interrupt.
* @param __HANDLE__: specifies the CEC Handle.
* @param __INTERRUPT__: specifies the CEC interrupt to disable.
* @param __HANDLE__ specifies the CEC Handle.
* @param __INTERRUPT__ specifies the CEC interrupt to disable.
* This parameter can be one of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable
* @arg CEC_IT_TXERR: Tx Error IT Enable
@ -521,8 +519,8 @@ typedef struct
#define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
/** @brief Checks whether or not the specified CEC interrupt is enabled.
* @param __HANDLE__: specifies the CEC Handle.
* @param __INTERRUPT__: specifies the CEC interrupt to check.
* @param __HANDLE__ specifies the CEC Handle.
* @param __INTERRUPT__ specifies the CEC interrupt to check.
* This parameter can be one of the following values:
* @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable
* @arg CEC_IT_TXERR: Tx Error IT Enable
@ -542,52 +540,52 @@ typedef struct
#define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
/** @brief Enables the CEC device
* @param __HANDLE__: specifies the CEC Handle.
* @param __HANDLE__ specifies the CEC Handle.
* @retval none
*/
#define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN)
/** @brief Disables the CEC device
* @param __HANDLE__: specifies the CEC Handle.
* @param __HANDLE__ specifies the CEC Handle.
* @retval none
*/
#define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN)
/** @brief Set Transmission Start flag
* @param __HANDLE__: specifies the CEC Handle.
* @param __HANDLE__ specifies the CEC Handle.
* @retval none
*/
#define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM)
/** @brief Set Transmission End flag
* @param __HANDLE__: specifies the CEC Handle.
* @param __HANDLE__ specifies the CEC Handle.
* @retval none
* If the CEC message consists of only one byte, TXEOM must be set before of TXSOM.
*/
#define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM)
/** @brief Get Transmission Start flag
* @param __HANDLE__: specifies the CEC Handle.
* @param __HANDLE__ specifies the CEC Handle.
* @retval FlagStatus
*/
#define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM)
/** @brief Get Transmission End flag
* @param __HANDLE__: specifies the CEC Handle.
* @param __HANDLE__ specifies the CEC Handle.
* @retval FlagStatus
*/
#define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM)
/** @brief Clear OAR register
* @param __HANDLE__: specifies the CEC Handle.
* @param __HANDLE__ specifies the CEC Handle.
* @retval none
*/
#define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR)
/** @brief Set OAR register (without resetting previously set address in case of multi-address mode)
* To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand
* @param __HANDLE__: specifies the CEC Handle.
* @param __ADDRESS__: Own Address value (CEC logical address is identified by bit position)
* @param __HANDLE__ specifies the CEC Handle.
* @param __ADDRESS__ Own Address value (CEC logical address is identified by bit position)
* @retval none
*/
#define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS)
@ -702,21 +700,21 @@ uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
* The message size is the payload size: without counting the header,
* it varies from 0 byte (ping operation, one header only, no payload) to
* 15 bytes (1 opcode and up to 14 operands following the header).
* @param __SIZE__: CEC message size.
* @param __SIZE__ CEC message size.
* @retval Test result (TRUE or FALSE).
*/
#define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10)
/** @brief Check CEC device Own Address Register (OAR) setting.
* OAR address is written in a 15-bit field within CEC_CFGR register.
* @param __ADDRESS__: CEC own address.
* @param __ADDRESS__ CEC own address.
* @retval Test result (TRUE or FALSE).
*/
#define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x7FFF)
/** @brief Check CEC initiator or destination logical address setting.
* Initiator and destination addresses are coded over 4 bits.
* @param __ADDRESS__: CEC initiator or logical address.
* @param __ADDRESS__ CEC initiator or logical address.
* @retval Test result (TRUE or FALSE).
*/
#define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)

27
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_conf.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_conf.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief HAL configuration file.
******************************************************************************
* @attention
@ -52,7 +50,9 @@
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_CAN_MODULE_ENABLED
// MBED: use the legacy module for now
//#define HAL_CAN_MODULE_ENABLED
#define HAL_CAN_LEGACY_MODULE_ENABLED
#define HAL_CEC_MODULE_ENABLED
#define HAL_CRC_MODULE_ENABLED
#define HAL_CRYP_MODULE_ENABLED
@ -164,8 +164,8 @@
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 1U
#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */
#define PREFETCH_ENABLE 1U /* To enable prefetch */
#define ART_ACCLERATOR_ENABLE 1U /* To enable ART Accelerator */
/* ########################## Assert Selection ############################## */
/**
@ -278,6 +278,10 @@
#include "stm32f7xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32f7xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f7xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
@ -442,8 +446,19 @@
#ifdef USE_FULL_ASSERT
/* ALL MBED targets use same stm32_assert.h */
#include "stm32_assert.h"
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
//#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
//void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */

26
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_cortex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief CORTEX HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the CORTEX:
@ -142,7 +140,7 @@
/**
* @brief Sets the priority grouping field (preemption priority and subpriority)
* using the required unlock sequence.
* @param PriorityGroup: The priority grouping bits length.
* @param PriorityGroup The priority grouping bits length.
* This parameter can be one of the following values:
* @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
* 4 bits for subpriority
@ -169,13 +167,13 @@ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
/**
* @brief Sets the priority of an interrupt.
* @param IRQn: External interrupt number.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
* @param PreemptPriority: The preemption priority for the IRQn channel.
* @param PreemptPriority The preemption priority for the IRQn channel.
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority
* @param SubPriority: the subpriority level for the IRQ channel.
* @param SubPriority the subpriority level for the IRQ channel.
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
@ -240,7 +238,7 @@ void HAL_NVIC_SystemReset(void)
/**
* @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
* Counter is in free running mode to generate periodic interrupts.
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
@ -287,7 +285,7 @@ void HAL_MPU_Disable(void)
/**
* @brief Enables the MPU
* @param MPU_Control: Specifies the control mode of the MPU during hard fault,
* @param MPU_Control Specifies the control mode of the MPU during hard fault,
* NMI, FAULTMASK and privileged access to the default memory
* This parameter can be one of the following values:
* @arg MPU_HFNMI_PRIVDEF_NONE
@ -311,7 +309,7 @@ void HAL_MPU_Enable(uint32_t MPU_Control)
/**
* @brief Initializes and configures the Region and the memory to be protected.
* @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
* @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
* the initialization and configuration information.
* @retval None
*/
@ -367,10 +365,10 @@ uint32_t HAL_NVIC_GetPriorityGrouping(void)
/**
* @brief Gets the priority of an interrupt.
* @param IRQn: External interrupt number.
* @param IRQn External interrupt number.
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h))
* @param PriorityGroup: the priority grouping bits length.
* @param PriorityGroup the priority grouping bits length.
* This parameter can be one of the following values:
* @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
* 4 bits for subpriority
@ -382,8 +380,8 @@ uint32_t HAL_NVIC_GetPriorityGrouping(void)
* 1 bits for subpriority
* @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
* 0 bits for subpriority
* @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
* @param pSubPriority: Pointer on the Subpriority value (starting from 0).
* @param pPreemptPriority Pointer on the Preemptive priority value (starting from 0).
* @param pSubPriority Pointer on the Subpriority value (starting from 0).
* @retval None
*/
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
@ -463,7 +461,7 @@ uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
/**
* @brief Configures the SysTick clock source.
* @param CLKSource: specifies the SysTick clock source.
* @param CLKSource specifies the SysTick clock source.
* This parameter can be one of the following values:
* @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
* @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.

2
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_cortex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of CORTEX HAL module.
******************************************************************************
* @attention

36
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_crc.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief CRC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Cyclic Redundancy Check (CRC) peripheral:
@ -112,7 +110,7 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3
/**
* @brief Initialize the CRC according to the specified
* parameters in the CRC_InitTypeDef and create the associated handle.
* @param hcrc: CRC handle
* @param hcrc CRC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
@ -189,7 +187,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
/**
* @brief DeInitialize the CRC peripheral.
* @param hcrc: CRC handle
* @param hcrc CRC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
@ -233,7 +231,7 @@ HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
/**
* @brief Initialize the CRC MSP.
* @param hcrc: CRC handle
* @param hcrc CRC handle
* @retval None
*/
__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
@ -248,7 +246,7 @@ __weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc)
/**
* @brief DeInitialize the CRC MSP.
* @param hcrc: CRC handle
* @param hcrc CRC handle
* @retval None
*/
__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
@ -288,10 +286,10 @@ __weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc)
/**
* @brief Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
* starting with the previously computed CRC as initialization value.
* @param hcrc: CRC handle
* @param pBuffer: pointer to the input data buffer, exact input data format is
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer, exact input data format is
* provided by hcrc->InputDataFormat.
* @param BufferLength: input data buffer length (number of bytes if pBuffer
* @param BufferLength input data buffer length (number of bytes if pBuffer
* type is * uint8_t, number of half-words if pBuffer type is * uint16_t,
* number of words if pBuffer type is * uint32_t).
* @note By default, the API expects a uint32_t pointer as input buffer parameter.
@ -346,10 +344,10 @@ uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_
/**
* @brief Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer
* starting with hcrc->Instance->INIT as initialization value.
* @param hcrc: CRC handle
* @param pBuffer: pointer to the input data buffer, exact input data format is
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer, exact input data format is
* provided by hcrc->InputDataFormat.
* @param BufferLength: input data buffer length (number of bytes if pBuffer
* @param BufferLength input data buffer length (number of bytes if pBuffer
* type is * uint8_t, number of half-words if pBuffer type is * uint16_t,
* number of words if pBuffer type is * uint32_t).
* @note By default, the API expects a uint32_t pointer as input buffer parameter.
@ -410,9 +408,9 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t
/**
* @brief Enter 8-bit input data to the CRC calculator.
* Specific data handling to optimize processing time.
* @param hcrc: CRC handle
* @param pBuffer: pointer to the input data buffer
* @param BufferLength: input data buffer length
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer
* @param BufferLength input data buffer length
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
@ -451,9 +449,9 @@ static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_
/**
* @brief Enter 16-bit input data to the CRC calculator.
* Specific data handling to optimize processing time.
* @param hcrc: CRC handle
* @param pBuffer: pointer to the input data buffer
* @param BufferLength: input data buffer length
* @param hcrc CRC handle
* @param pBuffer pointer to the input data buffer
* @param BufferLength input data buffer length
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
@ -497,7 +495,7 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3
/**
* @brief Return the CRC state.
* @param hcrc: CRC handle
* @param hcrc CRC handle
* @retval HAL state
*/
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc)

16
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_crc.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of CRC HAL module.
******************************************************************************
* @attention
@ -243,37 +241,37 @@ typedef struct
*/
/** @brief Reset CRC handle state
* @param __HANDLE__: CRC handle.
* @param __HANDLE__ CRC handle.
* @retval None
*/
#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
/**
* @brief Reset CRC Data Register.
* @param __HANDLE__: CRC handle
* @param __HANDLE__ CRC handle
* @retval None.
*/
#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
/**
* @brief Set CRC INIT non-default value
* @param __HANDLE__ : CRC handle
* @param __INIT__ : 32-bit initial value
* @param __HANDLE__ CRC handle
* @param __INIT__ 32-bit initial value
* @retval None.
*/
#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
/**
* @brief Stores a 8-bit data in the Independent Data(ID) register.
* @param __HANDLE__: CRC handle
* @param __VALUE__: 8-bit value to be stored in the ID register
* @param __HANDLE__ CRC handle
* @param __VALUE__ 8-bit value to be stored in the ID register
* @retval None
*/
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, CRC_IDR_IDR, (__VALUE__)))
/**
* @brief Returns the 8-bit data stored in the Independent Data(ID) register.
* @param __HANDLE__: CRC handle
* @param __HANDLE__ CRC handle
* @retval 8-bit value of the ID register
*/
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)

16
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_crc_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Extended CRC HAL module driver.
*
* This file provides firmware functions to manage the following
@ -93,12 +91,12 @@ This subsection provides function allowing to:
/**
* @brief Initializes the CRC polynomial if different from default one.
* @param hcrc: CRC handle
* @param Pol: CRC generating polynomial (7, 8, 16 or 32-bit long)
* @param hcrc CRC handle
* @param Pol CRC generating polynomial (7, 8, 16 or 32-bit long)
* This parameter is written in normal representation, e.g.
* for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
* for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021
* @param PolyLength: CRC polynomial length
* @param PolyLength CRC polynomial length
* This parameter can be one of the following values:
* @arg CRC_POLYLENGTH_7B: 7-bit long CRC (generating polynomial of degree 7)
* @arg CRC_POLYLENGTH_8B: 8-bit long CRC (generating polynomial of degree 8)
@ -163,8 +161,8 @@ HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol
/**
* @brief Set the Reverse Input data mode.
* @param hcrc: CRC handle
* @param InputReverseMode: Input Data inversion mode
* @param hcrc CRC handle
* @param InputReverseMode Input Data inversion mode
* This parameter can be one of the following values:
* @arg CRC_INPUTDATA_INVERSION_NONE: no change in bit order (default value)
* @arg CRC_INPUTDATA_INVERSION_BYTE: Byte-wise bit reversal
@ -191,8 +189,8 @@ HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t
/**
* @brief Set the Reverse Output data mode.
* @param hcrc: CRC handle
* @param OutputReverseMode: Output Data inversion mode
* @param hcrc CRC handle
* @param OutputReverseMode Output Data inversion mode
* This parameter can be one of the following values:
* @arg CRC_OUTPUTDATA_INVERSION_DISABLE: no CRC inversion (default value)
* @arg CRC_OUTPUTDATA_INVERSION_ENABLE: bit-level inversion (e.g for a 8-bit CRC: 0xB5 becomes 0xAD)

10
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_crc_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of CRC HAL extension module.
******************************************************************************
* @attention
@ -101,22 +99,22 @@
/**
* @brief Set CRC output reversal
* @param __HANDLE__ : CRC handle
* @param __HANDLE__ CRC handle
* @retval None.
*/
#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT)
/**
* @brief Unset CRC output reversal
* @param __HANDLE__ : CRC handle
* @param __HANDLE__ CRC handle
* @retval None.
*/
#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT))
/**
* @brief Set CRC non-default polynomial
* @param __HANDLE__ : CRC handle
* @param __POLYNOMIAL__: 7, 8, 16 or 32-bit polynomial
* @param __HANDLE__ CRC handle
* @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial
* @retval None.
*/
#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__))

626
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.c
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File diff suppressed because it is too large Load Diff

66
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_cryp.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of CRYP HAL module.
******************************************************************************
* @attention
@ -258,14 +256,14 @@ typedef struct
*/
/** @brief Reset CRYP handle state
* @param __HANDLE__: specifies the CRYP handle.
* @param __HANDLE__ specifies the CRYP handle.
* @retval None
*/
#define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET)
/**
* @brief Enable/Disable the CRYP peripheral.
* @param __HANDLE__: specifies the CRYP handle.
* @param __HANDLE__ specifies the CRYP handle.
* @retval None
*/
#define __HAL_CRYP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRYP_CR_CRYPEN)
@ -273,22 +271,22 @@ typedef struct
/**
* @brief Flush the data FIFO.
* @param __HANDLE__: specifies the CRYP handle.
* @param __HANDLE__ specifies the CRYP handle.
* @retval None
*/
#define __HAL_CRYP_FIFO_FLUSH(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRYP_CR_FFLUSH)
/**
* @brief Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC.
* @param __HANDLE__: specifies the CRYP handle.
* @param MODE: The algorithm mode.
* @param __HANDLE__ specifies the CRYP handle.
* @param MODE The algorithm mode.
* @retval None
*/
#define __HAL_CRYP_SET_MODE(__HANDLE__, MODE) ((__HANDLE__)->Instance->CR |= (uint32_t)(MODE))
/** @brief Check whether the specified CRYP flag is set or not.
* @param __HANDLE__: specifies the CRYP handle.
* @param __FLAG__: specifies the flag to check.
* @param __HANDLE__ specifies the CRYP handle.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg CRYP_FLAG_BUSY: The CRYP core is currently processing a block of data
* or a key preparation (for AES decryption).
@ -305,8 +303,8 @@ typedef struct
((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)))
/** @brief Check whether the specified CRYP interrupt is set or not.
* @param __HANDLE__: specifies the CRYP handle.
* @param __INTERRUPT__: specifies the interrupt to check.
* @param __HANDLE__ specifies the CRYP handle.
* @param __INTERRUPT__ specifies the interrupt to check.
* This parameter can be one of the following values:
* @arg CRYP_IT_INRIS: Input FIFO service raw interrupt is pending
* @arg CRYP_IT_OUTRIS: Output FIFO service raw interrupt is pending
@ -316,16 +314,16 @@ typedef struct
/**
* @brief Enable the CRYP interrupt.
* @param __HANDLE__: specifies the CRYP handle.
* @param __INTERRUPT__: CRYP Interrupt.
* @param __HANDLE__ specifies the CRYP handle.
* @param __INTERRUPT__ CRYP Interrupt.
* @retval None
*/
#define __HAL_CRYP_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IMSCR) |= (__INTERRUPT__))
/**
* @brief Disable the CRYP interrupt.
* @param __HANDLE__: specifies the CRYP handle.
* @param __INTERRUPT__: CRYP interrupt.
* @param __HANDLE__ specifies the CRYP handle.
* @param __INTERRUPT__ CRYP interrupt.
* @retval None
*/
#define __HAL_CRYP_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IMSCR) &= ~(__INTERRUPT__))
@ -827,7 +825,7 @@ typedef struct
*/
/** @brief Reset CRYP handle state.
* @param __HANDLE__: specifies the CRYP handle.
* @param __HANDLE__ specifies the CRYP handle.
* @retval None
*/
#define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET)
@ -846,7 +844,7 @@ typedef struct
/**
* @brief Set the algorithm operating mode.
* @param __OPERATING_MODE__: specifies the operating mode
* @param __OPERATING_MODE__ specifies the operating mode
* This parameter can be one of the following values:
* @arg @ref CRYP_ALGOMODE_ENCRYPT encryption
* @arg @ref CRYP_ALGOMODE_KEYDERIVATION key derivation
@ -859,7 +857,7 @@ typedef struct
/**
* @brief Set the algorithm chaining mode.
* @param __CHAINING_MODE__: specifies the chaining mode
* @param __CHAINING_MODE__ specifies the chaining mode
* This parameter can be one of the following values:
* @arg @ref CRYP_CHAINMODE_AES_ECB Electronic CodeBook
* @arg @ref CRYP_CHAINMODE_AES_CBC Cipher Block Chaining
@ -873,7 +871,7 @@ typedef struct
/** @brief Check whether the specified CRYP status flag is set or not.
* @param __FLAG__: specifies the flag to check.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg @ref CRYP_FLAG_BUSY GCM process suspension forbidden
* @arg @ref CRYP_IT_WRERR Write Error
@ -885,7 +883,7 @@ typedef struct
/** @brief Clear the CRYP pending status flag.
* @param __FLAG__: specifies the flag to clear.
* @param __FLAG__ specifies the flag to clear.
* This parameter can be one of the following values:
* @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear
* @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear
@ -896,7 +894,7 @@ typedef struct
/** @brief Check whether the specified CRYP interrupt source is enabled or not.
* @param __INTERRUPT__: CRYP interrupt source to check
* @param __INTERRUPT__ CRYP interrupt source to check
* This parameter can be one of the following values:
* @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
* @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
@ -906,7 +904,7 @@ typedef struct
/** @brief Check whether the specified CRYP interrupt is set or not.
* @param __INTERRUPT__: specifies the interrupt to check.
* @param __INTERRUPT__ specifies the interrupt to check.
* This parameter can be one of the following values:
* @arg @ref CRYP_IT_WRERR Write Error
* @arg @ref CRYP_IT_RDERR Read Error
@ -918,7 +916,7 @@ typedef struct
/** @brief Clear the CRYP pending interrupt.
* @param __INTERRUPT__: specifies the IT to clear.
* @param __INTERRUPT__ specifies the IT to clear.
* This parameter can be one of the following values:
* @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear
* @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear
@ -929,7 +927,7 @@ typedef struct
/**
* @brief Enable the CRYP interrupt.
* @param __INTERRUPT__: CRYP Interrupt.
* @param __INTERRUPT__ CRYP Interrupt.
* This parameter can be one of the following values:
* @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
* @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
@ -940,7 +938,7 @@ typedef struct
/**
* @brief Disable the CRYP interrupt.
* @param __INTERRUPT__: CRYP Interrupt.
* @param __INTERRUPT__ CRYP Interrupt.
* This parameter can be one of the following values:
* @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
* @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
@ -959,7 +957,7 @@ typedef struct
/**
* @brief Verify the key size length.
* @param __KEYSIZE__: Ciphering/deciphering algorithm key size.
* @param __KEYSIZE__ Ciphering/deciphering algorithm key size.
* @retval SET (__KEYSIZE__ is a valid value) or RESET (__KEYSIZE__ is invalid)
*/
#define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \
@ -967,7 +965,7 @@ typedef struct
/**
* @brief Verify the input data type.
* @param __DATATYPE__: Ciphering/deciphering algorithm input data type.
* @param __DATATYPE__ Ciphering/deciphering algorithm input data type.
* @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid)
*/
#define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \
@ -977,7 +975,7 @@ typedef struct
/**
* @brief Verify the CRYP AES IP running mode.
* @param __MODE__: CRYP AES IP running mode.
* @param __MODE__ CRYP AES IP running mode.
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
*/
#define IS_CRYP_AES(__MODE__) (((__MODE__) == CRYP_AES_DISABLE) || \
@ -985,7 +983,7 @@ typedef struct
/**
* @brief Verify the selected CRYP algorithm.
* @param __ALGOMODE__: Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter).
* @param __ALGOMODE__ Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter).
* @retval SET (__ALGOMODE__ is valid) or RESET (__ALGOMODE__ is invalid)
*/
#define IS_CRYP_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == CRYP_ALGOMODE_ENCRYPT) || \
@ -996,7 +994,7 @@ typedef struct
/**
* @brief Verify the selected CRYP chaining algorithm.
* @param __CHAINMODE__: Selected CRYP chaining algorithm.
* @param __CHAINMODE__ Selected CRYP chaining algorithm.
* @retval SET (__CHAINMODE__ is valid) or RESET (__CHAINMODE__ is invalid)
*/
#if defined(AES_CR_NPBLB)
@ -1015,7 +1013,7 @@ typedef struct
/**
* @brief Verify the deciphering key write option.
* @param __WRITE__: deciphering key write option.
* @param __WRITE__ deciphering key write option.
* @retval SET (__WRITE__ is valid) or RESET (__WRITE__ is invalid)
*/
#define IS_CRYP_WRITE(__WRITE__) (((__WRITE__) == CRYP_KEY_WRITE_ENABLE) || \
@ -1023,7 +1021,7 @@ typedef struct
/**
* @brief Verify the CRYP input data DMA mode.
* @param __MODE__: CRYP input data DMA mode.
* @param __MODE__ CRYP input data DMA mode.
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
*/
#define IS_CRYP_DMAIN(__MODE__) (((__MODE__) == CRYP_DMAIN_DISABLE) || \
@ -1031,7 +1029,7 @@ typedef struct
/**
* @brief Verify the CRYP output data DMA mode.
* @param __MODE__: CRYP output data DMA mode.
* @param __MODE__ CRYP output data DMA mode.
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
*/
#define IS_CRYP_DMAOUT(__MODE__) (((__MODE__) == CRYP_DMAOUT_DISABLE) || \
@ -1039,7 +1037,7 @@ typedef struct
/**
* @brief Verify the CRYP AES ciphering/deciphering/authentication algorithm phase.
* @param __PHASE__: CRYP AES ciphering/deciphering/authentication algorithm phase.
* @param __PHASE__ CRYP AES ciphering/deciphering/authentication algorithm phase.
* @retval SET (__PHASE__ is valid) or RESET (__PHASE__ is invalid)
*/
#define IS_CRYP_GCMCMAC_PHASE(__PHASE__) (((__PHASE__) == CRYP_GCM_INIT_PHASE) || \

316
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_cryp_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Extended CRYP HAL module driver
* This file provides firmware functions to manage the following
* functionalities of CRYP extension peripheral:
@ -147,7 +145,7 @@ static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t input
/**
* @brief DMA CRYP Input Data process complete callback.
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma)
@ -164,7 +162,7 @@ static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA CRYP Output Data process complete callback.
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma)
@ -187,7 +185,7 @@ static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA CRYP communication error callback.
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma)
@ -199,10 +197,10 @@ static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma)
/**
* @brief Writes the Key in Key registers.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param Key: Pointer to Key buffer
* @param KeySize: Size of Key
* @param Key Pointer to Key buffer
* @param KeySize Size of Key
* @retval None
*/
static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
@ -258,9 +256,9 @@ static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32
/**
* @brief Writes the InitVector/InitCounter in IV registers.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param InitVector: Pointer to InitVector/InitCounter buffer
* @param InitVector Pointer to InitVector/InitCounter buffer
* @retval None
*/
static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector)
@ -278,12 +276,12 @@ static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *Init
/**
* @brief Process Data: Writes Input data in polling mode and read the Output data.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param Input: Pointer to the Input buffer.
* @param Ilength: Length of the Input buffer, must be a multiple of 16
* @param Output: Pointer to the returned buffer
* @param Timeout: Timeout value
* @param Input Pointer to the Input buffer.
* @param Ilength Length of the Input buffer, must be a multiple of 16
* @param Output Pointer to the returned buffer
* @param Timeout Timeout value
* @retval None
*/
static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t *Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout)
@ -341,11 +339,11 @@ static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef *hcryp, ui
/**
* @brief Sets the header phase
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param Input: Pointer to the Input buffer.
* @param Ilength: Length of the Input buffer, must be a multiple of 16
* @param Timeout: Timeout value
* @param Input Pointer to the Input buffer.
* @param Ilength Length of the Input buffer, must be a multiple of 16
* @param Timeout Timeout value
* @retval None
*/
static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint32_t Timeout)
@ -424,11 +422,11 @@ static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef *hcryp,
/**
* @brief Sets the DMA configuration and start the DMA transfer.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param inputaddr: Address of the Input buffer
* @param Size: Size of the Input buffer, must be a multiple of 16
* @param outputaddr: Address of the Output buffer
* @param inputaddr Address of the Input buffer
* @param Size Size of the Input buffer, must be a multiple of 16
* @param outputaddr Address of the Output buffer
* @retval None
*/
static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
@ -492,12 +490,12 @@ static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t input
/**
* @brief Initializes the CRYP peripheral in AES CCM encryption mode then
* encrypt pPlainData. The cypher data are available in pCypherData.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pPlainData: Pointer to the plaintext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData: Pointer to the cyphertext buffer
* @param Timeout: Timeout duration
* @param pPlainData Pointer to the plaintext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData Pointer to the cyphertext buffer
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
@ -748,12 +746,12 @@ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *
/**
* @brief Initializes the CRYP peripheral in AES GCM encryption mode then
* encrypt pPlainData. The cypher data are available in pCypherData.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pPlainData: Pointer to the plaintext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData: Pointer to the cyphertext buffer
* @param Timeout: Timeout duration
* @param pPlainData Pointer to the plaintext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData Pointer to the cyphertext buffer
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
@ -846,12 +844,12 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *
/**
* @brief Initializes the CRYP peripheral in AES GCM decryption mode then
* decrypted pCypherData. The cypher data are available in pPlainData.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pCypherData: Pointer to the cyphertext buffer
* @param Size: Length of the cyphertext buffer, must be a multiple of 16
* @param pPlainData: Pointer to the plaintext buffer
* @param Timeout: Timeout duration
* @param pCypherData Pointer to the cyphertext buffer
* @param Size Length of the cyphertext buffer, must be a multiple of 16
* @param pPlainData Pointer to the plaintext buffer
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
@ -939,11 +937,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *
/**
* @brief Computes the authentication TAG.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param Size: Total length of the plain/cyphertext buffer
* @param AuthTag: Pointer to the authentication buffer
* @param Timeout: Timeout duration
* @param Size Total length of the plain/cyphertext buffer
* @param AuthTag Pointer to the authentication buffer
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef *hcryp, uint32_t Size, uint8_t *AuthTag, uint32_t Timeout)
@ -1048,10 +1046,10 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef *hcryp, uint32_t S
/**
* @brief Computes the authentication TAG for AES CCM mode.
* @note This API is called after HAL_AES_CCM_Encrypt()/HAL_AES_CCM_Decrypt()
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param AuthTag: Pointer to the authentication buffer
* @param Timeout: Timeout duration
* @param AuthTag Pointer to the authentication buffer
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef *hcryp, uint8_t *AuthTag, uint32_t Timeout)
@ -1140,12 +1138,12 @@ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef *hcryp, uint8_t *A
/**
* @brief Initializes the CRYP peripheral in AES CCM decryption mode then
* decrypted pCypherData. The cypher data are available in pPlainData.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pPlainData: Pointer to the plaintext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData: Pointer to the cyphertext buffer
* @param Timeout: Timeout duration
* @param pPlainData Pointer to the plaintext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData Pointer to the cyphertext buffer
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
@ -1392,11 +1390,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *
/**
* @brief Initializes the CRYP peripheral in AES GCM encryption mode using IT.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pPlainData: Pointer to the plaintext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData: Pointer to the cyphertext buffer
* @param pPlainData Pointer to the plaintext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData Pointer to the cyphertext buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@ -1543,11 +1541,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_
/**
* @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pPlainData: Pointer to the plaintext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData: Pointer to the cyphertext buffer
* @param pPlainData Pointer to the plaintext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData Pointer to the cyphertext buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@ -1842,11 +1840,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_
/**
* @brief Initializes the CRYP peripheral in AES GCM decryption mode using IT.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pCypherData: Pointer to the cyphertext buffer
* @param Size: Length of the cyphertext buffer, must be a multiple of 16
* @param pPlainData: Pointer to the plaintext buffer
* @param pCypherData Pointer to the cyphertext buffer
* @param Size Length of the cyphertext buffer, must be a multiple of 16
* @param pPlainData Pointer to the plaintext buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@ -1990,11 +1988,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_
/**
* @brief Initializes the CRYP peripheral in AES CCM decryption mode using interrupt
* then decrypted pCypherData. The cypher data are available in pPlainData.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pCypherData: Pointer to the cyphertext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pPlainData: Pointer to the plaintext buffer
* @param pCypherData Pointer to the cyphertext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pPlainData Pointer to the plaintext buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@ -2280,11 +2278,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_
/**
* @brief Initializes the CRYP peripheral in AES GCM encryption mode using DMA.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pPlainData: Pointer to the plaintext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData: Pointer to the cyphertext buffer
* @param pPlainData Pointer to the plaintext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData Pointer to the cyphertext buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@ -2377,11 +2375,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8
/**
* @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pPlainData: Pointer to the plaintext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData: Pointer to the cyphertext buffer
* @param pPlainData Pointer to the plaintext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pCypherData Pointer to the cyphertext buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
@ -2631,11 +2629,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8
/**
* @brief Initializes the CRYP peripheral in AES GCM decryption mode using DMA.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pCypherData: Pointer to the cyphertext buffer.
* @param Size: Length of the cyphertext buffer, must be a multiple of 16
* @param pPlainData: Pointer to the plaintext buffer
* @param pCypherData Pointer to the cyphertext buffer.
* @param Size Length of the cyphertext buffer, must be a multiple of 16
* @param pPlainData Pointer to the plaintext buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@ -2721,11 +2719,11 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8
/**
* @brief Initializes the CRYP peripheral in AES CCM decryption mode using DMA
* then decrypted pCypherData. The cypher data are available in pPlainData.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pCypherData: Pointer to the cyphertext buffer
* @param Size: Length of the plaintext buffer, must be a multiple of 16
* @param pPlainData: Pointer to the plaintext buffer
* @param pCypherData Pointer to the cyphertext buffer
* @param Size Length of the plaintext buffer, must be a multiple of 16
* @param pPlainData Pointer to the plaintext buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
@ -2992,7 +2990,7 @@ HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8
/**
* @brief This function handles CRYPEx interrupt request.
* @param hcryp: pointer to a CRYPEx_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYPEx_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @retval None
*/
@ -3099,7 +3097,7 @@ static void CRYP_Padding(CRYP_HandleTypeDef *hcryp, uint32_t difflength, uint32_
/**
* @brief Computation completed callbacks.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @retval None
*/
@ -3148,17 +3146,17 @@ __weak void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp)
* @brief Carry out in polling mode the ciphering or deciphering operation according to
* hcryp->Init structure fields, all operating modes (encryption, key derivation and/or decryption) and
* chaining modes ECB, CBC and CTR are managed by this function in polling mode.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption
* @param pInputData Pointer to the plain text in case of encryption or cipher text in case of decryption
* or key derivation+decryption.
* Parameter is meaningless in case of key derivation.
* @param Size: Length of the input data buffer in bytes, must be a multiple of 16.
* @param Size Length of the input data buffer in bytes, must be a multiple of 16.
* Parameter is meaningless in case of key derivation.
* @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of
* @param pOutputData Pointer to the cipher text in case of encryption or plain text in case of
* decryption/key derivation+decryption, or pointer to the derivative keys in
* case of key derivation only.
* @param Timeout: Specify Timeout value
* @param Timeout Specify Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYPEx_AES(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData, uint32_t Timeout)
@ -3229,14 +3227,14 @@ HAL_StatusTypeDef HAL_CRYPEx_AES(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData,
* @brief Carry out in interrupt mode the ciphering or deciphering operation according to
* hcryp->Init structure fields, all operating modes (encryption, key derivation and/or decryption) and
* chaining modes ECB, CBC and CTR are managed by this function in interrupt mode.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption
* @param pInputData Pointer to the plain text in case of encryption or cipher text in case of decryption
* or key derivation+decryption.
* Parameter is meaningless in case of key derivation.
* @param Size: Length of the input data buffer in bytes, must be a multiple of 16.
* @param Size Length of the input data buffer in bytes, must be a multiple of 16.
* Parameter is meaningless in case of key derivation.
* @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of
* @param pOutputData Pointer to the cipher text in case of encryption or plain text in case of
* decryption/key derivation+decryption, or pointer to the derivative keys in
* case of key derivation only.
* @retval HAL status
@ -3324,12 +3322,12 @@ HAL_StatusTypeDef HAL_CRYPEx_AES_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputD
/**
* @brief Carry out in DMA mode the ciphering or deciphering operation according to
* hcryp->Init structure fields.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption
* @param pInputData Pointer to the plain text in case of encryption or cipher text in case of decryption
* or key derivation+decryption.
* @param Size: Length of the input data buffer in bytes, must be a multiple of 16.
* @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of
* @param Size Length of the input data buffer in bytes, must be a multiple of 16.
* @param pOutputData Pointer to the cipher text in case of encryption or plain text in case of
* decryption/key derivation+decryption.
* @note Chaining modes ECB, CBC and CTR are managed by this function in DMA mode.
* @note Supported operating modes are encryption, decryption and key derivation with decryption.
@ -3395,24 +3393,24 @@ HAL_StatusTypeDef HAL_CRYPEx_AES_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInput
/**
* @brief Carry out in polling mode the authentication tag generation as well as the ciphering or deciphering
* operation according to hcryp->Init structure fields.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pInputData:
* @param pInputData
* - pointer to payload data in GCM payload phase,
* - pointer to B0 block in CMAC header phase,
* - pointer to C block in CMAC final phase.
* - Parameter is meaningless in case of GCM/GMAC init, header and final phases.
* @param Size:
* @param Size
* - length of the input payload data buffer in bytes,
* - length of B0 block (in bytes) in CMAC header phase,
* - length of C block (in bytes) in CMAC final phase.
* - Parameter is meaningless in case of GCM/GMAC init and header phases.
* @param pOutputData:
* @param pOutputData
* - pointer to plain or cipher text in GCM payload phase,
* - pointer to authentication tag in GCM/GMAC and CMAC final phases.
* - Parameter is meaningless in case of GCM/GMAC init and header phases
* and in case of CMAC header phase.
* @param Timeout: Specify Timeout value
* @param Timeout Specify Timeout value
* @note Supported operating modes are encryption and decryption, supported chaining modes are GCM, GMAC, CMAC and CCM when the latter is applicable.
* @note Phases are singly processed according to hcryp->Init.GCMCMACPhase so that steps in these specific chaining modes
* can be skipped by the user if so required.
@ -3880,19 +3878,19 @@ HAL_StatusTypeDef HAL_CRYPEx_AES_Auth(CRYP_HandleTypeDef *hcryp, uint8_t *pInput
/**
* @brief Carry out in interrupt mode the authentication tag generation as well as the ciphering or deciphering
* operation according to hcryp->Init structure fields.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pInputData:
* @param pInputData
* - pointer to payload data in GCM payload phase,
* - pointer to B0 block in CMAC header phase,
* - pointer to C block in CMAC final phase.
* Parameter is meaningless in case of GCM/GMAC init, header and final phases.
* @param Size:
* @param Size
* - length of the input payload data buffer in bytes,
* - length of B0 block (in bytes) in CMAC header phase,
* - length of C block (in bytes) in CMAC final phase.
* - Parameter is meaningless in case of GCM/GMAC init and header phases.
* @param pOutputData:
* @param pOutputData
* - pointer to plain or cipher text in GCM payload phase,
* - pointer to authentication tag in GCM/GMAC and CMAC final phases.
* - Parameter is meaningless in case of GCM/GMAC init and header phases
@ -4296,19 +4294,19 @@ HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pIn
/**
* @brief Carry out in DMA mode the authentication tag generation as well as the ciphering or deciphering
* operation according to hcryp->Init structure fields.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param pInputData:
* @param pInputData
* - pointer to payload data in GCM payload phase,
* - pointer to B0 block in CMAC header phase,
* - pointer to C block in CMAC final phase.
* - Parameter is meaningless in case of GCM/GMAC init, header and final phases.
* @param Size:
* @param Size
* - length of the input payload data buffer in bytes,
* - length of B block (in bytes) in CMAC header phase,
* - length of C block (in bytes) in CMAC final phase.
* - Parameter is meaningless in case of GCM/GMAC init and header phases.
* @param pOutputData:
* @param pOutputData
* - pointer to plain or cipher text in GCM payload phase,
* - pointer to authentication tag in GCM/GMAC and CMAC final phases.
* - Parameter is meaningless in case of GCM/GMAC init and header phases
@ -4723,9 +4721,9 @@ HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pI
/**
* @brief In case of message processing suspension, read the Initialization Vector.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Output: Pointer to the buffer containing the saved Initialization Vector.
* @param Output Pointer to the buffer containing the saved Initialization Vector.
* @note This value has to be stored for reuse by writing the AES_IVRx registers
* as soon as the interrupted processing has to be resumed.
* Applicable to all chaining modes.
@ -4748,9 +4746,9 @@ void HAL_CRYPEx_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output)
/**
* @brief In case of message processing resumption, rewrite the Initialization
* Vector in the AES_IVRx registers.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Input: Pointer to the buffer containing the saved Initialization Vector to
* @param Input Pointer to the buffer containing the saved Initialization Vector to
* write back in the CRYP hardware block.
* @note Applicable to all chaining modes.
* @note AES must be disabled when reading or resetting the IV values.
@ -4772,9 +4770,9 @@ void HAL_CRYPEx_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input)
/**
* @brief In case of message GCM/GMAC or CMAC processing suspension, read the Suspend Registers.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Output: Pointer to the buffer containing the saved Suspend Registers.
* @param Output Pointer to the buffer containing the saved Suspend Registers.
* @note These values have to be stored for reuse by writing back the AES_SUSPxR registers
* as soon as the interrupted processing has to be resumed.
* @retval None
@ -4820,9 +4818,9 @@ void HAL_CRYPEx_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output
/**
* @brief In case of message GCM/GMAC or CMAC processing resumption, rewrite the Suspend
* Registers in the AES_SUSPxR registers.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Input: Pointer to the buffer containing the saved suspend registers to
* @param Input Pointer to the buffer containing the saved suspend registers to
* write back in the CRYP hardware block.
* @retval None
*/
@ -4850,10 +4848,10 @@ void HAL_CRYPEx_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input
/**
* @brief In case of message GCM/GMAC or CMAC processing suspension, read the Key Registers.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Output: Pointer to the buffer containing the saved Key Registers.
* @param KeySize: Indicates the key size (128 or 256 bits).
* @param Output Pointer to the buffer containing the saved Key Registers.
* @param KeySize Indicates the key size (128 or 256 bits).
* @note These values have to be stored for reuse by writing back the AES_KEYRx registers
* as soon as the interrupted processing has to be resumed.
* @retval None
@ -4886,11 +4884,11 @@ void HAL_CRYPEx_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output, ui
/**
* @brief In case of message GCM/GMAC or CMAC processing resumption, rewrite the Key
* Registers in the AES_KEYRx registers.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Input: Pointer to the buffer containing the saved key registers to
* @param Input Pointer to the buffer containing the saved key registers to
* write back in the CRYP hardware block.
* @param KeySize: Indicates the key size (128 or 256 bits)
* @param KeySize Indicates the key size (128 or 256 bits)
* @retval None
*/
void HAL_CRYPEx_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint32_t KeySize)
@ -4921,9 +4919,9 @@ void HAL_CRYPEx_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input, ui
/**
* @brief In case of message GCM/GMAC or CMAC processing suspension, read the Control Register.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Output: Pointer to the buffer containing the saved Control Register.
* @param Output Pointer to the buffer containing the saved Control Register.
* @note This values has to be stored for reuse by writing back the AES_CR register
* as soon as the interrupted processing has to be resumed.
* @retval None
@ -4936,9 +4934,9 @@ void HAL_CRYPEx_Read_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Output)
/**
* @brief In case of message GCM/GMAC or CMAC processing resumption, rewrite the Control
* Registers in the AES_CR register.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Input: Pointer to the buffer containing the saved Control Register to
* @param Input Pointer to the buffer containing the saved Control Register to
* write back in the CRYP hardware block.
* @retval None
*/
@ -4952,7 +4950,7 @@ void HAL_CRYPEx_Write_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Input)
/**
* @brief Request CRYP processing suspension when in polling or interruption mode.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @note Set the handle field SuspendRequest to the appropriate value so that
* the on-going CRYP processing is suspended as soon as the required
@ -4986,7 +4984,7 @@ void HAL_CRYPEx_ProcessSuspend(CRYP_HandleTypeDef *hcryp)
* in the case of header phase where no output data DMA
* transfer is on-going (only input data transfer is enabled
* in such a case).
* @param hdma: DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void CRYP_GCMCMAC_DMAInCplt(DMA_HandleTypeDef *hdma)
@ -5027,7 +5025,7 @@ static void CRYP_GCMCMAC_DMAInCplt(DMA_HandleTypeDef *hdma)
* @brief DMA CRYP Output Data process complete callback
* for GCM, GMAC or CMAC chainging modes.
* @note This callback is called only in the payload phase.
* @param hdma: DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void CRYP_GCMCMAC_DMAOutCplt(DMA_HandleTypeDef *hdma)
@ -5063,7 +5061,7 @@ static void CRYP_GCMCMAC_DMAOutCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA CRYP communication error callback
* for GCM, GMAC or CMAC chainging modes.
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void CRYP_GCMCMAC_DMAError(DMA_HandleTypeDef *hdma)
@ -5084,7 +5082,7 @@ static void CRYP_GCMCMAC_DMAError(DMA_HandleTypeDef *hdma)
* for GCM, GMAC or CMAC chaining modes.
* @note The function is called under interruption only, once
* interruptions have been enabled by HAL_CRYPEx_AES_Auth_IT().
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @retval HAL status
*/
@ -5544,11 +5542,11 @@ HAL_StatusTypeDef CRYP_AES_Auth_IT(CRYP_HandleTypeDef *hcryp)
/**
* @brief Set the DMA configuration and start the DMA transfer
* for GCM, GMAC or CMAC chainging modes.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param inputaddr: Address of the Input buffer.
* @param Size: Size of the Input buffer un bytes, must be a multiple of 16.
* @param outputaddr: Address of the Output buffer, null pointer when no output DMA stream
* @param inputaddr Address of the Input buffer.
* @param Size Size of the Input buffer un bytes, must be a multiple of 16.
* @param outputaddr Address of the Output buffer, null pointer when no output DMA stream
* has to be configured.
* @retval None
*/
@ -5592,12 +5590,12 @@ static void CRYP_GCMCMAC_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputa
/**
* @brief Write/read input/output data in polling mode.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Input: Pointer to the Input buffer.
* @param Ilength: Length of the Input buffer in bytes, must be a multiple of 16.
* @param Output: Pointer to the returned buffer.
* @param Timeout: Specify Timeout value.
* @param Input Pointer to the Input buffer.
* @param Ilength Length of the Input buffer in bytes, must be a multiple of 16.
* @param Output Pointer to the returned buffer.
* @param Timeout Specify Timeout value.
* @retval HAL status
*/
static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
@ -5673,10 +5671,10 @@ static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* In
/**
* @brief Read derivative key in polling mode when CRYP hardware block is set
* in key derivation operating mode (mode 2).
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Output: Pointer to the returned buffer.
* @param Timeout: Specify Timeout value.
* @param Output Pointer to the returned buffer.
* @param Timeout Specify Timeout value.
* @retval HAL status
*/
static HAL_StatusTypeDef CRYP_ReadKey(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t Timeout)
@ -5721,11 +5719,11 @@ static HAL_StatusTypeDef CRYP_ReadKey(CRYP_HandleTypeDef *hcryp, uint8_t* Output
/**
* @brief Set the DMA configuration and start the DMA transfer.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param inputaddr: Address of the Input buffer.
* @param Size: Size of the Input buffer in bytes, must be a multiple of 16.
* @param outputaddr: Address of the Output buffer.
* @param inputaddr Address of the Input buffer.
* @param Size Size of the Input buffer in bytes, must be a multiple of 16.
* @param outputaddr Address of the Output buffer.
* @retval None
*/
static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
@ -5756,9 +5754,9 @@ static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uin
/**
* @brief Handle CRYP hardware block Timeout when waiting for CCF flag to be raised.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Timeout: Timeout duration.
* @param Timeout Timeout duration.
* @retval HAL status
*/
static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
@ -5784,9 +5782,9 @@ static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t T
/**
* @brief Wait for Busy Flag to be reset during a GCM payload encryption process suspension.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param Timeout: Timeout duration.
* @param Timeout Timeout duration.
* @retval HAL status
*/
static HAL_StatusTypeDef CRYP_WaitOnBusyFlagReset(CRYP_HandleTypeDef *hcryp, uint32_t Timeout)
@ -5813,7 +5811,7 @@ static HAL_StatusTypeDef CRYP_WaitOnBusyFlagReset(CRYP_HandleTypeDef *hcryp, uin
/**
* @brief DMA CRYP Input Data process complete callback.
* @param hdma: DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
@ -5829,7 +5827,7 @@ static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA CRYP Output Data process complete callback.
* @param hdma: DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
@ -5854,7 +5852,7 @@ static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA CRYP communication error callback.
* @param hdma: DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
@ -5870,10 +5868,10 @@ static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
/**
* @brief Last header or payload block padding when size is not a multiple of 128 bits.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module.
* @param difflength: size remainder after having fed all complete 128-bit blocks.
* @param polling: specifies whether or not polling on CCF must be done after having
* @param difflength size remainder after having fed all complete 128-bit blocks.
* @param polling specifies whether or not polling on CCF must be done after having
* entered a complete block.
* @retval None
*/

6
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_cryp_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of CRYP HAL Extension module.
******************************************************************************
* @attention
@ -98,8 +96,8 @@
/**
* @brief Set the phase: Init, header, payload, final.
* This is relevant only for GCM and CCM modes.
* @param __HANDLE__: specifies the CRYP handle.
* @param __PHASE__: The phase.
* @param __HANDLE__ specifies the CRYP handle.
* @param __PHASE__ The phase.
* @retval None
*/
#define __HAL_CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR_GCM_CCMPH);\

70
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dac.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief DAC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Digital to Analog Converter (DAC) peripheral:
@ -223,7 +221,7 @@ static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
/**
* @brief Initializes the DAC peripheral according to the specified parameters
* in the DAC_InitStruct.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval HAL status
*/
@ -260,7 +258,7 @@ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
/**
* @brief Deinitializes the DAC peripheral registers to their default reset values.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval HAL status
*/
@ -296,7 +294,7 @@ HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
/**
* @brief Initializes the DAC MSP.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -312,7 +310,7 @@ __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
/**
* @brief DeInitializes the DAC MSP.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -350,9 +348,9 @@ __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
/**
* @brief Enables DAC and starts conversion of channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel: The selected DAC channel.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
@ -409,9 +407,9 @@ HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
/**
* @brief Disables DAC and stop conversion of channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel: The selected DAC channel.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
@ -434,15 +432,15 @@ HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
/**
* @brief Enables DAC and starts conversion of channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel: The selected DAC channel.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
* @param pData: The Source memory Buffer address.
* @param Length: The length of data to be transferred from memory to DAC peripheral
* @param Alignment: Specifies the data alignment for DAC channel.
* @param pData The Source memory Buffer address.
* @param Length The length of data to be transferred from memory to DAC peripheral
* @param Alignment Specifies the data alignment for DAC channel.
* This parameter can be one of the following values:
* @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
* @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
@ -560,9 +558,9 @@ HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, u
/**
* @brief Disables DAC and stop conversion of channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel: The selected DAC channel.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
@ -610,9 +608,9 @@ HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
/**
* @brief Returns the last data output value of the selected DAC channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel: The selected DAC channel.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
@ -636,7 +634,7 @@ uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
/**
* @brief Handles DAC interrupt request
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -682,7 +680,7 @@ void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
/**
* @brief Conversion complete callback in non blocking mode for Channel1
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -698,7 +696,7 @@ __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
/**
* @brief Conversion half DMA transfer callback in non blocking mode for Channel1
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -714,7 +712,7 @@ __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
/**
* @brief Error DAC callback for Channel1.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -730,7 +728,7 @@ __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
/**
* @brief DMA underrun DAC callback for channel1.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -765,10 +763,10 @@ __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
/**
* @brief Configures the selected DAC channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param sConfig: DAC configuration structure.
* @param Channel: The selected DAC channel.
* @param sConfig DAC configuration structure.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
@ -816,18 +814,18 @@ HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConf
/**
* @brief Set the specified data holding register value for DAC channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel: The selected DAC channel.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
* @param Alignment: Specifies the data alignment.
* @param Alignment Specifies the data alignment.
* This parameter can be one of the following values:
* @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
* @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
* @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
* @param Data: Data to be loaded in the selected data holding register.
* @param Data Data to be loaded in the selected data holding register.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
@ -878,7 +876,7 @@ HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, ui
/**
* @brief return the DAC state
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval HAL state
*/
@ -891,7 +889,7 @@ HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
/**
* @brief Return the DAC error code
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval DAC Error Code
*/
@ -906,7 +904,7 @@ uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
/**
* @brief DMA conversion complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -921,7 +919,7 @@ static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
/**
* @brief DMA half transfer complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -934,7 +932,7 @@ static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
/**
* @brief DMA error callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/

38
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dac.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DAC HAL module.
******************************************************************************
* @attention
@ -196,22 +194,22 @@ typedef struct
*/
/** @brief Reset DAC handle state
* @param __HANDLE__: specifies the DAC handle.
* @param __HANDLE__ specifies the DAC handle.
* @retval None
*/
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
/** @brief Enable the DAC channel
* @param __HANDLE__: specifies the DAC handle.
* @param __DAC_CHANNEL__: specifies the DAC channel
* @param __HANDLE__ specifies the DAC handle.
* @param __DAC_CHANNEL__ specifies the DAC channel
* @retval None
*/
#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_CHANNEL__) \
((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_CHANNEL__)))
/** @brief Disable the DAC channel
* @param __HANDLE__: specifies the DAC handle
* @param __DAC_CHANNEL__: specifies the DAC channel.
* @param __HANDLE__ specifies the DAC handle
* @param __DAC_CHANNEL__ specifies the DAC channel.
* @retval None
*/
#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_CHANNEL__) \
@ -219,22 +217,22 @@ typedef struct
/** @brief Enable the DAC interrupt
* @param __HANDLE__: specifies the DAC handle
* @param __INTERRUPT__: specifies the DAC interrupt.
* @param __HANDLE__ specifies the DAC handle
* @param __INTERRUPT__ specifies the DAC interrupt.
* @retval None
*/
#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
/** @brief Disable the DAC interrupt
* @param __HANDLE__: specifies the DAC handle
* @param __INTERRUPT__: specifies the DAC interrupt.
* @param __HANDLE__ specifies the DAC handle
* @param __INTERRUPT__ specifies the DAC interrupt.
* @retval None
*/
#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
/** @brief Checks if the specified DAC interrupt source is enabled or disabled.
* @param __HANDLE__: DAC handle
* @param __INTERRUPT__: DAC interrupt source to check
* @param __HANDLE__ DAC handle
* @param __INTERRUPT__ DAC interrupt source to check
* This parameter can be any combination of the following values:
* @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
* @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
@ -243,8 +241,8 @@ typedef struct
#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
/** @brief Get the selected DAC's flag status.
* @param __HANDLE__: specifies the DAC handle.
* @param __FLAG__: specifies the flag to clear.
* @param __HANDLE__ specifies the DAC handle.
* @param __FLAG__ specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
* @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
@ -253,8 +251,8 @@ typedef struct
#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
/** @brief Clear the DAC's flag.
* @param __HANDLE__: specifies the DAC handle.
* @param __FLAG__: specifies the flag to clear.
* @param __HANDLE__ specifies the DAC handle.
* @param __FLAG__ specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
* @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
@ -362,19 +360,19 @@ void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
((TRIGGER) == DAC_TRIGGER_SOFTWARE))
/** @brief Set DHR12R1 alignment
* @param __ALIGNMENT__: specifies the DAC alignment
* @param __ALIGNMENT__ specifies the DAC alignment
* @retval None
*/
#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008U) + (__ALIGNMENT__))
/** @brief Set DHR12R2 alignment
* @param __ALIGNMENT__: specifies the DAC alignment
* @param __ALIGNMENT__ specifies the DAC alignment
* @retval None
*/
#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014U) + (__ALIGNMENT__))
/** @brief Set DHR12RD alignment
* @param __ALIGNMENT__: specifies the DAC alignment
* @param __ALIGNMENT__ specifies the DAC alignment
* @retval None
*/
#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020U) + (__ALIGNMENT__))

38
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dac_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Extended DAC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of DAC extension peripheral:
@ -99,7 +97,7 @@
/**
* @brief Returns the last data output value of the selected DAC channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval The selected DAC channel data output value.
*/
@ -117,13 +115,13 @@ uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
/**
* @brief Enables or disables the selected DAC channel wave generation.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel: The selected DAC channel.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
* @param Amplitude: Select max triangle amplitude.
* @param Amplitude Select max triangle amplitude.
* This parameter can be one of the following values:
* @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
* @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
@ -166,13 +164,13 @@ HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32
/**
* @brief Enables or disables the selected DAC channel wave generation.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Channel: The selected DAC channel.
* @param Channel The selected DAC channel.
* This parameter can be one of the following values:
* @arg DAC_CHANNEL_1: DAC Channel1 selected
* @arg DAC_CHANNEL_2: DAC Channel2 selected
* @param Amplitude: Unmask DAC channel LFSR for noise wave generation.
* @param Amplitude Unmask DAC channel LFSR for noise wave generation.
* This parameter can be one of the following values:
* @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
* @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
@ -215,15 +213,15 @@ HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t
/**
* @brief Set the specified data holding register value for dual DAC channel.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @param Alignment: Specifies the data alignment for dual channel DAC.
* @param Alignment Specifies the data alignment for dual channel DAC.
* This parameter can be one of the following values:
* DAC_ALIGN_8B_R: 8bit right data alignment selected
* DAC_ALIGN_12B_L: 12bit left data alignment selected
* DAC_ALIGN_12B_R: 12bit right data alignment selected
* @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register.
* @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register.
* @param Data1 Data for DAC Channel2 to be loaded in the selected data holding register.
* @param Data2 Data for DAC Channel1 to be loaded in the selected data holding register.
* @note In dual mode, a unique register access is required to write in both
* DAC channels at the same time.
* @retval HAL status
@ -263,7 +261,7 @@ HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Align
/**
* @brief Conversion complete callback in non blocking mode for Channel2
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -279,7 +277,7 @@ __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
/**
* @brief Conversion half DMA transfer callback in non blocking mode for Channel2
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -295,7 +293,7 @@ __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
/**
* @brief Error DAC callback for Channel2.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -311,7 +309,7 @@ __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
/**
* @brief DMA underrun DAC callback for channel2.
* @param hdac: pointer to a DAC_HandleTypeDef structure that contains
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
* the configuration information for the specified DAC.
* @retval None
*/
@ -327,7 +325,7 @@ __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
/**
* @brief DMA conversion complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -342,7 +340,7 @@ void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
/**
* @brief DMA half transfer complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -355,7 +353,7 @@ void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
/**
* @brief DMA error callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/

2
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dac.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DAC HAL Extension module.
******************************************************************************
* @attention

73
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dcmi.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief DCMI HAL module driver
* This file provides firmware functions to manage the following
* functionalities of the Digital Camera Interface (DCMI) peripheral:
@ -108,13 +106,6 @@
/* Private define ------------------------------------------------------------*/
#define HAL_TIMEOUT_DCMI_STOP ((uint32_t)1000) /* Set timeout to 1s */
#define DCMI_POSITION_CWSIZE_VLINE (uint32_t)POSITION_VAL(DCMI_CWSIZE_VLINE) /*!< Required left shift to set crop window vertical line count */
#define DCMI_POSITION_CWSTRT_VST (uint32_t)POSITION_VAL(DCMI_CWSTRT_VST) /*!< Required left shift to set crop window vertical start line count */
#define DCMI_POSITION_ESCR_LSC (uint32_t)POSITION_VAL(DCMI_ESCR_LSC) /*!< Required left shift to set line start delimiter */
#define DCMI_POSITION_ESCR_LEC (uint32_t)POSITION_VAL(DCMI_ESCR_LEC) /*!< Required left shift to set line end delimiter */
#define DCMI_POSITION_ESCR_FEC (uint32_t)POSITION_VAL(DCMI_ESCR_FEC) /*!< Required left shift to set frame end delimiter */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
@ -145,7 +136,7 @@ static void DCMI_DMAError(DMA_HandleTypeDef *hdma);
/**
* @brief Initializes the DCMI according to the specified
* parameters in the DCMI_InitTypeDef and create the associated handle.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL status
*/
@ -196,9 +187,9 @@ HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi)
if(hdcmi->Init.SynchroMode == DCMI_SYNCHRO_EMBEDDED)
{
hdcmi->Instance->ESCR = (((uint32_t)hdcmi->Init.SyncroCode.FrameStartCode) |\
((uint32_t)hdcmi->Init.SyncroCode.LineStartCode << DCMI_POSITION_ESCR_LSC)|\
((uint32_t)hdcmi->Init.SyncroCode.LineEndCode << DCMI_POSITION_ESCR_LEC) |\
((uint32_t)hdcmi->Init.SyncroCode.FrameEndCode << DCMI_POSITION_ESCR_FEC));
((uint32_t)hdcmi->Init.SyncroCode.LineStartCode << DCMI_ESCR_LSC_Pos)|\
((uint32_t)hdcmi->Init.SyncroCode.LineEndCode << DCMI_ESCR_LEC_Pos) |\
((uint32_t)hdcmi->Init.SyncroCode.FrameEndCode << DCMI_ESCR_FEC_Pos));
}
@ -217,7 +208,7 @@ HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Deinitializes the DCMI peripheral registers to their default reset
* values.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL status
*/
@ -241,7 +232,7 @@ HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Initializes the DCMI MSP.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval None
*/
@ -257,7 +248,7 @@ __weak void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi)
/**
* @brief DeInitializes the DCMI MSP.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval None
*/
@ -293,11 +284,11 @@ __weak void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi)
/**
* @brief Enables DCMI DMA request and enables DCMI capture
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @param DCMI_Mode: DCMI capture mode snapshot or continuous grab.
* @param pData: The destination memory Buffer address (LCD Frame buffer).
* @param Length: The length of capture to be transferred.
* @param DCMI_Mode DCMI capture mode snapshot or continuous grab.
* @param pData The destination memory Buffer address (LCD Frame buffer).
* @param Length The length of capture to be transferred.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length)
@ -379,7 +370,7 @@ HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mo
/**
* @brief Disable DCMI DMA request and Disable DCMI capture
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL status
*/
@ -432,7 +423,7 @@ HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi)
/**
* @brief Suspend DCMI capture
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL status
*/
@ -478,7 +469,7 @@ HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi)
/**
* @brief Resume DCMI capture
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL status
*/
@ -504,7 +495,7 @@ HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi)
/**
* @brief Handles DCMI interrupt request.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for the DCMI.
* @retval None
*/
@ -589,7 +580,7 @@ void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Error DCMI callback.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval None
*/
@ -605,7 +596,7 @@ __weak void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Line Event callback.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval None
*/
@ -618,7 +609,7 @@ __weak void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi)
/**
* @brief VSYNC Event callback.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval None
*/
@ -634,7 +625,7 @@ __weak void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Frame Event callback.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval None
*/
@ -670,12 +661,12 @@ __weak void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Configure the DCMI CROP coordinate.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @param YSize: DCMI Line number
* @param XSize: DCMI Pixel per line
* @param X0: DCMI window X offset
* @param Y0: DCMI window Y offset
* @param YSize DCMI Line number
* @param XSize DCMI Pixel per line
* @param X0 DCMI window X offset
* @param Y0 DCMI window Y offset
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize)
@ -693,8 +684,8 @@ HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, ui
assert_param(IS_DCMI_WINDOW_COORDINATE(YSize));
/* Configure CROP */
hdcmi->Instance->CWSIZER = (XSize | (YSize << DCMI_POSITION_CWSIZE_VLINE));
hdcmi->Instance->CWSTRTR = (X0 | (Y0 << DCMI_POSITION_CWSTRT_VST));
hdcmi->Instance->CWSIZER = (XSize | (YSize << DCMI_CWSIZE_VLINE_Pos));
hdcmi->Instance->CWSTRTR = (X0 | (Y0 << DCMI_CWSTRT_VST_Pos));
/* Initialize the DCMI state*/
hdcmi->State = HAL_DCMI_STATE_READY;
@ -707,7 +698,7 @@ HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, ui
/**
* @brief Disable the Crop feature.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL status
*/
@ -733,7 +724,7 @@ HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Enable the Crop feature.
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL status
*/
@ -779,7 +770,7 @@ HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Return the DCMI state
* @param hdcmi: pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval HAL state
*/
@ -790,7 +781,7 @@ HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi)
/**
* @brief Return the DCMI error code
* @param hdcmi : pointer to a DCMI_HandleTypeDef structure that contains
* @param hdcmi pointer to a DCMI_HandleTypeDef structure that contains
* the configuration information for DCMI.
* @retval DCMI Error Code
*/
@ -808,7 +799,7 @@ uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi)
*/
/**
* @brief DMA conversion complete callback.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -865,7 +856,7 @@ static void DCMI_DMAXferCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA error callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/

30
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dcmi.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DCMI HAL module.
******************************************************************************
* @attention
@ -372,21 +370,21 @@ typedef struct
*/
/** @brief Reset DCMI handle state
* @param __HANDLE__: specifies the DCMI handle.
* @param __HANDLE__ specifies the DCMI handle.
* @retval None
*/
#define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
/**
* @brief Enable the DCMI.
* @param __HANDLE__: DCMI handle
* @param __HANDLE__ DCMI handle
* @retval None
*/
#define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
/**
* @brief Disable the DCMI.
* @param __HANDLE__: DCMI handle
* @param __HANDLE__ DCMI handle
* @retval None
*/
#define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
@ -394,8 +392,8 @@ typedef struct
/* Interrupt & Flag management */
/**
* @brief Get the DCMI pending flag.
* @param __HANDLE__: DCMI handle
* @param __FLAG__: Get the specified flag.
* @param __HANDLE__ DCMI handle
* @param __FLAG__ Get the specified flag.
* This parameter can be one of the following values (no combination allowed)
* @arg DCMI_FLAG_HSYNC: HSYNC pin state (active line / synchronization between lines)
* @arg DCMI_FLAG_VSYNC: VSYNC pin state (active frame / synchronization between frames)
@ -418,8 +416,8 @@ typedef struct
/**
* @brief Clear the DCMI pending flags.
* @param __HANDLE__: DCMI handle
* @param __FLAG__: specifies the flag to clear.
* @param __HANDLE__ DCMI handle
* @param __FLAG__ specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
* @arg DCMI_FLAG_OVFRI: Overflow flag mask
@ -432,8 +430,8 @@ typedef struct
/**
* @brief Enable the specified DCMI interrupts.
* @param __HANDLE__: DCMI handle
* @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
* @param __HANDLE__ DCMI handle
* @param __INTERRUPT__ specifies the DCMI interrupt sources to be enabled.
* This parameter can be any combination of the following values:
* @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
* @arg DCMI_IT_OVF: Overflow interrupt mask
@ -446,8 +444,8 @@ typedef struct
/**
* @brief Disable the specified DCMI interrupts.
* @param __HANDLE__: DCMI handle
* @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
* @param __HANDLE__ DCMI handle
* @param __INTERRUPT__ specifies the DCMI interrupt sources to be enabled.
* This parameter can be any combination of the following values:
* @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
* @arg DCMI_IT_OVF: Overflow interrupt mask
@ -460,8 +458,8 @@ typedef struct
/**
* @brief Check whether the specified DCMI interrupt has occurred or not.
* @param __HANDLE__: DCMI handle
* @param __INTERRUPT__: specifies the DCMI interrupt source to check.
* @param __HANDLE__ DCMI handle
* @param __INTERRUPT__ specifies the DCMI interrupt source to check.
* This parameter can be one of the following values:
* @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
* @arg DCMI_IT_OVF: Overflow interrupt mask
@ -505,8 +503,6 @@ void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
void HAL_DCMI_VsyncCallback(DCMI_HandleTypeDef *hdcmi);
void HAL_DCMI_HsyncCallback(DCMI_HandleTypeDef *hdcmi);
void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
/**
* @}

2
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dcmi_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Empty file; This file is no longer used to handle the Black&White
* feature. Its content is now moved to common files
* (stm32f7xx_hal_dcmi.c/.h) as there's no device's dependency within F7

2
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dcmi_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DCMI Extension HAL module.
******************************************************************************
* @attention

36
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_def.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief This file contains HAL common defines, enumeration, macros and
* structures definitions.
******************************************************************************
@ -48,6 +46,7 @@
#include "stm32f7xx.h"
#include "stm32_hal_legacy.h"
#include <stdio.h>
/* Exported types ------------------------------------------------------------*/
/**
@ -66,11 +65,14 @@ typedef enum
*/
typedef enum
{
HAL_UNLOCKED = 0x00,
HAL_LOCKED = 0x01
HAL_UNLOCKED = 0x00U,
HAL_LOCKED = 0x01U
} HAL_LockTypeDef;
/* Exported macro ------------------------------------------------------------*/
#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
#define HAL_MAX_DELAY 0xFFFFFFFFU
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET)
@ -82,10 +84,8 @@ typedef enum
(__DMA_HANDLE__).Parent = (__HANDLE__); \
} while(0)
#define UNUSED(x) ((void)(x))
/** @brief Reset the Handle's State field.
* @param __HANDLE__: specifies the Peripheral Handle.
* @param __HANDLE__ specifies the Peripheral Handle.
* @note This macro can be used for the following purpose:
* - When the Handle is declared as local variable; before passing it as parameter
* to HAL_PPP_Init() for the first time, it is mandatory to use this macro
@ -101,7 +101,7 @@ typedef enum
*/
#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
#if (USE_RTOS == 1)
#if (USE_RTOS == 1U)
/* Reserved for future use */
#error "USE_RTOS should be 0 in the current HAL release"
#else
@ -115,12 +115,12 @@ typedef enum
{ \
(__HANDLE__)->Lock = HAL_LOCKED; \
} \
}while (0)
}while (0U)
#define __HAL_UNLOCK(__HANDLE__) \
do{ \
(__HANDLE__)->Lock = HAL_UNLOCKED; \
}while (0)
}while (0U)
#endif /* USE_RTOS */
#if defined (__CC_ARM)
#pragma diag_suppress 3731
@ -156,7 +156,7 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
#if defined (__GNUC__) /* GNU Compiler */
#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
#ifndef __ALIGN_END
#define __ALIGN_END __attribute__ ((aligned (4)))
#endif /* __ALIGN_END */
@ -176,6 +176,14 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
#endif /* __ALIGN_BEGIN */
#endif /* __GNUC__ */
/* Macro to get variable aligned on 32-bytes,needed for cache maintenance purpose */
#if defined (__GNUC__) /* GNU Compiler */
#define ALIGN_32BYTES(buf) buf __attribute__ ((aligned (32)))
#elif defined (__ICCARM__) /* IAR Compiler */
#define ALIGN_32BYTES(buf) _Pragma("data_alignment=32") buf
#elif defined (__CC_ARM) /* ARM Compiler */
#define ALIGN_32BYTES(buf) __align(32) buf
#endif
/**
* @brief __RAM_FUNC definition
@ -190,14 +198,14 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
Available memory areas are declared in the 'Target' tab of the 'Options for Target'
dialog.
*/
#define __RAM_FUNC HAL_StatusTypeDef
#define __RAM_FUNC
#elif defined ( __ICCARM__ )
/* ICCARM Compiler
---------------
RAM functions are defined using a specific toolchain keyword "__ramfunc".
*/
#define __RAM_FUNC __ramfunc HAL_StatusTypeDef
#define __RAM_FUNC __ramfunc
#elif defined ( __GNUC__ )
/* GNU Compiler
@ -205,7 +213,7 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask)
RAM functions are defined using a specific toolchain attribute
"__attribute__((section(".RamFunc")))".
*/
#define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc")))
#define __RAM_FUNC __attribute__((section(".RamFunc")))
#endif

290
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dfsdm.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief This file provides firmware functions to manage the following
* functionalities of the Digital Filter for Sigma-Delta Modulators
* (DFSDM) peripherals:
@ -206,27 +204,9 @@
/** @defgroup DFSDM_Private_Define DFSDM Private Define
* @{
*/
#define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
#define DFSDM_CHAWSCDR_BKSCD_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_BKSCD)
#define DFSDM_CHAWSCDR_FOSR_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_AWFOSR)
#define DFSDM_CHCFGR2_OFFSET_OFFSET POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
#define DFSDM_CHCFGR2_DTRBS_OFFSET POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
#define DFSDM_FLTFCR_FOSR_OFFSET POSITION_VAL(DFSDM_FLTFCR_FOSR)
#define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
#define DFSDM_FLTCR2_EXCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_EXCH)
#define DFSDM_FLTCR2_AWDCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_AWDCH)
#define DFSDM_FLTISR_CKABF_OFFSET POSITION_VAL(DFSDM_FLTISR_CKABF)
#define DFSDM_FLTISR_SCDF_OFFSET POSITION_VAL(DFSDM_FLTISR_SCDF)
#define DFSDM_FLTICR_CLRCKABF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRCKABF)
#define DFSDM_FLTICR_CLRSCDF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRSCSDF)
#define DFSDM_FLTRDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTRDATAR_RDATA)
#define DFSDM_FLTJDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTJDATAR_JDATA)
#define DFSDM_FLTAWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWHTR_AWHT)
#define DFSDM_FLTAWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWLTR_AWLT)
#define DFSDM_FLTEXMAX_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMAX_EXMAX)
#define DFSDM_FLTEXMIN_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMIN_EXMIN)
#define DFSDM_FLTCNVTIMR_DATA_OFFSET POSITION_VAL(DFSDM_FLTCNVTIMR_CNVCNT)
#define DFSDM_FLTAWSR_HIGH_OFFSET POSITION_VAL(DFSDM_FLTAWSR_AWHTF)
#define DFSDM_MSB_MASK 0xFFFF0000U
#define DFSDM_LSB_MASK 0x0000FFFFU
#define DFSDM_CKAB_TIMEOUT 5000U
@ -287,7 +267,7 @@ static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
/**
* @brief Initialize the DFSDM channel according to the specified parameters
* in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status.
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -338,7 +318,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_chan
assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
/* Set the output clock divider */
DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) <<
DFSDM_CHCFGR1_CLK_DIV_OFFSET);
DFSDM_CHCFGR1_CKOUTDIV_Pos);
}
/* enable the DFSDM global interface */
@ -360,12 +340,12 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_chan
/* Set analog watchdog parameters */
hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_FOSR_OFFSET));
((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_AWFOSR_Pos));
/* Set channel offset and right bit shift */
hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) |
(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
/* Enable DFSDM channel */
hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
@ -381,7 +361,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_chan
/**
* @brief De-initialize the DFSDM channel.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status.
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -427,7 +407,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_ch
/**
* @brief Initialize the DFSDM channel MSP.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval None
*/
__weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -442,7 +422,7 @@ __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel
/**
* @brief De-initialize the DFSDM channel MSP.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval None
*/
__weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -481,7 +461,7 @@ __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_chann
* @note If clock is not available on this channel during 5 seconds,
* clock absence detection will not be activated and function
* will return HAL_TIMEOUT error.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -508,9 +488,9 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm
tickstart = HAL_GetTick();
/* Clear clock absence flag */
while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) != 0)
{
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
/* Check the Timeout */
if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
@ -533,8 +513,8 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm
/**
* @brief This function allows to poll for the clock absence detection.
* @param hdfsdm_channel : DFSDM channel handle.
* @param Timeout : Timeout value in milliseconds.
* @param hdfsdm_channel DFSDM channel handle.
* @param Timeout Timeout value in milliseconds.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
@ -561,7 +541,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfs
tickstart = HAL_GetTick();
/* Wait clock absence detection */
while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) == 0)
while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) == 0)
{
/* Check the Timeout */
if(Timeout != HAL_MAX_DELAY)
@ -575,7 +555,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfs
}
/* Clear clock absence detection flag */
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
/* Return function status */
return HAL_OK;
@ -584,7 +564,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfs
/**
* @brief This function allows to stop clock absence detection in polling mode.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -608,7 +588,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_
/* Clear clock absence flag */
channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
}
/* Return function status */
return status;
@ -620,7 +600,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_
* @note If clock is not available on this channel during 5 seconds,
* clock absence detection will not be activated and function
* will return HAL_TIMEOUT error.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -647,9 +627,9 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdf
tickstart = HAL_GetTick();
/* Clear clock absence flag */
while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) != 0)
{
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
/* Check the Timeout */
if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
@ -675,7 +655,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdf
/**
* @brief Clock absence detection callback.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval None
*/
__weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -691,7 +671,7 @@ __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_ch
/**
* @brief This function allows to stop clock absence detection in interrupt mode.
* @note Interrupt will be disabled for all channels
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -715,7 +695,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfs
/* Clear clock absence flag */
channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
/* Disable clock absence detection interrupt */
DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
@ -727,10 +707,10 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfs
/**
* @brief This function allows to start short circuit detection in polling mode.
* @note Same mode has to be used for all channels
* @param hdfsdm_channel : DFSDM channel handle.
* @param Threshold : Short circuit detector threshold.
* @param hdfsdm_channel DFSDM channel handle.
* @param Threshold Short circuit detector threshold.
* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
* @param BreakSignal : Break signals assigned to short circuit event.
* @param BreakSignal Break signals assigned to short circuit event.
* This parameter can be a values combination of @ref DFSDM_BreakSignals.
* @retval HAL status
*/
@ -755,7 +735,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_
{
/* Configure threshold and break signals */
hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
Threshold);
/* Start short circuit detection */
@ -767,8 +747,8 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_
/**
* @brief This function allows to poll for the short circuit detection.
* @param hdfsdm_channel : DFSDM channel handle.
* @param Timeout : Timeout value in milliseconds.
* @param hdfsdm_channel DFSDM channel handle.
* @param Timeout Timeout value in milliseconds.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
@ -795,7 +775,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsd
tickstart = HAL_GetTick();
/* Wait short circuit detection */
while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0)
while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0)
{
/* Check the Timeout */
if(Timeout != HAL_MAX_DELAY)
@ -809,7 +789,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsd
}
/* Clear short circuit detection flag */
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
/* Return function status */
return HAL_OK;
@ -818,7 +798,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsd
/**
* @brief This function allows to stop short circuit detection in polling mode.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -842,7 +822,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_c
/* Clear short circuit detection flag */
channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
}
/* Return function status */
return status;
@ -851,10 +831,10 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_c
/**
* @brief This function allows to start short circuit detection in interrupt mode.
* @note Same mode has to be used for all channels
* @param hdfsdm_channel : DFSDM channel handle.
* @param Threshold : Short circuit detector threshold.
* @param hdfsdm_channel DFSDM channel handle.
* @param Threshold Short circuit detector threshold.
* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
* @param BreakSignal : Break signals assigned to short circuit event.
* @param BreakSignal Break signals assigned to short circuit event.
* This parameter can be a values combination of @ref DFSDM_BreakSignals.
* @retval HAL status
*/
@ -882,7 +862,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfs
/* Configure threshold and break signals */
hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
Threshold);
/* Start short circuit detection */
@ -894,7 +874,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfs
/**
* @brief Short circuit detection callback.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval None
*/
__weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -910,7 +890,7 @@ __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_cha
/**
* @brief This function allows to stop short circuit detection in interrupt mode.
* @note Interrupt will be disabled for all channels
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -934,7 +914,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsd
/* Clear short circuit detection flag */
channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
/* Disable short circuit detection interrupt */
DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
@ -945,7 +925,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsd
/**
* @brief This function allows to get channel analog watchdog value.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval Channel analog watchdog value.
*/
int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -955,8 +935,8 @@ int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel
/**
* @brief This function allows to modify channel offset value.
* @param hdfsdm_channel : DFSDM channel handle.
* @param Offset : DFSDM channel offset.
* @param hdfsdm_channel DFSDM channel handle.
* @param Offset DFSDM channel offset.
* This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
* @retval HAL status.
*/
@ -979,7 +959,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdf
{
/* Modify channel offset */
hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
}
/* Return function status */
return status;
@ -1004,7 +984,7 @@ HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdf
/**
* @brief This function allows to get the current DFSDM channel handle state.
* @param hdfsdm_channel : DFSDM channel handle.
* @param hdfsdm_channel DFSDM channel handle.
* @retval DFSDM channel state.
*/
HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
@ -1034,7 +1014,7 @@ HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTyp
/**
* @brief Initialize the DFSDM filter according to the specified parameters
* in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status.
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1124,7 +1104,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter
/* Set filter parameters */
hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_OFFSET) |
((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_Pos) |
(hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
/* Store regular and injected triggers and injected scan mode*/
@ -1144,7 +1124,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter
/**
* @brief De-initializes the DFSDM filter.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status.
*/
HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1172,7 +1152,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filt
/**
* @brief Initializes the DFSDM filter MSP.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
__weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1187,7 +1167,7 @@ __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
/**
* @brief De-initializes the DFSDM filter MSP.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
__weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1221,10 +1201,10 @@ __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
/**
* @brief This function allows to select channel and to enable/disable
* continuous mode for regular conversion.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Channel : Channel for regular conversion.
* @param hdfsdm_filter DFSDM filter handle.
* @param Channel Channel for regular conversion.
* This parameter can be a value of @ref DFSDM_Channel_Selection.
* @param ContinuousMode : Enable/disable continuous mode for regular conversion.
* @param ContinuousMode Enable/disable continuous mode for regular conversion.
* This parameter can be a value of @ref DFSDM_ContinuousMode.
* @retval HAL status
*/
@ -1268,8 +1248,8 @@ HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *h
/**
* @brief This function allows to select channels for injected conversion.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Channel : Channels for injected conversion.
* @param hdfsdm_filter DFSDM filter handle.
* @param Channel Channels for injected conversion.
* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
* @retval HAL status
*/
@ -1340,7 +1320,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *h
* @brief This function allows to start regular conversion in polling mode.
* @note This function should be called only when DFSDM filter instance is
* in idle state or if injected conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1368,8 +1348,8 @@ HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsd
/**
* @brief This function allows to poll for the end of regular conversion.
* @note This function should be called only if regular conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Timeout : Timeout value in milliseconds.
* @param hdfsdm_filter DFSDM filter handle.
* @param Timeout Timeout value in milliseconds.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -1430,7 +1410,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDe
/**
* @brief This function allows to stop regular conversion in polling mode.
* @note This function should be called only if regular conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1460,7 +1440,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm
* @brief This function allows to start regular conversion in interrupt mode.
* @note This function should be called only when DFSDM filter instance is
* in idle state or if injected conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1491,7 +1471,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hd
/**
* @brief This function allows to stop regular conversion in interrupt mode.
* @note This function should be called only if regular conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1527,9 +1507,9 @@ HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdf
* Please note that data on buffer will contain signed regular conversion
* value on 24 most significant bits and corresponding channel on 3 least
* significant bits.
* @param hdfsdm_filter : DFSDM filter handle.
* @param pData : The destination buffer address.
* @param Length : The length of data to be transferred from DFSDM filter to memory.
* @param hdfsdm_filter DFSDM filter handle.
* @param pData The destination buffer address.
* @param Length The length of data to be transferred from DFSDM filter to memory.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -1604,9 +1584,9 @@ HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *h
* in idle state or if injected conversion is ongoing.
* Please note that data on buffer will contain signed 16 most significant
* bits of regular conversion.
* @param hdfsdm_filter : DFSDM filter handle.
* @param pData : The destination buffer address.
* @param Length : The length of data to be transferred from DFSDM filter to memory.
* @param hdfsdm_filter DFSDM filter handle.
* @param pData The destination buffer address.
* @param Length The length of data to be transferred from DFSDM filter to memory.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -1677,7 +1657,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef
/**
* @brief This function allows to stop regular conversion in DMA mode.
* @note This function should be called only if regular conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1715,8 +1695,8 @@ HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hd
/**
* @brief This function allows to get regular conversion value.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Channel : Corresponding channel of regular conversion.
* @param hdfsdm_filter DFSDM filter handle.
* @param Channel Corresponding channel of regular conversion.
* @retval Regular conversion value
*/
int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -1734,7 +1714,7 @@ int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filte
/* Extract channel and regular conversion value */
*Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
value = ((reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_DATA_OFFSET);
value = ((int32_t)(reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_RDATA_Pos);
/* return regular conversion value */
return value;
@ -1744,7 +1724,7 @@ int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filte
* @brief This function allows to start injected conversion in polling mode.
* @note This function should be called only when DFSDM filter instance is
* in idle state or if regular conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1772,8 +1752,8 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfs
/**
* @brief This function allows to poll for the end of injected conversion.
* @note This function should be called only if injected conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Timeout : Timeout value in milliseconds.
* @param hdfsdm_filter DFSDM filter handle.
* @param Timeout Timeout value in milliseconds.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -1844,7 +1824,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDe
/**
* @brief This function allows to stop injected conversion in polling mode.
* @note This function should be called only if injected conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1874,7 +1854,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsd
* @brief This function allows to start injected conversion in interrupt mode.
* @note This function should be called only when DFSDM filter instance is
* in idle state or if regular conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1905,7 +1885,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *h
/**
* @brief This function allows to stop injected conversion in interrupt mode.
* @note This function should be called only if injected conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -1941,9 +1921,9 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hd
* Please note that data on buffer will contain signed injected conversion
* value on 24 most significant bits and corresponding channel on 3 least
* significant bits.
* @param hdfsdm_filter : DFSDM filter handle.
* @param pData : The destination buffer address.
* @param Length : The length of data to be transferred from DFSDM filter to memory.
* @param hdfsdm_filter DFSDM filter handle.
* @param pData The destination buffer address.
* @param Length The length of data to be transferred from DFSDM filter to memory.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -2016,9 +1996,9 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *
* in idle state or if regular conversion is ongoing.
* Please note that data on buffer will contain signed 16 most significant
* bits of injected conversion.
* @param hdfsdm_filter : DFSDM filter handle.
* @param pData : The destination buffer address.
* @param Length : The length of data to be transferred from DFSDM filter to memory.
* @param hdfsdm_filter DFSDM filter handle.
* @param pData The destination buffer address.
* @param Length The length of data to be transferred from DFSDM filter to memory.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -2087,7 +2067,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDe
/**
* @brief This function allows to stop injected conversion in DMA mode.
* @note This function should be called only if injected conversion is ongoing.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2125,8 +2105,8 @@ HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *h
/**
* @brief This function allows to get injected conversion value.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Channel : Corresponding channel of injected conversion.
* @param hdfsdm_filter DFSDM filter handle.
* @param Channel Corresponding channel of injected conversion.
* @retval Injected conversion value
*/
int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -2144,7 +2124,7 @@ int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filt
/* Extract channel and injected conversion value */
*Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
value = ((reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_DATA_OFFSET);
value = ((int32_t)(reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_JDATA_Pos);
/* return regular conversion value */
return value;
@ -2152,8 +2132,8 @@ int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filt
/**
* @brief This function allows to start filter analog watchdog in interrupt mode.
* @param hdfsdm_filter : DFSDM filter handle.
* @param awdParam : DFSDM filter analog watchdog parameters.
* @param hdfsdm_filter DFSDM filter handle.
* @param awdParam DFSDM filter analog watchdog parameters.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -2185,15 +2165,15 @@ HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfs
/* Set thresholds and break signals */
hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_THRESHOLD_OFFSET) | \
hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
awdParam->HighBreakSignal);
hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_THRESHOLD_OFFSET) | \
hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
awdParam->LowBreakSignal);
/* Set channels and interrupt for analog watchdog */
hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_OFFSET) | \
hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
DFSDM_FLTCR2_AWDIE);
}
/* Return function status */
@ -2202,7 +2182,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfs
/**
* @brief This function allows to stop filter analog watchdog in interrupt mode.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2240,8 +2220,8 @@ HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_
/**
* @brief This function allows to start extreme detector feature.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Channel : Channels where extreme detector is enabled.
* @param hdfsdm_filter DFSDM filter handle.
* @param Channel Channels where extreme detector is enabled.
* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
* @retval HAL status
*/
@ -2265,7 +2245,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_fi
{
/* Set channels for extreme detector */
hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_OFFSET);
hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
}
/* Return function status */
return status;
@ -2273,7 +2253,7 @@ HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_fi
/**
* @brief This function allows to stop extreme detector feature.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2309,8 +2289,8 @@ HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_fil
/**
* @brief This function allows to get extreme detector maximum value.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Channel : Corresponding channel.
* @param hdfsdm_filter DFSDM filter handle.
* @param Channel Corresponding channel.
* @retval Extreme detector maximum value
* This value is between Min_Data = -8388608 and Max_Data = 8388607.
*/
@ -2329,7 +2309,7 @@ int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter
/* Extract channel and extreme detector maximum value */
*Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
value = ((reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_DATA_OFFSET);
value = ((int32_t)(reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_EXMAX_Pos);
/* return extreme detector maximum value */
return value;
@ -2337,8 +2317,8 @@ int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter
/**
* @brief This function allows to get extreme detector minimum value.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Channel : Corresponding channel.
* @param hdfsdm_filter DFSDM filter handle.
* @param Channel Corresponding channel.
* @retval Extreme detector minimum value
* This value is between Min_Data = -8388608 and Max_Data = 8388607.
*/
@ -2357,7 +2337,7 @@ int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter
/* Extract channel and extreme detector minimum value */
*Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
value = ((reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_DATA_OFFSET);
value = ((int32_t)(reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_EXMIN_Pos);
/* return extreme detector minimum value */
return value;
@ -2365,7 +2345,7 @@ int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter
/**
* @brief This function allows to get conversion time value.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval Conversion time value
* @note To get time in second, this value has to be divided by DFSDM clock frequency.
*/
@ -2381,7 +2361,7 @@ uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_fil
reg = hdfsdm_filter->Instance->FLTCNVTIMR;
/* Extract conversion time value */
value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_DATA_OFFSET);
value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
/* return extreme detector minimum value */
return value;
@ -2389,7 +2369,7 @@ uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_fil
/**
* @brief This function handles the DFSDM interrupts.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2478,7 +2458,7 @@ void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
{
reg = reg >> DFSDM_FLTAWSR_HIGH_OFFSET;
reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
}
while((reg & 1) == 0)
{
@ -2487,7 +2467,7 @@ void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
}
/* Clear analog watchdog flag */
hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
(1 << (DFSDM_FLTAWSR_HIGH_OFFSET + channel)) : \
(1 << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
(1 << channel);
/* Call analog watchdog callback */
@ -2501,7 +2481,7 @@ void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
uint32_t reg = 0;
uint32_t channel = 0;
reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
while(channel < DFSDM1_CHANNEL_NUMBER)
{
@ -2512,7 +2492,7 @@ void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
{
/* Clear clock absence flag */
hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
/* Call clock absence callback */
HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
@ -2531,7 +2511,7 @@ void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
uint32_t channel = 0;
/* Get channel */
reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
while((reg & 1) == 0)
{
channel++;
@ -2539,7 +2519,7 @@ void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
}
/* Clear short circuit detection flag */
hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
/* Call short circuit detection callback */
HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
@ -2550,7 +2530,7 @@ void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
* @brief Regular conversion complete callback.
* @note In interrupt mode, user has to read conversion value in this function
* using HAL_DFSDM_FilterGetRegularValue.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
__weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2565,7 +2545,7 @@ __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfs
/**
* @brief Half regular conversion complete callback.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
__weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2582,7 +2562,7 @@ __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *
* @brief Injected conversion complete callback.
* @note In interrupt mode, user has to read conversion value in this function
* using HAL_DFSDM_FilterGetInjectedValue.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
__weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2597,7 +2577,7 @@ __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfs
/**
* @brief Half injected conversion complete callback.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
__weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2612,9 +2592,9 @@ __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *
/**
* @brief Filter analog watchdog callback.
* @param hdfsdm_filter : DFSDM filter handle.
* @param Channel : Corresponding channel.
* @param Threshold : Low or high threshold has been reached.
* @param hdfsdm_filter DFSDM filter handle.
* @param Channel Corresponding channel.
* @param Threshold Low or high threshold has been reached.
* @retval None
*/
__weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
@ -2632,7 +2612,7 @@ __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filte
/**
* @brief Error callback.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
__weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2665,7 +2645,7 @@ __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_fil
/**
* @brief This function allows to get the current DFSDM filter handle state.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval DFSDM filter state.
*/
HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2676,7 +2656,7 @@ HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDe
/**
* @brief This function allows to get the current DFSDM filter error.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval DFSDM filter error code.
*/
uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
@ -2700,7 +2680,7 @@ uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
/**
* @brief DMA half transfer complete callback for regular conversion.
* @param hdma : DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
@ -2714,7 +2694,7 @@ static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA transfer complete callback for regular conversion.
* @param hdma : DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
@ -2728,7 +2708,7 @@ static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA half transfer complete callback for injected conversion.
* @param hdma : DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
@ -2742,7 +2722,7 @@ static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA transfer complete callback for injected conversion.
* @param hdma : DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
@ -2756,7 +2736,7 @@ static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA error callback.
* @param hdma : DMA handle.
* @param hdma DMA handle.
* @retval None
*/
static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
@ -2773,7 +2753,7 @@ static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
/**
* @brief This function allows to get the number of injected channels.
* @param Channels : bitfield of injected channels.
* @param Channels bitfield of injected channels.
* @retval Number of injected channels.
*/
static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
@ -2796,7 +2776,7 @@ static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
/**
* @brief This function allows to get the channel number from channel instance.
* @param Instance : DFSDM channel instance.
* @param Instance DFSDM channel instance.
* @retval Channel number.
*/
static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
@ -2842,7 +2822,7 @@ static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
/**
* @brief This function allows to really start regular conversion.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
@ -2883,7 +2863,7 @@ static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
/**
* @brief This function allows to really stop regular conversion.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
@ -2919,7 +2899,7 @@ static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
/**
* @brief This function allows to really start injected conversion.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
@ -2963,7 +2943,7 @@ static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
/**
* @brief This function allows to really stop injected conversion.
* @param hdfsdm_filter : DFSDM filter handle.
* @param hdfsdm_filter DFSDM filter handle.
* @retval None
*/
static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)

6
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dfsdm.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DFSDM HAL module.
******************************************************************************
* @attention
@ -462,13 +460,13 @@ typedef struct
*/
/** @brief Reset DFSDM channel handle state.
* @param __HANDLE__: DFSDM channel handle.
* @param __HANDLE__ DFSDM channel handle.
* @retval None
*/
#define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET)
/** @brief Reset DFSDM filter handle state.
* @param __HANDLE__: DFSDM filter handle.
* @param __HANDLE__ DFSDM filter handle.
* @retval None
*/
#define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET)

79
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dma.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief DMA HAL module driver.
*
* This file provides firmware functions to manage the following
@ -44,6 +42,7 @@
[..]
(+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
(+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
(+) Select Callbacks functions using HAL_DMA_RegisterCallback()
(+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
Source address and destination address and the Length of data to be transferred. In this
case the DMA interrupt is configured
@ -182,7 +181,7 @@ static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma);
/**
* @brief Initialize the DMA according to the specified
* parameters in the DMA_InitTypeDef and create the associated handle.
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
@ -321,7 +320,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
/**
* @brief DeInitializes the DMA peripheral
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
@ -372,10 +371,18 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
/* Clear all interrupt flags at correct offset within the register */
regs->IFCR = 0x3FU << hdma->StreamIndex;
/* Initialize the error code */
/* Clean all callbacks */
hdma->XferCpltCallback = NULL;
hdma->XferHalfCpltCallback = NULL;
hdma->XferM1CpltCallback = NULL;
hdma->XferM1HalfCpltCallback = NULL;
hdma->XferErrorCallback = NULL;
hdma->XferAbortCallback = NULL;
/* Reset the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
/* Initialize the DMA state */
/* Reset the DMA state */
hdma->State = HAL_DMA_STATE_RESET;
/* Release Lock */
@ -408,11 +415,11 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
/**
* @brief Starts the DMA Transfer.
* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress: The source memory Buffer address
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
@ -452,11 +459,11 @@ HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, ui
/**
* @brief Start the DMA Transfer with interrupt enabled.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress: The source memory Buffer address
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
@ -512,7 +519,7 @@ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress,
/**
* @brief Aborts the DMA Transfer.
* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
*
* @note After disabling a DMA Stream, a check for wait until the DMA Stream is
@ -585,7 +592,7 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
/**
* @brief Aborts the DMA Transfer in Interrupt mode.
* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
@ -610,13 +617,13 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
/**
* @brief Polling for transfer complete.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param CompleteLevel: Specifies the DMA level complete.
* @param CompleteLevel Specifies the DMA level complete.
* @note The polling mode is kept in this version for legacy. it is recommanded to use the IT model instead.
* This model could be used for debug purpose.
* @note The HAL_DMA_PollForTransfer API cannot be used in circular and double buffering mode (automatic circular mode).
* @param Timeout: Timeout duration.
* @param Timeout Timeout duration.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
@ -742,7 +749,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
}
else
{
/* Clear the half transfer and transfer complete flags */
/* Clear the half transfer flag */
regs->IFCR = (DMA_FLAG_HTIF0_4) << hdma->StreamIndex;
}
@ -751,7 +758,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
/**
* @brief Handles DMA interrupt request.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval None
*/
@ -968,11 +975,11 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/**
* @brief Register callbacks
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param CallbackID: User Callback identifer
* @param CallbackID User Callback identifer
* a DMA_HandleTypeDef structure as parameter.
* @param pCallback: pointer to private callbacsk function which has pointer to
* @param pCallback pointer to private callbacsk function which has pointer to
* a DMA_HandleTypeDef structure as parameter.
* @retval HAL status
*/
@ -1030,9 +1037,9 @@ HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_Call
/**
* @brief UnRegister callbacks
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param CallbackID: User Callback identifer
* @param CallbackID User Callback identifer
* a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
* @retval HAL status
*/
@ -1117,7 +1124,7 @@ HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_Ca
/**
* @brief Returns the DMA state.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL state
*/
@ -1128,7 +1135,7 @@ HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
/**
* @brief Return the DMA error code
* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval DMA Error Code
*/
@ -1151,11 +1158,11 @@ uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
/**
* @brief Sets the DMA Transfer parameter.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress: The source memory Buffer address
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
@ -1166,7 +1173,7 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t
/* Configure DMA Stream data length */
hdma->Instance->NDTR = DataLength;
/* Peripheral to Memory */
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
{
/* Configure DMA Stream destination address */
@ -1175,7 +1182,7 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t
/* Configure DMA Stream source address */
hdma->Instance->M0AR = SrcAddress;
}
/* Memory to Peripheral */
/* Peripheral to Memory */
else
{
/* Configure DMA Stream source address */
@ -1188,7 +1195,7 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t
/**
* @brief Returns the DMA Stream base address depending on stream number
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval Stream base address
*/
@ -1216,7 +1223,7 @@ static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
/**
* @brief Check compatibility between FIFO threshold level and size of the memory burst
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/

181
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dma.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DMA HAL module.
******************************************************************************
* @attention
@ -201,14 +199,14 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA Error Code
* @{
*/
#define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
#define HAL_DMA_ERROR_TE ((uint32_t)0x00000001U) /*!< Transfer error */
#define HAL_DMA_ERROR_FE ((uint32_t)0x00000002U) /*!< FIFO error */
#define HAL_DMA_ERROR_DME ((uint32_t)0x00000004U) /*!< Direct Mode error */
#define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
#define HAL_DMA_ERROR_PARAM ((uint32_t)0x00000040U) /*!< Parameter error */
#define HAL_DMA_ERROR_NO_XFER ((uint32_t)0x00000080U) /*!< Abort requested with no Xfer ongoing */
#define HAL_DMA_ERROR_NOT_SUPPORTED ((uint32_t)0x00000100U) /*!< Not supported mode */
#define HAL_DMA_ERROR_NONE 0x00000000U /*!< No error */
#define HAL_DMA_ERROR_TE 0x00000001U /*!< Transfer error */
#define HAL_DMA_ERROR_FE 0x00000002U /*!< FIFO error */
#define HAL_DMA_ERROR_DME 0x00000004U /*!< Direct Mode error */
#define HAL_DMA_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
#define HAL_DMA_ERROR_PARAM 0x00000040U /*!< Parameter error */
#define HAL_DMA_ERROR_NO_XFER 0x00000080U /*!< Abort requested with no Xfer ongoing */
#define HAL_DMA_ERROR_NOT_SUPPORTED 0x00000100U /*!< Not supported mode */
/**
* @}
*/
@ -217,9 +215,9 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA data transfer direction
* @{
*/
#define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000U) /*!< Peripheral to memory direction */
#define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_SxCR_DIR_0) /*!< Memory to peripheral direction */
#define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_SxCR_DIR_1) /*!< Memory to memory direction */
#define DMA_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */
#define DMA_MEMORY_TO_PERIPH DMA_SxCR_DIR_0 /*!< Memory to peripheral direction */
#define DMA_MEMORY_TO_MEMORY DMA_SxCR_DIR_1 /*!< Memory to memory direction */
/**
* @}
*/
@ -228,8 +226,8 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA peripheral incremented mode
* @{
*/
#define DMA_PINC_ENABLE ((uint32_t)DMA_SxCR_PINC) /*!< Peripheral increment mode enable */
#define DMA_PINC_DISABLE ((uint32_t)0x00000000U) /*!< Peripheral increment mode disable */
#define DMA_PINC_ENABLE DMA_SxCR_PINC /*!< Peripheral increment mode enable */
#define DMA_PINC_DISABLE 0x00000000U /*!< Peripheral increment mode disable */
/**
* @}
*/
@ -238,8 +236,8 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA memory incremented mode
* @{
*/
#define DMA_MINC_ENABLE ((uint32_t)DMA_SxCR_MINC) /*!< Memory increment mode enable */
#define DMA_MINC_DISABLE ((uint32_t)0x00000000U) /*!< Memory increment mode disable */
#define DMA_MINC_ENABLE DMA_SxCR_MINC /*!< Memory increment mode enable */
#define DMA_MINC_DISABLE 0x00000000U /*!< Memory increment mode disable */
/**
* @}
*/
@ -248,9 +246,9 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA peripheral data size
* @{
*/
#define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000U) /*!< Peripheral data alignment: Byte */
#define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_SxCR_PSIZE_0) /*!< Peripheral data alignment: HalfWord */
#define DMA_PDATAALIGN_WORD ((uint32_t)DMA_SxCR_PSIZE_1) /*!< Peripheral data alignment: Word */
#define DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment: Byte */
#define DMA_PDATAALIGN_HALFWORD DMA_SxCR_PSIZE_0 /*!< Peripheral data alignment: HalfWord */
#define DMA_PDATAALIGN_WORD DMA_SxCR_PSIZE_1 /*!< Peripheral data alignment: Word */
/**
* @}
*/
@ -259,9 +257,9 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA memory data size
* @{
*/
#define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000U) /*!< Memory data alignment: Byte */
#define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_SxCR_MSIZE_0) /*!< Memory data alignment: HalfWord */
#define DMA_MDATAALIGN_WORD ((uint32_t)DMA_SxCR_MSIZE_1) /*!< Memory data alignment: Word */
#define DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment: Byte */
#define DMA_MDATAALIGN_HALFWORD DMA_SxCR_MSIZE_0 /*!< Memory data alignment: HalfWord */
#define DMA_MDATAALIGN_WORD DMA_SxCR_MSIZE_1 /*!< Memory data alignment: Word */
/**
* @}
*/
@ -270,9 +268,9 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA mode
* @{
*/
#define DMA_NORMAL ((uint32_t)0x00000000U) /*!< Normal mode */
#define DMA_CIRCULAR ((uint32_t)DMA_SxCR_CIRC) /*!< Circular mode */
#define DMA_PFCTRL ((uint32_t)DMA_SxCR_PFCTRL) /*!< Peripheral flow control mode */
#define DMA_NORMAL 0x00000000U /*!< Normal mode */
#define DMA_CIRCULAR DMA_SxCR_CIRC /*!< Circular mode */
#define DMA_PFCTRL DMA_SxCR_PFCTRL /*!< Peripheral flow control mode */
/**
* @}
*/
@ -281,10 +279,10 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA priority levels
* @{
*/
#define DMA_PRIORITY_LOW ((uint32_t)0x00000000U) /*!< Priority level: Low */
#define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_SxCR_PL_0) /*!< Priority level: Medium */
#define DMA_PRIORITY_HIGH ((uint32_t)DMA_SxCR_PL_1) /*!< Priority level: High */
#define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_SxCR_PL) /*!< Priority level: Very High */
#define DMA_PRIORITY_LOW 0x00000000U /*!< Priority level: Low */
#define DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level: Medium */
#define DMA_PRIORITY_HIGH DMA_SxCR_PL_1 /*!< Priority level: High */
#define DMA_PRIORITY_VERY_HIGH DMA_SxCR_PL /*!< Priority level: Very High */
/**
* @}
*/
@ -293,8 +291,8 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA FIFO direct mode
* @{
*/
#define DMA_FIFOMODE_DISABLE ((uint32_t)0x00000000U) /*!< FIFO mode disable */
#define DMA_FIFOMODE_ENABLE ((uint32_t)DMA_SxFCR_DMDIS) /*!< FIFO mode enable */
#define DMA_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
#define DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode enable */
/**
* @}
*/
@ -303,10 +301,10 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA FIFO level
* @{
*/
#define DMA_FIFO_THRESHOLD_1QUARTERFULL ((uint32_t)0x00000000U) /*!< FIFO threshold 1 quart full configuration */
#define DMA_FIFO_THRESHOLD_HALFFULL ((uint32_t)DMA_SxFCR_FTH_0) /*!< FIFO threshold half full configuration */
#define DMA_FIFO_THRESHOLD_3QUARTERSFULL ((uint32_t)DMA_SxFCR_FTH_1) /*!< FIFO threshold 3 quarts full configuration */
#define DMA_FIFO_THRESHOLD_FULL ((uint32_t)DMA_SxFCR_FTH) /*!< FIFO threshold full configuration */
#define DMA_FIFO_THRESHOLD_1QUARTERFULL 0x00000000U /*!< FIFO threshold 1 quart full configuration */
#define DMA_FIFO_THRESHOLD_HALFFULL DMA_SxFCR_FTH_0 /*!< FIFO threshold half full configuration */
#define DMA_FIFO_THRESHOLD_3QUARTERSFULL DMA_SxFCR_FTH_1 /*!< FIFO threshold 3 quarts full configuration */
#define DMA_FIFO_THRESHOLD_FULL DMA_SxFCR_FTH /*!< FIFO threshold full configuration */
/**
* @}
*/
@ -315,10 +313,10 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA memory burst
* @{
*/
#define DMA_MBURST_SINGLE ((uint32_t)0x00000000U)
#define DMA_MBURST_INC4 ((uint32_t)DMA_SxCR_MBURST_0)
#define DMA_MBURST_INC8 ((uint32_t)DMA_SxCR_MBURST_1)
#define DMA_MBURST_INC16 ((uint32_t)DMA_SxCR_MBURST)
#define DMA_MBURST_SINGLE 0x00000000U
#define DMA_MBURST_INC4 DMA_SxCR_MBURST_0
#define DMA_MBURST_INC8 DMA_SxCR_MBURST_1
#define DMA_MBURST_INC16 DMA_SxCR_MBURST
/**
* @}
*/
@ -327,10 +325,10 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA peripheral burst
* @{
*/
#define DMA_PBURST_SINGLE ((uint32_t)0x00000000U)
#define DMA_PBURST_INC4 ((uint32_t)DMA_SxCR_PBURST_0)
#define DMA_PBURST_INC8 ((uint32_t)DMA_SxCR_PBURST_1)
#define DMA_PBURST_INC16 ((uint32_t)DMA_SxCR_PBURST)
#define DMA_PBURST_SINGLE 0x00000000U
#define DMA_PBURST_INC4 DMA_SxCR_PBURST_0
#define DMA_PBURST_INC8 DMA_SxCR_PBURST_1
#define DMA_PBURST_INC16 DMA_SxCR_PBURST
/**
* @}
*/
@ -339,11 +337,11 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA interrupts definition
* @{
*/
#define DMA_IT_TC ((uint32_t)DMA_SxCR_TCIE)
#define DMA_IT_HT ((uint32_t)DMA_SxCR_HTIE)
#define DMA_IT_TE ((uint32_t)DMA_SxCR_TEIE)
#define DMA_IT_DME ((uint32_t)DMA_SxCR_DMEIE)
#define DMA_IT_FE ((uint32_t)0x00000080U)
#define DMA_IT_TC DMA_SxCR_TCIE
#define DMA_IT_HT DMA_SxCR_HTIE
#define DMA_IT_TE DMA_SxCR_TEIE
#define DMA_IT_DME DMA_SxCR_DMEIE
#define DMA_IT_FE 0x00000080U
/**
* @}
*/
@ -352,26 +350,26 @@ typedef struct __DMA_HandleTypeDef
* @brief DMA flag definitions
* @{
*/
#define DMA_FLAG_FEIF0_4 ((uint32_t)0x00800001U)
#define DMA_FLAG_DMEIF0_4 ((uint32_t)0x00800004U)
#define DMA_FLAG_TEIF0_4 ((uint32_t)0x00000008U)
#define DMA_FLAG_HTIF0_4 ((uint32_t)0x00000010U)
#define DMA_FLAG_TCIF0_4 ((uint32_t)0x00000020U)
#define DMA_FLAG_FEIF1_5 ((uint32_t)0x00000040U)
#define DMA_FLAG_DMEIF1_5 ((uint32_t)0x00000100U)
#define DMA_FLAG_TEIF1_5 ((uint32_t)0x00000200U)
#define DMA_FLAG_HTIF1_5 ((uint32_t)0x00000400U)
#define DMA_FLAG_TCIF1_5 ((uint32_t)0x00000800U)
#define DMA_FLAG_FEIF2_6 ((uint32_t)0x00010000U)
#define DMA_FLAG_DMEIF2_6 ((uint32_t)0x00040000U)
#define DMA_FLAG_TEIF2_6 ((uint32_t)0x00080000U)
#define DMA_FLAG_HTIF2_6 ((uint32_t)0x00100000U)
#define DMA_FLAG_TCIF2_6 ((uint32_t)0x00200000U)
#define DMA_FLAG_FEIF3_7 ((uint32_t)0x00400000U)
#define DMA_FLAG_DMEIF3_7 ((uint32_t)0x01000000U)
#define DMA_FLAG_TEIF3_7 ((uint32_t)0x02000000U)
#define DMA_FLAG_HTIF3_7 ((uint32_t)0x04000000U)
#define DMA_FLAG_TCIF3_7 ((uint32_t)0x08000000U)
#define DMA_FLAG_FEIF0_4 0x00000001U
#define DMA_FLAG_DMEIF0_4 0x00000004U
#define DMA_FLAG_TEIF0_4 0x00000008U
#define DMA_FLAG_HTIF0_4 0x00000010U
#define DMA_FLAG_TCIF0_4 0x00000020U
#define DMA_FLAG_FEIF1_5 0x00000040U
#define DMA_FLAG_DMEIF1_5 0x00000100U
#define DMA_FLAG_TEIF1_5 0x00000200U
#define DMA_FLAG_HTIF1_5 0x00000400U
#define DMA_FLAG_TCIF1_5 0x00000800U
#define DMA_FLAG_FEIF2_6 0x00010000U
#define DMA_FLAG_DMEIF2_6 0x00040000U
#define DMA_FLAG_TEIF2_6 0x00080000U
#define DMA_FLAG_HTIF2_6 0x00100000U
#define DMA_FLAG_TCIF2_6 0x00200000U
#define DMA_FLAG_FEIF3_7 0x00400000U
#define DMA_FLAG_DMEIF3_7 0x01000000U
#define DMA_FLAG_TEIF3_7 0x02000000U
#define DMA_FLAG_HTIF3_7 0x04000000U
#define DMA_FLAG_TCIF3_7 0x08000000U
/**
* @}
*/
@ -383,14 +381,14 @@ typedef struct __DMA_HandleTypeDef
/* Exported macro ------------------------------------------------------------*/
/** @brief Reset DMA handle state
* @param __HANDLE__: specifies the DMA handle.
* @param __HANDLE__ specifies the DMA handle.
* @retval None
*/
#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
/**
* @brief Return the current DMA Stream FIFO filled level.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval The FIFO filling state.
* - DMA_FIFOStatus_Less1QuarterFull: when FIFO is less than 1 quarter-full
* and not empty.
@ -404,14 +402,14 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Enable the specified DMA Stream.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval None
*/
#define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA_SxCR_EN)
/**
* @brief Disable the specified DMA Stream.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval None
*/
#define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA_SxCR_EN)
@ -420,7 +418,7 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Return the current DMA Stream transfer complete flag.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval The specified transfer complete flag index.
*/
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
@ -440,7 +438,7 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Return the current DMA Stream half transfer complete flag.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval The specified half transfer complete flag index.
*/
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
@ -460,7 +458,7 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Return the current DMA Stream transfer error flag.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval The specified transfer error flag index.
*/
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
@ -480,7 +478,7 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Return the current DMA Stream FIFO error flag.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval The specified FIFO error flag index.
*/
#define __HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)\
@ -500,7 +498,7 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Return the current DMA Stream direct mode error flag.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval The specified direct mode error flag index.
*/
#define __HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)\
@ -520,8 +518,8 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Get the DMA Stream pending flags.
* @param __HANDLE__: DMA handle
* @param __FLAG__: Get the specified flag.
* @param __HANDLE__ DMA handle
* @param __FLAG__ Get the specified flag.
* This parameter can be any combination of the following values:
* @arg DMA_FLAG_TCIFx: Transfer complete flag.
* @arg DMA_FLAG_HTIFx: Half transfer complete flag.
@ -538,8 +536,8 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Clear the DMA Stream pending flags.
* @param __HANDLE__: DMA handle
* @param __FLAG__: specifies the flag to clear.
* @param __HANDLE__ DMA handle
* @param __FLAG__ specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg DMA_FLAG_TCIFx: Transfer complete flag.
* @arg DMA_FLAG_HTIFx: Half transfer complete flag.
@ -556,8 +554,8 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Enable the specified DMA Stream interrupts.
* @param __HANDLE__: DMA handle
* @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
* @param __HANDLE__ DMA handle
* @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask.
* @arg DMA_IT_HT: Half transfer complete interrupt mask.
@ -571,8 +569,8 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Disable the specified DMA Stream interrupts.
* @param __HANDLE__: DMA handle
* @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
* @param __HANDLE__ DMA handle
* @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask.
* @arg DMA_IT_HT: Half transfer complete interrupt mask.
@ -586,8 +584,8 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Check whether the specified DMA Stream interrupt is enabled or not.
* @param __HANDLE__: DMA handle
* @param __INTERRUPT__: specifies the DMA interrupt source to check.
* @param __HANDLE__ DMA handle
* @param __INTERRUPT__ specifies the DMA interrupt source to check.
* This parameter can be one of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask.
* @arg DMA_IT_HT: Half transfer complete interrupt mask.
@ -602,8 +600,8 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Writes the number of data units to be transferred on the DMA Stream.
* @param __HANDLE__: DMA handle
* @param __COUNTER__: Number of data units to be transferred (from 0 to 65535)
* @param __HANDLE__ DMA handle
* @param __COUNTER__ Number of data units to be transferred (from 0 to 65535)
* Number of data items depends only on the Peripheral data format.
*
* @note If Peripheral data format is Bytes: number of data units is equal
@ -621,7 +619,7 @@ typedef struct __DMA_HandleTypeDef
/**
* @brief Returns the number of remaining data units in the current DMAy Streamx transfer.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
*
* @retval The number of remaining data units in the current DMA Stream transfer.
*/
@ -658,7 +656,6 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout);
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_CleanCallbacks(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)(DMA_HandleTypeDef *_hdma));
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);

192
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dma2d.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief DMA2D HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the DMA2D peripheral:
@ -155,36 +153,6 @@
* @}
*/
/** @defgroup DMA2D_Shifts DMA2D Shifts
* @{
*/
#define DMA2D_POSITION_FGPFCCR_CS (uint32_t)POSITION_VAL(DMA2D_FGPFCCR_CS) /*!< Required left shift to set foreground CLUT size */
#define DMA2D_POSITION_BGPFCCR_CS (uint32_t)POSITION_VAL(DMA2D_BGPFCCR_CS) /*!< Required left shift to set background CLUT size */
#define DMA2D_POSITION_FGPFCCR_CCM (uint32_t)POSITION_VAL(DMA2D_FGPFCCR_CCM) /*!< Required left shift to set foreground CLUT color mode */
#define DMA2D_POSITION_BGPFCCR_CCM (uint32_t)POSITION_VAL(DMA2D_BGPFCCR_CCM) /*!< Required left shift to set background CLUT color mode */
#define DMA2D_POSITION_OPFCCR_AI (uint32_t)POSITION_VAL(DMA2D_OPFCCR_AI) /*!< Required left shift to set output alpha inversion */
#define DMA2D_POSITION_FGPFCCR_AI (uint32_t)POSITION_VAL(DMA2D_FGPFCCR_AI) /*!< Required left shift to set foreground alpha inversion */
#define DMA2D_POSITION_BGPFCCR_AI (uint32_t)POSITION_VAL(DMA2D_BGPFCCR_AI) /*!< Required left shift to set background alpha inversion */
#define DMA2D_POSITION_OPFCCR_RBS (uint32_t)POSITION_VAL(DMA2D_OPFCCR_RBS) /*!< Required left shift to set output Red/Blue swap */
#define DMA2D_POSITION_FGPFCCR_RBS (uint32_t)POSITION_VAL(DMA2D_FGPFCCR_RBS) /*!< Required left shift to set foreground Red/Blue swap */
#define DMA2D_POSITION_BGPFCCR_RBS (uint32_t)POSITION_VAL(DMA2D_BGPFCCR_RBS) /*!< Required left shift to set background Red/Blue swap */
#define DMA2D_POSITION_AMTCR_DT (uint32_t)POSITION_VAL(DMA2D_AMTCR_DT) /*!< Required left shift to set deadtime value */
#define DMA2D_POSITION_FGPFCCR_AM (uint32_t)POSITION_VAL(DMA2D_FGPFCCR_AM) /*!< Required left shift to set foreground alpha mode */
#define DMA2D_POSITION_BGPFCCR_AM (uint32_t)POSITION_VAL(DMA2D_BGPFCCR_AM) /*!< Required left shift to set background alpha mode */
#define DMA2D_POSITION_FGPFCCR_ALPHA (uint32_t)POSITION_VAL(DMA2D_FGPFCCR_ALPHA) /*!< Required left shift to set foreground alpha value */
#define DMA2D_POSITION_BGPFCCR_ALPHA (uint32_t)POSITION_VAL(DMA2D_BGPFCCR_ALPHA) /*!< Required left shift to set background alpha value */
#define DMA2D_POSITION_NLR_PL (uint32_t)POSITION_VAL(DMA2D_NLR_PL) /*!< Required left shift to set pixels per lines value */
/**
* @}
*/
/**
* @}
*/
@ -225,7 +193,7 @@ static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_
/**
* @brief Initialize the DMA2D according to the specified
* parameters in the DMA2D_InitTypeDef and create the associated handle.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval HAL status
*/
@ -265,11 +233,11 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
#if defined (DMA2D_OPFCCR_AI)
/* DMA2D OPFCCR AI fields setting (Output Alpha Inversion)*/
MODIFY_REG(hdma2d->Instance->OPFCCR, DMA2D_OPFCCR_AI, (hdma2d->Init.AlphaInverted << DMA2D_POSITION_OPFCCR_AI));
MODIFY_REG(hdma2d->Instance->OPFCCR, DMA2D_OPFCCR_AI, (hdma2d->Init.AlphaInverted << DMA2D_OPFCCR_AI_Pos));
#endif /* DMA2D_OPFCCR_AI */
#if defined (DMA2D_OPFCCR_RBS)
MODIFY_REG(hdma2d->Instance->OPFCCR, DMA2D_OPFCCR_RBS,(hdma2d->Init.RedBlueSwap << DMA2D_POSITION_OPFCCR_RBS));
MODIFY_REG(hdma2d->Instance->OPFCCR, DMA2D_OPFCCR_RBS,(hdma2d->Init.RedBlueSwap << DMA2D_OPFCCR_RBS_Pos));
#endif /* DMA2D_OPFCCR_RBS */
@ -285,7 +253,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Deinitializes the DMA2D peripheral registers to their default reset
* values.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval None
*/
@ -364,7 +332,7 @@ HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Initializes the DMA2D MSP.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval None
*/
@ -380,7 +348,7 @@ __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
/**
* @brief DeInitializes the DMA2D MSP.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval None
*/
@ -436,15 +404,15 @@ __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
/**
* @brief Start the DMA2D Transfer.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param pdata: Configure the source memory Buffer address if
* @param pdata Configure the source memory Buffer address if
* Memory-to-Memory or Memory-to-Memory with pixel format
* conversion mode is selected, or configure
* the color value if Register-to-Memory mode is selected.
* @param DstAddress: The destination memory Buffer address.
* @param Width: The width of data to be transferred from source to destination (expressed in number of pixels per line).
* @param Height: The height of data to be transferred from source to destination (expressed in number of lines).
* @param DstAddress The destination memory Buffer address.
* @param Width The width of data to be transferred from source to destination (expressed in number of pixels per line).
* @param Height The height of data to be transferred from source to destination (expressed in number of lines).
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
@ -470,15 +438,15 @@ HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, u
/**
* @brief Start the DMA2D Transfer with interrupt enabled.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param pdata: Configure the source memory Buffer address if
* @param pdata Configure the source memory Buffer address if
* the Memory-to-Memory or Memory-to-Memory with pixel format
* conversion mode is selected, or configure
* the color value if Register-to-Memory mode is selected.
* @param DstAddress: The destination memory Buffer address.
* @param Width: The width of data to be transferred from source to destination (expressed in number of pixels per line).
* @param Height: The height of data to be transferred from source to destination (expressed in number of lines).
* @param DstAddress The destination memory Buffer address.
* @param Width The width of data to be transferred from source to destination (expressed in number of pixels per line).
* @param Height The height of data to be transferred from source to destination (expressed in number of lines).
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
@ -507,13 +475,13 @@ HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata
/**
* @brief Start the multi-source DMA2D Transfer.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param SrcAddress1: The source memory Buffer address for the foreground layer.
* @param SrcAddress2: The source memory Buffer address for the background layer.
* @param DstAddress: The destination memory Buffer address.
* @param Width: The width of data to be transferred from source to destination (expressed in number of pixels per line).
* @param Height: The height of data to be transferred from source to destination (expressed in number of lines).
* @param SrcAddress1 The source memory Buffer address for the foreground layer.
* @param SrcAddress2 The source memory Buffer address for the background layer.
* @param DstAddress The destination memory Buffer address.
* @param Width The width of data to be transferred from source to destination (expressed in number of pixels per line).
* @param Height The height of data to be transferred from source to destination (expressed in number of lines).
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
@ -542,13 +510,13 @@ HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t
/**
* @brief Start the multi-source DMA2D Transfer with interrupt enabled.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param SrcAddress1: The source memory Buffer address for the foreground layer.
* @param SrcAddress2: The source memory Buffer address for the background layer.
* @param DstAddress: The destination memory Buffer address.
* @param Width: The width of data to be transferred from source to destination (expressed in number of pixels per line).
* @param Height: The height of data to be transferred from source to destination (expressed in number of lines).
* @param SrcAddress1 The source memory Buffer address for the foreground layer.
* @param SrcAddress2 The source memory Buffer address for the background layer.
* @param DstAddress The destination memory Buffer address.
* @param Width The width of data to be transferred from source to destination (expressed in number of pixels per line).
* @param Height The height of data to be transferred from source to destination (expressed in number of lines).
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
@ -580,7 +548,7 @@ HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32
/**
* @brief Abort the DMA2D Transfer.
* @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval HAL status
*/
@ -629,7 +597,7 @@ HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Suspend the DMA2D Transfer.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval HAL status
*/
@ -679,7 +647,7 @@ HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Resume the DMA2D Transfer.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval HAL status
*/
@ -704,9 +672,9 @@ HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Enable the DMA2D CLUT Transfer.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param LayerIdx: DMA2D Layer index.
* @param LayerIdx DMA2D Layer index.
* This parameter can be one of the following values:
* 0(background) / 1(foreground)
* @retval HAL status
@ -739,11 +707,11 @@ HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t Lay
/**
* @brief Start DMA2D CLUT Loading.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param CLUTCfg: Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
* @param CLUTCfg Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
* the configuration information for the color look up table.
* @param LayerIdx: DMA2D Layer index.
* @param LayerIdx DMA2D Layer index.
* This parameter can be one of the following values:
* 0(background) / 1(foreground)
* @note Invoking this API is similar to calling HAL_DMA2D_ConfigCLUT() then HAL_DMA2D_EnableCLUT().
@ -770,7 +738,7 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgT
/* Write background CLUT size and CLUT color mode */
MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
((CLUTCfg.Size << DMA2D_POSITION_BGPFCCR_CS) | (CLUTCfg.CLUTColorMode << DMA2D_POSITION_BGPFCCR_CCM)));
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
/* Enable the CLUT loading for the background */
SET_BIT(hdma2d->Instance->BGPFCCR, DMA2D_BGPFCCR_START);
@ -783,7 +751,7 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgT
/* Write foreground CLUT size and CLUT color mode */
MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
((CLUTCfg.Size << DMA2D_POSITION_BGPFCCR_CS) | (CLUTCfg.CLUTColorMode << DMA2D_POSITION_FGPFCCR_CCM)));
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
/* Enable the CLUT loading for the foreground */
SET_BIT(hdma2d->Instance->FGPFCCR, DMA2D_FGPFCCR_START);
@ -794,11 +762,11 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgT
/**
* @brief Start DMA2D CLUT Loading with interrupt enabled.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param CLUTCfg: Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
* @param CLUTCfg Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
* the configuration information for the color look up table.
* @param LayerIdx: DMA2D Layer index.
* @param LayerIdx DMA2D Layer index.
* This parameter can be one of the following values:
* 0(background) / 1(foreground)
* @retval HAL status
@ -824,7 +792,7 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTC
/* Write background CLUT size and CLUT color mode */
MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
((CLUTCfg.Size << DMA2D_POSITION_BGPFCCR_CS) | (CLUTCfg.CLUTColorMode << DMA2D_POSITION_BGPFCCR_CCM)));
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
/* Enable the CLUT Transfer Complete, transfer Error, configuration Error and CLUT Access Error interrupts */
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CTC | DMA2D_IT_TE | DMA2D_IT_CE |DMA2D_IT_CAE);
@ -840,7 +808,7 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTC
/* Write foreground CLUT size and CLUT color mode */
MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
((CLUTCfg.Size << DMA2D_POSITION_BGPFCCR_CS) | (CLUTCfg.CLUTColorMode << DMA2D_POSITION_FGPFCCR_CCM)));
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
/* Enable the CLUT Transfer Complete, transfer Error, configuration Error and CLUT Access Error interrupts */
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CTC | DMA2D_IT_TE | DMA2D_IT_CE |DMA2D_IT_CAE);
@ -854,9 +822,9 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTC
/**
* @brief Abort the DMA2D CLUT loading.
* @param hdma2d : Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param LayerIdx: DMA2D Layer index.
* @param LayerIdx DMA2D Layer index.
* This parameter can be one of the following values:
* 0(background) / 1(foreground)
* @retval HAL status
@ -911,9 +879,9 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint3
/**
* @brief Suspend the DMA2D CLUT loading.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param LayerIdx: DMA2D Layer index.
* @param LayerIdx DMA2D Layer index.
* This parameter can be one of the following values:
* 0(background) / 1(foreground)
* @retval HAL status
@ -968,9 +936,9 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uin
/**
* @brief Resume the DMA2D CLUT loading.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param LayerIdx: DMA2D Layer index.
* @param LayerIdx DMA2D Layer index.
* This parameter can be one of the following values:
* 0(background) / 1(foreground)
* @retval HAL status
@ -1009,9 +977,9 @@ HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint
/**
* @brief Polling for transfer complete or CLUT loading.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param Timeout: Timeout duration
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
@ -1136,7 +1104,7 @@ HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_
}
/**
* @brief Handle DMA2D interrupt request.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval HAL status
*/
@ -1297,7 +1265,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Transfer watermark callback.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval None
*/
@ -1313,7 +1281,7 @@ __weak void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief CLUT Transfer Complete callback.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval None
*/
@ -1353,9 +1321,9 @@ __weak void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Configure the DMA2D Layer according to the specified
* parameters in the DMA2D_InitTypeDef and create the associated handle.
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param LayerIdx: DMA2D Layer index.
* @param LayerIdx DMA2D Layer index.
* This parameter can be one of the following values:
* 0(background) / 1(foreground)
* @retval HAL status
@ -1387,16 +1355,16 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t La
/* DMA2D BGPFCR register configuration -----------------------------------*/
/* Prepare the value to be written to the BGPFCCR register */
regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_POSITION_BGPFCCR_AM);
regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos);
regMask = DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA;
#if defined (DMA2D_FGPFCCR_AI) && defined (DMA2D_BGPFCCR_AI)
regValue |= (pLayerCfg->AlphaInverted << DMA2D_POSITION_BGPFCCR_AI);
regValue |= (pLayerCfg->AlphaInverted << DMA2D_BGPFCCR_AI_Pos);
regMask |= DMA2D_BGPFCCR_AI;
#endif /* (DMA2D_FGPFCCR_AI) && (DMA2D_BGPFCCR_AI) */
#if defined (DMA2D_FGPFCCR_RBS) && defined (DMA2D_BGPFCCR_RBS)
regValue |= (pLayerCfg->RedBlueSwap << DMA2D_POSITION_BGPFCCR_RBS);
regValue |= (pLayerCfg->RedBlueSwap << DMA2D_BGPFCCR_RBS_Pos);
regMask |= DMA2D_BGPFCCR_RBS;
#endif
@ -1406,7 +1374,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t La
}
else
{
regValue |= (pLayerCfg->InputAlpha << DMA2D_POSITION_BGPFCCR_ALPHA);
regValue |= (pLayerCfg->InputAlpha << DMA2D_BGPFCCR_ALPHA_Pos);
}
/* Configure the background DMA2D layer */
@ -1450,11 +1418,11 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t La
/**
* @brief Configure the DMA2D CLUT Transfer.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param CLUTCfg: Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
* @param CLUTCfg Pointer to a DMA2D_CLUTCfgTypeDef structure that contains
* the configuration information for the color look up table.
* @param LayerIdx: DMA2D Layer index.
* @param LayerIdx DMA2D Layer index.
* This parameter can be one of the following values:
* 0(background) / 1(foreground)
* @retval HAL status
@ -1480,7 +1448,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCf
/* Write background CLUT size and CLUT color mode */
MODIFY_REG(hdma2d->Instance->BGPFCCR, (DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM),
((CLUTCfg.Size << DMA2D_POSITION_BGPFCCR_CS) | (CLUTCfg.CLUTColorMode << DMA2D_POSITION_BGPFCCR_CCM)));
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_BGPFCCR_CCM_Pos)));
}
/* Configure the CLUT of the foreground DMA2D layer */
else
@ -1490,7 +1458,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCf
/* Write foreground CLUT size and CLUT color mode */
MODIFY_REG(hdma2d->Instance->FGPFCCR, (DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM),
((CLUTCfg.Size << DMA2D_POSITION_BGPFCCR_CS) | (CLUTCfg.CLUTColorMode << DMA2D_POSITION_FGPFCCR_CCM)));
((CLUTCfg.Size << DMA2D_BGPFCCR_CS_Pos) | (CLUTCfg.CLUTColorMode << DMA2D_FGPFCCR_CCM_Pos)));
}
/* Set the DMA2D state to Ready*/
@ -1505,9 +1473,9 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCf
/**
* @brief Configure the line watermark.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @param Line: Line Watermark configuration (maximum 16-bit long value expected).
* @param Line Line Watermark configuration (maximum 16-bit long value expected).
* @note HAL_DMA2D_ProgramLineEvent() API enables the transfer watermark interrupt.
* @note The transfer watermark interrupt is disabled once it has occurred.
* @retval HAL status
@ -1548,7 +1516,7 @@ HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32
/**
* @brief Enable DMA2D dead time feature.
* @param hdma2d: DMA2D handle.
* @param hdma2d DMA2D handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d)
@ -1571,7 +1539,7 @@ HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Disable DMA2D dead time feature.
* @param hdma2d: DMA2D handle.
* @param hdma2d DMA2D handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d)
@ -1596,8 +1564,8 @@ HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d)
* @brief Configure dead time.
* @note The dead time value represents the guaranteed minimum number of cycles between
* two consecutive transactions on the AHB bus.
* @param hdma2d: DMA2D handle.
* @param DeadTime: dead time value.
* @param hdma2d DMA2D handle.
* @param DeadTime dead time value.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime)
@ -1608,7 +1576,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t
hdma2d->State = HAL_DMA2D_STATE_BUSY;
/* Set DMA2D_AMTCR DT field */
MODIFY_REG(hdma2d->Instance->AMTCR, DMA2D_AMTCR_DT, (((uint32_t) DeadTime) << DMA2D_POSITION_AMTCR_DT));
MODIFY_REG(hdma2d->Instance->AMTCR, DMA2D_AMTCR_DT, (((uint32_t) DeadTime) << DMA2D_AMTCR_DT_Pos));
hdma2d->State = HAL_DMA2D_STATE_READY;
@ -1641,7 +1609,7 @@ HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t
/**
* @brief Return the DMA2D state
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the DMA2D.
* @retval HAL state
*/
@ -1652,7 +1620,7 @@ HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Return the DMA2D error code
* @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for DMA2D.
* @retval DMA2D Error Code
*/
@ -1676,12 +1644,12 @@ uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
/**
* @brief Set the DMA2D transfer parameters.
* @param hdma2d: Pointer to a DMA2D_HandleTypeDef structure that contains
* @param hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
* the configuration information for the specified DMA2D.
* @param pdata: The source memory Buffer address
* @param DstAddress: The destination memory Buffer address
* @param Width: The width of data to be transferred from source to destination.
* @param Height: The height of data to be transferred from source to destination.
* @param pdata The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param Width The width of data to be transferred from source to destination.
* @param Height The height of data to be transferred from source to destination.
* @retval HAL status
*/
static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
@ -1693,7 +1661,7 @@ static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_
uint32_t tmp4 = 0;
/* Configure DMA2D data size */
MODIFY_REG(hdma2d->Instance->NLR, (DMA2D_NLR_NL|DMA2D_NLR_PL), (Height| (Width << DMA2D_POSITION_NLR_PL)));
MODIFY_REG(hdma2d->Instance->NLR, (DMA2D_NLR_NL|DMA2D_NLR_PL), (Height| (Width << DMA2D_NLR_PL_Pos)));
/* Configure DMA2D destination address */
WRITE_REG(hdma2d->Instance->OMAR, DstAddress);

26
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dma2d.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DMA2D HAL module.
******************************************************************************
* @attention
@ -343,14 +341,14 @@ typedef struct __DMA2D_HandleTypeDef
*/
/** @brief Reset DMA2D handle state
* @param __HANDLE__: specifies the DMA2D handle.
* @param __HANDLE__ specifies the DMA2D handle.
* @retval None
*/
#define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
/**
* @brief Enable the DMA2D.
* @param __HANDLE__: DMA2D handle
* @param __HANDLE__ DMA2D handle
* @retval None.
*/
#define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
@ -359,8 +357,8 @@ typedef struct __DMA2D_HandleTypeDef
/* Interrupt & Flag management */
/**
* @brief Get the DMA2D pending flags.
* @param __HANDLE__: DMA2D handle
* @param __FLAG__: flag to check.
* @param __HANDLE__ DMA2D handle
* @param __FLAG__ flag to check.
* This parameter can be any combination of the following values:
* @arg DMA2D_FLAG_CE: Configuration error flag
* @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
@ -374,8 +372,8 @@ typedef struct __DMA2D_HandleTypeDef
/**
* @brief Clear the DMA2D pending flags.
* @param __HANDLE__: DMA2D handle
* @param __FLAG__: specifies the flag to clear.
* @param __HANDLE__ DMA2D handle
* @param __FLAG__ specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg DMA2D_FLAG_CE: Configuration error flag
* @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
@ -389,8 +387,8 @@ typedef struct __DMA2D_HandleTypeDef
/**
* @brief Enable the specified DMA2D interrupts.
* @param __HANDLE__: DMA2D handle
* @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
* @param __HANDLE__ DMA2D handle
* @param __INTERRUPT__ specifies the DMA2D interrupt sources to be enabled.
* This parameter can be any combination of the following values:
* @arg DMA2D_IT_CE: Configuration error interrupt mask
* @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
@ -404,8 +402,8 @@ typedef struct __DMA2D_HandleTypeDef
/**
* @brief Disable the specified DMA2D interrupts.
* @param __HANDLE__: DMA2D handle
* @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
* @param __HANDLE__ DMA2D handle
* @param __INTERRUPT__ specifies the DMA2D interrupt sources to be disabled.
* This parameter can be any combination of the following values:
* @arg DMA2D_IT_CE: Configuration error interrupt mask
* @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
@ -419,8 +417,8 @@ typedef struct __DMA2D_HandleTypeDef
/**
* @brief Check whether the specified DMA2D interrupt source is enabled or not.
* @param __HANDLE__: DMA2D handle
* @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
* @param __HANDLE__ DMA2D handle
* @param __INTERRUPT__ specifies the DMA2D interrupt source to check.
* This parameter can be one of the following values:
* @arg DMA2D_IT_CE: Configuration error interrupt mask
* @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask

36
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dma_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief DMA Extension HAL module driver
* This file provides firmware functions to manage the following
* functionalities of the DMA Extension peripheral:
@ -110,12 +108,12 @@ static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddres
/**
* @brief Starts the multi_buffer DMA Transfer.
* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress: The source memory Buffer address
* @param DstAddress: The destination memory Buffer address
* @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
* @param DataLength: The length of data to be transferred from source to destination
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
@ -164,12 +162,12 @@ HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t S
/**
* @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress: The source memory Buffer address
* @param DstAddress: The destination memory Buffer address
* @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
* @param DataLength: The length of data to be transferred from source to destination
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
@ -238,10 +236,10 @@ HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_
/**
* @brief Change the memory0 or memory1 address on the fly.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param Address: The new address
* @param memory: the memory to be changed, This parameter can be one of
* @param Address The new address
* @param memory the memory to be changed, This parameter can be one of
* the following values:
* MEMORY0 /
* MEMORY1
@ -280,11 +278,11 @@ HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Addre
/**
* @brief Set the DMA Transfer parameter.
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @param SrcAddress: The source memory Buffer address
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @param SrcAddress The source memory Buffer address
* @param DstAddress The destination memory Buffer address
* @param DataLength The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)

34
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dma_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DMA HAL extension module.
******************************************************************************
* @attention
@ -85,25 +83,25 @@ typedef enum
* @brief DMAEx channel selection
* @{
*/
#define DMA_CHANNEL_0 ((uint32_t)0x00000000U) /*!< DMA Channel 0 */
#define DMA_CHANNEL_1 ((uint32_t)0x02000000U) /*!< DMA Channel 1 */
#define DMA_CHANNEL_2 ((uint32_t)0x04000000U) /*!< DMA Channel 2 */
#define DMA_CHANNEL_3 ((uint32_t)0x06000000U) /*!< DMA Channel 3 */
#define DMA_CHANNEL_4 ((uint32_t)0x08000000U) /*!< DMA Channel 4 */
#define DMA_CHANNEL_5 ((uint32_t)0x0A000000U) /*!< DMA Channel 5 */
#define DMA_CHANNEL_6 ((uint32_t)0x0C000000U) /*!< DMA Channel 6 */
#define DMA_CHANNEL_7 ((uint32_t)0x0E000000U) /*!< DMA Channel 7 */
#define DMA_CHANNEL_0 0x00000000U /*!< DMA Channel 0 */
#define DMA_CHANNEL_1 0x02000000U /*!< DMA Channel 1 */
#define DMA_CHANNEL_2 0x04000000U /*!< DMA Channel 2 */
#define DMA_CHANNEL_3 0x06000000U /*!< DMA Channel 3 */
#define DMA_CHANNEL_4 0x08000000U /*!< DMA Channel 4 */
#define DMA_CHANNEL_5 0x0A000000U /*!< DMA Channel 5 */
#define DMA_CHANNEL_6 0x0C000000U /*!< DMA Channel 6 */
#define DMA_CHANNEL_7 0x0E000000U /*!< DMA Channel 7 */
#if defined (STM32F722xx) || defined (STM32F723xx) || defined (STM32F732xx) || defined (STM32F733xx) ||\
defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) ||\
defined (STM32F779xx)
#define DMA_CHANNEL_8 ((uint32_t)0x10000000U) /*!< DMA Channel 8 */
#define DMA_CHANNEL_9 ((uint32_t)0x12000000U) /*!< DMA Channel 9 */
#define DMA_CHANNEL_10 ((uint32_t)0x14000000U) /*!< DMA Channel 10*/
#define DMA_CHANNEL_11 ((uint32_t)0x16000000U) /*!< DMA Channel 11*/
#define DMA_CHANNEL_12 ((uint32_t)0x18000000U) /*!< DMA Channel 12*/
#define DMA_CHANNEL_13 ((uint32_t)0x1A000000U) /*!< DMA Channel 13*/
#define DMA_CHANNEL_14 ((uint32_t)0x1C000000U) /*!< DMA Channel 14*/
#define DMA_CHANNEL_15 ((uint32_t)0x1E000000U) /*!< DMA Channel 15*/
#define DMA_CHANNEL_8 0x10000000U /*!< DMA Channel 8 */
#define DMA_CHANNEL_9 0x12000000U /*!< DMA Channel 9 */
#define DMA_CHANNEL_10 0x14000000U /*!< DMA Channel 10*/
#define DMA_CHANNEL_11 0x16000000U /*!< DMA Channel 11*/
#define DMA_CHANNEL_12 0x18000000U /*!< DMA Channel 12*/
#define DMA_CHANNEL_13 0x1A000000U /*!< DMA Channel 13*/
#define DMA_CHANNEL_14 0x1C000000U /*!< DMA Channel 14*/
#define DMA_CHANNEL_15 0x1E000000U /*!< DMA Channel 15*/
#endif /* STM32F722xx || STM32F723xx || STM32F732xx || STM32F733xx || STM32F765xx || STM32F767xx ||
STM32F769xx || STM32F777xx || STM32F779xx */

186
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dsi.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief DSI HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the DSI peripheral:
@ -88,16 +86,16 @@ static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx, uint32_t ChannelID, uint32
/* Private functions ---------------------------------------------------------*/
/**
* @brief Generic DSI packet header configuration
* @param DSIx: Pointer to DSI register base
* @param ChannelID: Virtual channel ID of the header packet
* @param DataType: Packet data type of the header packet
* @param DSIx Pointer to DSI register base
* @param ChannelID Virtual channel ID of the header packet
* @param DataType Packet data type of the header packet
* This parameter can be any value of :
* @ref DSI_SHORT_WRITE_PKT_Data_Type
* or @ref DSI_LONG_WRITE_PKT_Data_Type
* or @ref DSI_SHORT_READ_PKT_Data_Type
* or DSI_MAX_RETURN_PKT_SIZE
* @param Data0: Word count LSB
* @param Data1: Word count MSB
* @param Data0 Word count LSB
* @param Data1 Word count MSB
* @retval None
*/
static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx,
@ -133,9 +131,9 @@ static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx,
/**
* @brief Initializes the DSI according to the specified
* parameters in the DSI_InitTypeDef and create the associated handle.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param PLLInit: pointer to a DSI_PLLInitTypeDef structure that contains
* @param PLLInit pointer to a DSI_PLLInitTypeDef structure that contains
* the PLL Clock structure definition for the DSI.
* @retval HAL status
*/
@ -253,7 +251,7 @@ HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef *hdsi, DSI_PLLInitTypeDef *PLLI
/**
* @brief De-initializes the DSI peripheral registers to their default reset
* values.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -300,7 +298,7 @@ HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi)
/**
* @brief Return the DSI error code
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval DSI Error Code
*/
@ -312,9 +310,9 @@ uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi)
/**
* @brief Enable the error monitor flags
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param ActiveErrors: indicates which error interrupts will be enabled.
* @param ActiveErrors indicates which error interrupts will be enabled.
* This parameter can be any combination of @ref DSI_Error_Data_Type.
* @retval HAL status
*/
@ -397,7 +395,7 @@ HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t A
/**
* @brief Initializes the DSI MSP.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval None
*/
@ -413,7 +411,7 @@ __weak void HAL_DSI_MspInit(DSI_HandleTypeDef* hdsi)
/**
* @brief De-initializes the DSI MSP.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval None
*/
@ -446,7 +444,7 @@ __weak void HAL_DSI_MspDeInit(DSI_HandleTypeDef* hdsi)
*/
/**
* @brief Handles DSI interrupt request.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -549,7 +547,7 @@ void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi)
/**
* @brief Tearing Effect DSI callback.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval None
*/
@ -565,7 +563,7 @@ __weak void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi)
/**
* @brief End of Refresh DSI callback.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval None
*/
@ -581,7 +579,7 @@ __weak void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi)
/**
* @brief Operation Error DSI callback.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval None
*/
@ -613,9 +611,9 @@ __weak void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi)
/**
* @brief Configure the Generic interface read-back Virtual Channel ID.
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param VirtualChannelID: Virtual channel ID
* @param VirtualChannelID Virtual channel ID
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID)
@ -635,9 +633,9 @@ HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t Virtu
/**
* @brief Select video mode and configure the corresponding parameters
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param VidCfg: pointer to a DSI_VidCfgTypeDef structure that contains
* @param VidCfg pointer to a DSI_VidCfgTypeDef structure that contains
* the DSI video mode configuration parameters
* @retval HAL status
*/
@ -785,9 +783,9 @@ HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef *hdsi, DSI_VidCfgTyp
/**
* @brief Select adapted command mode and configure the corresponding parameters
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param CmdCfg: pointer to a DSI_CmdCfgTypeDef structure that contains
* @param CmdCfg pointer to a DSI_CmdCfgTypeDef structure that contains
* the DSI command mode configuration parameters
* @retval HAL status
*/
@ -855,9 +853,9 @@ HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef *hdsi, DSI_
/**
* @brief Configure command transmission mode: High-speed or Low-power
* and enable/disable acknowledge request after packet transmission
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param LPCmd: pointer to a DSI_LPCmdTypeDef structure that contains
* @param LPCmd pointer to a DSI_LPCmdTypeDef structure that contains
* the DSI command transmission mode configuration parameters
* @retval HAL status
*/
@ -918,9 +916,9 @@ HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef *hdsi, DSI_LPCmdTypeDe
/**
* @brief Configure the flow control parameters
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param FlowControl: flow control feature(s) to be enabled.
* @param FlowControl flow control feature(s) to be enabled.
* This parameter can be any combination of @ref DSI_FlowControl.
* @retval HAL status
*/
@ -944,9 +942,9 @@ HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t Fl
/**
* @brief Configure the DSI PHY timer parameters
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param PhyTimers: DSI_PHY_TimerTypeDef structure that contains
* @param PhyTimers DSI_PHY_TimerTypeDef structure that contains
* the DSI PHY timing parameters
* @retval HAL status
*/
@ -988,9 +986,9 @@ HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef *hdsi, DSI_PHY_TimerT
/**
* @brief Configure the DSI HOST timeout parameters
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param HostTimeouts: DSI_HOST_TimeoutTypeDef structure that contains
* @param HostTimeouts DSI_HOST_TimeoutTypeDef structure that contains
* the DSI host timeout parameters
* @retval HAL status
*/
@ -1043,7 +1041,7 @@ HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef *hdsi, DSI_HOST_T
/**
* @brief Start the DSI module
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -1066,7 +1064,7 @@ HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi)
/**
* @brief Stop the DSI module
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -1089,7 +1087,7 @@ HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi)
/**
* @brief Refresh the display in command mode
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -1109,9 +1107,9 @@ HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi)
/**
* @brief Controls the display color mode in Video mode
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param ColorMode: Color mode (full or 8-colors).
* @param ColorMode Color mode (full or 8-colors).
* This parameter can be any value of @ref DSI_Color_Mode
* @retval HAL status
*/
@ -1135,9 +1133,9 @@ HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode)
/**
* @brief Control the display shutdown in Video mode
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param Shutdown: Shut-down (Display-ON or Display-OFF).
* @param Shutdown Shut-down (Display-ON or Display-OFF).
* This parameter can be any value of @ref DSI_ShutDown
* @retval HAL status
*/
@ -1161,15 +1159,15 @@ HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown)
/**
* @brief DCS or Generic short write command
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param ChannelID: Virtual channel ID.
* @param Mode: DSI short packet data type.
* @param ChannelID Virtual channel ID.
* @param Mode DSI short packet data type.
* This parameter can be any value of @ref DSI_SHORT_WRITE_PKT_Data_Type.
* @param Param1: DSC command or first generic parameter.
* @param Param1 DSC command or first generic parameter.
* This parameter can be any value of @ref DSI_DCS_Command or a
* generic command code.
* @param Param2: DSC parameter or second generic parameter.
* @param Param2 DSC parameter or second generic parameter.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
@ -1217,16 +1215,16 @@ HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
/**
* @brief DCS or Generic long write command
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param ChannelID: Virtual channel ID.
* @param Mode: DSI long packet data type.
* @param ChannelID Virtual channel ID.
* @param Mode DSI long packet data type.
* This parameter can be any value of @ref DSI_LONG_WRITE_PKT_Data_Type.
* @param NbParams: Number of parameters.
* @param Param1: DSC command or first generic parameter.
* @param NbParams Number of parameters.
* @param Param1 DSC command or first generic parameter.
* This parameter can be any value of @ref DSI_DCS_Command or a
* generic command code
* @param ParametersTable: Pointer to parameter values table.
* @param ParametersTable Pointer to parameter values table.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
@ -1297,15 +1295,15 @@ HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
/**
* @brief Read command (DCS or generic)
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param ChannelNbr: Virtual channel ID
* @param Array: pointer to a buffer to store the payload of a read back operation.
* @param Size: Data size to be read (in byte).
* @param Mode: DSI read packet data type.
* @param ChannelNbr Virtual channel ID
* @param Array pointer to a buffer to store the payload of a read back operation.
* @param Size Data size to be read (in byte).
* @param Mode DSI read packet data type.
* This parameter can be any value of @ref DSI_SHORT_READ_PKT_Data_Type.
* @param DCSCmd: DCS get/read command.
* @param ParametersTable: Pointer to parameter values table.
* @param DCSCmd DCS get/read command.
* @param ParametersTable Pointer to parameter values table.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
@ -1418,7 +1416,7 @@ HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
/**
* @brief Enter the ULPM (Ultra Low Power Mode) with the D-PHY PLL running
* (only data lanes are in ULPM)
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -1474,7 +1472,7 @@ HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi)
/**
* @brief Exit the ULPM (Ultra Low Power Mode) with the D-PHY PLL running
* (only data lanes are in ULPM)
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -1533,7 +1531,7 @@ HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi)
/**
* @brief Enter the ULPM (Ultra Low Power Mode) with the D-PHY PLL turned off
* (both data and clock lanes are in ULPM)
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -1598,7 +1596,7 @@ HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi)
/**
* @brief Exit the ULPM (Ultra Low Power Mode) with the D-PHY PLL turned off
* (both data and clock lanes are in ULPM)
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -1681,13 +1679,13 @@ HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi)
/**
* @brief Start test pattern generation
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param Mode: Pattern generator mode
* @param Mode Pattern generator mode
* This parameter can be one of the following values:
* 0 : Color bars (horizontal or vertical)
* 1 : BER pattern (vertical only)
* @param Orientation: Pattern generator orientation
* @param Orientation Pattern generator orientation
* This parameter can be one of the following values:
* 0 : Vertical color bars
* 1 : Horizontal color bars
@ -1713,7 +1711,7 @@ HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_
/**
* @brief Stop test pattern generation
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL status
*/
@ -1733,13 +1731,13 @@ HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi)
/**
* @brief Set Slew-Rate And Delay Tuning
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param CommDelay: Communication delay to be adjusted.
* @param CommDelay Communication delay to be adjusted.
* This parameter can be any value of @ref DSI_Communication_Delay
* @param Lane: select between clock or data lanes.
* @param Lane select between clock or data lanes.
* This parameter can be any value of @ref DSI_Lane_Group
* @param Value: Custom value of the slew-rate or delay
* @param Value Custom value of the slew-rate or delay
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value)
@ -1807,9 +1805,9 @@ HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uin
/**
* @brief Low-Power Reception Filter Tuning
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param Frequency: cutoff frequency of low-pass filter at the input of LPRX
* @param Frequency cutoff frequency of low-pass filter at the input of LPRX
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency)
@ -1830,9 +1828,9 @@ HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t
/**
* @brief Activate an additional current path on all lanes to meet the SDDTx parameter
* defined in the MIPI D-PHY specification
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param State: ENABLE or DISABLE
* @param State ENABLE or DISABLE
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State)
@ -1855,13 +1853,13 @@ HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State)
/**
* @brief Custom lane pins configuration
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param CustomLane: Function to be applyed on selected lane.
* @param CustomLane Function to be applyed on selected lane.
* This parameter can be any value of @ref DSI_CustomLane
* @param Lane: select between clock or data lane 0 or data lane 1.
* @param Lane select between clock or data lane 0 or data lane 1.
* This parameter can be any value of @ref DSI_Lane_Select
* @param State: ENABLE or DISABLE
* @param State ENABLE or DISABLE
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State)
@ -1928,12 +1926,12 @@ HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint
/**
* @brief Set custom timing for the PHY
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param Timing: PHY timing to be adjusted.
* @param Timing PHY timing to be adjusted.
* This parameter can be any value of @ref DSI_PHY_Timing
* @param State: ENABLE or DISABLE
* @param Value: Custom value of the timing
* @param State ENABLE or DISABLE
* @param Value Custom value of the timing
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value)
@ -2076,11 +2074,11 @@ HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing
/**
* @brief Force the Clock/Data Lane in TX Stop Mode
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param Lane: select between clock or data lanes.
* @param Lane select between clock or data lanes.
* This parameter can be any value of @ref DSI_Lane_Group
* @param State: ENABLE or DISABLE
* @param State ENABLE or DISABLE
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State)
@ -2113,9 +2111,9 @@ HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane
/**
* @brief Forces LP Receiver in Low-Power Mode
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param State: ENABLE or DISABLE
* @param State ENABLE or DISABLE
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State)
@ -2138,9 +2136,9 @@ HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalSta
/**
* @brief Force Data Lanes in RX Mode after a BTA
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param State: ENABLE or DISABLE
* @param State ENABLE or DISABLE
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State)
@ -2163,9 +2161,9 @@ HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, Functional
/**
* @brief Enable a pull-down on the lanes to prevent from floating states when unused
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param State: ENABLE or DISABLE
* @param State ENABLE or DISABLE
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State)
@ -2188,9 +2186,9 @@ HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState S
/**
* @brief Switch off the contention detection on data lanes
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @param State: ENABLE or DISABLE
* @param State ENABLE or DISABLE
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State)
@ -2233,7 +2231,7 @@ HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, Fun
/**
* @brief Return the DSI state
* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
* @param hdsi pointer to a DSI_HandleTypeDef structure that contains
* the configuration information for the DSI.
* @retval HAL state
*/

38
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_dsi.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of DSI HAL module.
******************************************************************************
* @attention
@ -889,64 +887,64 @@ typedef struct
/* Exported macros -----------------------------------------------------------*/
/**
* @brief Enables the DSI host.
* @param __HANDLE__: DSI handle
* @param __HANDLE__ DSI handle
* @retval None.
*/
#define __HAL_DSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DSI_CR_EN)
/**
* @brief Disables the DSI host.
* @param __HANDLE__: DSI handle
* @param __HANDLE__ DSI handle
* @retval None.
*/
#define __HAL_DSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DSI_CR_EN)
/**
* @brief Enables the DSI wrapper.
* @param __HANDLE__: DSI handle
* @param __HANDLE__ DSI handle
* @retval None.
*/
#define __HAL_DSI_WRAPPER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WCR |= DSI_WCR_DSIEN)
/**
* @brief Disable the DSI wrapper.
* @param __HANDLE__: DSI handle
* @param __HANDLE__ DSI handle
* @retval None.
*/
#define __HAL_DSI_WRAPPER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WCR &= ~DSI_WCR_DSIEN)
/**
* @brief Enables the DSI PLL.
* @param __HANDLE__: DSI handle
* @param __HANDLE__ DSI handle
* @retval None.
*/
#define __HAL_DSI_PLL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR |= DSI_WRPCR_PLLEN)
/**
* @brief Disables the DSI PLL.
* @param __HANDLE__: DSI handle
* @param __HANDLE__ DSI handle
* @retval None.
*/
#define __HAL_DSI_PLL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR &= ~DSI_WRPCR_PLLEN)
/**
* @brief Enables the DSI regulator.
* @param __HANDLE__: DSI handle
* @param __HANDLE__ DSI handle
* @retval None.
*/
#define __HAL_DSI_REG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR |= DSI_WRPCR_REGEN)
/**
* @brief Disables the DSI regulator.
* @param __HANDLE__: DSI handle
* @param __HANDLE__ DSI handle
* @retval None.
*/
#define __HAL_DSI_REG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR &= ~DSI_WRPCR_REGEN)
/**
* @brief Get the DSI pending flags.
* @param __HANDLE__: DSI handle.
* @param __FLAG__: Get the specified flag.
* @param __HANDLE__ DSI handle.
* @param __FLAG__ Get the specified flag.
* This parameter can be any combination of the following values:
* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
@ -962,8 +960,8 @@ typedef struct
/**
* @brief Clears the DSI pending flags.
* @param __HANDLE__: DSI handle.
* @param __FLAG__: specifies the flag to clear.
* @param __HANDLE__ DSI handle.
* @param __FLAG__ specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
@ -976,8 +974,8 @@ typedef struct
/**
* @brief Enables the specified DSI interrupts.
* @param __HANDLE__: DSI handle.
* @param __INTERRUPT__: specifies the DSI interrupt sources to be enabled.
* @param __HANDLE__ DSI handle.
* @param __INTERRUPT__ specifies the DSI interrupt sources to be enabled.
* This parameter can be any combination of the following values:
* @arg DSI_IT_TE : Tearing Effect Interrupt
* @arg DSI_IT_ER : End of Refresh Interrupt
@ -990,8 +988,8 @@ typedef struct
/**
* @brief Disables the specified DSI interrupts.
* @param __HANDLE__: DSI handle
* @param __INTERRUPT__: specifies the DSI interrupt sources to be disabled.
* @param __HANDLE__ DSI handle
* @param __INTERRUPT__ specifies the DSI interrupt sources to be disabled.
* This parameter can be any combination of the following values:
* @arg DSI_IT_TE : Tearing Effect Interrupt
* @arg DSI_IT_ER : End of Refresh Interrupt
@ -1004,8 +1002,8 @@ typedef struct
/**
* @brief Checks whether the specified DSI interrupt has occurred or not.
* @param __HANDLE__: DSI handle
* @param __INTERRUPT__: specifies the DSI interrupt source to check.
* @param __HANDLE__ DSI handle
* @param __INTERRUPT__ specifies the DSI interrupt source to check.
* This parameter can be one of the following values:
* @arg DSI_IT_TE : Tearing Effect Interrupt
* @arg DSI_IT_ER : End of Refresh Interrupt

108
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_eth.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief ETH HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Ethernet (ETH) peripheral:
@ -167,7 +165,7 @@ static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth);
/**
* @brief Initializes the Ethernet MAC and DMA according to default
* parameters.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
@ -440,7 +438,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/**
* @brief De-Initializes the ETH peripheral.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
@ -464,11 +462,11 @@ HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth)
/**
* @brief Initializes the DMA Tx descriptors in chain mode.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param DMATxDescTab: Pointer to the first Tx desc list
* @param TxBuff: Pointer to the first TxBuffer list
* @param TxBuffCount: Number of the used Tx desc in the list
* @param DMATxDescTab Pointer to the first Tx desc list
* @param TxBuff Pointer to the first TxBuffer list
* @param TxBuffCount Number of the used Tx desc in the list
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMATxDescTab, uint8_t *TxBuff, uint32_t TxBuffCount)
@ -531,11 +529,11 @@ HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADesc
/**
* @brief Initializes the DMA Rx descriptors in chain mode.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param DMARxDescTab: Pointer to the first Rx desc list
* @param RxBuff: Pointer to the first RxBuffer list
* @param RxBuffCount: Number of the used Rx desc in the list
* @param DMARxDescTab Pointer to the first Rx desc list
* @param RxBuff Pointer to the first RxBuffer list
* @param RxBuffCount Number of the used Rx desc in the list
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMARxDescTab, uint8_t *RxBuff, uint32_t RxBuffCount)
@ -601,7 +599,7 @@ HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADesc
/**
* @brief Initializes the ETH MSP.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -617,7 +615,7 @@ __weak void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
/**
* @brief DeInitializes ETH MSP.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -660,9 +658,9 @@ __weak void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
/**
* @brief Sends an Ethernet frame.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param FrameLength: Amount of data to be sent
* @param FrameLength Amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameLength)
@ -717,8 +715,11 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
heth->TxDesc->Status |=ETH_DMATXDESC_FS|ETH_DMATXDESC_LS;
/* Set frame size */
heth->TxDesc->ControlBufferSize = (FrameLength & ETH_DMATXDESC_TBS1);
/* Ensure rest of descriptor is written to RAM before the OWN bit */
// MBED: added
// Ensure rest of descriptor is written to RAM before the OWN bit
__DMB();
/* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */
heth->TxDesc->Status |= ETH_DMATXDESC_OWN;
/* Point to next descriptor */
@ -748,8 +749,10 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
heth->TxDesc->ControlBufferSize = (size & ETH_DMATXDESC_TBS1);
}
/* Ensure rest of descriptor is written to RAM before the OWN bit */
// MBED: added
// Ensure rest of descriptor is written to RAM before the OWN bit
__DMB();
/* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */
heth->TxDesc->Status |= ETH_DMATXDESC_OWN;
/* point to next descriptor */
@ -757,7 +760,8 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
}
}
/* Ensure all descriptors are written to RAM before checking transmitter status */
// MBED: added
// Ensure all descriptors are written to RAM before checking transmitter status
__DMB();
/* When Tx Buffer unavailable flag is set: clear it and resume transmission */
@ -781,7 +785,7 @@ HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameL
/**
* @brief Checks for received frames.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
@ -861,7 +865,7 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
/**
* @brief Gets the Received frame in interrupt mode.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
@ -946,7 +950,7 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth)
/**
* @brief This function handles ETH interrupt request.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
@ -1006,7 +1010,7 @@ void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
/**
* @brief Tx Transfer completed callbacks.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1022,7 +1026,7 @@ __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth)
/**
* @brief Rx Transfer completed callbacks.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1038,7 +1042,7 @@ __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth)
/**
* @brief Ethernet transfer error callbacks
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1054,14 +1058,14 @@ __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
/**
* @brief Reads a PHY register
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param PHYReg: PHY register address, is the index of one of the 32 PHY register.
* @param PHYReg PHY register address, is the index of one of the 32 PHY register.
* This parameter can be one of the following values:
* PHY_BCR: Transceiver Basic Control Register,
* PHY_BSR: Transceiver Basic Status Register.
* More PHY register could be read depending on the used PHY
* @param RegValue: PHY register value
* @param RegValue PHY register value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t *RegValue)
@ -1127,13 +1131,13 @@ HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYR
/**
* @brief Writes to a PHY register.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param PHYReg: PHY register address, is the index of one of the 32 PHY register.
* @param PHYReg PHY register address, is the index of one of the 32 PHY register.
* This parameter can be one of the following values:
* PHY_BCR: Transceiver Control Register.
* More PHY register could be written depending on the used PHY
* @param RegValue: the value to write
* @param RegValue the value to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t RegValue)
@ -1224,7 +1228,7 @@ HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHY
/**
* @brief Enables Ethernet MAC and DMA reception/transmission
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
@ -1263,7 +1267,7 @@ HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth)
/**
* @brief Stop Ethernet MAC and DMA reception/transmission
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
@ -1302,9 +1306,9 @@ HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth)
/**
* @brief Set ETH MAC Configuration.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param macconf: MAC Configuration structure
* @param macconf MAC Configuration structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef *macconf)
@ -1469,9 +1473,9 @@ HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef
/**
* @brief Sets ETH DMA Configuration.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param dmaconf: DMA Configuration structure
* @param dmaconf DMA Configuration structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_ConfigDMA(ETH_HandleTypeDef *heth, ETH_DMAInitTypeDef *dmaconf)
@ -1577,7 +1581,7 @@ HAL_StatusTypeDef HAL_ETH_ConfigDMA(ETH_HandleTypeDef *heth, ETH_DMAInitTypeDef
/**
* @brief Return the ETH HAL state
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL state
*/
@ -1601,9 +1605,9 @@ HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth)
/**
* @brief Configures Ethernet MAC and DMA with default parameters.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param err: Ethernet Init error
* @param err Ethernet Init error
* @retval HAL status
*/
static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err)
@ -1858,15 +1862,15 @@ static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth, uint32_t err)
/**
* @brief Configures the selected MAC address.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @param MacAddr: The MAC address to configure
* @param MacAddr The MAC address to configure
* This parameter can be one of the following values:
* @arg ETH_MAC_Address0: MAC Address0
* @arg ETH_MAC_Address1: MAC Address1
* @arg ETH_MAC_Address2: MAC Address2
* @arg ETH_MAC_Address3: MAC Address3
* @param Addr: Pointer to MAC address buffer data (6 bytes)
* @param Addr Pointer to MAC address buffer data (6 bytes)
* @retval HAL status
*/
static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint8_t *Addr)
@ -1889,7 +1893,7 @@ static void ETH_MACAddressConfig(ETH_HandleTypeDef *heth, uint32_t MacAddr, uint
/**
* @brief Enables the MAC transmission.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1909,7 +1913,7 @@ static void ETH_MACTransmissionEnable(ETH_HandleTypeDef *heth)
/**
* @brief Disables the MAC transmission.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1929,7 +1933,7 @@ static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth)
/**
* @brief Enables the MAC reception.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1949,7 +1953,7 @@ static void ETH_MACReceptionEnable(ETH_HandleTypeDef *heth)
/**
* @brief Disables the MAC reception.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1969,7 +1973,7 @@ static void ETH_MACReceptionDisable(ETH_HandleTypeDef *heth)
/**
* @brief Enables the DMA transmission.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1981,7 +1985,7 @@ static void ETH_DMATransmissionEnable(ETH_HandleTypeDef *heth)
/**
* @brief Disables the DMA transmission.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -1993,7 +1997,7 @@ static void ETH_DMATransmissionDisable(ETH_HandleTypeDef *heth)
/**
* @brief Enables the DMA reception.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -2005,7 +2009,7 @@ static void ETH_DMAReceptionEnable(ETH_HandleTypeDef *heth)
/**
* @brief Disables the DMA reception.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
@ -2017,7 +2021,7 @@ static void ETH_DMAReceptionDisable(ETH_HandleTypeDef *heth)
/**
* @brief Clears the ETHERNET transmit FIFO.
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/

150
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_eth.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of ETH HAL module.
******************************************************************************
* @attention
@ -1593,80 +1591,80 @@ typedef struct
*/
/** @brief Reset ETH handle state
* @param __HANDLE__: specifies the ETH handle.
* @param __HANDLE__ specifies the ETH handle.
* @retval None
*/
#define __HAL_ETH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ETH_STATE_RESET)
/**
* @brief Checks whether the specified Ethernet DMA Tx Desc flag is set or not.
* @param __HANDLE__: ETH Handle
* @param __FLAG__: specifies the flag of TDES0 to check.
* @param __HANDLE__ ETH Handle
* @param __FLAG__ specifies the flag of TDES0 to check.
* @retval the ETH_DMATxDescFlag (SET or RESET).
*/
#define __HAL_ETH_DMATXDESC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->TxDesc->Status & (__FLAG__) == (__FLAG__))
/**
* @brief Checks whether the specified Ethernet DMA Rx Desc flag is set or not.
* @param __HANDLE__: ETH Handle
* @param __FLAG__: specifies the flag of RDES0 to check.
* @param __HANDLE__ ETH Handle
* @param __FLAG__ specifies the flag of RDES0 to check.
* @retval the ETH_DMATxDescFlag (SET or RESET).
*/
#define __HAL_ETH_DMARXDESC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->RxDesc->Status & (__FLAG__) == (__FLAG__))
/**
* @brief Enables the specified DMA Rx Desc receive interrupt.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMARXDESC_ENABLE_IT(__HANDLE__) ((__HANDLE__)->RxDesc->ControlBufferSize &=(~(uint32_t)ETH_DMARXDESC_DIC))
/**
* @brief Disables the specified DMA Rx Desc receive interrupt.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMARXDESC_DISABLE_IT(__HANDLE__) ((__HANDLE__)->RxDesc->ControlBufferSize |= ETH_DMARXDESC_DIC)
/**
* @brief Set the specified DMA Rx Desc Own bit.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMARXDESC_SET_OWN_BIT(__HANDLE__) ((__HANDLE__)->RxDesc->Status |= ETH_DMARXDESC_OWN)
/**
* @brief Returns the specified Ethernet DMA Tx Desc collision count.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval The Transmit descriptor collision counter value.
*/
#define __HAL_ETH_DMATXDESC_GET_COLLISION_COUNT(__HANDLE__) (((__HANDLE__)->TxDesc->Status & ETH_DMATXDESC_CC) >> ETH_DMATXDESC_COLLISION_COUNTSHIFT)
/**
* @brief Set the specified DMA Tx Desc Own bit.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMATXDESC_SET_OWN_BIT(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_OWN)
/**
* @brief Enables the specified DMA Tx Desc Transmit interrupt.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMATXDESC_ENABLE_IT(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_IC)
/**
* @brief Disables the specified DMA Tx Desc Transmit interrupt.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMATXDESC_DISABLE_IT(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_IC)
/**
* @brief Selects the specified Ethernet DMA Tx Desc Checksum Insertion.
* @param __HANDLE__: ETH Handle
* @param __CHECKSUM__: specifies is the DMA Tx desc checksum insertion.
* @param __HANDLE__ ETH Handle
* @param __CHECKSUM__ specifies is the DMA Tx desc checksum insertion.
* This parameter can be one of the following values:
* @arg ETH_DMATXDESC_CHECKSUMBYPASS : Checksum bypass
* @arg ETH_DMATXDESC_CHECKSUMIPV4HEADER : IPv4 header checksum
@ -1678,36 +1676,36 @@ typedef struct
/**
* @brief Enables the DMA Tx Desc CRC.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMATXDESC_CRC_ENABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_DC)
/**
* @brief Disables the DMA Tx Desc CRC.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMATXDESC_CRC_DISABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_DC)
/**
* @brief Enables the DMA Tx Desc padding for frame shorter than 64 bytes.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMATXDESC_SHORT_FRAME_PADDING_ENABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_DP)
/**
* @brief Disables the DMA Tx Desc padding for frame shorter than 64 bytes.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_DMATXDESC_SHORT_FRAME_PADDING_DISABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_DP)
/**
* @brief Enables the specified Ethernet MAC interrupts.
* @param __HANDLE__ : ETH Handle
* @param __INTERRUPT__: specifies the Ethernet MAC interrupt sources to be
* @param __HANDLE__ ETH Handle
* @param __INTERRUPT__ specifies the Ethernet MAC interrupt sources to be
* enabled or disabled.
* This parameter can be any combination of the following values:
* @arg ETH_MAC_IT_TST : Time stamp trigger interrupt
@ -1718,8 +1716,8 @@ typedef struct
/**
* @brief Disables the specified Ethernet MAC interrupts.
* @param __HANDLE__ : ETH Handle
* @param __INTERRUPT__: specifies the Ethernet MAC interrupt sources to be
* @param __HANDLE__ ETH Handle
* @param __INTERRUPT__ specifies the Ethernet MAC interrupt sources to be
* enabled or disabled.
* This parameter can be any combination of the following values:
* @arg ETH_MAC_IT_TST : Time stamp trigger interrupt
@ -1730,36 +1728,36 @@ typedef struct
/**
* @brief Initiate a Pause Control Frame (Full-duplex only).
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_INITIATE_PAUSE_CONTROL_FRAME(__HANDLE__) ((__HANDLE__)->Instance->MACFCR |= ETH_MACFCR_FCBBPA)
/**
* @brief Checks whether the Ethernet flow control busy bit is set or not.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval The new state of flow control busy status bit (SET or RESET).
*/
#define __HAL_ETH_GET_FLOW_CONTROL_BUSY_STATUS(__HANDLE__) (((__HANDLE__)->Instance->MACFCR & ETH_MACFCR_FCBBPA) == ETH_MACFCR_FCBBPA)
/**
* @brief Enables the MAC Back Pressure operation activation (Half-duplex only).
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_BACK_PRESSURE_ACTIVATION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACFCR |= ETH_MACFCR_FCBBPA)
/**
* @brief Disables the MAC BackPressure operation activation (Half-duplex only).
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_BACK_PRESSURE_ACTIVATION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACFCR &= ~ETH_MACFCR_FCBBPA)
/**
* @brief Checks whether the specified Ethernet MAC flag is set or not.
* @param __HANDLE__: ETH Handle
* @param __FLAG__: specifies the flag to check.
* @param __HANDLE__ ETH Handle
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg ETH_MAC_FLAG_TST : Time stamp trigger flag
* @arg ETH_MAC_FLAG_MMCT : MMC transmit flag
@ -1772,8 +1770,8 @@ typedef struct
/**
* @brief Enables the specified Ethernet DMA interrupts.
* @param __HANDLE__ : ETH Handle
* @param __INTERRUPT__: specifies the Ethernet DMA interrupt sources to be
* @param __HANDLE__ ETH Handle
* @param __INTERRUPT__ specifies the Ethernet DMA interrupt sources to be
* enabled @ref ETH_DMA_Interrupts
* @retval None
*/
@ -1781,8 +1779,8 @@ typedef struct
/**
* @brief Disables the specified Ethernet DMA interrupts.
* @param __HANDLE__ : ETH Handle
* @param __INTERRUPT__: specifies the Ethernet DMA interrupt sources to be
* @param __HANDLE__ ETH Handle
* @param __INTERRUPT__ specifies the Ethernet DMA interrupt sources to be
* disabled. @ref ETH_DMA_Interrupts
* @retval None
*/
@ -1790,32 +1788,32 @@ typedef struct
/**
* @brief Clears the Ethernet DMA IT pending bit.
* @param __HANDLE__ : ETH Handle
* @param __INTERRUPT__: specifies the interrupt pending bit to clear. @ref ETH_DMA_Interrupts
* @param __HANDLE__ ETH Handle
* @param __INTERRUPT__ specifies the interrupt pending bit to clear. @ref ETH_DMA_Interrupts
* @retval None
*/
#define __HAL_ETH_DMA_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMASR =(__INTERRUPT__))
/**
* @brief Checks whether the specified Ethernet DMA flag is set or not.
* @param __HANDLE__: ETH Handle
* @param __FLAG__: specifies the flag to check. @ref ETH_DMA_Flags
* @param __HANDLE__ ETH Handle
* @param __FLAG__ specifies the flag to check. @ref ETH_DMA_Flags
* @retval The new state of ETH_DMA_FLAG (SET or RESET).
*/
#define __HAL_ETH_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->DMASR &( __FLAG__)) == ( __FLAG__))
/**
* @brief Checks whether the specified Ethernet DMA flag is set or not.
* @param __HANDLE__: ETH Handle
* @param __FLAG__: specifies the flag to clear. @ref ETH_DMA_Flags
* @param __HANDLE__ ETH Handle
* @param __FLAG__ specifies the flag to clear. @ref ETH_DMA_Flags
* @retval The new state of ETH_DMA_FLAG (SET or RESET).
*/
#define __HAL_ETH_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->DMASR = (__FLAG__))
/**
* @brief Checks whether the specified Ethernet DMA overflow flag is set or not.
* @param __HANDLE__: ETH Handle
* @param __OVERFLOW__: specifies the DMA overflow flag to check.
* @param __HANDLE__ ETH Handle
* @param __OVERFLOW__ specifies the DMA overflow flag to check.
* This parameter can be one of the following values:
* @arg ETH_DMA_OVERFLOW_RXFIFOCOUNTER : Overflow for FIFO Overflows Counter
* @arg ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER : Overflow for Buffer Unavailable Missed Frame Counter
@ -1825,8 +1823,8 @@ typedef struct
/**
* @brief Set the DMA Receive status watchdog timer register value
* @param __HANDLE__: ETH Handle
* @param __VALUE__: DMA Receive status watchdog timer register value
* @param __HANDLE__ ETH Handle
* @param __VALUE__ DMA Receive status watchdog timer register value
* @retval None
*/
#define __HAL_ETH_SET_RECEIVE_WATCHDOG_TIMER(__HANDLE__, __VALUE__) ((__HANDLE__)->Instance->DMARSWTR = (__VALUE__))
@ -1834,7 +1832,7 @@ typedef struct
/**
* @brief Enables any unicast packet filtered by the MAC address
* recognition to be a wake-up frame.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_GLOBAL_UNICAST_WAKEUP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_GU)
@ -1842,57 +1840,57 @@ typedef struct
/**
* @brief Disables any unicast packet filtered by the MAC address
* recognition to be a wake-up frame.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_GLOBAL_UNICAST_WAKEUP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_GU)
/**
* @brief Enables the MAC Wake-Up Frame Detection.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_WAKEUP_FRAME_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_WFE)
/**
* @brief Disables the MAC Wake-Up Frame Detection.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_WAKEUP_FRAME_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_WFE)
/**
* @brief Enables the MAC Magic Packet Detection.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_MAGIC_PACKET_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_MPE)
/**
* @brief Disables the MAC Magic Packet Detection.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_MAGIC_PACKET_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_WFE)
/**
* @brief Enables the MAC Power Down.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_POWER_DOWN_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_PD)
/**
* @brief Disables the MAC Power Down.
* @param __HANDLE__: ETH Handle
* @param __HANDLE__ ETH Handle
* @retval None
*/
#define __HAL_ETH_POWER_DOWN_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_PD)
/**
* @brief Checks whether the specified Ethernet PMT flag is set or not.
* @param __HANDLE__: ETH Handle.
* @param __FLAG__: specifies the flag to check.
* @param __HANDLE__ ETH Handle.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg ETH_PMT_FLAG_WUFFRPR : Wake-Up Frame Filter Register Pointer Reset
* @arg ETH_PMT_FLAG_WUFR : Wake-Up Frame Received
@ -1903,14 +1901,14 @@ typedef struct
/**
* @brief Preset and Initialize the MMC counters to almost-full value: 0xFFFF_FFF0 (full - 16)
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_MMC_COUNTER_FULL_PRESET(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= (ETH_MMCCR_MCFHP | ETH_MMCCR_MCP))
/**
* @brief Preset and Initialize the MMC counters to almost-half value: 0x7FFF_FFF0 (half - 16)
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_MMC_COUNTER_HALF_PRESET(__HANDLE__) do{(__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_MCFHP;\
@ -1918,57 +1916,57 @@ typedef struct
/**
* @brief Enables the MMC Counter Freeze.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_MMC_COUNTER_FREEZE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_MCF)
/**
* @brief Disables the MMC Counter Freeze.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_MMC_COUNTER_FREEZE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_MCF)
/**
* @brief Enables the MMC Reset On Read.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_ETH_MMC_RESET_ONREAD_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_ROR)
/**
* @brief Disables the MMC Reset On Read.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_ETH_MMC_RESET_ONREAD_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_ROR)
/**
* @brief Enables the MMC Counter Stop Rollover.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_ETH_MMC_COUNTER_ROLLOVER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_CSR)
/**
* @brief Disables the MMC Counter Stop Rollover.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_ETH_MMC_COUNTER_ROLLOVER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_CSR)
/**
* @brief Resets the MMC Counters.
* @param __HANDLE__: ETH Handle.
* @param __HANDLE__ ETH Handle.
* @retval None
*/
#define __HAL_ETH_MMC_COUNTERS_RESET(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_CR)
/**
* @brief Enables the specified Ethernet MMC Rx interrupts.
* @param __HANDLE__: ETH Handle.
* @param __INTERRUPT__: specifies the Ethernet MMC interrupt sources to be enabled or disabled.
* @param __HANDLE__ ETH Handle.
* @param __INTERRUPT__ specifies the Ethernet MMC interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg ETH_MMC_IT_RGUF : When Rx good unicast frames counter reaches half the maximum value
* @arg ETH_MMC_IT_RFAE : When Rx alignment error counter reaches half the maximum value
@ -1978,8 +1976,8 @@ typedef struct
#define __HAL_ETH_MMC_RX_IT_ENABLE(__HANDLE__, __INTERRUPT__) (__HANDLE__)->Instance->MMCRIMR &= ~((__INTERRUPT__) & 0xEFFFFFFF)
/**
* @brief Disables the specified Ethernet MMC Rx interrupts.
* @param __HANDLE__: ETH Handle.
* @param __INTERRUPT__: specifies the Ethernet MMC interrupt sources to be enabled or disabled.
* @param __HANDLE__ ETH Handle.
* @param __INTERRUPT__ specifies the Ethernet MMC interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg ETH_MMC_IT_RGUF : When Rx good unicast frames counter reaches half the maximum value
* @arg ETH_MMC_IT_RFAE : When Rx alignment error counter reaches half the maximum value
@ -1989,8 +1987,8 @@ typedef struct
#define __HAL_ETH_MMC_RX_IT_DISABLE(__HANDLE__, __INTERRUPT__) (__HANDLE__)->Instance->MMCRIMR |= ((__INTERRUPT__) & 0xEFFFFFFF)
/**
* @brief Enables the specified Ethernet MMC Tx interrupts.
* @param __HANDLE__: ETH Handle.
* @param __INTERRUPT__: specifies the Ethernet MMC interrupt sources to be enabled or disabled.
* @param __HANDLE__ ETH Handle.
* @param __INTERRUPT__ specifies the Ethernet MMC interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg ETH_MMC_IT_TGF : When Tx good frame counter reaches half the maximum value
* @arg ETH_MMC_IT_TGFMSC: When Tx good multi col counter reaches half the maximum value
@ -2001,8 +1999,8 @@ typedef struct
/**
* @brief Disables the specified Ethernet MMC Tx interrupts.
* @param __HANDLE__: ETH Handle.
* @param __INTERRUPT__: specifies the Ethernet MMC interrupt sources to be enabled or disabled.
* @param __HANDLE__ ETH Handle.
* @param __INTERRUPT__ specifies the Ethernet MMC interrupt sources to be enabled or disabled.
* This parameter can be one of the following values:
* @arg ETH_MMC_IT_TGF : When Tx good frame counter reaches half the maximum value
* @arg ETH_MMC_IT_TGFMSC: When Tx good multi col counter reaches half the maximum value
@ -2075,15 +2073,17 @@ typedef struct
* @brief Enables rising/falling edge trigger to the ETH External interrupt line.
* @retval None
*/
#define __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER() EXTI->RTSR |= ETH_EXTI_LINE_WAKEUP;\
EXTI->FTSR |= ETH_EXTI_LINE_WAKEUP
#define __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER() do{EXTI->RTSR |= ETH_EXTI_LINE_WAKEUP;\
EXTI->FTSR |= ETH_EXTI_LINE_WAKEUP;\
}while(0)
/**
* @brief Disables rising/falling edge trigger to the ETH External interrupt line.
* @retval None
*/
#define __HAL_ETH_WAKEUP_EXTI_DISABLE_FALLINGRISING_TRIGGER() EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP);\
EXTI->FTSR &= ~(ETH_EXTI_LINE_WAKEUP)
#define __HAL_ETH_WAKEUP_EXTI_DISABLE_FALLINGRISING_TRIGGER() do{EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP);\
EXTI->FTSR &= ~(ETH_EXTI_LINE_WAKEUP);\
}while(0)
/**
* @brief Generate a Software interrupt on selected EXTI line.

58
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_flash.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief FLASH HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the internal FLASH memory:
@ -172,10 +170,10 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
/**
* @brief Program byte, halfword, word or double word at a specified address
* @param TypeProgram: Indicate the way to program at a specified address.
* @param TypeProgram Indicate the way to program at a specified address.
* This parameter can be a value of @ref FLASH_Type_Program
* @param Address: specifies the address to be programmed.
* @param Data: specifies the data to be programmed
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
@ -241,10 +239,10 @@ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint
/**
* @brief Program byte, halfword, word or double word at a specified address with interrupt enabled.
* @param TypeProgram: Indicate the way to program at a specified address.
* @param TypeProgram Indicate the way to program at a specified address.
* This parameter can be a value of @ref FLASH_Type_Program
* @param Address: specifies the address to be programmed.
* @param Data: specifies the data to be programmed
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed
*
* @retval HAL Status
*/
@ -438,7 +436,7 @@ void HAL_FLASH_IRQHandler(void)
/**
* @brief FLASH end of operation interrupt callback
* @param ReturnValue: The value saved in this parameter depends on the ongoing procedure
* @param ReturnValue The value saved in this parameter depends on the ongoing procedure
* - Sectors Erase: Sector which has been erased (if 0xFFFFFFFF, it means that
* all the selected sectors have been erased)
* - Program : Address which was selected for data program
@ -456,7 +454,7 @@ __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue)
/**
* @brief FLASH operation error interrupt callback
* @param ReturnValue: The value saved in this parameter depends on the ongoing procedure
* @param ReturnValue The value saved in this parameter depends on the ongoing procedure
* - Sectors Erase: Sector which has been erased (if 0xFFFFFFFF, it means that
* all the selected sectors have been erased)
* - Program : Address which was selected for data program
@ -497,18 +495,22 @@ __weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue)
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
if((FLASH->CR & FLASH_CR_LOCK) != RESET)
HAL_StatusTypeDef status = HAL_OK;
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
{
/* Authorize the FLASH Registers access */
FLASH->KEYR = FLASH_KEY1;
FLASH->KEYR = FLASH_KEY2;
}
else
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
{
return HAL_ERROR;
status = HAL_ERROR;
}
}
return HAL_OK;
return status;
}
/**
@ -606,7 +608,7 @@ uint32_t HAL_FLASH_GetError(void)
/**
* @brief Wait for a FLASH operation to complete.
* @param Timeout: maximum flash operationtimeout
* @param Timeout maximum flash operationtimeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
@ -660,8 +662,8 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
* @note If an erase and a program operations are requested simultaneously,
* the erase operation is performed before the program one.
*
* @param Address: specifies the address to be programmed.
* @param Data: specifies the data to be programmed.
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed.
* @retval None
*/
static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data)
@ -674,7 +676,9 @@ static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data)
FLASH->CR |= FLASH_PSIZE_DOUBLE_WORD;
FLASH->CR |= FLASH_CR_PG;
*(__IO uint64_t*)Address = Data;
/* Program the double-word */
*(__IO uint32_t*)Address = (uint32_t)Data;
*(__IO uint32_t*)(Address+4) = (uint32_t)(Data >> 32);
/* Data synchronous Barrier (DSB) Just after the write operation
This will force the CPU to respect the sequence of instruction (no optimization).*/
@ -690,8 +694,8 @@ static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data)
* @note If an erase and a program operations are requested simultaneously,
* the erase operation is performed before the program one.
*
* @param Address: specifies the address to be programmed.
* @param Data: specifies the data to be programmed.
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed.
* @retval None
*/
static void FLASH_Program_Word(uint32_t Address, uint32_t Data)
@ -719,8 +723,8 @@ static void FLASH_Program_Word(uint32_t Address, uint32_t Data)
* @note If an erase and a program operations are requested simultaneously,
* the erase operation is performed before the program one.
*
* @param Address: specifies the address to be programmed.
* @param Data: specifies the data to be programmed.
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
@ -749,8 +753,8 @@ static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
* @note If an erase and a program operations are requested simultaneously,
* the erase operation is performed before the program one.
*
* @param Address: specifies the address to be programmed.
* @param Data: specifies the data to be programmed.
* @param Address specifies the address to be programmed.
* @param Data specifies the data to be programmed.
* @retval None
*/
static void FLASH_Program_Byte(uint32_t Address, uint8_t Data)

12
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_flash.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of FLASH HAL module.
******************************************************************************
* @attention
@ -209,7 +207,7 @@ typedef struct
*/
/**
* @brief Set the FLASH Latency.
* @param __LATENCY__: FLASH Latency
* @param __LATENCY__ FLASH Latency
* The value of this parameter depend on device used within the same series
* @retval none
*/
@ -258,7 +256,7 @@ typedef struct
/**
* @brief Enable the specified FLASH interrupt.
* @param __INTERRUPT__ : FLASH interrupt
* @param __INTERRUPT__ FLASH interrupt
* This parameter can be any combination of the following values:
* @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
* @arg FLASH_IT_ERR: Error Interrupt
@ -268,7 +266,7 @@ typedef struct
/**
* @brief Disable the specified FLASH interrupt.
* @param __INTERRUPT__ : FLASH interrupt
* @param __INTERRUPT__ FLASH interrupt
* This parameter can be any combination of the following values:
* @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
* @arg FLASH_IT_ERR: Error Interrupt
@ -278,7 +276,7 @@ typedef struct
/**
* @brief Get the specified FLASH flag status.
* @param __FLAG__: specifies the FLASH flag to check.
* @param __FLAG__ specifies the FLASH flag to check.
* This parameter can be one of the following values:
* @arg FLASH_FLAG_EOP : FLASH End of Operation flag
* @arg FLASH_FLAG_OPERR : FLASH operation Error flag
@ -293,7 +291,7 @@ typedef struct
/**
* @brief Clear the specified FLASH flag.
* @param __FLAG__: specifies the FLASH flags to clear.
* @param __FLAG__ specifies the FLASH flags to clear.
* This parameter can be any combination of the following values:
* @arg FLASH_FLAG_EOP : FLASH End of Operation flag
* @arg FLASH_FLAG_OPERR : FLASH operation Error flag

76
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_flash_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Extended FLASH HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the FLASH extension peripheral:
@ -164,10 +162,10 @@ extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
*/
/**
* @brief Perform a mass erase or erase the specified FLASH memory sectors
* @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
* @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
* contains the configuration information for the erasing.
*
* @param[out] SectorError: pointer to variable that
* @param[out] SectorError pointer to variable that
* contains the configuration information on faulty sector in case of error
* (0xFFFFFFFF means that all the sectors have been correctly erased)
*
@ -241,7 +239,7 @@ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t
/**
* @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
* @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
* @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
* contains the configuration information for the erasing.
*
* @retval HAL Status
@ -297,7 +295,7 @@ HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
/**
* @brief Program option bytes
* @param pOBInit: pointer to an FLASH_OBInitStruct structure that
* @param pOBInit pointer to an FLASH_OBInitStruct structure that
* contains the configuration information for the programming.
*
* @retval HAL Status
@ -396,7 +394,7 @@ HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
/**
* @brief Get the Option byte configuration
* @param pOBInit: pointer to an FLASH_OBInitStruct structure that
* @param pOBInit pointer to an FLASH_OBInitStruct structure that
* contains the configuration information for the programming.
*
* @retval None
@ -439,7 +437,7 @@ void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
#if defined (FLASH_OPTCR_nDBANK)
/**
* @brief Full erase of FLASH memory sectors
* @param VoltageRange: The device voltage range which defines the erase parallelism.
* @param VoltageRange The device voltage range which defines the erase parallelism.
* This parameter can be one of the following values:
* @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
* the operation will be done by byte (8-bit)
@ -449,7 +447,7 @@ void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
* the operation will be done by word (32-bit)
* @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
* the operation will be done by double word (64-bit)
* @param Banks: Banks to be erased
* @param Banks Banks to be erased
* This parameter can be one of the following values:
* @arg FLASH_BANK_1: Bank1 to be erased
* @arg FLASH_BANK_2: Bank2 to be erased
@ -488,9 +486,9 @@ static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
/**
* @brief Erase the specified FLASH memory sector
* @param Sector: FLASH sector to erase
* @param Sector FLASH sector to erase
* The value of this parameter depend on device used within the same series
* @param VoltageRange: The device voltage range which defines the erase parallelism.
* @param VoltageRange The device voltage range which defines the erase parallelism.
* This parameter can be one of the following values:
* @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
* the operation will be done by byte (8-bit)
@ -538,7 +536,7 @@ void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
FLASH->CR &= CR_PSIZE_MASK;
FLASH->CR |= tmp_psize;
CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
FLASH->CR |= FLASH_CR_STRT;
/* Data synchronous Barrier (DSB) Just after the write operation
@ -558,35 +556,35 @@ static uint32_t FLASH_OB_GetWRP(void)
/**
* @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
* @param Wwdg: Selects the IWDG mode
* @param Wwdg Selects the IWDG mode
* This parameter can be one of the following values:
* @arg OB_WWDG_SW: Software WWDG selected
* @arg OB_WWDG_HW: Hardware WWDG selected
* @param Iwdg: Selects the WWDG mode
* @param Iwdg Selects the WWDG mode
* This parameter can be one of the following values:
* @arg OB_IWDG_SW: Software IWDG selected
* @arg OB_IWDG_HW: Hardware IWDG selected
* @param Stop: Reset event when entering STOP mode.
* @param Stop Reset event when entering STOP mode.
* This parameter can be one of the following values:
* @arg OB_STOP_NO_RST: No reset generated when entering in STOP
* @arg OB_STOP_RST: Reset generated when entering in STOP
* @param Stdby: Reset event when entering Standby mode.
* @param Stdby Reset event when entering Standby mode.
* This parameter can be one of the following values:
* @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
* @arg OB_STDBY_RST: Reset generated when entering in STANDBY
* @param Iwdgstop: Independent watchdog counter freeze in Stop mode.
* @param Iwdgstop Independent watchdog counter freeze in Stop mode.
* This parameter can be one of the following values:
* @arg OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP
* @arg OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP
* @param Iwdgstdby: Independent watchdog counter freeze in standby mode.
* @param Iwdgstdby Independent watchdog counter freeze in standby mode.
* This parameter can be one of the following values:
* @arg OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY
* @arg OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY
* @param NDBank: Flash Single Bank mode enabled.
* @param NDBank Flash Single Bank mode enabled.
* This parameter can be one of the following values:
* @arg OB_NDBANK_SINGLE_BANK: enable 256 bits mode (Flash is a single bank)
* @arg OB_NDBANK_DUAL_BANK: disable 256 bits mode (Flash is a dual bank in 128 bits mode)
* @param NDBoot: Flash Dual boot mode disable.
* @param NDBoot Flash Dual boot mode disable.
* This parameter can be one of the following values:
* @arg OB_DUAL_BOOT_DISABLE: Disable Dual Boot
* @arg OB_DUAL_BOOT_ENABLE: Enable Dual Boot
@ -643,7 +641,7 @@ static uint32_t FLASH_OB_GetUser(void)
/**
* @brief Full erase of FLASH memory sectors
* @param VoltageRange: The device voltage range which defines the erase parallelism.
* @param VoltageRange The device voltage range which defines the erase parallelism.
* This parameter can be one of the following values:
* @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
* the operation will be done by byte (8-bit)
@ -672,9 +670,9 @@ static void FLASH_MassErase(uint8_t VoltageRange)
/**
* @brief Erase the specified FLASH memory sector
* @param Sector: FLASH sector to erase
* @param Sector FLASH sector to erase
* The value of this parameter depend on device used within the same series
* @param VoltageRange: The device voltage range which defines the erase parallelism.
* @param VoltageRange The device voltage range which defines the erase parallelism.
* This parameter can be one of the following values:
* @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
* the operation will be done by byte (8-bit)
@ -716,7 +714,7 @@ void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
FLASH->CR &= CR_PSIZE_MASK;
FLASH->CR |= tmp_psize;
FLASH->CR &= SECTOR_MASK;
FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
FLASH->CR |= FLASH_CR_STRT;
/* Data synchronous Barrier (DSB) Just after the write operation
@ -736,27 +734,27 @@ static uint32_t FLASH_OB_GetWRP(void)
/**
* @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
* @param Wwdg: Selects the IWDG mode
* @param Wwdg Selects the IWDG mode
* This parameter can be one of the following values:
* @arg OB_WWDG_SW: Software WWDG selected
* @arg OB_WWDG_HW: Hardware WWDG selected
* @param Iwdg: Selects the WWDG mode
* @param Iwdg Selects the WWDG mode
* This parameter can be one of the following values:
* @arg OB_IWDG_SW: Software IWDG selected
* @arg OB_IWDG_HW: Hardware IWDG selected
* @param Stop: Reset event when entering STOP mode.
* @param Stop Reset event when entering STOP mode.
* This parameter can be one of the following values:
* @arg OB_STOP_NO_RST: No reset generated when entering in STOP
* @arg OB_STOP_RST: Reset generated when entering in STOP
* @param Stdby: Reset event when entering Standby mode.
* @param Stdby Reset event when entering Standby mode.
* This parameter can be one of the following values:
* @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
* @arg OB_STDBY_RST: Reset generated when entering in STANDBY
* @param Iwdgstop: Independent watchdog counter freeze in Stop mode.
* @param Iwdgstop Independent watchdog counter freeze in Stop mode.
* This parameter can be one of the following values:
* @arg OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP
* @arg OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP
* @param Iwdgstdby: Independent watchdog counter freeze in standby mode.
* @param Iwdgstdby Independent watchdog counter freeze in standby mode.
* This parameter can be one of the following values:
* @arg OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY
* @arg OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY
@ -814,7 +812,7 @@ static uint32_t FLASH_OB_GetUser(void)
* it is not possible to program or erase the flash sector i if CortexM7
* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
*
* @param WRPSector: specifies the sector(s) to be write protected.
* @param WRPSector specifies the sector(s) to be write protected.
* This parameter can be one of the following values:
* @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 (for STM32F74xxx/STM32F75xxx devices)
* or a value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_11 (in Single Bank mode for STM32F76xxx/STM32F77xxx devices)
@ -849,7 +847,7 @@ static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector)
* it is not possible to program or erase the flash sector i if CortexM4
* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
*
* @param WRPSector: specifies the sector(s) to be write protected.
* @param WRPSector specifies the sector(s) to be write protected.
* This parameter can be one of the following values:
* @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 (for STM32F74xxx/STM32F75xxx devices)
* or a value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_11 (in Single Bank mode for STM32F76xxx/STM32F77xxx devices)
@ -880,7 +878,7 @@ static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector)
/**
* @brief Set the read protection level.
* @param Level: specifies the read protection level.
* @param Level specifies the read protection level.
* This parameter can be one of the following values:
* @arg OB_RDP_LEVEL_0: No protection
* @arg OB_RDP_LEVEL_1: Read protection of the memory
@ -910,7 +908,7 @@ static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
/**
* @brief Set the BOR Level.
* @param Level: specifies the Option Bytes BOR Reset Level.
* @param Level specifies the Option Bytes BOR Reset Level.
* This parameter can be one of the following values:
* @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
* @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
@ -933,11 +931,11 @@ static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
/**
* @brief Configure Boot base address.
*
* @param BootOption : specifies Boot base address depending from Boot pin = 0 or pin = 1
* @param BootOption specifies Boot base address depending from Boot pin = 0 or pin = 1
* This parameter can be one of the following values:
* @arg OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0
* @arg OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1
* @param Address: specifies Boot base address
* @param Address specifies Boot base address
* This parameter can be one of the following values:
* @arg OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000)
* @arg OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000)
@ -1019,7 +1017,7 @@ static uint32_t FLASH_OB_GetBOR(void)
/**
* @brief Configure Boot base address.
*
* @param BootOption : specifies Boot base address depending from Boot pin = 0 or pin = 1
* @param BootOption specifies Boot base address depending from Boot pin = 0 or pin = 1
* This parameter can be one of the following values:
* @arg OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0
* @arg OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1
@ -1053,7 +1051,7 @@ static uint32_t FLASH_OB_GetBootAddress(uint32_t BootOption)
#if defined (FLASH_OPTCR2_PCROP)
/**
* @brief Set the PCROP protection for sectors.
* @param PCROPSector: specifies the sector(s) to be PCROP protected.
* @param PCROPSector specifies the sector(s) to be PCROP protected.
* This parameter can be one of the following values:
* @arg OB_PCROP_SECTOR_x: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_7
* @arg OB_PCROP_SECTOR_ALL
@ -1080,7 +1078,7 @@ static HAL_StatusTypeDef FLASH_OB_PCROP_Config(uint32_t PCROPSector)
/**
* @brief Set the PCROP_RDP value
* @param Pcrop_Rdp: specifies the PCROP_RDP bit value.
* @param Pcrop_Rdp specifies the PCROP_RDP bit value.
*
* @retval HAL Status
*/

4
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_flash_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of FLASH HAL Extension module.
******************************************************************************
* @attention
@ -480,7 +478,7 @@ typedef struct
/**
* @brief Calculate the FLASH Boot Base Adress (BOOT_ADD0 or BOOT_ADD1)
* @note Returned value BOOT_ADDx[15:0] corresponds to boot address [29:14].
* @param __ADDRESS__: FLASH Boot Address (in the range 0x0000 0000 to 0x2004 FFFF with a granularity of 16KB)
* @param __ADDRESS__ FLASH Boot Address (in the range 0x0000 0000 to 0x2004 FFFF with a granularity of 16KB)
* @retval The FLASH Boot Base Adress
*/
#define __HAL_FLASH_CALC_BOOT_BASE_ADR(__ADDRESS__) ((__ADDRESS__) >> 14)

32
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_gpio.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief GPIO HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the General Purpose Input/Output (GPIO) peripheral:
@ -179,8 +177,8 @@
/**
* @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral.
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* @param GPIOx where x can be (A..K) to select the GPIO peripheral.
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
@ -304,8 +302,8 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
/**
* @brief De-initializes the GPIOx peripheral registers to their default reset values.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bit to be written.
* @param GPIOx where x can be (A..K) to select the GPIO peripheral.
* @param GPIO_Pin specifies the port bit to be written.
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
* @retval None
*/
@ -384,8 +382,8 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
/**
* @brief Reads the specified input port pin.
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bit to read.
* @param GPIOx where x can be (A..K) to select the GPIO peripheral.
* @param GPIO_Pin specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
@ -414,10 +412,10 @@ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
* accesses. In this way, there is no risk of an IRQ occurring between
* the read and the modify access.
*
* @param GPIOx: where x can be (A..K) to select the GPIO peripheral.
* @param GPIO_Pin: specifies the port bit to be written.
* @param GPIOx where x can be (A..K) to select the GPIO peripheral.
* @param GPIO_Pin specifies the port bit to be written.
* This parameter can be one of GPIO_PIN_x where x can be (0..15).
* @param PinState: specifies the value to be written to the selected bit.
* @param PinState specifies the value to be written to the selected bit.
* This parameter can be one of the GPIO_PinState enum values:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
@ -441,8 +439,8 @@ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState Pin
/**
* @brief Toggles the specified GPIO pins.
* @param GPIOx: Where x can be (A..I) to select the GPIO peripheral.
* @param GPIO_Pin: Specifies the pins to be toggled.
* @param GPIOx Where x can be (A..I) to select the GPIO peripheral.
* @param GPIO_Pin Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
@ -459,8 +457,8 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
* GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
* @note The configuration of the locked GPIO pins can no longer be modified
* until the next reset.
* @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F7 family
* @param GPIO_Pin: specifies the port bit to be locked.
* @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F7 family
* @param GPIO_Pin specifies the port bit to be locked.
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
* @retval None
*/
@ -494,7 +492,7 @@ HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
/**
* @brief This function handles EXTI interrupt request.
* @param GPIO_Pin: Specifies the pins connected EXTI line
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
@ -509,7 +507,7 @@ void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
/**
* @brief EXTI line detection callbacks.
* @param GPIO_Pin: Specifies the pins connected EXTI line
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)

12
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_gpio.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of GPIO HAL module.
******************************************************************************
* @attention
@ -187,7 +185,7 @@ typedef enum
/**
* @brief Checks whether the specified EXTI line flag is set or not.
* @param __EXTI_LINE__: specifies the EXTI line flag to check.
* @param __EXTI_LINE__ specifies the EXTI line flag to check.
* This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval The new state of __EXTI_LINE__ (SET or RESET).
*/
@ -195,7 +193,7 @@ typedef enum
/**
* @brief Clears the EXTI's line pending flags.
* @param __EXTI_LINE__: specifies the EXTI lines flags to clear.
* @param __EXTI_LINE__ specifies the EXTI lines flags to clear.
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
* @retval None
*/
@ -203,7 +201,7 @@ typedef enum
/**
* @brief Checks whether the specified EXTI line is asserted or not.
* @param __EXTI_LINE__: specifies the EXTI line to check.
* @param __EXTI_LINE__ specifies the EXTI line to check.
* This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval The new state of __EXTI_LINE__ (SET or RESET).
*/
@ -211,7 +209,7 @@ typedef enum
/**
* @brief Clears the EXTI's line pending bits.
* @param __EXTI_LINE__: specifies the EXTI lines to clear.
* @param __EXTI_LINE__ specifies the EXTI lines to clear.
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
* @retval None
*/
@ -219,7 +217,7 @@ typedef enum
/**
* @brief Generates a Software interrupt on selected EXTI line.
* @param __EXTI_LINE__: specifies the EXTI line to check.
* @param __EXTI_LINE__ specifies the EXTI line to check.
* This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval None
*/

4
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_gpio_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of GPIO HAL Extension module.
******************************************************************************
* @attention
@ -397,7 +395,7 @@
#define GPIOI_PIN_AVAILABLE GPIO_PIN_All
#define GPIOJ_PIN_AVAILABLE GPIO_PIN_All
#define GPIOH_PIN_AVAILABLE GPIO_PIN_All
#define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_4 | \
#define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | \
GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7)
/**

136
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_hash.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief HASH HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the HASH peripheral:
@ -133,7 +131,7 @@ static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size);
/**
* @brief DMA HASH Input Data complete callback.
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma)
@ -205,7 +203,7 @@ static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA HASH communication error callback.
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void HASH_DMAError(DMA_HandleTypeDef *hdma)
@ -217,8 +215,8 @@ static void HASH_DMAError(DMA_HandleTypeDef *hdma)
/**
* @brief Writes the input buffer in data register.
* @param pInBuffer: Pointer to input buffer
* @param Size: The size of input buffer
* @param pInBuffer Pointer to input buffer
* @param Size The size of input buffer
* @retval None
*/
static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size)
@ -235,8 +233,8 @@ static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size)
/**
* @brief Provides the message digest result.
* @param pMsgDigest: Pointer to the message digest
* @param Size: The size of the message digest in bytes
* @param pMsgDigest Pointer to the message digest
* @param Size The size of the message digest in bytes
* @retval None
*/
static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
@ -337,7 +335,7 @@ static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
/**
* @brief Initializes the HASH according to the specified parameters in the
HASH_HandleTypeDef and creates the associated handle.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval HAL status
*/
@ -384,7 +382,7 @@ HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash)
/**
* @brief DeInitializes the HASH peripheral.
* @note This API must be called before starting a new processing.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval HAL status
*/
@ -422,7 +420,7 @@ HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash)
/**
* @brief Initializes the HASH MSP.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval None
*/
@ -438,7 +436,7 @@ __weak void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash)
/**
* @brief DeInitializes HASH MSP.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval None
*/
@ -454,7 +452,7 @@ __weak void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash)
/**
* @brief Input data transfer complete callback.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval None
*/
@ -470,7 +468,7 @@ __weak void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash)
/**
* @brief Data transfer Error callback.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval None
*/
@ -487,7 +485,7 @@ __weak void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash)
/**
* @brief Digest computation complete callback. It is used only with interrupt.
* @note This callback is not relevant with DMA.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval None
*/
@ -524,15 +522,15 @@ __weak void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash)
/**
* @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer.
The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is multiple of 64 bytes, appending the input buffer is possible.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware
* and appending the input buffer is no more possible.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 16 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
@ -601,10 +599,10 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff
/**
* @brief Initializes the HASH peripheral in MD5 mode then writes the pInBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is multiple of 64 bytes, appending the input buffer is possible.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware
* and appending the input buffer is no more possible.
@ -648,13 +646,13 @@ HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pI
/**
* @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
@ -723,10 +721,10 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf
/**
* @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @note Input buffer size in bytes must be a multiple of 4 otherwise the digest computation is corrupted.
* @retval HAL status
@ -792,12 +790,12 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *p
/**
* @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer.
* The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
* @param pOutBuffer Pointer to the computed digest. Its size must be 16 bytes.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
@ -954,12 +952,12 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInB
/**
* @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
* The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
@ -1114,7 +1112,7 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pIn
/**
* @brief This function handles HASH interrupt request.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval None
*/
@ -1158,10 +1156,10 @@ void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash)
/**
* @brief Initializes the HASH peripheral in MD5 mode then enables DMA to
control data transfer. Use HAL_HASH_MD5_Finish() to get the digest.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -1209,10 +1207,10 @@ HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pIn
/**
* @brief Returns the computed digest in MD5 mode
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pOutBuffer: Pointer to the computed digest. Its size must be 16 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 16 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
@ -1262,10 +1260,10 @@ HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBu
/**
* @brief Initializes the HASH peripheral in SHA1 mode then enables DMA to
control data transfer. Use HAL_HASH_SHA1_Finish() to get the digest.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -1314,10 +1312,10 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pI
/**
* @brief Returns the computed digest in SHA1 mode.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
@ -1387,13 +1385,13 @@ HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutB
/**
* @brief Initializes the HASH peripheral in HMAC MD5 mode
* then processes pInBuffer. The digest is available in pOutBuffer
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
@ -1532,13 +1530,13 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuff
/**
* @brief Initializes the HASH peripheral in HMAC SHA1 mode
* then processes pInBuffer. The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
@ -1696,10 +1694,10 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuf
/**
* @brief Initializes the HASH peripheral in HMAC MD5 mode
* then enables DMA to control data transfer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -1763,10 +1761,10 @@ HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pIn
/**
* @brief Initializes the HASH peripheral in HMAC SHA1 mode
* then enables DMA to control data transfer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -1847,7 +1845,7 @@ HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pI
/**
* @brief return the HASH state
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval HAL state
*/

8
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_hash.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of HASH HAL module.
******************************************************************************
* @attention
@ -225,13 +223,13 @@ typedef struct
*/
/** @brief Reset HASH handle state
* @param __HANDLE__: specifies the HASH handle.
* @param __HANDLE__ specifies the HASH handle.
* @retval None
*/
#define __HAL_HASH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_HASH_STATE_RESET)
/** @brief Check whether the specified HASH flag is set or not.
* @param __FLAG__: specifies the flag to check.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg HASH_FLAG_DINIS: A new block can be entered into the input buffer.
* @arg HASH_FLAG_DCIS: Digest calculation complete
@ -264,7 +262,7 @@ typedef struct
/**
* @brief Set the number of valid bits in last word written in Data register
* @param SIZE: size in byte of last data written in Data register.
* @param SIZE size in byte of last data written in Data register.
* @retval None
*/
#define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBW);\

120
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_hash_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief HASH HAL Extension module driver.
* This file provides firmware functions to manage the following
* functionalities of HASH peripheral:
@ -131,8 +129,8 @@ static void HASHEx_DMAError(DMA_HandleTypeDef *hdma);
/**
* @brief Writes the input buffer in data register.
* @param pInBuffer: Pointer to input buffer
* @param Size: The size of input buffer
* @param pInBuffer Pointer to input buffer
* @param Size The size of input buffer
* @retval None
*/
static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size)
@ -149,8 +147,8 @@ static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size)
/**
* @brief Provides the message digest result.
* @param pMsgDigest: Pointer to the message digest
* @param Size: The size of the message digest in bytes
* @param pMsgDigest Pointer to the message digest
* @param Size The size of the message digest in bytes
* @retval None
*/
static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
@ -222,7 +220,7 @@ static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
/**
* @brief DMA HASH Input Data complete callback.
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma)
@ -294,7 +292,7 @@ static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA HASH communication error callback.
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void HASHEx_DMAError(DMA_HandleTypeDef *hdma)
@ -332,13 +330,13 @@ static void HASHEx_DMAError(DMA_HandleTypeDef *hdma)
/**
* @brief Initializes the HASH peripheral in SHA224 mode
* then processes pInBuffer. The digest is available in pOutBuffer
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
* @param Timeout: Specify Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 28 bytes.
* @param Timeout Specify Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
@ -408,13 +406,13 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pI
/**
* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
* @param Timeout: Specify Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 32 bytes.
* @param Timeout Specify Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
@ -485,10 +483,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI
/**
* @brief Initializes the HASH peripheral in SHA224 mode
* then processes pInBuffer. The digest is available in pOutBuffer
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -531,10 +529,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Accumulate(HASH_HandleTypeDef *hhash, uint8_
/**
* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -597,13 +595,13 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Accumulate(HASH_HandleTypeDef *hhash, uint8_
/**
* @brief Initializes the HASH peripheral in HMAC SHA224 mode
* then processes pInBuffer. The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
@ -741,13 +739,13 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pI
/**
* @brief Initializes the HASH peripheral in HMAC SHA256 mode
* then processes pInBuffer. The digest is available in pOutBuffer
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
@ -908,12 +906,12 @@ HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pI
/**
* @brief Initializes the HASH peripheral in SHA224 mode then processes pInBuffer.
* The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
@ -1056,12 +1054,12 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
/**
* @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
* The digest is available in pOutBuffer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
* @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
@ -1207,7 +1205,7 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t
/**
* @brief This function handles HASH interrupt request.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @retval None
*/
@ -1253,10 +1251,10 @@ void HAL_HASHEx_IRQHandler(HASH_HandleTypeDef *hhash)
/**
* @brief Initializes the HASH peripheral in SHA224 mode then enables DMA to
control data transfer. Use HAL_HASH_SHA224_Finish() to get the digest.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -1304,10 +1302,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t
/**
* @brief Returns the computed digest in SHA224
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 28 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
@ -1357,10 +1355,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t* p
/**
* @brief Initializes the HASH peripheral in SHA256 mode then enables DMA to
control data transfer. Use HAL_HASH_SHA256_Finish() to get the digest.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -1408,10 +1406,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t
/**
* @brief Returns the computed digest in SHA256.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
* @param Timeout: Timeout value
* @param pOutBuffer Pointer to the computed digest. Its size must be 32 bytes.
* @param Timeout Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
@ -1481,10 +1479,10 @@ HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t* p
/**
* @brief Initializes the HASH peripheral in HMAC SHA224 mode
* then enables DMA to control data transfer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/
@ -1548,10 +1546,10 @@ HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t
/**
* @brief Initializes the HASH peripheral in HMAC SHA256 mode
* then enables DMA to control data transfer.
* @param hhash: pointer to a HASH_HandleTypeDef structure that contains
* @param hhash pointer to a HASH_HandleTypeDef structure that contains
* the configuration information for HASH module
* @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
* @param Size: Length of the input buffer in bytes.
* @param pInBuffer Pointer to the input buffer (buffer to be hashed).
* @param Size Length of the input buffer in bytes.
* If the Size is not multiple of 64 bytes, the padding is managed by hardware.
* @retval HAL status
*/

2
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_hash_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of HASH HAL Extension module.
******************************************************************************
* @attention

190
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_hcd.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief HCD HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the USB Peripheral Controller:
@ -121,7 +119,7 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd);
/**
* @brief Initialize the host driver.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
@ -159,25 +157,25 @@ HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
/**
* @brief Initialize a host channel.
* @param hhcd: HCD handle
* @param ch_num: Channel number.
* @param hhcd HCD handle
* @param ch_num Channel number.
* This parameter can be a value from 1 to 15
* @param epnum: Endpoint number.
* @param epnum Endpoint number.
* This parameter can be a value from 1 to 15
* @param dev_address : Current device address
* @param dev_address Current device address
* This parameter can be a value from 0 to 255
* @param speed: Current device speed.
* @param speed Current device speed.
* This parameter can be one of these values:
* HCD_SPEED_HIGH: High speed mode,
* HCD_SPEED_FULL: Full speed mode,
* HCD_SPEED_LOW: Low speed mode
* @param ep_type: Endpoint Type.
* @param ep_type Endpoint Type.
* This parameter can be one of these values:
* EP_TYPE_CTRL: Control type,
* EP_TYPE_ISOC: Isochronous type,
* EP_TYPE_BULK: Bulk type,
* EP_TYPE_INTR: Interrupt type
* @param mps: Max Packet Size.
* @param mps Max Packet Size.
* This parameter can be a value from 0 to32K
* @retval HAL status
*/
@ -192,7 +190,7 @@ HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
HAL_StatusTypeDef status = HAL_OK;
__HAL_LOCK(hhcd);
hhcd->hc[ch_num].do_ping = 0;
hhcd->hc[ch_num].dev_addr = dev_address;
hhcd->hc[ch_num].max_packet = mps;
hhcd->hc[ch_num].ch_num = ch_num;
@ -200,7 +198,8 @@ HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
hhcd->hc[ch_num].ep_num = epnum & 0x7F;
hhcd->hc[ch_num].ep_is_in = ((epnum & 0x80) == 0x80);
hhcd->hc[ch_num].speed = speed;
/* reset to 0 */
// MBED: added
hhcd->hc[ch_num].toggle_out = 0;
hhcd->hc[ch_num].toggle_in = 0;
@ -218,8 +217,8 @@ HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
/**
* @brief Halt a host channel.
* @param hhcd: HCD handle
* @param ch_num: Channel number.
* @param hhcd HCD handle
* @param ch_num Channel number.
* This parameter can be a value from 1 to 15
* @retval HAL status
*/
@ -236,7 +235,7 @@ HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num)
/**
* @brief DeInitialize the host driver.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd)
@ -261,7 +260,7 @@ HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd)
/**
* @brief Initialize the HCD MSP.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval None
*/
__weak void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd)
@ -276,7 +275,7 @@ __weak void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd)
/**
* @brief DeInitialize the HCD MSP.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval None
*/
__weak void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd)
@ -309,24 +308,24 @@ __weak void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd)
/**
* @brief Submit a new URB for processing.
* @param hhcd: HCD handle
* @param ch_num: Channel number.
* @param hhcd HCD handle
* @param ch_num Channel number.
* This parameter can be a value from 1 to 15
* @param direction: Channel number.
* @param direction Channel number.
* This parameter can be one of these values:
* 0 : Output / 1 : Input
* @param ep_type: Endpoint Type.
* @param ep_type Endpoint Type.
* This parameter can be one of these values:
* EP_TYPE_CTRL: Control type/
* EP_TYPE_ISOC: Isochronous type/
* EP_TYPE_BULK: Bulk type/
* EP_TYPE_INTR: Interrupt type/
* @param token: Endpoint Type.
* @param token Endpoint Type.
* This parameter can be one of these values:
* 0: HC_PID_SETUP / 1: HC_PID_DATA1
* @param pbuff: pointer to URB data
* @param length: Length of URB data
* @param do_ping: activate do ping protocol (for high speed only).
* @param pbuff pointer to URB data
* @param length Length of URB data
* @param do_ping activate do ping protocol (for high speed only).
* This parameter can be one of these values:
* 0 : do ping inactive / 1 : do ping active
* @retval HAL status
@ -340,6 +339,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
uint16_t length,
uint8_t do_ping)
{
// MBED: added
if ((hhcd->hc[ch_num].ep_is_in != direction)) {
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
/* reconfigure the endpoint !!! from tx -> rx, and rx ->tx */
@ -359,6 +359,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
if (direction == 1) hhcd->hc[ch_num].toggle_in=1;
}
}
hhcd->hc[ch_num].ep_type = ep_type;
if(token == 0)
@ -388,13 +389,10 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
}
else
{ /* Put the PID 1 */
hhcd->hc[ch_num].data_pid = HC_PID_DATA1 ;
}
if(hhcd->hc[ch_num].urb_state != URB_NOTREADY)
{
hhcd->hc[ch_num].do_ping = do_ping;
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
}
}
// MBED: added
else if ((token == 1) && (direction == 1))
{
if( hhcd->hc[ch_num].toggle_in == 0)
@ -419,11 +417,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
}
else
{ /* Put the PID 1 */
hhcd->hc[ch_num].data_pid = HC_PID_DATA1 ;
}
if(hhcd->hc[ch_num].urb_state != URB_NOTREADY)
{
hhcd->hc[ch_num].do_ping = do_ping;
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
}
}
else
@ -482,7 +476,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
/**
* @brief Handle HCD interrupt request.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval None
*/
void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd)
@ -585,7 +579,7 @@ void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd)
/**
* @brief SOF callback.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval None
*/
__weak void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd)
@ -600,7 +594,7 @@ __weak void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd)
/**
* @brief Connection Event callback.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval None
*/
__weak void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
@ -615,7 +609,7 @@ __weak void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
/**
* @brief Disconnection Event callback.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval None
*/
__weak void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd)
@ -629,9 +623,37 @@ __weak void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd)
}
/**
* @brief Notify URB state change callback.
* @brief Port Enabled Event callback.
* @param hhcd: HCD handle
* @param chnum: Channel number.
* @retval None
*/
__weak void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hhcd);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_HCD_Disconnect_Callback could be implemented in the user file
*/
}
/**
* @brief Port Disabled Event callback.
* @param hhcd: HCD handle
* @retval None
*/
__weak void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hhcd);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_HCD_Disconnect_Callback could be implemented in the user file
*/
}
/**
* @brief Notify URB state change callback.
* @param hhcd HCD handle
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @param urb_state:
* This parameter can be one of these values:
@ -674,7 +696,7 @@ __weak void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t
/**
* @brief Start the host driver.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd)
@ -688,7 +710,7 @@ HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd)
/**
* @brief Stop the host driver.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval HAL status
*/
@ -702,7 +724,7 @@ HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd)
/**
* @brief Reset the host port.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd)
@ -731,7 +753,7 @@ HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd)
/**
* @brief Return the HCD handle state.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval HAL state
*/
HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd)
@ -741,8 +763,8 @@ HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd)
/**
* @brief Return URB state for a channel.
* @param hhcd: HCD handle
* @param chnum: Channel number.
* @param hhcd HCD handle
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @retval URB state.
* This parameter can be one of these values:
@ -761,8 +783,8 @@ HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnu
/**
* @brief Return the last host transfer size.
* @param hhcd: HCD handle
* @param chnum: Channel number.
* @param hhcd HCD handle
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @retval last transfer size in byte
*/
@ -773,8 +795,8 @@ uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum)
/**
* @brief Return the Host Channel state.
* @param hhcd: HCD handle
* @param chnum: Channel number.
* @param hhcd HCD handle
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @retval Host channel state
* This parameter can be one of these values:
@ -795,7 +817,7 @@ HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum)
/**
* @brief Return the current Host frame number.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval Current Host frame number
*/
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd)
@ -805,7 +827,7 @@ uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd)
/**
* @brief Return the Host enumeration speed.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval Enumeration speed
*/
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd)
@ -826,8 +848,8 @@ uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd)
*/
/**
* @brief Handle Host Channel IN interrupt requests.
* @param hhcd: HCD handle
* @param chnum: Channel number.
* @param hhcd HCD handle
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @retval none
*/
@ -903,7 +925,7 @@ static void HCD_HC_IN_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
}
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_CHH)
{
int reactivate = 0;
int reactivate = 0; // MBED: added
__HAL_HCD_MASK_HALT_HC_INT(chnum);
if(hhcd->hc[chnum].state == HC_XFRC)
@ -932,13 +954,24 @@ static void HCD_HC_IN_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
/* re-activate the channel */
tmpreg = USBx_HC(chnum)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
// MBED: changed
if ( hhcd->hc[chnum].urb_state != URB_ERROR) {
tmpreg |= USB_OTG_HCCHAR_CHENA;
reactivate = 1;
}
USBx_HC(chnum)->HCCHAR = tmpreg;
}
else if (hhcd->hc[chnum].state == HC_NAK)
{
hhcd->hc[chnum].urb_state = URB_NOTREADY;
/* re-activate the channel */
tmpreg = USBx_HC(chnum)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(chnum)->HCCHAR = tmpreg;
}
__HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH);
// MBED: changed
if (hhcd->hc[chnum].state == 0) reactivate = 1;
if (reactivate == 0 )HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
}
@ -955,27 +988,29 @@ static void HCD_HC_IN_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
if(hhcd->hc[chnum].ep_type == EP_TYPE_INTR)
{
hhcd->hc[chnum].ErrCnt = 0;
__HAL_HCD_UNMASK_HALT_HC_INT(chnum);
USB_HC_Halt(hhcd->Instance, chnum);
}
else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL)||
(hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
{
/* re-activate the channel */
tmpreg = USBx_HC(chnum)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(chnum)->HCCHAR = tmpreg;
}
hhcd->hc[chnum].ErrCnt = 0;
if (!hhcd->Init.dma_enable)
{
hhcd->hc[chnum].state = HC_NAK;
__HAL_HCD_UNMASK_HALT_HC_INT(chnum);
USB_HC_Halt(hhcd->Instance, chnum);
}
}
__HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
}
}
/**
* @brief Handle Host Channel OUT interrupt requests.
* @param hhcd: HCD handle
* @param chnum: Channel number.
* @param hhcd HCD handle
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @retval none
*/
@ -992,24 +1027,23 @@ static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_ACK)
{
__HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK);
if( hhcd->hc[chnum].do_ping == 1)
{
hhcd->hc[chnum].state = HC_NYET;
hhcd->hc[chnum].do_ping = 0;
hhcd->hc[chnum].urb_state = URB_NOTREADY;
__HAL_HCD_UNMASK_HALT_HC_INT(chnum);
USB_HC_Halt(hhcd->Instance, chnum);
hhcd->hc[chnum].urb_state = URB_NOTREADY;
}
}
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_NYET)
{
hhcd->hc[chnum].state = HC_NYET;
hhcd->hc[chnum].do_ping = 1;
hhcd->hc[chnum].ErrCnt= 0;
__HAL_HCD_UNMASK_HALT_HC_INT(chnum);
USB_HC_Halt(hhcd->Instance, chnum);
__HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NYET);
}
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_FRMOR)
@ -1040,9 +1074,18 @@ static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_NAK)
{
hhcd->hc[chnum].ErrCnt = 0;
hhcd->hc[chnum].state = HC_NAK;
if ( hhcd->hc[chnum].do_ping == 0)
{
if (hhcd->hc[chnum].speed == HCD_SPEED_HIGH)
{
hhcd->hc[chnum].do_ping = 1;
}
}
__HAL_HCD_UNMASK_HALT_HC_INT(chnum);
USB_HC_Halt(hhcd->Instance, chnum);
hhcd->hc[chnum].state = HC_NAK;
__HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
}
@ -1063,7 +1106,6 @@ static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
hhcd->hc[chnum].state = HC_DATATGLERR;
}
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_CHH)
{
__HAL_HCD_MASK_HALT_HC_INT(chnum);
@ -1084,7 +1126,6 @@ static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
else if (hhcd->hc[chnum].state == HC_NYET)
{
hhcd->hc[chnum].urb_state = URB_NOTREADY;
hhcd->hc[chnum].do_ping = 0;
}
else if (hhcd->hc[chnum].state == HC_STALL)
@ -1119,7 +1160,7 @@ static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
/**
* @brief Handle Rx Queue Level interrupt requests.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval none
*/
static void HCD_RXQLVL_IRQHandler (HCD_HandleTypeDef *hhcd)
@ -1172,7 +1213,7 @@ static void HCD_RXQLVL_IRQHandler (HCD_HandleTypeDef *hhcd)
/**
* @brief Handle Host Port interrupt requests.
* @param hhcd: HCD handle
* @param hhcd HCD handle
* @retval None
*/
static void HCD_Port_IRQHandler (HCD_HandleTypeDef *hhcd)
@ -1224,11 +1265,14 @@ static void HCD_Port_IRQHandler (HCD_HandleTypeDef *hhcd)
USBx_HOST->HFIR = (uint32_t)60000;
}
}
HAL_HCD_PortEnabled_Callback(hhcd);
HAL_HCD_Connect_Callback(hhcd);
}
else
{
HAL_HCD_PortDisabled_Callback(hhcd);
/* Cleanup HPRT */
USBx_HPRT0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );

4
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_hcd.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of HCD HAL module.
******************************************************************************
* @attention
@ -193,6 +191,8 @@ void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
uint8_t chnum,
HCD_URBStateTypeDef urb_state);

750
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.c
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File diff suppressed because it is too large Load Diff

34
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.h
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@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_i2c.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of I2C HAL module.
******************************************************************************
* @attention
@ -40,7 +38,7 @@
#define __STM32F7xx_HAL_I2C_H
#ifdef __cplusplus
extern "C" {
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
@ -90,7 +88,7 @@ typedef struct
uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
}I2C_InitTypeDef;
} I2C_InitTypeDef;
/**
* @}
@ -139,7 +137,7 @@ typedef enum
HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
}HAL_I2C_StateTypeDef;
} HAL_I2C_StateTypeDef;
/**
* @}
@ -170,7 +168,7 @@ typedef enum
HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
}HAL_I2C_ModeTypeDef;
} HAL_I2C_ModeTypeDef;
/**
* @}
@ -213,7 +211,7 @@ typedef struct __I2C_HandleTypeDef
__IO uint32_t PreviousState; /*!< I2C communication Previous state */
HAL_StatusTypeDef (*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
@ -228,7 +226,7 @@ typedef struct __I2C_HandleTypeDef
__IO uint32_t ErrorCode; /*!< I2C Error code */
__IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
}I2C_HandleTypeDef;
} I2C_HandleTypeDef;
/**
* @}
*/
@ -250,6 +248,7 @@ typedef struct __I2C_HandleTypeDef
#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
/**
* @}
*/
@ -337,9 +336,9 @@ typedef struct __I2C_HandleTypeDef
* @{
*/
#define I2C_NO_STARTSTOP (0x00000000U)
#define I2C_GENERATE_STOP I2C_CR2_STOP
#define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
#define I2C_GENERATE_START_WRITE I2C_CR2_START
#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
/**
* @}
*/
@ -506,7 +505,7 @@ typedef struct __I2C_HandleTypeDef
#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
* @param __HANDLE__: specifies the I2C Handle.
* @param __HANDLE__ specifies the I2C Handle.
* @retval None
*/
#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
@ -527,7 +526,7 @@ typedef struct __I2C_HandleTypeDef
*/
/* Initialization and de-initialization functions******************************/
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
/**
@ -538,7 +537,7 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
* @{
*/
/* IO operation functions ****************************************************/
/******* Blocking mode: Polling */
/******* Blocking mode: Polling */
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
@ -547,7 +546,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
/******* Non-Blocking mode: Interrupt */
/******* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
@ -563,7 +562,7 @@ HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
/******* Non-Blocking mode: DMA */
/******* Non-Blocking mode: DMA */
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
@ -661,7 +660,8 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
((REQUEST) == I2C_NEXT_FRAME) || \
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
((REQUEST) == I2C_LAST_FRAME))
((REQUEST) == I2C_LAST_FRAME) || \
((REQUEST) == I2C_LAST_FRAME_NO_STOP))
#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))

11
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_i2c_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief I2C Extended HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of I2C Extended peripheral:
@ -113,7 +111,7 @@ HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
if(hi2c->State == HAL_I2C_STATE_READY)
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hi2c);
@ -159,7 +157,7 @@ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
if(hi2c->State == HAL_I2C_STATE_READY)
if (hi2c->State == HAL_I2C_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hi2c);
@ -196,7 +194,7 @@ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_
}
}
#if defined(SYSCFG_PMC_I2C1_FMP)
#if (defined(SYSCFG_PMC_I2C_PB6_FMP) || defined(SYSCFG_PMC_I2C_PB7_FMP)) || (defined(SYSCFG_PMC_I2C_PB8_FMP) || defined(SYSCFG_PMC_I2C_PB9_FMP)) || (defined(SYSCFG_PMC_I2C1_FMP)) || (defined(SYSCFG_PMC_I2C2_FMP)) || defined(SYSCFG_PMC_I2C3_FMP) || defined(SYSCFG_PMC_I2C4_FMP)
/**
* @brief Enable the I2C fast mode plus driving capability.
* @param ConfigFastModePlus Selects the pin.
@ -254,7 +252,8 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
/* Disable fast mode plus driving capability for selected pin */
CLEAR_BIT(SYSCFG->PMC, (uint32_t)ConfigFastModePlus);
}
#endif /* SYSCFG_PMC_I2C1_FMP */
#endif
/**
* @}
*/

8
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_i2c_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of I2C HAL Extended module.
******************************************************************************
* @attention
@ -40,7 +38,7 @@
#define __STM32F7xx_HAL_I2C_EX_H
#ifdef __cplusplus
extern "C" {
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
@ -131,10 +129,10 @@
/* Peripheral Control functions ************************************************/
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
#if defined(SYSCFG_PMC_I2C1_FMP)
#if (defined(SYSCFG_PMC_I2C_PB6_FMP) || defined(SYSCFG_PMC_I2C_PB7_FMP)) || (defined(SYSCFG_PMC_I2C_PB8_FMP) || defined(SYSCFG_PMC_I2C_PB9_FMP)) || (defined(SYSCFG_PMC_I2C1_FMP)) || (defined(SYSCFG_PMC_I2C2_FMP)) || defined(SYSCFG_PMC_I2C3_FMP) || defined(SYSCFG_PMC_I2C4_FMP)
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
#endif /* SYSCFG_PMC_I2C1_FMP */
#endif
/* Private constants ---------------------------------------------------------*/
/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants

96
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_i2s.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief I2S HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Integrated Interchip Sound (I2S) peripheral:
@ -209,7 +207,7 @@ static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s,
/**
* @brief Initializes the I2S according to the specified parameters
* in the I2S_InitTypeDef and create the associated handle.
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval HAL status
*/
@ -342,7 +340,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
/**
* @brief DeInitializes the I2S peripheral
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval HAL status
*/
@ -373,7 +371,7 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
/**
* @brief I2S MSP Init
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
@ -389,7 +387,7 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
/**
* @brief I2S MSP DeInit
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
@ -451,15 +449,15 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
/**
* @brief Transmit an amount of data in blocking mode
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @param pData: a 16-bit pointer to data buffer.
* @param Size: number of data sample to be sent:
* @param pData a 16-bit pointer to data buffer.
* @param Size number of data sample to be sent:
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
* configuration phase, the Size parameter means the number of 16-bit data length
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
* the Size parameter means the number of 16-bit data length.
* @param Timeout: Timeout duration
* @param Timeout Timeout duration
* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
* between Master and Slave(example: audio streaming).
* @retval HAL status
@ -556,15 +554,15 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin
/**
* @brief Receive an amount of data in blocking mode
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @param pData: a 16-bit pointer to data buffer.
* @param Size: number of data sample to be sent:
* @param pData a 16-bit pointer to data buffer.
* @param Size number of data sample to be sent:
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
* configuration phase, the Size parameter means the number of 16-bit data length
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
* the Size parameter means the number of 16-bit data length.
* @param Timeout: Timeout duration
* @param Timeout Timeout duration
* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
* between Master and Slave(example: audio streaming).
* @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
@ -659,10 +657,10 @@ HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint
/**
* @brief Transmit an amount of data in non-blocking mode with Interrupt
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @param pData: a 16-bit pointer to data buffer.
* @param Size: number of data sample to be sent:
* @param pData a 16-bit pointer to data buffer.
* @param Size number of data sample to be sent:
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
* configuration phase, the Size parameter means the number of 16-bit data length
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
@ -722,10 +720,10 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData,
/**
* @brief Receive an amount of data in non-blocking mode with Interrupt
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @param pData: a 16-bit pointer to the Receive data buffer.
* @param Size: number of data sample to be sent:
* @param pData a 16-bit pointer to the Receive data buffer.
* @param Size number of data sample to be sent:
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
* configuration phase, the Size parameter means the number of 16-bit data length
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
@ -786,10 +784,10 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u
/**
* @brief Transmit an amount of data in non-blocking mode with DMA
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @param pData: a 16-bit pointer to the Transmit data buffer.
* @param Size: number of data sample to be sent:
* @param pData a 16-bit pointer to the Transmit data buffer.
* @param Size number of data sample to be sent:
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
* configuration phase, the Size parameter means the number of 16-bit data length
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
@ -864,10 +862,10 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
/**
* @brief Receive an amount of data in non-blocking mode with DMA
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @param pData: a 16-bit pointer to the Receive data buffer.
* @param Size: number of data sample to be sent:
* @param pData a 16-bit pointer to the Receive data buffer.
* @param Size number of data sample to be sent:
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
* configuration phase, the Size parameter means the number of 16-bit data length
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
@ -949,7 +947,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData,
/**
* @brief Pauses the audio stream playing from the Media.
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval HAL status
*/
@ -990,7 +988,7 @@ HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
/**
* @brief Resumes the audio stream playing from the Media.
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval HAL status
*/
@ -1025,7 +1023,7 @@ HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
/**
* @brief Stops the audio stream playing from the Media.
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval HAL status
*/
@ -1066,7 +1064,7 @@ HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
/**
* @brief This function handles I2S interrupt request.
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval HAL status
*/
@ -1133,11 +1131,11 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
*/
/**
* @brief This function handles I2S Communication Timeout.
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @param Flag: Flag checked
* @param State: Value of the flag expected
* @param Timeout: Duration of the timeout
* @param Flag Flag checked
* @param State Value of the flag expected
* @param Timeout Duration of the timeout
* @retval HAL status
*/
static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag,
@ -1202,7 +1200,7 @@ static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s,
*/
/**
* @brief Tx Transfer Half completed callbacks
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
@ -1218,7 +1216,7 @@ static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s,
/**
* @brief Tx Transfer completed callbacks
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
@ -1234,7 +1232,7 @@ static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s,
/**
* @brief Rx Transfer half completed callbacks
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
@ -1250,7 +1248,7 @@ __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
/**
* @brief Rx Transfer completed callbacks
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
@ -1266,7 +1264,7 @@ __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
/**
* @brief I2S error callbacks
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
@ -1301,7 +1299,7 @@ __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
/**
* @brief Return the I2S state
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval HAL state
*/
@ -1312,7 +1310,7 @@ HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
/**
* @brief Return the I2S error code
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval I2S Error Code
*/
@ -1330,7 +1328,7 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
/**
* @brief Get I2S Input Clock based on I2S source clock selection
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module.
* @retval I2S Clock Input
*/
@ -1389,7 +1387,7 @@ static uint32_t I2S_GetClockFreq(I2S_HandleTypeDef *hi2s)
*/
/**
* @brief DMA I2S transmit process complete callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1421,7 +1419,7 @@ static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA I2S transmit process half complete callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1434,7 +1432,7 @@ static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA I2S receive process complete callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1465,7 +1463,7 @@ static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA I2S receive process half complete callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1478,7 +1476,7 @@ static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA I2S communication error callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1500,7 +1498,7 @@ static void I2S_DMAError(DMA_HandleTypeDef *hdma)
/**
* @brief Transmit an amount of data in non-blocking mode with Interrupt
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
@ -1522,7 +1520,7 @@ static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
/**
* @brief Receive an amount of data in non-blocking mode with Interrupt
* @param hi2s: I2S handle
* @param hi2s I2S handle
* @retval None
*/
static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)

22
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_i2s.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of I2S HAL module.
******************************************************************************
* @attention
@ -277,21 +275,21 @@ typedef struct
*/
/** @brief Reset I2S handle state
* @param __HANDLE__: specifies the I2S handle.
* @param __HANDLE__ specifies the I2S handle.
* @retval None
*/
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
/** @brief Enable or disable the specified SPI peripheral (in I2S mode).
* @param __HANDLE__: specifies the I2S Handle.
* @param __HANDLE__ specifies the I2S Handle.
* @retval None
*/
#define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
#define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
/** @brief Enable or disable the specified I2S interrupts.
* @param __HANDLE__: specifies the I2S Handle.
* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
* @param __HANDLE__ specifies the I2S Handle.
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
* This parameter can be one of the following values:
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
@ -302,9 +300,9 @@ typedef struct
#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
* @param __HANDLE__: specifies the I2S Handle.
* @param __HANDLE__ specifies the I2S Handle.
* This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
* @param __INTERRUPT__: specifies the I2S interrupt source to check.
* @param __INTERRUPT__ specifies the I2S interrupt source to check.
* This parameter can be one of the following values:
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
@ -314,8 +312,8 @@ typedef struct
#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
/** @brief Checks whether the specified I2S flag is set or not.
* @param __HANDLE__: specifies the I2S Handle.
* @param __FLAG__: specifies the flag to check.
* @param __HANDLE__ specifies the I2S Handle.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
* @arg I2S_FLAG_TXE: Transmit buffer empty flag
@ -329,7 +327,7 @@ typedef struct
#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
/** @brief Clears the I2S OVR pending flag.
* @param __HANDLE__: specifies the I2S Handle.
* @param __HANDLE__ specifies the I2S Handle.
* @retval None
*/
#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
@ -341,7 +339,7 @@ typedef struct
} while(0)
/** @brief Clears the I2S UDR pending flag.
* @param __HANDLE__: specifies the I2S Handle.
* @param __HANDLE__ specifies the I2S Handle.
* @retval None
*/
#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \

16
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_irda.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief IRDA HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the IrDA (Infrared Data Association) Peripheral
@ -229,7 +227,7 @@ static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
/**
* @brief Initialize the IRDA mode according to the specified
* parameters in the IRDA_InitTypeDef and initialize the associated handle.
* @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
* @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
* the configuration information for the specified IRDA module.
* @retval HAL status
*/
@ -282,7 +280,7 @@ HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
/**
* @brief DeInitialize the IRDA peripheral.
* @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
* @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
* the configuration information for the specified IRDA module.
* @retval HAL status
*/
@ -316,7 +314,7 @@ HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
/**
* @brief Initialize the IRDA MSP.
* @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
* @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
* the configuration information for the specified IRDA module.
* @retval None
*/
@ -332,7 +330,7 @@ __weak void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda)
/**
* @brief DeInitialize the IRDA MSP.
* @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
* @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
* the configuration information for the specified IRDA module.
* @retval None
*/
@ -1530,7 +1528,7 @@ __weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda)
/**
* @brief Rx Half Transfer complete callback.
* @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
* @param hirda Pointer to a IRDA_HandleTypeDef structure that contains
* the configuration information for the specified IRDA module.
* @retval None
*/
@ -1885,7 +1883,7 @@ static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA IRDA receive process complete callback.
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
@ -1915,7 +1913,7 @@ static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA IRDA receive process half complete callback.
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* @param hdma Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/

56
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_irda.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of IRDA HAL module.
******************************************************************************
* @attention
@ -396,14 +394,14 @@ typedef struct
*/
/** @brief Reset IRDA handle state
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* @retval None
*/
#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
/** @brief Flush the IRDA DR register.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* @retval None
*/
#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) \
@ -413,8 +411,8 @@ typedef struct
} while(0)
/** @brief Clear the specified IRDA pending flag.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __FLAG__: specifies the flag to check.
* @param __HANDLE__ specifies the IRDA Handle.
* @param __FLAG__ specifies the flag to check.
* This parameter can be any combination of the following values:
* @arg @ref IRDA_CLEAR_PEF
* @arg @ref IRDA_CLEAR_FEF
@ -426,41 +424,41 @@ typedef struct
#define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
/** @brief Clear the IRDA PE pending flag.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* @retval None
*/
#define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_PEF)
/** @brief Clear the IRDA FE pending flag.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* @retval None
*/
#define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_FEF)
/** @brief Clear the IRDA NE pending flag.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* @retval None
*/
#define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_NEF)
/** @brief Clear the IRDA ORE pending flag.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* @retval None
*/
#define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_OREF)
/** @brief Clear the IRDA IDLE pending flag.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* @retval None
*/
#define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_IDLEF)
/** @brief Check whether the specified IRDA flag is set or not.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* UART peripheral
* @param __FLAG__: specifies the flag to check.
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg IRDA_FLAG_REACK: Receive enable acknowledge flag
* @arg IRDA_FLAG_TEACK: Transmit enable acknowledge flag
@ -480,10 +478,10 @@ typedef struct
#define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
/** @brief Enable the specified IRDA interrupt.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* UART peripheral
* @param __INTERRUPT__: specifies the IRDA interrupt source to enable.
* @param __INTERRUPT__ specifies the IRDA interrupt source to enable.
* This parameter can be one of the following values:
* @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
* @arg IRDA_IT_TC: Transmission complete interrupt
@ -498,9 +496,9 @@ typedef struct
((__HANDLE__)->Instance->CR3 |= (1 << ((__INTERRUPT__) & IRDA_IT_MASK))))
/** @brief Disable the specified IRDA interrupt.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* @param __INTERRUPT__: specifies the IRDA interrupt source to disable.
* @param __INTERRUPT__ specifies the IRDA interrupt source to disable.
* This parameter can be one of the following values:
* @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
* @arg IRDA_IT_TC: Transmission complete interrupt
@ -515,9 +513,9 @@ typedef struct
((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & IRDA_IT_MASK))))
/** @brief Check whether the specified IRDA interrupt has occurred or not.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* @param __IT__: specifies the IRDA interrupt source to check.
* @param __IT__ specifies the IRDA interrupt source to check.
* This parameter can be one of the following values:
* @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
* @arg IRDA_IT_TC: Transmission complete interrupt
@ -532,9 +530,9 @@ typedef struct
#define __HAL_IRDA_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
/** @brief Check whether the specified IRDA interrupt source is enabled.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* @param __IT__: specifies the IRDA interrupt source to check.
* @param __IT__ specifies the IRDA interrupt source to check.
* This parameter can be one of the following values:
* @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
* @arg IRDA_IT_TC: Transmission complete interrupt
@ -550,9 +548,9 @@ typedef struct
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & IRDA_IT_MASK)))
/** @brief Clear the specified IRDA ISR flag, in setting the proper ICR register flag.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
* @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
* to clear the corresponding interrupt
* This parameter can be one of the following values:
* @arg IRDA_CLEAR_PEF: Parity Error Clear Flag
@ -565,9 +563,9 @@ typedef struct
#define __HAL_IRDA_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR |= (uint32_t)(__IT_CLEAR__))
/** @brief Set a specific IRDA request flag.
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* @param __REQ__: specifies the request flag to set
* @param __REQ__ specifies the request flag to set
* This parameter can be one of the following values:
* @arg IRDA_AUTOBAUD_REQUEST: Auto-Baud Rate Request
* @arg IRDA_RXDATA_FLUSH_REQUEST: Receive Data flush Request
@ -578,14 +576,14 @@ typedef struct
#define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
/** @brief Enable UART/USART associated to IRDA Handle
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* @retval None
*/
#define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
/** @brief Disable UART/USART associated to IRDA Handle
* @param __HANDLE__: specifies the IRDA Handle.
* @param __HANDLE__ specifies the IRDA Handle.
* The Handle Instance which can be USART1 or USART2.
* @retval None
*/
@ -690,13 +688,13 @@ uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
*/
/** @brief Ensure that IRDA Baud rate is less or equal to maximum value
* @param __BAUDRATE__: specifies the IRDA Baudrate set by the user.
* @param __BAUDRATE__ specifies the IRDA Baudrate set by the user.
* @retval True or False
*/
#define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201)
/** @brief Ensure that IRDA prescaler value is strictly larger than 0
* @param __PRESCALER__: specifies the IRDA prescaler value set by the user.
* @param __PRESCALER__ specifies the IRDA prescaler value set by the user.
* @retval True or False
*/
#define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0)

8
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_irda_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of IRDA HAL Extension module.
******************************************************************************
* @attention
@ -83,8 +81,8 @@
* @{
*/
/** @brief Reports the IRDA clock source.
* @param __HANDLE__: specifies the IRDA Handle
* @param __CLOCKSOURCE__ : output variable
* @param __HANDLE__ specifies the IRDA Handle
* @param __CLOCKSOURCE__ output variable
* @retval IRDA clocking source, written in __CLOCKSOURCE__.
*/
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
@ -173,7 +171,7 @@
/** @brief Reports the mask to apply to retrieve the received data
* according to the word length and to the parity bits activation.
* @param __HANDLE__: specifies the IRDA Handle
* @param __HANDLE__ specifies the IRDA Handle
* @retval mask to apply to USART RDR register value.
*/
#define IRDA_MASK_COMPUTATION(__HANDLE__) \

2
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_iwdg.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief IWDG HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Independent Watchdog (IWDG) peripheral:

16
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_iwdg.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of IWDG HAL module.
******************************************************************************
* @attention
@ -128,7 +126,7 @@ typedef struct
/**
* @brief Enable the IWDG peripheral.
* @param __HANDLE__: IWDG handle
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
@ -136,7 +134,7 @@ typedef struct
/**
* @brief Reload IWDG counter with value defined in the reload register
* (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled).
* @param __HANDLE__: IWDG handle
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
@ -196,21 +194,21 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
/**
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
* @param __HANDLE__: IWDG handle
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
/**
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
* @param __HANDLE__: IWDG handle
* @param __HANDLE__ IWDG handle
* @retval None
*/
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
/**
* @brief Check IWDG prescaler value.
* @param __PRESCALER__: IWDG prescaler value
* @param __PRESCALER__ IWDG prescaler value
* @retval None
*/
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
@ -223,14 +221,14 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
/**
* @brief Check IWDG reload value.
* @param __RELOAD__: IWDG reload value
* @param __RELOAD__ IWDG reload value
* @retval None
*/
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
/**
* @brief Check IWDG window value.
* @param __WINDOW__: IWDG window value
* @param __WINDOW__ IWDG window value
* @retval None
*/
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)

234
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_jpeg.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief JPEG HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the JPEG encoder/decoder peripheral:
@ -469,7 +467,7 @@ static void JPEG_DMAOutAbortCallback(DMA_HandleTypeDef *hdma) ;
/**
* @brief Initializes the JPEG according to the specified
* parameters in the JPEG_InitTypeDef and creates the associated handle.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval HAL status
*/
@ -554,7 +552,7 @@ HAL_StatusTypeDef HAL_JPEG_Init(JPEG_HandleTypeDef *hjpeg)
/**
* @brief DeInitializes the JPEG peripheral.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval HAL status
*/
@ -594,7 +592,7 @@ HAL_StatusTypeDef HAL_JPEG_DeInit(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Initializes the JPEG MSP.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -610,7 +608,7 @@ __weak void HAL_JPEG_MspInit(JPEG_HandleTypeDef *hjpeg)
/**
* @brief DeInitializes JPEG MSP.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -648,9 +646,9 @@ __weak void HAL_JPEG_MspDeInit(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Set the JPEG encoding configuration.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pConf: pointer to a JPEG_ConfTypeDef structure that contains
* @param pConf pointer to a JPEG_ConfTypeDef structure that contains
* the encoding configuration
* @retval HAL status
*/
@ -829,9 +827,9 @@ HAL_StatusTypeDef HAL_JPEG_ConfigEncoding(JPEG_HandleTypeDef *hjpeg, JPEG_ConfTy
/**
* @brief Extract the image configuration from the JPEG header during the decoding
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pInfo: pointer to a JPEG_ConfTypeDef structure that contains
* @param pInfo pointer to a JPEG_ConfTypeDef structure that contains
* The JPEG decoded header informations
* @retval HAL status
*/
@ -898,7 +896,7 @@ HAL_StatusTypeDef HAL_JPEG_GetInfo(JPEG_HandleTypeDef *hjpeg, JPEG_ConfTypeDef *
/**
* @brief Enable JPEG Header parsing for decoding
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for the JPEG.
* @retval HAL status
*/
@ -934,7 +932,7 @@ HAL_StatusTypeDef HAL_JPEG_EnableHeaderParsing(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Disable JPEG Header parsing for decoding
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for the JPEG.
* @retval HAL status
*/
@ -970,15 +968,15 @@ HAL_StatusTypeDef HAL_JPEG_DisableHeaderParsing(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Modify the default Quantization tables used for JPEG encoding.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param QTable0 : pointer to uint8_t , define the user quantification table for color component 1.
* @param QTable0 pointer to uint8_t , define the user quantification table for color component 1.
* If NULL assume no need to update the table and no error return
* @param QTable1 : pointer to uint8_t , define the user quantification table for color component 2.
* @param QTable1 pointer to uint8_t , define the user quantification table for color component 2.
* If NULL assume no need to update the table and no error return.
* @param QTable2 : pointer to uint8_t , define the user quantification table for color component 3,
* @param QTable2 pointer to uint8_t , define the user quantification table for color component 3,
* If NULL assume no need to update the table and no error return.
* @param QTable3 : pointer to uint8_t , define the user quantification table for color component 4.
* @param QTable3 pointer to uint8_t , define the user quantification table for color component 4.
* If NULL assume no need to update the table and no error return.
*
* @retval HAL status
@ -1050,13 +1048,13 @@ HAL_StatusTypeDef HAL_JPEG_SetUserQuantTables(JPEG_HandleTypeDef *hjpeg, uint8_
/**
* @brief Starts JPEG encoding with polling processing
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pDataInMCU: Pointer to the Input buffer
* @param InDataLength: size in bytes Input buffer
* @param pDataOut: Pointer to the jpeg output data buffer
* @param OutDataLength: size in bytes of the Output buffer
* @param Timeout: Specify Timeout value
* @param pDataInMCU Pointer to the Input buffer
* @param InDataLength size in bytes Input buffer
* @param pDataOut Pointer to the jpeg output data buffer
* @param OutDataLength size in bytes of the Output buffer
* @param Timeout Specify Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_JPEG_Encode(JPEG_HandleTypeDef *hjpeg, uint8_t *pDataInMCU, uint32_t InDataLength, uint8_t *pDataOut, uint32_t OutDataLength, uint32_t Timeout)
@ -1156,13 +1154,13 @@ HAL_StatusTypeDef HAL_JPEG_Encode(JPEG_HandleTypeDef *hjpeg, uint8_t *pDataInMC
/**
* @brief Starts JPEG decoding with polling processing
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pDataIn: Pointer to the input data buffer
* @param InDataLength: size in bytes Input buffer
* @param pDataOutMCU: Pointer to the Output data buffer
* @param OutDataLength: size in bytes of the Output buffer
* @param Timeout: Specify Timeout value
* @param pDataIn Pointer to the input data buffer
* @param InDataLength size in bytes Input buffer
* @param pDataOutMCU Pointer to the Output data buffer
* @param OutDataLength size in bytes of the Output buffer
* @param Timeout Specify Timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_JPEG_Decode(JPEG_HandleTypeDef *hjpeg ,uint8_t *pDataIn ,uint32_t InDataLength ,uint8_t *pDataOutMCU ,uint32_t OutDataLength, uint32_t Timeout)
@ -1254,12 +1252,12 @@ HAL_StatusTypeDef HAL_JPEG_Decode(JPEG_HandleTypeDef *hjpeg ,uint8_t *pDataIn ,
/**
* @brief Starts JPEG encoding with interrupt processing
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pDataInMCU: Pointer to the Input buffer
* @param InDataLength: size in bytes Input buffer
* @param pDataOut: Pointer to the jpeg output data buffer
* @param OutDataLength: size in bytes of the Output buffer
* @param pDataInMCU Pointer to the Input buffer
* @param InDataLength size in bytes Input buffer
* @param pDataOut Pointer to the jpeg output data buffer
* @param OutDataLength size in bytes of the Output buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_JPEG_Encode_IT(JPEG_HandleTypeDef *hjpeg, uint8_t *pDataInMCU, uint32_t InDataLength, uint8_t *pDataOut, uint32_t OutDataLength)
@ -1328,12 +1326,12 @@ HAL_StatusTypeDef HAL_JPEG_Encode_IT(JPEG_HandleTypeDef *hjpeg, uint8_t *pDataI
/**
* @brief Starts JPEG decoding with interrupt processing
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pDataIn: Pointer to the input data buffer
* @param InDataLength: size in bytes Input buffer
* @param pDataOutMCU: Pointer to the Output data buffer
* @param OutDataLength: size in bytes of the Output buffer
* @param pDataIn Pointer to the input data buffer
* @param InDataLength size in bytes Input buffer
* @param pDataOutMCU Pointer to the Output data buffer
* @param OutDataLength size in bytes of the Output buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_JPEG_Decode_IT(JPEG_HandleTypeDef *hjpeg ,uint8_t *pDataIn ,uint32_t InDataLength ,uint8_t *pDataOutMCU ,uint32_t OutDataLength)
@ -1392,12 +1390,12 @@ HAL_StatusTypeDef HAL_JPEG_Decode_IT(JPEG_HandleTypeDef *hjpeg ,uint8_t *pDataI
/**
* @brief Starts JPEG encoding with DMA processing
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pDataInMCU: Pointer to the Input buffer
* @param InDataLength: size in bytes Input buffer
* @param pDataOut: Pointer to the jpeg output data buffer
* @param OutDataLength: size in bytes of the Output buffer
* @param pDataInMCU Pointer to the Input buffer
* @param InDataLength size in bytes Input buffer
* @param pDataOut Pointer to the jpeg output data buffer
* @param OutDataLength size in bytes of the Output buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_JPEG_Encode_DMA(JPEG_HandleTypeDef *hjpeg, uint8_t *pDataInMCU, uint32_t InDataLength, uint8_t *pDataOut, uint32_t OutDataLength)
@ -1465,12 +1463,12 @@ HAL_StatusTypeDef HAL_JPEG_Encode_DMA(JPEG_HandleTypeDef *hjpeg, uint8_t *pData
/**
* @brief Starts JPEG decoding with DMA processing
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pDataIn: Pointer to the input data buffer
* @param InDataLength: size in bytes Input buffer
* @param pDataOutMCU: Pointer to the Output data buffer
* @param OutDataLength: size in bytes of the Output buffer
* @param pDataIn Pointer to the input data buffer
* @param InDataLength size in bytes Input buffer
* @param pDataOutMCU Pointer to the Output data buffer
* @param OutDataLength size in bytes of the Output buffer
* @retval HAL status
*/
HAL_StatusTypeDef HAL_JPEG_Decode_DMA(JPEG_HandleTypeDef *hjpeg ,uint8_t *pDataIn ,uint32_t InDataLength ,uint8_t *pDataOutMCU ,uint32_t OutDataLength)
@ -1528,9 +1526,9 @@ HAL_StatusTypeDef HAL_JPEG_Decode_DMA(JPEG_HandleTypeDef *hjpeg ,uint8_t *pData
/**
* @brief Pause the JPEG Input/Output processing
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param XferSelection: This parameter can be one of the following values :
* @param XferSelection This parameter can be one of the following values :
* JPEG_PAUSE_RESUME_INPUT : Pause Input processing
* JPEG_PAUSE_RESUME_OUTPUT: Pause Output processing
* JPEG_PAUSE_RESUME_INPUT_OUTPUT: Pause Input and Output processing
@ -1580,9 +1578,9 @@ HAL_StatusTypeDef HAL_JPEG_Pause(JPEG_HandleTypeDef *hjpeg, uint32_t XferSelect
/**
* @brief Resume the JPEG Input/Output processing
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param XferSelection: This parameter can be one of the following values :
* @param XferSelection This parameter can be one of the following values :
* JPEG_PAUSE_RESUME_INPUT : Resume Input processing
* JPEG_PAUSE_RESUME_OUTPUT: Resume Output processing
* JPEG_PAUSE_RESUME_INPUT_OUTPUT: Resume Input and Output processing
@ -1661,10 +1659,10 @@ HAL_StatusTypeDef HAL_JPEG_Resume(JPEG_HandleTypeDef *hjpeg, uint32_t XferSelec
/**
* @brief Config Encoding/Decoding Input Buffer.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module.
* @param pNewInputBuffer: Pointer to the new input data buffer
* @param InDataLength: Size in bytes of the new Input data buffer
* @param pNewInputBuffer Pointer to the new input data buffer
* @param InDataLength Size in bytes of the new Input data buffer
* @retval HAL status
*/
void HAL_JPEG_ConfigInputBuffer(JPEG_HandleTypeDef *hjpeg, uint8_t *pNewInputBuffer, uint32_t InDataLength)
@ -1675,10 +1673,10 @@ void HAL_JPEG_ConfigInputBuffer(JPEG_HandleTypeDef *hjpeg, uint8_t *pNewInputBuf
/**
* @brief Config Encoding/Decoding Output Buffer.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module.
* @param pNewOutputBuffer: Pointer to the new output data buffer
* @param OutDataLength: Size in bytes of the new Output data buffer
* @param pNewOutputBuffer Pointer to the new output data buffer
* @param OutDataLength Size in bytes of the new Output data buffer
* @retval HAL status
*/
void HAL_JPEG_ConfigOutputBuffer(JPEG_HandleTypeDef *hjpeg, uint8_t *pNewOutputBuffer, uint32_t OutDataLength)
@ -1689,7 +1687,7 @@ void HAL_JPEG_ConfigOutputBuffer(JPEG_HandleTypeDef *hjpeg, uint8_t *pNewOutputB
/**
* @brief Aborts the JPEG Encoding/Decoding.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval HAL status
*/
@ -1790,9 +1788,9 @@ HAL_StatusTypeDef HAL_JPEG_Abort(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Decoding JPEG Info ready callback.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pInfo: pointer to a JPEG_ConfTypeDef structure that contains
* @param pInfo pointer to a JPEG_ConfTypeDef structure that contains
* The JPEG decoded header informations
* @retval None
*/
@ -1809,7 +1807,7 @@ __weak void HAL_JPEG_InfoReadyCallback(JPEG_HandleTypeDef *hjpeg,JPEG_ConfTypeDe
/**
* @brief Encoding complete callback.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -1825,7 +1823,7 @@ __weak void HAL_JPEG_EncodeCpltCallback(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Decoding complete callback.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -1841,7 +1839,7 @@ __weak void HAL_JPEG_DecodeCpltCallback(JPEG_HandleTypeDef *hjpeg)
/**
* @brief JPEG error callback.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -1857,9 +1855,9 @@ __weak void HAL_JPEG_DecodeCpltCallback(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Get New Data chunk callback.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param NbDecodedData: Number of consummed data in the previous chunk in bytes
* @param NbDecodedData Number of consummed data in the previous chunk in bytes
* @retval None
*/
__weak void HAL_JPEG_GetDataCallback(JPEG_HandleTypeDef *hjpeg, uint32_t NbDecodedData)
@ -1875,10 +1873,10 @@ __weak void HAL_JPEG_DecodeCpltCallback(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Decoded/Encoded Data ready callback.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param pDataOut: pointer to the output data buffer
* @param OutDataLength: number in bytes of data available in the specified output buffer
* @param pDataOut pointer to the output data buffer
* @param OutDataLength number in bytes of data available in the specified output buffer
* @retval None
*/
__weak void HAL_JPEG_DataReadyCallback (JPEG_HandleTypeDef *hjpeg, uint8_t *pDataOut, uint32_t OutDataLength)
@ -1914,7 +1912,7 @@ __weak void HAL_JPEG_DataReadyCallback (JPEG_HandleTypeDef *hjpeg, uint8_t *pDat
/**
* @brief This function handles JPEG interrupt request.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -1964,7 +1962,7 @@ void HAL_JPEG_IRQHandler(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Returns the JPEG state.
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval JPEG state
*/
@ -1975,7 +1973,7 @@ HAL_JPEG_STATETypeDef HAL_JPEG_GetState(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Return the JPEG error code
* @param hjpeg : pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for the specified JPEG.
* @retval JPEG Error Code
*/
@ -1999,10 +1997,10 @@ uint32_t HAL_JPEG_GetError(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Generates Huffman sizes/Codes Table from Bits/vals Table
* @param Bits: pointer to bits table
* @param Huffsize: pointer to sizes table
* @param Huffcode: pointer to codes table
* @param LastK: pointer to last Coeff (table dimmension)
* @param Bits pointer to bits table
* @param Huffsize pointer to sizes table
* @param Huffcode pointer to codes table
* @param LastK pointer to last Coeff (table dimmension)
* @retval HAL status
*/
static HAL_StatusTypeDef JPEG_Bits_To_SizeCodes(uint8_t *Bits, uint8_t *Huffsize, uint32_t *Huffcode, uint32_t *LastK)
@ -2053,8 +2051,8 @@ static HAL_StatusTypeDef JPEG_Bits_To_SizeCodes(uint8_t *Bits, uint8_t *Huffsize
/**
* @brief Transform a Bits/Vals AC Huffman table to sizes/Codes huffman Table
* that can programmed to the JPEG encoder registers
* @param AC_BitsValsTable: pointer to AC huffman bits/vals table
* @param AC_SizeCodesTable: pointer to AC huffman Sizes/Codes table
* @param AC_BitsValsTable pointer to AC huffman bits/vals table
* @param AC_SizeCodesTable pointer to AC huffman Sizes/Codes table
* @retval HAL status
*/
static HAL_StatusTypeDef JPEG_ACHuff_BitsVals_To_SizeCodes(JPEG_ACHuffTableTypeDef *AC_BitsValsTable, JPEG_AC_HuffCodeTableTypeDef *AC_SizeCodesTable)
@ -2111,8 +2109,8 @@ static HAL_StatusTypeDef JPEG_ACHuff_BitsVals_To_SizeCodes(JPEG_ACHuffTableTypeD
/**
* @brief Transform a Bits/Vals DC Huffman table to sizes/Codes huffman Table
* that can programmed to the JPEG encoder registers
* @param DC_BitsValsTable: pointer to DC huffman bits/vals table
* @param DC_SizeCodesTable: pointer to DC huffman Sizes/Codes table
* @param DC_BitsValsTable pointer to DC huffman bits/vals table
* @param DC_SizeCodesTable pointer to DC huffman Sizes/Codes table
* @retval HAL status
*/
static HAL_StatusTypeDef JPEG_DCHuff_BitsVals_To_SizeCodes(JPEG_DCHuffTableTypeDef *DC_BitsValsTable, JPEG_DC_HuffCodeTableTypeDef *DC_SizeCodesTable)
@ -2153,10 +2151,10 @@ static HAL_StatusTypeDef JPEG_DCHuff_BitsVals_To_SizeCodes(JPEG_DCHuffTableTypeD
/**
* @brief Set the JPEG register with an DC huffman table at the given DC table address
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param HuffTableDC: pointer to DC huffman table
* @param DCTableAddress: Encoder DC huffman table address it could be HUFFENC_DC0 or HUFFENC_DC1.
* @param HuffTableDC pointer to DC huffman table
* @param DCTableAddress Encoder DC huffman table address it could be HUFFENC_DC0 or HUFFENC_DC1.
* @retval HAL status
*/
static HAL_StatusTypeDef JPEG_Set_HuffDC_Mem(JPEG_HandleTypeDef *hjpeg, JPEG_DCHuffTableTypeDef *HuffTableDC, uint32_t *DCTableAddress)
@ -2210,10 +2208,10 @@ static HAL_StatusTypeDef JPEG_Set_HuffDC_Mem(JPEG_HandleTypeDef *hjpeg, JPEG_DCH
/**
* @brief Set the JPEG register with an AC huffman table at the given AC table address
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param HuffTableAC: pointer to AC huffman table
* @param ACTableAddress: Encoder AC huffman table address it could be HUFFENC_AC0 or HUFFENC_AC1.
* @param HuffTableAC pointer to AC huffman table
* @param ACTableAddress Encoder AC huffman table address it could be HUFFENC_AC0 or HUFFENC_AC1.
* @retval HAL status
*/
static HAL_StatusTypeDef JPEG_Set_HuffAC_Mem(JPEG_HandleTypeDef *hjpeg, JPEG_ACHuffTableTypeDef *HuffTableAC, uint32_t *ACTableAddress)
@ -2282,12 +2280,12 @@ static HAL_StatusTypeDef JPEG_Set_HuffAC_Mem(JPEG_HandleTypeDef *hjpeg, JPEG_ACH
/**
* @brief Configure the JPEG encoder register huffman tables to used during
* the encdoing operation
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param HuffTableAC0: AC0 huffman table
* @param HuffTableDC0: DC0 huffman table
* @param HuffTableAC1: AC1 huffman table
* @param HuffTableDC1: DC1 huffman table
* @param HuffTableAC0 AC0 huffman table
* @param HuffTableDC0 DC0 huffman table
* @param HuffTableAC1 AC1 huffman table
* @param HuffTableDC1 DC1 huffman table
* @retval None
*/
static HAL_StatusTypeDef JPEG_Set_HuffEnc_Mem(JPEG_HandleTypeDef *hjpeg, JPEG_ACHuffTableTypeDef *HuffTableAC0, JPEG_DCHuffTableTypeDef *HuffTableDC0 , JPEG_ACHuffTableTypeDef *HuffTableAC1, JPEG_DCHuffTableTypeDef *HuffTableDC1)
@ -2338,12 +2336,12 @@ static HAL_StatusTypeDef JPEG_Set_HuffEnc_Mem(JPEG_HandleTypeDef *hjpeg, JPEG_AC
/**
* @brief Configure the JPEG register huffman tables to be included in the JPEG
* file header (used for encoding only)
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param HuffTableAC0: AC0 huffman table
* @param HuffTableDC0: DC0 huffman table
* @param HuffTableAC1: AC1 huffman table
* @param HuffTableDC1: DC1 huffman table
* @param HuffTableAC0 AC0 huffman table
* @param HuffTableDC0 DC0 huffman table
* @param HuffTableAC1 AC1 huffman table
* @param HuffTableDC1 DC1 huffman table
* @retval None
*/
static void JPEG_Set_Huff_DHTMem(JPEG_HandleTypeDef *hjpeg, JPEG_ACHuffTableTypeDef *HuffTableAC0, JPEG_DCHuffTableTypeDef *HuffTableDC0 , JPEG_ACHuffTableTypeDef *HuffTableAC1, JPEG_DCHuffTableTypeDef *HuffTableDC1)
@ -2534,10 +2532,10 @@ static void JPEG_Set_Huff_DHTMem(JPEG_HandleTypeDef *hjpeg, JPEG_ACHuffTableType
/**
* @brief Configure the JPEG registers with a given quantization table
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param QTable: pointer to an array of 64 bytes giving the quantization table
* @param QTableAddress: destination quantization address in the JPEG peripheral
* @param QTable pointer to an array of 64 bytes giving the quantization table
* @param QTableAddress destination quantization address in the JPEG peripheral
* it could be QMEM0, QMEM1, QMEM2 or QMEM3
* @retval None
*/
@ -2603,7 +2601,7 @@ static HAL_StatusTypeDef JPEG_Set_Quantization_Mem(JPEG_HandleTypeDef *hjpeg, u
/**
* @brief Configure the JPEG registers for YCbCr color space
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -2664,7 +2662,7 @@ static void JPEG_SetColorYCBCR(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Configure the JPEG registers for GrayScale color space
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -2684,7 +2682,7 @@ static void JPEG_SetColorGrayScale(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Configure the JPEG registers for CMYK color space
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -2743,7 +2741,7 @@ static void JPEG_SetColorCMYK(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Init the JPEG encoding/decoding process in case of Polling or Interrupt and DMA
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None
*/
@ -2797,7 +2795,7 @@ static void JPEG_Init_Process(JPEG_HandleTypeDef *hjpeg)
/**
* @brief JPEG encoding/decoding process in case of Polling or Interrupt
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval JPEG_PROCESS_DONE if the process has ends else JPEG_PROCESS_ONGOING
*/
@ -2914,9 +2912,9 @@ static uint32_t JPEG_Process(JPEG_HandleTypeDef *hjpeg)
* @brief Store some output data from the JPEG peripheral to the output buffer.
* This function is used when the JPEG peripheral has new data to output
* in case of Polling or Interrupt process
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param nbOutputWords: Number of output words (of 32 bits) ready from the JPEG peripheral
* @param nbOutputWords Number of output words (of 32 bits) ready from the JPEG peripheral
* @retval None
*/
static void JPEG_StoreOutputData(JPEG_HandleTypeDef *hjpeg, uint32_t nbOutputWords)
@ -2984,9 +2982,9 @@ static void JPEG_StoreOutputData(JPEG_HandleTypeDef *hjpeg, uint32_t nbOutputWor
* @brief Read some input Data from the input buffer.
* This function is used when the JPEG peripheral needs new data
* in case of Polling or Interrupt process
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @param nbRequestWords: Number of input words (of 32 bits) that the JPE peripheral request
* @param nbRequestWords Number of input words (of 32 bits) that the JPE peripheral request
* @retval None
*/
static void JPEG_ReadInputData(JPEG_HandleTypeDef *hjpeg, uint32_t nbRequestWords)
@ -3053,7 +3051,7 @@ static void JPEG_ReadInputData(JPEG_HandleTypeDef *hjpeg, uint32_t nbRequestWord
/**
* @brief Start the JPEG DMA process (encoding/decoding)
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval JPEG_PROCESS_DONE if process ends else JPEG_PROCESS_ONGOING
*/
@ -3101,7 +3099,7 @@ static HAL_StatusTypeDef JPEG_DMA_StartProcess(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Continue the current JPEG DMA process (encoding/decoding)
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval JPEG_PROCESS_DONE if process ends else JPEG_PROCESS_ONGOING
*/
@ -3165,7 +3163,7 @@ static uint32_t JPEG_DMA_ContinueProcess(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Finalize the current JPEG DMA process (encoding/decoding)
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval JPEG_PROCESS_DONE
*/
@ -3219,7 +3217,7 @@ static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg)
/**
* @brief Poll residual output data when DMA process (encoding/decoding)
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval None.
*/
@ -3277,7 +3275,7 @@ static void JPEG_DMA_PollResidualData(JPEG_HandleTypeDef *hjpeg)
/**
* @brief DMA input transfer complete callback
* @param hdma: pointer to a DMA_HandleTypeDef structure.
* @param hdma pointer to a DMA_HandleTypeDef structure.
* @retval None
*/
static void JPEG_DMAInCpltCallback(DMA_HandleTypeDef *hdma)
@ -3322,7 +3320,7 @@ static void JPEG_DMAInCpltCallback(DMA_HandleTypeDef *hdma)
/**
* @brief DMA output transfer complete callback
* @param hdma: pointer to a DMA_HandleTypeDef structure.
* @param hdma pointer to a DMA_HandleTypeDef structure.
* @retval None
*/
static void JPEG_DMAOutCpltCallback(DMA_HandleTypeDef *hdma)
@ -3357,7 +3355,7 @@ static void JPEG_DMAOutCpltCallback(DMA_HandleTypeDef *hdma)
/**
* @brief DMA Transfer error callback
* @param hdma: pointer to a DMA_HandleTypeDef structure.
* @param hdma pointer to a DMA_HandleTypeDef structure.
* @retval None
*/
static void JPEG_DMAErrorCallback(DMA_HandleTypeDef *hdma)
@ -3384,7 +3382,7 @@ static void JPEG_DMAErrorCallback(DMA_HandleTypeDef *hdma)
/**
* @brief DMA output Abort callback
* @param hdma: pointer to a DMA_HandleTypeDef structure.
* @param hdma pointer to a DMA_HandleTypeDef structure.
* @retval None
*/
static void JPEG_DMAOutAbortCallback(DMA_HandleTypeDef *hdma)
@ -3399,7 +3397,7 @@ static void JPEG_DMAOutAbortCallback(DMA_HandleTypeDef *hdma)
/**
* @brief Calculate the decoded image quality (from 1 to 100)
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
* @param hjpeg pointer to a JPEG_HandleTypeDef structure that contains
* the configuration information for JPEG module
* @retval JPEG image quality from 1 to 100.
*/

28
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_jpeg.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of JPEG HAL module.
******************************************************************************
* @attention
@ -276,7 +274,7 @@ typedef struct
*/
/** @brief Reset JPEG handle state
* @param __HANDLE__: specifies the JPEG handle.
* @param __HANDLE__ specifies the JPEG handle.
* @retval None
*/
#define __HAL_JPEG_RESET_HANDLE_STATE(__HANDLE__) ( (__HANDLE__)->State = HAL_JPEG_STATE_RESET)
@ -284,14 +282,14 @@ typedef struct
/**
* @brief Enable the JPEG peripheral.
* @param __HANDLE__: specifies the JPEG handle.
* @param __HANDLE__ specifies the JPEG handle.
* @retval None
*/
#define __HAL_JPEG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= JPEG_CR_JCEN)
/**
* @brief Disable the JPEG peripheral.
* @param __HANDLE__: specifies the JPEG handle.
* @param __HANDLE__ specifies the JPEG handle.
* @retval None
*/
#define __HAL_JPEG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~JPEG_CR_JCEN)
@ -299,8 +297,8 @@ typedef struct
/**
* @brief Check the specified JPEG status flag.
* @param __HANDLE__: specifies the JPEG handle.
* @param __FLAG__ : specifies the flag to check
* @param __HANDLE__ specifies the JPEG handle.
* @param __FLAG__ specifies the flag to check
* This parameter can be one of the following values:
* @arg JPEG_FLAG_IFTF : The input FIFO is not full and is bellow its threshold flag
* @arg JPEG_FLAG_IFNFF : The input FIFO Not Full Flag, a data can be written
@ -319,8 +317,8 @@ typedef struct
/**
* @brief Clear the specified JPEG status flag.
* @param __HANDLE__: specifies the JPEG handle.
* @param __FLAG__ : specifies the flag to clear
* @param __HANDLE__ specifies the JPEG handle.
* @param __FLAG__ specifies the flag to clear
* This parameter can be one of the following values:
* @arg JPEG_FLAG_EOCF : JPEG Codec core has finished the encoding or the decoding process
* and than last data has been sent to the output FIFO
@ -333,8 +331,8 @@ typedef struct
/**
* @brief Enable Interrupt.
* @param __HANDLE__: specifies the JPEG handle.
* @param __INTERRUPT__ : specifies the interrupt to enable
* @param __HANDLE__ specifies the JPEG handle.
* @param __INTERRUPT__ specifies the interrupt to enable
* This parameter can be one of the following values:
* @arg JPEG_IT_IFT : Input FIFO Threshold Interrupt
* @arg JPEG_IT_IFNF : Input FIFO Not Full Interrupt
@ -349,8 +347,8 @@ typedef struct
/**
* @brief Disable Interrupt.
* @param __HANDLE__: specifies the JPEG handle.
* @param __INTERRUPT__ : specifies the interrupt to disable
* @param __HANDLE__ specifies the JPEG handle.
* @param __INTERRUPT__ specifies the interrupt to disable
* This parameter can be one of the following values:
* @arg JPEG_IT_IFT : Input FIFO Threshold Interrupt
* @arg JPEG_IT_IFNF : Input FIFO Not Full Interrupt
@ -368,8 +366,8 @@ typedef struct
/**
* @brief Get Interrupt state.
* @param __HANDLE__: specifies the JPEG handle.
* @param __INTERRUPT__ : specifies the interrupt to check
* @param __HANDLE__ specifies the JPEG handle.
* @param __INTERRUPT__ specifies the interrupt to check
* This parameter can be one of the following values:
* @arg JPEG_IT_IFT : Input FIFO Threshold Interrupt
* @arg JPEG_IT_IFNF : Input FIFO Not Full Interrupt

432
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_lptim.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief LPTIM HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Low Power Timer (LPTIM) peripheral:
@ -89,6 +87,53 @@
(#) Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
*** Callback registration ***
=============================================
The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks.
Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
@ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
the Callback ID and a pointer to the user callback function.
Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the default
weak function.
@ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
and the Callback ID.
These functions allow to register/unregister following callbacks:
(+) MspInitCallback : LPTIM Msp Init Callback.
(+) MspDeInitCallback : LPTIM Msp DeInit Callback.
(+) CompareMatchCallback : LPTIM Compare Match Init Callback.
(+) AutoReloadMatchCallback : LPTIM Auto Reload Match Callback.
(+) TriggerCallback : LPTIM Trigger Callback.
(+) CompareWriteCallback : LPTIM Compare Write Callback.
(+) AutoReloadWriteCallback : LPTIM Auto Reload Write Callback.
(+) DirectionUpCallback : LPTIM Direction Up Callback.
(+) DirectionDownCallback : LPTIM Direction Down Callback.
By default, after the @ref HAL_LPTIM_Init and when the state is HAL_LPTIM_STATE_RESET
all interrupt callbacks are set to the corresponding weak functions:
examples @ref HAL_LPTIM_CompareMatchCallback(), @ref HAL_LPTIM_AutoReloadMatchCallback().
Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
functionalities in the @ref HAL_LPTIM_Init/@ref HAL_LPTIM_DeInit only when these
callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null,
the @ref HAL_LPTIM_Init/@ref HAL_LPTIM_DeInit keep and use the user MspInit/MspDeInit
callbacks (registered beforehand)
Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
Exception done MspInit/MspDeInit that can be registered/unregistered
in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state, thus registered (user)
MspInit/DeInit callbacks can be used during the @ref HAL_LPTIM_Init/@ref HAL_LPTIM_DeInit.
In that case first register the MspInit/MspDeInit user callbacks using
@ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available and all callbacks
are set to the corresponding weak functions.
@endverbatim
******************************************************************************
* @attention
@ -222,7 +267,7 @@
/**
* @brief Initializes the LPTIM according to the specified parameters in the
* LPTIM_InitTypeDef and creates the associated handle.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
@ -259,10 +304,28 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
{
/* Allocate lock resource and initialize it */
hlptim->Lock = HAL_UNLOCKED;
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
/* Reset the LPTIM callback to the legacy weak callbacks */
hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
if(hlptim->MspInitCallback == NULL)
{
hlptim->MspInitCallback = HAL_LPTIM_MspInit;
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
hlptim->MspInitCallback(hlptim);
#else
/* Init the low level hardware */
HAL_LPTIM_MspInit(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}
/* Change the LPTIM state */
hlptim->State = HAL_LPTIM_STATE_BUSY;
@ -315,7 +378,7 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
/**
* @brief DeInitializes the LPTIM peripheral.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
@ -332,8 +395,17 @@ HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
/* Disable the LPTIM Peripheral Clock */
__HAL_LPTIM_DISABLE(hlptim);
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
if(hlptim->MspDeInitCallback == NULL)
{
hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
}
/* DeInit the low level hardware */
hlptim->MspDeInitCallback(hlptim);
#else
/* DeInit the low level hardware: CLOCK, NVIC.*/
HAL_LPTIM_MspDeInit(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
/* Change the LPTIM state */
hlptim->State = HAL_LPTIM_STATE_RESET;
@ -347,7 +419,7 @@ HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Initializes the LPTIM MSP.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
@ -362,7 +434,7 @@ __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
/**
* @brief DeInitializes LPTIM MSP.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
@ -407,10 +479,10 @@ __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the LPTIM PWM generation.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @param Pulse : Specifies the compare value.
* @param Pulse Specifies the compare value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -448,7 +520,7 @@ HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Peri
/**
* @brief Stops the LPTIM PWM generation.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
@ -471,10 +543,10 @@ HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the LPTIM PWM generation in interrupt mode.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF
* @param Pulse : Specifies the compare value.
* @param Pulse Specifies the compare value.
* This parameter must be a value between 0x0000 and 0xFFFF
* @retval HAL status
*/
@ -531,7 +603,7 @@ HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t P
/**
* @brief Stops the LPTIM PWM generation in interrupt mode.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
@ -573,10 +645,10 @@ HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the LPTIM One pulse generation.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @param Pulse : Specifies the compare value.
* @param Pulse Specifies the compare value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -614,7 +686,7 @@ HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t
/**
* @brief Stops the LPTIM One pulse generation.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
@ -637,10 +709,10 @@ HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the LPTIM One pulse generation in interrupt mode.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @param Pulse : Specifies the compare value.
* @param Pulse Specifies the compare value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -697,7 +769,7 @@ HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint3
/**
* @brief Stops the LPTIM One pulse generation in interrupt mode.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
@ -739,10 +811,10 @@ HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the LPTIM in Set once mode.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @param Pulse : Specifies the compare value.
* @param Pulse Specifies the compare value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -780,7 +852,7 @@ HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t
/**
* @brief Stops the LPTIM Set once mode.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
@ -803,10 +875,10 @@ HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the LPTIM Set once mode in interrupt mode.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @param Pulse : Specifies the compare value.
* @param Pulse Specifies the compare value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -863,7 +935,7 @@ HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32
/**
* @brief Stops the LPTIM Set once mode in interrupt mode.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
@ -905,8 +977,8 @@ HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the Encoder interface.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -957,7 +1029,7 @@ HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t
/**
* @brief Stops the Encoder interface.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
@ -983,8 +1055,8 @@ HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the Encoder interface in interrupt mode.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -1042,7 +1114,7 @@ HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32
/**
* @brief Stops the Encoder interface in interrupt mode.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
@ -1076,10 +1148,10 @@ HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
* @brief Starts the Timeout function. The first trigger event will start the
* timer, any successive trigger event will reset the counter and
* the timer restarts.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @param Timeout : Specifies the TimeOut value to rest the counter.
* @param Timeout Specifies the TimeOut value to rest the counter.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -1117,7 +1189,7 @@ HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t
/**
* @brief Stops the Timeout function.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
@ -1145,10 +1217,10 @@ HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
* @brief Starts the Timeout function in interrupt mode. The first trigger
* event will start the timer, any successive trigger event will reset
* the counter and the timer restarts.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @param Timeout : Specifies the TimeOut value to rest the counter.
* @param Timeout Specifies the TimeOut value to rest the counter.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -1195,7 +1267,7 @@ HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32
/**
* @brief Stops the Timeout function in interrupt mode.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
@ -1230,8 +1302,8 @@ HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the Counter mode.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -1271,7 +1343,7 @@ HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t
/**
* @brief Stops the Counter mode.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
@ -1294,8 +1366,8 @@ HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Starts the Counter mode in interrupt mode.
* @param hlptim : LPTIM handle
* @param Period : Specifies the Autoreload value.
* @param hlptim LPTIM handle
* @param Period Specifies the Autoreload value.
* This parameter must be a value between 0x0000 and 0xFFFF.
* @retval HAL status
*/
@ -1347,7 +1419,7 @@ HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32
/**
* @brief Stops the Counter mode in interrupt mode.
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
@ -1401,7 +1473,7 @@ HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
/**
* @brief This function returns the current counter value.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval Counter value.
*/
uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
@ -1414,7 +1486,7 @@ uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
/**
* @brief This function return the current Autoreload (Period) value.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval Autoreload value.
*/
uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
@ -1427,7 +1499,7 @@ uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
/**
* @brief This function return the current Compare (Pulse) value.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval Compare value.
*/
uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
@ -1459,7 +1531,7 @@ uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
/**
* @brief This function handles LPTIM interrupt request.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
@ -1472,7 +1544,11 @@ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
/* Clear Compare match flag */
__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
/* Compare match Callback */
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
hlptim->CompareMatchCallback(hlptim);
#else
HAL_LPTIM_CompareMatchCallback(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}
}
@ -1484,7 +1560,11 @@ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
/* Clear Autoreload match flag */
__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
/* Autoreload match Callback */
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
hlptim->AutoReloadMatchCallback(hlptim);
#else
HAL_LPTIM_AutoReloadMatchCallback(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}
}
@ -1496,7 +1576,11 @@ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
/* Clear Trigger detected flag */
__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
/* Trigger detected callback */
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
hlptim->TriggerCallback(hlptim);
#else
HAL_LPTIM_TriggerCallback(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}
}
@ -1508,7 +1592,11 @@ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
/* Clear Compare write flag */
__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
/* Compare write Callback */
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
hlptim->CompareWriteCallback(hlptim);
#else
HAL_LPTIM_CompareWriteCallback(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}
}
@ -1520,7 +1608,11 @@ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
/* Clear Autoreload write flag */
__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
/* Autoreload write Callback */
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
hlptim->AutoReloadWriteCallback(hlptim);
#else
HAL_LPTIM_AutoReloadWriteCallback(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}
}
@ -1532,7 +1624,11 @@ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
/* Clear Direction counter changed from Down to Up flag */
__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
/* Direction counter changed from Down to Up Callback */
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
hlptim->DirectionUpCallback(hlptim);
#else
HAL_LPTIM_DirectionUpCallback(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}
}
@ -1544,7 +1640,11 @@ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
/* Clear Direction counter changed from Up to Down flag */
__HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
/* Direction counter changed from Up to Down Callback */
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
hlptim->DirectionDownCallback(hlptim);
#else
HAL_LPTIM_DirectionDownCallback(hlptim);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}
}
@ -1553,7 +1653,7 @@ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Compare match callback in non blocking mode
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
@ -1568,7 +1668,7 @@ __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Autoreload match callback in non blocking mode
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
@ -1583,7 +1683,7 @@ __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Trigger detected callback in non blocking mode
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
@ -1598,7 +1698,7 @@ __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Compare write callback in non blocking mode
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
@ -1613,7 +1713,7 @@ __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Autoreload write callback in non blocking mode
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
@ -1628,7 +1728,7 @@ __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Direction counter changed from Down to Up callback in non blocking mode
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
@ -1643,7 +1743,7 @@ __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Direction counter changed from Up to Down callback in non blocking mode
* @param hlptim : LPTIM handle
* @param hlptim LPTIM handle
* @retval None
*/
__weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
@ -1656,6 +1756,212 @@ __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
*/
}
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
/**
* @brief Register user LPTIM callback to be used instead of the weak predefined callback
* @param hlptim lptim handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
* @arg @ref HAL_LPTIM_MSPINIT_CB_ID MspInit Callback ID
* @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID MspDeInit Callback ID
* @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare Match Callback ID
* @arg @ref HAL_LPTIM_AUTO_RELOAD_MATCH_CB_ID Auto Reload Match Callback ID
* @arg @ref HAL_LPTIM_TRIGGER_CB_ID Trigger Callback ID
* @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare Write Callback ID
* @arg @ref HAL_LPTIM_AUTO_RELOAD_WRITE_CB_ID Auto Reload Write Callback ID
* @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Direction UP Callback ID
* @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Direction Down Callback ID
* @param pCallback pointer to the callback function
* @retval status
*/
HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim, HAL_LPTIM_CallbackIDTypeDef CallbackID, pLPTIM_CallbackTypeDef pCallback)
{
HAL_StatusTypeDef status = HAL_OK;
if(pCallback == NULL)
{
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(hlptim);
if(hlptim->State == HAL_LPTIM_STATE_READY)
{
switch (CallbackID)
{
case HAL_LPTIM_MSPINIT_CB_ID :
hlptim->MspInitCallback = pCallback;
break;
case HAL_LPTIM_MSPDEINIT_CB_ID :
hlptim->MspDeInitCallback = pCallback;
break;
case HAL_LPTIM_COMPARE_MATCH_CB_ID :
hlptim->CompareMatchCallback = pCallback;
break;
case HAL_LPTIM_AUTO_RELOAD_MATCH_CB_ID :
hlptim->AutoReloadMatchCallback = pCallback;
break;
case HAL_LPTIM_TRIGGER_CB_ID :
hlptim->TriggerCallback = pCallback;
break;
case HAL_LPTIM_COMPARE_WRITE_CB_ID :
hlptim->CompareWriteCallback = pCallback;
break;
case HAL_LPTIM_AUTO_RELOAD_WRITE_CB_ID :
hlptim->AutoReloadWriteCallback = pCallback;
break;
case HAL_LPTIM_DIRECTION_UP_CB_ID :
hlptim->DirectionUpCallback = pCallback;
break;
case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
hlptim->DirectionDownCallback = pCallback;
break;
default :
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if(hlptim->State == HAL_LPTIM_STATE_RESET)
{
switch (CallbackID)
{
case HAL_LPTIM_MSPINIT_CB_ID :
hlptim->MspInitCallback = pCallback;
break;
case HAL_LPTIM_MSPDEINIT_CB_ID :
hlptim->MspDeInitCallback = pCallback;
break;
default :
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
{
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hlptim);
return status;
}
/**
* @brief UnRegister user LPTIM callback
* LPTIM callback is redirected to the weak predefined callback
* @param hlptim lptim handle
* @param CallbackID ID of the callback to be unregistered
+ * This parameter can be one of the following values:
+ * @arg @ref HAL_LPTIM_MSPINIT_CB_ID MspInit Callback ID
+ * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID MspDeInit Callback ID
+ * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare Match Callback ID
+ * @arg @ref HAL_LPTIM_AUTO_RELOAD_MATCH_CB_ID Auto Reload Match Callback ID
+ * @arg @ref HAL_LPTIM_TRIGGER_CB_ID Trigger Callback ID
+ * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare Write Callback ID
+ * @arg @ref HAL_LPTIM_AUTO_RELOAD_WRITE_CB_ID Auto Reload Write Callback ID
+ * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Direction UP Callback ID
+ * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Direction Down Callback ID
* @retval status
*/
HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim, HAL_LPTIM_CallbackIDTypeDef CallbackID)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(hlptim);
if(hlptim->State == HAL_LPTIM_STATE_READY)
{
switch (CallbackID)
{
case HAL_LPTIM_MSPINIT_CB_ID :
hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
break;
case HAL_LPTIM_MSPDEINIT_CB_ID :
hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak MspDeInit Callback */
break;
case HAL_LPTIM_COMPARE_MATCH_CB_ID :
hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare Match Callback */
break;
case HAL_LPTIM_AUTO_RELOAD_MATCH_CB_ID :
hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto Reload Match Callback */
break;
case HAL_LPTIM_TRIGGER_CB_ID :
hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak Trigger Callback */
break;
case HAL_LPTIM_COMPARE_WRITE_CB_ID :
hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare Write Callback */
break;
case HAL_LPTIM_AUTO_RELOAD_WRITE_CB_ID :
hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto Reload Write Callback */
break;
case HAL_LPTIM_DIRECTION_UP_CB_ID :
hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Direction Up Callback */
break;
case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Direction Down Callback */
break;
default :
/* Return error status */
status = HAL_ERROR;
break;
}
}
else if(hlptim->State == HAL_LPTIM_STATE_RESET)
{
switch (CallbackID)
{
case HAL_LPTIM_MSPINIT_CB_ID :
hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
break;
case HAL_LPTIM_MSPDEINIT_CB_ID :
hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak MspDeInit Callback */
break;
default :
/* Return error status */
status = HAL_ERROR;
break;
}
}
else
{
/* Return error status */
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(hlptim);
return status;
}
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
/**
* @}
*/
@ -1676,7 +1982,7 @@ __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
/**
* @brief Returns the LPTIM state.
* @param hlptim: LPTIM handle
* @param hlptim LPTIM handle
* @retval HAL state
*/
HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)

86
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_lptim.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of LPTIM HAL module.
******************************************************************************
* @attention
@ -155,20 +153,54 @@ typedef enum __HAL_LPTIM_StateTypeDef
/**
* @brief LPTIM handle Structure definition
*/
typedef struct
typedef struct __LPTIM_HandleTypeDef
{
LPTIM_TypeDef *Instance; /*!< Register base address */
LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */
HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
HAL_LockTypeDef Lock; /*!< LPTIM locking object */
__IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
void (* MspInitCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Msp Init Callback */
void (* MspDeInitCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Msp DeInit Callback */
void (* CompareMatchCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Compare Match Callback */
void (* AutoReloadMatchCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Auto Reload Match Callback */
void (* TriggerCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Trigger Callback */
void (* CompareWriteCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Compare Write Callback */
void (* AutoReloadWriteCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Auto Reload Write Callback */
void (* DirectionUpCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Direction Up Callback */
void (* DirectionDownCallback) (struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Direction Down Callback */
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
}LPTIM_HandleTypeDef;
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
/**
* @brief HAL LPTIM Callback ID enumeration definition
*/
typedef enum
{
HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM MspInit Callback ID */
HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM MspDeInit Callback ID */
HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< LPTIM Compare Match Callback ID */
HAL_LPTIM_AUTO_RELOAD_MATCH_CB_ID = 0x03U, /*!< LPTIM Auto Reload Match Callback ID */
HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< LPTIM Trigger Callback ID */
HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< LPTIM Compare Write Callback ID */
HAL_LPTIM_AUTO_RELOAD_WRITE_CB_ID = 0x06U, /*!< LPTIM Auto Reload Write Callback ID */
HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< LPTIM Direction Up Callback ID */
HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< LPTIM Direction Down Callback ID */
}HAL_LPTIM_CallbackIDTypeDef;
/**
* @brief HAL LPTIM Callback pointer definition
*/
typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef * hlptim); /*!< pointer to the LPTIM callback function */
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
/**
* @}
*/
@ -329,14 +361,14 @@ typedef struct
*/
/** @brief Reset LPTIM handle state
* @param __HANDLE__: LPTIM handle
* @param __HANDLE__ LPTIM handle
* @retval None
*/
#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
/**
* @brief Enable/Disable the LPTIM peripheral.
* @param __HANDLE__: LPTIM handle
* @param __HANDLE__ LPTIM handle
* @retval None
*/
#define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
@ -344,7 +376,7 @@ typedef struct
/**
* @brief Starts the LPTIM peripheral in Continuous or in single mode.
* @param __HANDLE__: DMA handle
* @param __HANDLE__ DMA handle
* @retval None
*/
#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT)
@ -353,24 +385,24 @@ typedef struct
/**
* @brief Writes the passed parameter in the Autoreload register.
* @param __HANDLE__: LPTIM handle
* @param __VALUE__ : Autoreload value
* @param __HANDLE__ LPTIM handle
* @param __VALUE__ Autoreload value
* @retval None
*/
#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
/**
* @brief Writes the passed parameter in the Compare register.
* @param __HANDLE__: LPTIM handle
* @param __VALUE__ : Compare value
* @param __HANDLE__ LPTIM handle
* @param __VALUE__ Compare value
* @retval None
*/
#define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
/**
* @brief Checks whether the specified LPTIM flag is set or not.
* @param __HANDLE__: LPTIM handle
* @param __FLAG__ : LPTIM flag to check
* @param __HANDLE__ LPTIM handle
* @param __FLAG__ LPTIM flag to check
* This parameter can be a value of:
* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
@ -385,8 +417,8 @@ typedef struct
/**
* @brief Clears the specified LPTIM flag.
* @param __HANDLE__: LPTIM handle.
* @param __FLAG__ : LPTIM flag to clear.
* @param __HANDLE__ LPTIM handle.
* @param __FLAG__ LPTIM flag to clear.
* This parameter can be a value of:
* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
@ -401,8 +433,8 @@ typedef struct
/**
* @brief Enable the specified LPTIM interrupt.
* @param __HANDLE__ : LPTIM handle.
* @param __INTERRUPT__ : LPTIM interrupt to set.
* @param __HANDLE__ LPTIM handle.
* @param __INTERRUPT__ LPTIM interrupt to set.
* This parameter can be a value of:
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
@ -417,8 +449,8 @@ typedef struct
/**
* @brief Disable the specified LPTIM interrupt.
* @param __HANDLE__ : LPTIM handle.
* @param __INTERRUPT__ : LPTIM interrupt to set.
* @param __HANDLE__ LPTIM handle.
* @param __INTERRUPT__ LPTIM interrupt to set.
* This parameter can be a value of:
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
@ -433,8 +465,8 @@ typedef struct
/**
* @brief Checks whether the specified LPTIM interrupt is set or not.
* @param __HANDLE__ : LPTIM handle.
* @param __INTERRUPT__ : LPTIM interrupt to check.
* @param __HANDLE__ LPTIM handle.
* @param __INTERRUPT__ LPTIM interrupt to check.
* This parameter can be a value of:
* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
@ -614,6 +646,12 @@ void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
/* Callbacks Register/UnRegister functions ***********************************/
#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim, HAL_LPTIM_CallbackIDTypeDef CallbackID, pLPTIM_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim, HAL_LPTIM_CallbackIDTypeDef CallbackID);
#endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
/* Peripheral State functions ************************************************/
HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);

190
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_ltdc.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief LTDC HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the LTDC peripheral:
@ -154,7 +152,7 @@ static void LTDC_SetConfig(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLay
/**
* @brief Initializes the LTDC according to the specified
* parameters in the LTDC_InitTypeDef and create the associated handle.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval HAL status
*/
@ -246,7 +244,7 @@ HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc)
/**
* @brief Deinitializes the LTDC peripheral registers to their default reset
* values.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval None
*/
@ -270,7 +268,7 @@ HAL_StatusTypeDef HAL_LTDC_DeInit(LTDC_HandleTypeDef *hltdc)
/**
* @brief Initializes the LTDC MSP.
* @param hltdc : pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval None
*/
@ -286,7 +284,7 @@ __weak void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
/**
* @brief DeInitializes the LTDC MSP.
* @param hltdc : pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval None
*/
@ -319,7 +317,7 @@ __weak void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
*/
/**
* @brief Handles LTDC interrupt request.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval HAL status
*/
@ -391,7 +389,7 @@ void HAL_LTDC_IRQHandler(LTDC_HandleTypeDef *hltdc)
__HAL_UNLOCK(hltdc);
/* Line interrupt Callback */
HAL_LTDC_LineEvenCallback(hltdc);
HAL_LTDC_LineEventCallback(hltdc);
}
}
/* Register reload Interrupt management ***************************************/
@ -419,7 +417,7 @@ void HAL_LTDC_IRQHandler(LTDC_HandleTypeDef *hltdc)
/**
* @brief Error LTDC callback.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval None
*/
@ -435,23 +433,23 @@ __weak void HAL_LTDC_ErrorCallback(LTDC_HandleTypeDef *hltdc)
/**
* @brief Line Event callback.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval None
*/
__weak void HAL_LTDC_LineEvenCallback(LTDC_HandleTypeDef *hltdc)
__weak void HAL_LTDC_LineEventCallback(LTDC_HandleTypeDef *hltdc)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hltdc);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_LTDC_LineEvenCallback could be implemented in the user file
the HAL_LTDC_LineEventCallback could be implemented in the user file
*/
}
/**
* @brief Reload Event callback.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval None
*/
@ -496,11 +494,11 @@ __weak void HAL_LTDC_ReloadEventCallback(LTDC_HandleTypeDef *hltdc)
/**
* @brief Configure the LTDC Layer according to the specified
* parameters in the LTDC_InitTypeDef and create the associated handle.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param pLayerCfg: pointer to a LTDC_LayerCfgTypeDef structure that contains
* @param pLayerCfg pointer to a LTDC_LayerCfgTypeDef structure that contains
* the configuration information for the Layer.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -546,10 +544,10 @@ HAL_StatusTypeDef HAL_LTDC_ConfigLayer(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgT
/**
* @brief Configure the color keying.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param RGBValue: the color key value
* @param LayerIdx: LTDC Layer index.
* @param RGBValue the color key value
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -583,11 +581,11 @@ HAL_StatusTypeDef HAL_LTDC_ConfigColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t
/**
* @brief Load the color lookup table.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param pCLUT: pointer to the color lookup table address.
* @param CLUTSize: the color lookup table size.
* @param LayerIdx: LTDC Layer index.
* @param pCLUT pointer to the color lookup table address.
* @param CLUTSize the color lookup table size.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -635,9 +633,9 @@ HAL_StatusTypeDef HAL_LTDC_ConfigCLUT(LTDC_HandleTypeDef *hltdc, uint32_t *pCLUT
/**
* @brief Enable the color keying.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -670,9 +668,9 @@ HAL_StatusTypeDef HAL_LTDC_EnableColorKeying(LTDC_HandleTypeDef *hltdc, uint32_t
/**
* @brief Disable the color keying.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -705,9 +703,9 @@ HAL_StatusTypeDef HAL_LTDC_DisableColorKeying(LTDC_HandleTypeDef *hltdc, uint32_
/**
* @brief Enable the color lookup table.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -741,9 +739,9 @@ HAL_StatusTypeDef HAL_LTDC_EnableCLUT(LTDC_HandleTypeDef *hltdc, uint32_t LayerI
/**
* @brief Disable the color lookup table.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -777,7 +775,7 @@ HAL_StatusTypeDef HAL_LTDC_DisableCLUT(LTDC_HandleTypeDef *hltdc, uint32_t Layer
/**
* @brief Enables Dither.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval HAL status
*/
@ -804,7 +802,7 @@ HAL_StatusTypeDef HAL_LTDC_EnableDither(LTDC_HandleTypeDef *hltdc)
/**
* @brief Disables Dither.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval HAL status
*/
@ -831,11 +829,11 @@ HAL_StatusTypeDef HAL_LTDC_DisableDither(LTDC_HandleTypeDef *hltdc)
/**
* @brief Set the LTDC window size.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param XSize: LTDC Pixel per line
* @param YSize: LTDC Line number
* @param LayerIdx: LTDC Layer index.
* @param XSize LTDC Pixel per line
* @param YSize LTDC Line number
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -893,11 +891,11 @@ HAL_StatusTypeDef HAL_LTDC_SetWindowSize(LTDC_HandleTypeDef *hltdc, uint32_t XSi
/**
* @brief Set the LTDC window position.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param X0: LTDC window X offset
* @param Y0: LTDC window Y offset
* @param LayerIdx: LTDC Layer index.
* @param X0 LTDC window X offset
* @param Y0 LTDC window Y offset
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -947,10 +945,10 @@ HAL_StatusTypeDef HAL_LTDC_SetWindowPosition(LTDC_HandleTypeDef *hltdc, uint32_t
/**
* @brief Reconfigure the pixel format.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param Pixelformat: new pixel format value.
* @param LayerIdx: LTDC Layer index.
* @param Pixelformat new pixel format value.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1.
* @retval HAL status
@ -992,10 +990,10 @@ HAL_StatusTypeDef HAL_LTDC_SetPixelFormat(LTDC_HandleTypeDef *hltdc, uint32_t Pi
/**
* @brief Reconfigure the layer alpha value.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param Alpha: new alpha value.
* @param LayerIdx: LTDC Layer index.
* @param Alpha new alpha value.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1036,10 +1034,10 @@ HAL_StatusTypeDef HAL_LTDC_SetAlpha(LTDC_HandleTypeDef *hltdc, uint32_t Alpha, u
}
/**
* @brief Reconfigure the frame buffer Address.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param Address: new address value.
* @param LayerIdx: LTDC Layer index.
* @param Address new address value.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1.
* @retval HAL status
@ -1085,10 +1083,10 @@ HAL_StatusTypeDef HAL_LTDC_SetAddress(LTDC_HandleTypeDef *hltdc, uint32_t Addres
* will be in that case 800 pixels and not 320 pixels as initially configured by previous call to HAL_LTDC_ConfigLayer().
* Note : this function should be called only after a previous call to HAL_LTDC_ConfigLayer() to modify the default pitch
* configured by HAL_LTDC_ConfigLayer() when required (refer to example described just above).
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LinePitchInPixels: New line pitch in pixels to configure for LTDC layer 'LayerIdx'.
* @param LayerIdx: LTDC layer index concerned by the modification of line pitch.
* @param LinePitchInPixels New line pitch in pixels to configure for LTDC layer 'LayerIdx'.
* @param LayerIdx LTDC layer index concerned by the modification of line pitch.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LTDC_SetPitch(LTDC_HandleTypeDef *hltdc, uint32_t LinePitchInPixels, uint32_t LayerIdx)
@ -1154,9 +1152,9 @@ HAL_StatusTypeDef HAL_LTDC_SetPitch(LTDC_HandleTypeDef *hltdc, uint32_t LinePitc
/**
* @brief Define the position of the line interrupt.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param Line: Line Interrupt Position.
* @param Line Line Interrupt Position.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LTDC_ProgramLineEvent(LTDC_HandleTypeDef *hltdc, uint32_t Line)
@ -1187,9 +1185,9 @@ HAL_StatusTypeDef HAL_LTDC_ProgramLineEvent(LTDC_HandleTypeDef *hltdc, uint32_t
/**
* @brief LTDC configuration reload.
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param ReloadType: This parameter can be one of the following values :
* @param ReloadType This parameter can be one of the following values :
* LTDC_RELOAD_IMMEDIATE : Immediate Reload
* LTDC_RELOAD_VERTICAL_BLANKING : Reload in the next Vertical Blanking
* @retval HAL status
@ -1223,11 +1221,11 @@ HAL_StatusTypeDef HAL_LTDC_Reload(LTDC_HandleTypeDef *hltdc, uint32_t ReloadTyp
* @brief Configure the LTDC Layer according to the specified without reloading
* parameters in the LTDC_InitTypeDef and create the associated handle.
* Variant of the function HAL_LTDC_ConfigLayer without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param pLayerCfg: pointer to a LTDC_LayerCfgTypeDef structure that contains
* @param pLayerCfg pointer to a LTDC_LayerCfgTypeDef structure that contains
* the configuration information for the Layer.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1273,11 +1271,11 @@ HAL_StatusTypeDef HAL_LTDC_ConfigLayer_NoReload(LTDC_HandleTypeDef *hltdc, LTDC_
/**
* @brief Set the LTDC window size without reloading.
* Variant of the function HAL_LTDC_SetWindowSize without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param XSize: LTDC Pixel per line
* @param YSize: LTDC Line number
* @param LayerIdx: LTDC Layer index.
* @param XSize LTDC Pixel per line
* @param YSize LTDC Line number
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1335,11 +1333,11 @@ HAL_StatusTypeDef HAL_LTDC_SetWindowSize_NoReload(LTDC_HandleTypeDef *hltdc, uin
/**
* @brief Set the LTDC window position without reloading.
* Variant of the function HAL_LTDC_SetWindowPosition without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param X0: LTDC window X offset
* @param Y0: LTDC window Y offset
* @param LayerIdx: LTDC Layer index.
* @param X0 LTDC window X offset
* @param Y0 LTDC window Y offset
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1389,10 +1387,10 @@ HAL_StatusTypeDef HAL_LTDC_SetWindowPosition_NoReload(LTDC_HandleTypeDef *hltdc,
/**
* @brief Reconfigure the pixel format without reloading.
* Variant of the function HAL_LTDC_SetPixelFormat without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDfef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDfef structure that contains
* the configuration information for the LTDC.
* @param Pixelformat: new pixel format value.
* @param LayerIdx: LTDC Layer index.
* @param Pixelformat new pixel format value.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1.
* @retval HAL status
@ -1434,10 +1432,10 @@ HAL_StatusTypeDef HAL_LTDC_SetPixelFormat_NoReload(LTDC_HandleTypeDef *hltdc, ui
/**
* @brief Reconfigure the layer alpha value without reloading.
* Variant of the function HAL_LTDC_SetAlpha without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param Alpha: new alpha value.
* @param LayerIdx: LTDC Layer index.
* @param Alpha new alpha value.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1479,10 +1477,10 @@ HAL_StatusTypeDef HAL_LTDC_SetAlpha_NoReload(LTDC_HandleTypeDef *hltdc, uint32_t
/**
* @brief Reconfigure the frame buffer Address without reloading.
* Variant of the function HAL_LTDC_SetAddress without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param Address: new address value.
* @param LayerIdx: LTDC Layer index.
* @param Address new address value.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1.
* @retval HAL status
@ -1528,10 +1526,10 @@ HAL_StatusTypeDef HAL_LTDC_SetAddress_NoReload(LTDC_HandleTypeDef *hltdc, uint32
* Note : this function should be called only after a previous call to HAL_LTDC_ConfigLayer() to modify the default pitch
* configured by HAL_LTDC_ConfigLayer() when required (refer to example described just above).
* Variant of the function HAL_LTDC_SetPitch without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LinePitchInPixels: New line pitch in pixels to configure for LTDC layer 'LayerIdx'.
* @param LayerIdx: LTDC layer index concerned by the modification of line pitch.
* @param LinePitchInPixels New line pitch in pixels to configure for LTDC layer 'LayerIdx'.
* @param LayerIdx LTDC layer index concerned by the modification of line pitch.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LTDC_SetPitch_NoReload(LTDC_HandleTypeDef *hltdc, uint32_t LinePitchInPixels, uint32_t LayerIdx)
@ -1595,10 +1593,10 @@ HAL_StatusTypeDef HAL_LTDC_SetPitch_NoReload(LTDC_HandleTypeDef *hltdc, uint32_t
/**
* @brief Configure the color keying without reloading.
* Variant of the function HAL_LTDC_ConfigColorKeying without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param RGBValue: the color key value
* @param LayerIdx: LTDC Layer index.
* @param RGBValue the color key value
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1632,9 +1630,9 @@ HAL_StatusTypeDef HAL_LTDC_ConfigColorKeying_NoReload(LTDC_HandleTypeDef *hltdc,
/**
* @brief Enable the color keying without reloading.
* Variant of the function HAL_LTDC_EnableColorKeying without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1667,9 +1665,9 @@ HAL_StatusTypeDef HAL_LTDC_EnableColorKeying_NoReload(LTDC_HandleTypeDef *hltdc,
/**
* @brief Disable the color keying without reloading.
* Variant of the function HAL_LTDC_DisableColorKeying without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1702,9 +1700,9 @@ HAL_StatusTypeDef HAL_LTDC_DisableColorKeying_NoReload(LTDC_HandleTypeDef *hltdc
/**
* @brief Enable the color lookup table without reloading.
* Variant of the function HAL_LTDC_EnableCLUT without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1738,9 +1736,9 @@ HAL_StatusTypeDef HAL_LTDC_EnableCLUT_NoReload(LTDC_HandleTypeDef *hltdc, uint32
/**
* @brief Disable the color lookup table without reloading.
* Variant of the function HAL_LTDC_DisableCLUT without immediate reload
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param LayerIdx: LTDC Layer index.
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values:
* 0 or 1
* @retval HAL status
@ -1793,7 +1791,7 @@ HAL_StatusTypeDef HAL_LTDC_DisableCLUT_NoReload(LTDC_HandleTypeDef *hltdc, uint3
/**
* @brief Return the LTDC state
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval HAL state
*/
@ -1804,7 +1802,7 @@ HAL_LTDC_StateTypeDef HAL_LTDC_GetState(LTDC_HandleTypeDef *hltdc)
/**
* @brief Return the LTDC error code
* @param hltdc : pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @retval LTDC Error Code
*/
@ -1819,10 +1817,10 @@ uint32_t HAL_LTDC_GetError(LTDC_HandleTypeDef *hltdc)
/**
* @brief Configures the LTDC peripheral
* @param hltdc : Pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc Pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param pLayerCfg: Pointer LTDC Layer Configuration structure
* @param LayerIdx: LTDC Layer index.
* @param pLayerCfg Pointer LTDC Layer Configuration structure
* @param LayerIdx LTDC Layer index.
* This parameter can be one of the following values: 0 or 1
* @retval None
*/

40
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_ltdc.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of LTDC HAL module.
******************************************************************************
* @attention
@ -365,29 +363,29 @@ typedef struct
*/
/** @brief Reset LTDC handle state
* @param __HANDLE__: specifies the LTDC handle.
* @param __HANDLE__ specifies the LTDC handle.
* @retval None
*/
#define __HAL_LTDC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LTDC_STATE_RESET)
/**
* @brief Enable the LTDC.
* @param __HANDLE__: LTDC handle
* @param __HANDLE__ LTDC handle
* @retval None.
*/
#define __HAL_LTDC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->GCR |= LTDC_GCR_LTDCEN)
/**
* @brief Disable the LTDC.
* @param __HANDLE__: LTDC handle
* @param __HANDLE__ LTDC handle
* @retval None.
*/
#define __HAL_LTDC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->GCR &= ~(LTDC_GCR_LTDCEN))
/**
* @brief Enable the LTDC Layer.
* @param __HANDLE__: LTDC handle
* @param __LAYER__: Specify the layer to be enabled
* @param __HANDLE__ LTDC handle
* @param __LAYER__ Specify the layer to be enabled
* This parameter can be 0 or 1
* @retval None.
*/
@ -395,8 +393,8 @@ typedef struct
/**
* @brief Disable the LTDC Layer.
* @param __HANDLE__: LTDC handle
* @param __LAYER__: Specify the layer to be disabled
* @param __HANDLE__ LTDC handle
* @param __LAYER__ Specify the layer to be disabled
* This parameter can be 0 or 1
* @retval None.
*/
@ -404,7 +402,7 @@ typedef struct
/**
* @brief Reload Layer Configuration.
* @param __HANDLE__: LTDC handle
* @param __HANDLE__ LTDC handle
* @retval None.
*/
#define __HAL_LTDC_RELOAD_CONFIG(__HANDLE__) ((__HANDLE__)->Instance->SRCR |= LTDC_SRCR_IMR)
@ -412,8 +410,8 @@ typedef struct
/* Interrupt & Flag management */
/**
* @brief Get the LTDC pending flags.
* @param __HANDLE__: LTDC handle
* @param __FLAG__: Get the specified flag.
* @param __HANDLE__ LTDC handle
* @param __FLAG__ Get the specified flag.
* This parameter can be any combination of the following values:
* @arg LTDC_FLAG_LI: Line Interrupt flag
* @arg LTDC_FLAG_FU: FIFO Underrun Interrupt flag
@ -425,8 +423,8 @@ typedef struct
/**
* @brief Clears the LTDC pending flags.
* @param __HANDLE__: LTDC handle
* @param __FLAG__: specifies the flag to clear.
* @param __HANDLE__ LTDC handle
* @param __FLAG__ specifies the flag to clear.
* This parameter can be any combination of the following values:
* @arg LTDC_FLAG_LI: Line Interrupt flag
* @arg LTDC_FLAG_FU: FIFO Underrun Interrupt flag
@ -438,8 +436,8 @@ typedef struct
/**
* @brief Enables the specified LTDC interrupts.
* @param __HANDLE__: LTDC handle
* @param __INTERRUPT__: specifies the LTDC interrupt sources to be enabled.
* @param __HANDLE__ LTDC handle
* @param __INTERRUPT__ specifies the LTDC interrupt sources to be enabled.
* This parameter can be any combination of the following values:
* @arg LTDC_IT_LI: Line Interrupt flag
* @arg LTDC_IT_FU: FIFO Underrun Interrupt flag
@ -451,8 +449,8 @@ typedef struct
/**
* @brief Disables the specified LTDC interrupts.
* @param __HANDLE__: LTDC handle
* @param __INTERRUPT__: specifies the LTDC interrupt sources to be disabled.
* @param __HANDLE__ LTDC handle
* @param __INTERRUPT__ specifies the LTDC interrupt sources to be disabled.
* This parameter can be any combination of the following values:
* @arg LTDC_IT_LI: Line Interrupt flag
* @arg LTDC_IT_FU: FIFO Underrun Interrupt flag
@ -464,8 +462,8 @@ typedef struct
/**
* @brief Checks whether the specified LTDC interrupt has occurred or not.
* @param __HANDLE__: LTDC handle
* @param __INTERRUPT__: specifies the LTDC interrupt source to check.
* @param __HANDLE__ LTDC handle
* @param __INTERRUPT__ specifies the LTDC interrupt source to check.
* This parameter can be one of the following values:
* @arg LTDC_IT_LI: Line Interrupt flag
* @arg LTDC_IT_FU: FIFO Underrun Interrupt flag
@ -496,7 +494,7 @@ HAL_StatusTypeDef HAL_LTDC_DeInit(LTDC_HandleTypeDef *hltdc);
void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc);
void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc);
void HAL_LTDC_ErrorCallback(LTDC_HandleTypeDef *hltdc);
void HAL_LTDC_LineEvenCallback(LTDC_HandleTypeDef *hltdc);
void HAL_LTDC_LineEventCallback(LTDC_HandleTypeDef *hltdc);
void HAL_LTDC_ReloadEventCallback(LTDC_HandleTypeDef *hltdc);
/**
* @}

10
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_ltdc_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief LTDC Extension HAL module driver.
******************************************************************************
* @attention
@ -75,9 +73,9 @@
#if defined (STM32F769xx) || defined (STM32F779xx)
/**
* @brief Retrieve common parameters from DSI Video mode configuration structure
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param VidCfg: pointer to a DSI_VidCfgTypeDef structure that contains
* @param VidCfg pointer to a DSI_VidCfgTypeDef structure that contains
* the DSI video mode configuration parameters
* @note The implementation of this function is taking into account the LTDC
* polarities inversion as described in the current LTDC specification
@ -111,9 +109,9 @@ HAL_StatusTypeDef HAL_LTDC_StructInitFromVideoConfig(LTDC_HandleTypeDef* hltdc,
/**
* @brief Retrieve common parameters from DSI Adapted command mode configuration structure
* @param hltdc: pointer to a LTDC_HandleTypeDef structure that contains
* @param hltdc pointer to a LTDC_HandleTypeDef structure that contains
* the configuration information for the LTDC.
* @param CmdCfg: pointer to a DSI_CmdCfgTypeDef structure that contains
* @param CmdCfg pointer to a DSI_CmdCfgTypeDef structure that contains
* the DSI command mode configuration parameters
* @note The implementation of this function is taking into account the LTDC
* polarities inversion as described in the current LTDC specification

2
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_ltdc_ex.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of LTDC HAL Extension module.
******************************************************************************
* @attention

50
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_mdios.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief MDIOS HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the MDIOS Peripheral.
@ -145,7 +143,7 @@
/**
* @brief Initializes the MDIOS according to the specified parameters in
* the MDIOS_InitTypeDef and creates the associated handle .
* @param hmdios: pointer to a MDIOS_HandleTypeDef structure that contains
* @param hmdios pointer to a MDIOS_HandleTypeDef structure that contains
* the configuration information for MDIOS module
* @retval HAL status
*/
@ -203,7 +201,7 @@ HAL_StatusTypeDef HAL_MDIOS_Init(MDIOS_HandleTypeDef *hmdios)
/**
* @brief DeInitializes the MDIOS peripheral.
* @param hmdios: MDIOS handle
* @param hmdios MDIOS handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MDIOS_DeInit(MDIOS_HandleTypeDef *hmdios)
@ -238,7 +236,7 @@ HAL_StatusTypeDef HAL_MDIOS_DeInit(MDIOS_HandleTypeDef *hmdios)
/**
* @brief MDIOS MSP Init
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval None
*/
__weak void HAL_MDIOS_MspInit(MDIOS_HandleTypeDef *hmdios)
@ -253,7 +251,7 @@ HAL_StatusTypeDef HAL_MDIOS_DeInit(MDIOS_HandleTypeDef *hmdios)
/**
* @brief MDIOS MSP DeInit
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval None
*/
__weak void HAL_MDIOS_MspDeInit(MDIOS_HandleTypeDef *hmdios)
@ -304,9 +302,9 @@ HAL_StatusTypeDef HAL_MDIOS_DeInit(MDIOS_HandleTypeDef *hmdios)
/**
* @brief Writes to an MDIOS output register
* @param hmdios: mdios handle
* @param RegNum: MDIOS input register number
* @param Data: Data to write
* @param hmdios mdios handle
* @param RegNum MDIOS input register number
* @param Data Data to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MDIOS_WriteReg(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum, uint16_t Data)
@ -333,9 +331,9 @@ HAL_StatusTypeDef HAL_MDIOS_WriteReg(MDIOS_HandleTypeDef *hmdios, uint32_t RegNu
/**
* @brief Reads an MDIOS input register
* @param hmdios: mdios handle
* @param RegNum: MDIOS input register number
* @param pData: pointer to Data
* @param hmdios mdios handle
* @param RegNum MDIOS input register number
* @param pData pointer to Data
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MDIOS_ReadReg(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum, uint16_t *pData)
@ -362,7 +360,7 @@ HAL_StatusTypeDef HAL_MDIOS_ReadReg(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum
/**
* @brief Gets Written registers by MDIO master
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval bit map of written registers addresses
*/
uint32_t HAL_MDIOS_GetWrittenRegAddress(MDIOS_HandleTypeDef *hmdios)
@ -372,7 +370,7 @@ uint32_t HAL_MDIOS_GetWrittenRegAddress(MDIOS_HandleTypeDef *hmdios)
/**
* @brief Gets Read registers by MDIO master
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval bit map of read registers addresses
*/
uint32_t HAL_MDIOS_GetReadRegAddress(MDIOS_HandleTypeDef *hmdios)
@ -382,8 +380,8 @@ uint32_t HAL_MDIOS_GetReadRegAddress(MDIOS_HandleTypeDef *hmdios)
/**
* @brief Clears Write registers flag
* @param hmdios: mdios handle
* @param RegNum: registers addresses to be cleared
* @param hmdios mdios handle
* @param RegNum registers addresses to be cleared
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MDIOS_ClearWriteRegAddress(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum)
@ -405,8 +403,8 @@ HAL_StatusTypeDef HAL_MDIOS_ClearWriteRegAddress(MDIOS_HandleTypeDef *hmdios, ui
/**
* @brief Clears Read register flag
* @param hmdios: mdios handle
* @param RegNum: registers addresses to be cleared
* @param hmdios mdios handle
* @param RegNum registers addresses to be cleared
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MDIOS_ClearReadRegAddress(MDIOS_HandleTypeDef *hmdios, uint32_t RegNum)
@ -428,7 +426,7 @@ HAL_StatusTypeDef HAL_MDIOS_ClearReadRegAddress(MDIOS_HandleTypeDef *hmdios, uin
/**
* @brief Enables Events for MDIOS peripheral
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MDIOS_EnableEvents(MDIOS_HandleTypeDef *hmdios)
@ -447,7 +445,7 @@ HAL_StatusTypeDef HAL_MDIOS_EnableEvents(MDIOS_HandleTypeDef *hmdios)
/**
* @brief This function handles MDIOS interrupt request.
* @param hmdios: MDIOS handle
* @param hmdios MDIOS handle
* @retval None
*/
void HAL_MDIOS_IRQHandler(MDIOS_HandleTypeDef *hmdios)
@ -507,7 +505,7 @@ void HAL_MDIOS_IRQHandler(MDIOS_HandleTypeDef *hmdios)
/**
* @brief Write Complete Callback
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval None
*/
__weak void HAL_MDIOS_WriteCpltCallback(MDIOS_HandleTypeDef *hmdios)
@ -522,7 +520,7 @@ void HAL_MDIOS_IRQHandler(MDIOS_HandleTypeDef *hmdios)
/**
* @brief Read Complete Callback
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval None
*/
__weak void HAL_MDIOS_ReadCpltCallback(MDIOS_HandleTypeDef *hmdios)
@ -537,7 +535,7 @@ void HAL_MDIOS_IRQHandler(MDIOS_HandleTypeDef *hmdios)
/**
* @brief Error Callback
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval None
*/
__weak void HAL_MDIOS_ErrorCallback(MDIOS_HandleTypeDef *hmdios)
@ -552,7 +550,7 @@ void HAL_MDIOS_IRQHandler(MDIOS_HandleTypeDef *hmdios)
/**
* @brief MDIOS WAKEUP interrupt callback
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval None
*/
__weak void HAL_MDIOS_WakeUpCallback(MDIOS_HandleTypeDef *hmdios)
@ -587,7 +585,7 @@ __weak void HAL_MDIOS_WakeUpCallback(MDIOS_HandleTypeDef *hmdios)
/**
* @brief Gets MDIOS error flags
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval bit map of occured errors
*/
uint32_t HAL_MDIOS_GetError(MDIOS_HandleTypeDef *hmdios)
@ -598,7 +596,7 @@ uint32_t HAL_MDIOS_GetError(MDIOS_HandleTypeDef *hmdios)
/**
* @brief Return the MDIOS HAL state
* @param hmdios: mdios handle
* @param hmdios mdios handle
* @retval MDIOS state
*/
HAL_MDIOS_StateTypeDef HAL_MDIOS_GetState(MDIOS_HandleTypeDef *hmdios)

34
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_mdios.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of MDIOS HAL module.
******************************************************************************
* @attention
@ -246,14 +244,14 @@ typedef struct
*/
/** @brief Reset MDIOS handle state
* @param __HANDLE__: MDIOS handle.
* @param __HANDLE__ MDIOS handle.
* @retval None
*/
#define __HAL_MDIOS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MDIOS_STATE_RESET)
/**
* @brief Enable/Disable the MDIOS peripheral.
* @param __HANDLE__: specifies the MDIOS handle.
* @param __HANDLE__ specifies the MDIOS handle.
* @retval None
*/
#define __HAL_MDIOS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= MDIOS_CR_EN)
@ -262,8 +260,8 @@ typedef struct
/**
* @brief Enable the MDIOS device interrupt.
* @param __HANDLE__: specifies the MDIOS handle.
* @param __INTERRUPT__ : specifies the MDIOS interrupt sources to be enabled.
* @param __HANDLE__ specifies the MDIOS handle.
* @param __INTERRUPT__ specifies the MDIOS interrupt sources to be enabled.
* This parameter can be one or a combination of the following values:
* @arg MDIOS_IT_WRITE: Register write interrupt
* @arg MDIOS_IT_READ: Register read interrupt
@ -274,8 +272,8 @@ typedef struct
/**
* @brief Disable the MDIOS device interrupt.
* @param __HANDLE__: specifies the MDIOS handle.
* @param __INTERRUPT__ : specifies the MDIOS interrupt sources to be disabled.
* @param __HANDLE__ specifies the MDIOS handle.
* @param __INTERRUPT__ specifies the MDIOS interrupt sources to be disabled.
* This parameter can be one or a combination of the following values:
* @arg MDIOS_IT_WRITE: Register write interrupt
* @arg MDIOS_IT_READ: Register read interrupt
@ -285,22 +283,22 @@ typedef struct
#define __HAL_MDIOS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
/** @brief Set MDIOS slave get write register flag
* @param __HANDLE__: specifies the MDIOS handle.
* @param __FLAG__: specifies the write register flag
* @param __HANDLE__ specifies the MDIOS handle.
* @param __FLAG__ specifies the write register flag
* @retval The state of write flag
*/
#define __HAL_MDIOS_GET_WRITE_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WRFR & (__FLAG__))
/** @brief MDIOS slave get read register flag
* @param __HANDLE__: specifies the MDIOS handle.
* @param __FLAG__: specifies the read register flag
* @param __HANDLE__ specifies the MDIOS handle.
* @param __FLAG__ specifies the read register flag
* @retval The state of read flag
*/
#define __HAL_MDIOS_GET_READ_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RDFR & (__FLAG__))
/** @brief MDIOS slave get interrupt
* @param __HANDLE__: specifies the MDIOS handle.
* @param __FLAG__ : specifies the Error flag.
* @param __HANDLE__ specifies the MDIOS handle.
* @param __FLAG__ specifies the Error flag.
* This parameter can be one or a combination of the following values:
* @arg MDIOS_TURNARROUND_ERROR_FLAG: Register write interrupt
* @arg MDIOS_START_ERROR_FLAG: Register read interrupt
@ -310,8 +308,8 @@ typedef struct
#define __HAL_MDIOS_GET_ERROR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__))
/** @brief MDIOS slave clear interrupt
* @param __HANDLE__: specifies the MDIOS handle.
* @param __FLAG__ : specifies the Error flag.
* @param __HANDLE__ specifies the MDIOS handle.
* @param __FLAG__ specifies the Error flag.
* This parameter can be one or a combination of the following values:
* @arg MDIOS_TURNARROUND_ERROR_FLAG: Register write interrupt
* @arg MDIOS_START_ERROR_FLAG: Register read interrupt
@ -322,8 +320,8 @@ typedef struct
/**
* @brief Checks whether the specified MDIOS interrupt is set or not.
* @param __HANDLE__: specifies the MDIOS handle.
* @param __INTERRUPT__ : specifies the MDIOS interrupt sources
* @param __HANDLE__ specifies the MDIOS handle.
* @param __INTERRUPT__ specifies the MDIOS interrupt sources
* This parameter can be one or a combination of the following values:
* @arg MDIOS_IT_WRITE: Register write interrupt
* @arg MDIOS_IT_READ: Register read interrupt

137
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mmc.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_mmc.c
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief MMC card HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Secure Digital (MMC) peripheral:
@ -192,7 +190,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -288,7 +286,7 @@ static void MMC_DMARxAbort(DMA_HandleTypeDef *hdma);
/**
* @brief Initializes the MMC according to the specified parameters in the
MMC_HandleTypeDef and create the associated handle.
* @param hmmc: Pointer to the MMC handle
* @param hmmc Pointer to the MMC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc)
@ -335,7 +333,7 @@ HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc)
/**
* @brief Initializes the MMC Card.
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @note This function initializes the MMC card. It could be used when a card
re-initialization is needed.
* @retval HAL status
@ -365,6 +363,10 @@ HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc)
/* Enable MMC Clock */
__HAL_MMC_ENABLE(hmmc);
/* Required power up waiting time before starting the SD initialization sequence */
// MBED: removed
//HAL_Delay(2);
/* Identify card operating voltage */
errorstate = MMC_PowerON(hmmc);
if(errorstate != HAL_MMC_ERROR_NONE)
@ -388,7 +390,7 @@ HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc)
/**
* @brief De-Initializes the MMC card.
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc)
@ -419,7 +421,7 @@ HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc)
/**
* @brief Initializes the MMC MSP.
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @retval None
*/
__weak void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc)
@ -434,7 +436,7 @@ __weak void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc)
/**
* @brief De-Initialize MMC MSP.
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @retval None
*/
__weak void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc)
@ -471,11 +473,11 @@ __weak void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc)
* is managed by polling mode.
* @note This API should be followed by a check on the card state through
* HAL_MMC_GetCardState().
* @param hmmc: Pointer to MMC handle
* @param pData: pointer to the buffer that will contain the received data
* @param BlockAdd: Block Address from where data is to be read
* @param NumberOfBlocks: Number of MMC blocks to read
* @param Timeout: Specify timeout value
* @param hmmc Pointer to MMC handle
* @param pData pointer to the buffer that will contain the received data
* @param BlockAdd Block Address from where data is to be read
* @param NumberOfBlocks Number of MMC blocks to read
* @param Timeout Specify timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
@ -655,11 +657,11 @@ HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, ui
* transfer is managed by polling mode.
* @note This API should be followed by a check on the card state through
* HAL_MMC_GetCardState().
* @param hmmc: Pointer to MMC handle
* @param pData: pointer to the buffer that will contain the data to transmit
* @param BlockAdd: Block Address where data will be written
* @param NumberOfBlocks: Number of MMC blocks to write
* @param Timeout: Specify timeout value
* @param hmmc Pointer to MMC handle
* @param pData pointer to the buffer that will contain the data to transmit
* @param BlockAdd Block Address where data will be written
* @param NumberOfBlocks Number of MMC blocks to write
* @param Timeout Specify timeout value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout)
@ -826,10 +828,10 @@ HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, u
* HAL_MMC_GetCardState().
* @note You could also check the IT transfer process through the MMC Rx
* interrupt event.
* @param hmmc: Pointer to MMC handle
* @param pData: Pointer to the buffer that will contain the received data
* @param BlockAdd: Block Address from where data is to be read
* @param NumberOfBlocks: Number of blocks to read.
* @param hmmc Pointer to MMC handle
* @param pData Pointer to the buffer that will contain the received data
* @param BlockAdd Block Address from where data is to be read
* @param NumberOfBlocks Number of blocks to read.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
@ -928,10 +930,10 @@ HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData,
* HAL_MMC_GetCardState().
* @note You could also check the IT transfer process through the MMC Tx
* interrupt event.
* @param hmmc: Pointer to MMC handle
* @param pData: Pointer to the buffer that will contain the data to transmit
* @param BlockAdd: Block Address where data will be written
* @param NumberOfBlocks: Number of blocks to write
* @param hmmc Pointer to MMC handle
* @param pData Pointer to the buffer that will contain the data to transmit
* @param BlockAdd Block Address where data will be written
* @param NumberOfBlocks Number of blocks to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
@ -1031,10 +1033,10 @@ HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData
* HAL_MMC_GetCardState().
* @note You could also check the DMA transfer process through the MMC Rx
* interrupt event.
* @param hmmc: Pointer MMC handle
* @param pData: Pointer to the buffer that will contain the received data
* @param BlockAdd: Block Address from where data is to be read
* @param NumberOfBlocks: Number of blocks to read.
* @param hmmc Pointer MMC handle
* @param pData Pointer to the buffer that will contain the received data
* @param BlockAdd Block Address from where data is to be read
* @param NumberOfBlocks Number of blocks to read.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
@ -1145,10 +1147,10 @@ HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData
* HAL_MMC_GetCardState().
* @note You could also check the DMA transfer process through the MMC Tx
* interrupt event.
* @param hmmc: Pointer to MMC handle
* @param pData: Pointer to the buffer that will contain the data to transmit
* @param BlockAdd: Block Address where data will be written
* @param NumberOfBlocks: Number of blocks to write
* @param hmmc Pointer to MMC handle
* @param pData Pointer to the buffer that will contain the data to transmit
* @param BlockAdd Block Address where data will be written
* @param NumberOfBlocks Number of blocks to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks)
@ -1257,9 +1259,9 @@ HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pDat
* @brief Erases the specified memory area of the given MMC card.
* @note This API should be followed by a check on the card state through
* HAL_MMC_GetCardState().
* @param hmmc: Pointer to MMC handle
* @param BlockStartAdd: Start Block address
* @param BlockEndAdd: End Block address
* @param hmmc Pointer to MMC handle
* @param BlockStartAdd Start Block address
* @param BlockEndAdd End Block address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd)
@ -1355,7 +1357,7 @@ HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd,
/**
* @brief This function handles MMC card interrupt request.
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @retval None
*/
void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc)
@ -1501,7 +1503,7 @@ void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc)
/**
* @brief return the MMC state
* @param hmmc: Pointer to mmc handle
* @param hmmc Pointer to mmc handle
* @retval HAL state
*/
HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc)
@ -1511,7 +1513,7 @@ HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc)
/**
* @brief Return the MMC error code
* @param hmmc : Pointer to a MMC_HandleTypeDef structure that contains
* @param hmmc Pointer to a MMC_HandleTypeDef structure that contains
* the configuration information.
* @retval MMC Error Code
*/
@ -1522,7 +1524,7 @@ uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc)
/**
* @brief Tx Transfer completed callbacks
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @retval None
*/
__weak void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc)
@ -1537,7 +1539,7 @@ uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc)
/**
* @brief Rx Transfer completed callbacks
* @param hmmc: Pointer MMC handle
* @param hmmc Pointer MMC handle
* @retval None
*/
__weak void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc)
@ -1552,7 +1554,7 @@ __weak void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc)
/**
* @brief MMC error callbacks
* @param hmmc: Pointer MMC handle
* @param hmmc Pointer MMC handle
* @retval None
*/
__weak void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc)
@ -1567,7 +1569,7 @@ __weak void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc)
/**
* @brief MMC Abort callbacks
* @param hmmc: Pointer MMC handle
* @param hmmc Pointer MMC handle
* @retval None
*/
__weak void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc)
@ -1603,8 +1605,8 @@ __weak void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc)
/**
* @brief Returns information the information of the card which are stored on
* the CID register.
* @param hmmc: Pointer to MMC handle
* @param pCID: Pointer to a HAL_MMC_CIDTypedef structure that
* @param hmmc Pointer to MMC handle
* @param pCID Pointer to a HAL_MMC_CIDTypedef structure that
* contains all CID register parameters
* @retval HAL status
*/
@ -1684,8 +1686,8 @@ HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTyp
/**
* @brief Returns information the information of the card which are stored on
* the CSD register.
* @param hmmc: Pointer to MMC handle
* @param pCSD: Pointer to a HAL_MMC_CardInfoTypeDef structure that
* @param hmmc Pointer to MMC handle
* @param pCSD Pointer to a HAL_MMC_CardInfoTypeDef structure that
* contains all CSD register parameters
* @retval HAL status
*/
@ -1798,8 +1800,8 @@ HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTyp
/**
* @brief Gets the MMC card info.
* @param hmmc: Pointer to MMC handle
* @param pCardInfo: Pointer to the HAL_MMC_CardInfoTypeDef structure that
* @param hmmc Pointer to MMC handle
* @param pCardInfo Pointer to the HAL_MMC_CardInfoTypeDef structure that
* will contain the MMC card status information
* @retval HAL status
*/
@ -1819,8 +1821,8 @@ HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoT
/**
* @brief Enables wide bus operation for the requested card if supported by
* card.
* @param hmmc: Pointer to MMC handle
* @param WideMode: Specifies the MMC card wide bus mode
* @param hmmc Pointer to MMC handle
* @param WideMode Specifies the MMC card wide bus mode
* This parameter can be one of the following values:
* @arg SDMMC_BUS_WIDE_8B: 8-bit data transfer
* @arg SDMMC_BUS_WIDE_4B: 4-bit data transfer
@ -1954,7 +1956,7 @@ HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32
/**
* @brief Gets the current mmc card data state.
* @param hmmc: pointer to MMC handle
* @param hmmc pointer to MMC handle
* @retval Card state
*/
HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc)
@ -1976,7 +1978,7 @@ HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc)
/**
* @brief Abort the current transfer and disable the MMC.
* @param hmmc: pointer to a MMC_HandleTypeDef structure that contains
* @param hmmc pointer to a MMC_HandleTypeDef structure that contains
* the configuration information for MMC module.
* @retval HAL status
*/
@ -2023,7 +2025,7 @@ HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc)
/**
* @brief Abort the current transfer and disable the MMC (IT mode).
* @param hmmc: pointer to a MMC_HandleTypeDef structure that contains
* @param hmmc pointer to a MMC_HandleTypeDef structure that contains
* the configuration information for MMC module.
* @retval HAL status
*/
@ -2100,7 +2102,7 @@ HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc)
/**
* @brief DMA MMC transmit process complete callback
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void MMC_DMATransmitCplt(DMA_HandleTypeDef *hdma)
@ -2113,7 +2115,7 @@ static void MMC_DMATransmitCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA MMC receive process complete callback
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void MMC_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
@ -2146,7 +2148,7 @@ static void MMC_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
/**
* @brief DMA MMC communication error callback
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void MMC_DMAError(DMA_HandleTypeDef *hdma)
@ -2154,6 +2156,7 @@ static void MMC_DMAError(DMA_HandleTypeDef *hdma)
MMC_HandleTypeDef* hmmc = (MMC_HandleTypeDef* )(hdma->Parent);
HAL_MMC_CardStateTypeDef CardState;
// MBED: changed
if((hmmc->hdmarx->ErrorCode == HAL_DMA_ERROR_TE) || (hmmc->hdmatx->ErrorCode == HAL_DMA_ERROR_TE))
{
/* Clear All flags */
@ -2178,7 +2181,7 @@ static void MMC_DMAError(DMA_HandleTypeDef *hdma)
/**
* @brief DMA MMC Tx Abort callback
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void MMC_DMATxAbort(DMA_HandleTypeDef *hdma)
@ -2215,7 +2218,7 @@ static void MMC_DMATxAbort(DMA_HandleTypeDef *hdma)
/**
* @brief DMA MMC Rx Abort callback
* @param hdma: DMA handle
* @param hdma DMA handle
* @retval None
*/
static void MMC_DMARxAbort(DMA_HandleTypeDef *hdma)
@ -2253,7 +2256,7 @@ static void MMC_DMARxAbort(DMA_HandleTypeDef *hdma)
/**
* @brief Initializes the mmc card.
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @retval MMC Card error state
*/
static uint32_t MMC_InitCard(MMC_HandleTypeDef *hmmc)
@ -2334,7 +2337,7 @@ static uint32_t MMC_InitCard(MMC_HandleTypeDef *hmmc)
* @brief Enquires cards about their operating voltage and configures clock
* controls and stores MMC information that will be needed in future
* in the MMC handle.
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @retval error state
*/
static uint32_t MMC_PowerON(MMC_HandleTypeDef *hmmc)
@ -2388,7 +2391,7 @@ static uint32_t MMC_PowerON(MMC_HandleTypeDef *hmmc)
/**
* @brief Turns the SDMMC output signals off.
* @param hmmc: Pointer to MMC handle
* @param hmmc Pointer to MMC handle
* @retval HAL status
*/
static HAL_StatusTypeDef MMC_PowerOFF(MMC_HandleTypeDef *hmmc)
@ -2401,8 +2404,8 @@ static HAL_StatusTypeDef MMC_PowerOFF(MMC_HandleTypeDef *hmmc)
/**
* @brief Returns the current card's status.
* @param hmmc: Pointer to MMC handle
* @param pCardStatus: pointer to the buffer that will contain the MMC card
* @param hmmc Pointer to MMC handle
* @param pCardStatus pointer to the buffer that will contain the MMC card
* status (Card Status register)
* @retval error state
*/
@ -2430,7 +2433,7 @@ static uint32_t MMC_SendStatus(MMC_HandleTypeDef *hmmc, uint32_t *pCardStatus)
/**
* @brief Wrap up reading in non-blocking mode.
* @param hmmc: pointer to a MMC_HandleTypeDef structure that contains
* @param hmmc pointer to a MMC_HandleTypeDef structure that contains
* the configuration information.
* @retval HAL status
*/
@ -2454,7 +2457,7 @@ static HAL_StatusTypeDef MMC_Read_IT(MMC_HandleTypeDef *hmmc)
/**
* @brief Wrap up writing in non-blocking mode.
* @param hmmc: pointer to a MMC_HandleTypeDef structure that contains
* @param hmmc pointer to a MMC_HandleTypeDef structure that contains
* the configuration information.
* @retval HAL status
*/

26
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mmc.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_mmc.h
* @author MCD Application Team
* @version V1.2.0
* @date 30-December-2016
* @brief Header file of MMC HAL module.
******************************************************************************
* @attention
@ -364,8 +362,8 @@ typedef struct
/**
* @brief Enable the MMC device interrupt.
* @param __HANDLE__: MMC Handle
* @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled.
* @param __HANDLE__ MMC Handle
* @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
@ -395,8 +393,8 @@ typedef struct
/**
* @brief Disable the MMC device interrupt.
* @param __HANDLE__: MMC Handle
* @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled.
* @param __HANDLE__ MMC Handle
* @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
@ -426,8 +424,8 @@ typedef struct
/**
* @brief Check whether the specified MMC flag is set or not.
* @param __HANDLE__: MMC Handle
* @param __FLAG__: specifies the flag to check.
* @param __HANDLE__ MMC Handle
* @param __FLAG__ specifies the flag to check.
* This parameter can be one of the following values:
* @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
* @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
@ -457,8 +455,8 @@ typedef struct
/**
* @brief Clear the MMC's pending flags.
* @param __HANDLE__: MMC Handle
* @param __FLAG__: specifies the flag to clear.
* @param __HANDLE__ MMC Handle
* @param __FLAG__ specifies the flag to clear.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
* @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
@ -477,8 +475,8 @@ typedef struct
/**
* @brief Check whether the specified MMC interrupt has occurred or not.
* @param __HANDLE__: MMC Handle
* @param __INTERRUPT__: specifies the SDMMC interrupt source to check.
* @param __HANDLE__ MMC Handle
* @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
* This parameter can be one of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
@ -508,8 +506,8 @@ typedef struct
/**
* @brief Clear the MMC's interrupt pending bits.
* @param __HANDLE__: MMC Handle
* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
* @param __HANDLE__ MMC Handle
* @param __INTERRUPT__ specifies the interrupt pending bit to clear.
* This parameter can be one or a combination of the following values:
* @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
* @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt

138
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_nand.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief NAND HAL module driver.
* This file provides a generic firmware to drive NAND memories mounted
* as external device.
@ -128,10 +126,10 @@
/**
* @brief Perform NAND memory Initialization sequence
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param ComSpace_Timing: pointer to Common space timing structure
* @param AttSpace_Timing: pointer to Attribute space timing structure
* @param ComSpace_Timing pointer to Common space timing structure
* @param AttSpace_Timing pointer to Attribute space timing structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
@ -170,7 +168,7 @@ HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingT
/**
* @brief Perform NAND memory De-Initialization sequence
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
@ -193,7 +191,7 @@ HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand)
/**
* @brief NAND MSP Init
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval None
*/
@ -209,7 +207,7 @@ __weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand)
/**
* @brief NAND MSP DeInit
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval None
*/
@ -226,7 +224,7 @@ __weak void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand)
/**
* @brief This function handles NAND device interrupt request.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
@ -276,7 +274,7 @@ void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand)
/**
* @brief NAND interrupt feature callback
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval None
*/
@ -311,9 +309,9 @@ __weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand)
/**
* @brief Read the NAND memory electronic signature
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pNAND_ID: NAND ID structure
* @param pNAND_ID NAND ID structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID)
@ -377,7 +375,7 @@ HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pN
/**
* @brief NAND memory reset
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
@ -415,9 +413,9 @@ HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand)
/**
* @brief Configure the device: Enter the physical parameters of the device
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pDeviceConfig : pointer to NAND_DeviceConfigTypeDef structure
* @param pDeviceConfig pointer to NAND_DeviceConfigTypeDef structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig)
@ -436,11 +434,11 @@ HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceC
/**
* @brief Read Page(s) from NAND memory block (8-bits addressing)
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pBuffer : pointer to destination read buffer
* @param NumPageToRead : number of pages to read from block
* @param pAddress pointer to NAND address structure
* @param pBuffer pointer to destination read buffer
* @param NumPageToRead number of pages to read from block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead)
@ -580,11 +578,11 @@ HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressT
/**
* @brief Read Page(s) from NAND memory block (16-bits addressing)
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pBuffer : pointer to destination read buffer. pBuffer should be 16bits aligned
* @param NumPageToRead : number of pages to read from block
* @param pAddress pointer to NAND address structure
* @param pBuffer pointer to destination read buffer. pBuffer should be 16bits aligned
* @param NumPageToRead number of pages to read from block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead)
@ -722,11 +720,11 @@ HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_Address
/**
* @brief Write Page(s) to NAND memory block (8-bits addressing)
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pBuffer : pointer to source buffer to write
* @param NumPageToWrite : number of pages to write to block
* @param pAddress pointer to NAND address structure
* @param pBuffer pointer to source buffer to write
* @param NumPageToWrite number of pages to write to block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite)
@ -827,12 +825,12 @@ HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_Address
*(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
__DSB();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
/* Get tick */
tickstart = HAL_GetTick();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
{
return HAL_TIMEOUT;
@ -860,11 +858,11 @@ HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_Address
/**
* @brief Write Page(s) to NAND memory block (16-bits addressing)
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pBuffer : pointer to source buffer to write. pBuffer should be 16bits aligned
* @param NumPageToWrite : number of pages to write to block
* @param pAddress pointer to NAND address structure
* @param pBuffer pointer to source buffer to write. pBuffer should be 16bits aligned
* @param NumPageToWrite number of pages to write to block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite)
@ -965,12 +963,12 @@ HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_Addres
*(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
__DSB();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
/* Get tick */
tickstart = HAL_GetTick();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
{
return HAL_TIMEOUT;
@ -998,11 +996,11 @@ HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_Addres
/**
* @brief Read Spare area(s) from NAND memory (8-bits addressing)
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pBuffer: pointer to source buffer to write
* @param NumSpareAreaToRead: Number of spare area to read
* @param pAddress pointer to NAND address structure
* @param pBuffer pointer to source buffer to write
* @param NumSpareAreaToRead Number of spare area to read
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead)
@ -1147,11 +1145,11 @@ HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_Add
/**
* @brief Read Spare area(s) from NAND memory (16-bits addressing)
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pBuffer: pointer to source buffer to write. pBuffer should be 16bits aligned.
* @param NumSpareAreaToRead: Number of spare area to read
* @param pAddress pointer to NAND address structure
* @param pBuffer pointer to source buffer to write. pBuffer should be 16bits aligned.
* @param NumSpareAreaToRead Number of spare area to read
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead)
@ -1296,11 +1294,11 @@ HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_Ad
/**
* @brief Write Spare area(s) to NAND memory (8-bits addressing)
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pBuffer : pointer to source buffer to write
* @param NumSpareAreaTowrite : number of spare areas to write to block
* @param pAddress pointer to NAND address structure
* @param pBuffer pointer to source buffer to write
* @param NumSpareAreaTowrite number of spare areas to write to block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite)
@ -1410,12 +1408,12 @@ HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_Ad
*(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
__DSB();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
/* Get tick */
tickstart = HAL_GetTick();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
{
return HAL_TIMEOUT;
@ -1443,11 +1441,11 @@ HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_Ad
/**
* @brief Write Spare area(s) to NAND memory (16-bits addressing)
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pBuffer : pointer to source buffer to write. pBuffer should be 16bits aligned.
* @param NumSpareAreaTowrite : number of spare areas to write to block
* @param pAddress pointer to NAND address structure
* @param pBuffer pointer to source buffer to write. pBuffer should be 16bits aligned.
* @param NumSpareAreaTowrite number of spare areas to write to block
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite)
@ -1557,12 +1555,12 @@ HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_A
*(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1;
__DSB();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
/* Get tick */
tickstart = HAL_GetTick();
/* Read status until NAND is ready */
while(HAL_NAND_Read_Status(hnand) != NAND_READY)
{
if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT)
{
return HAL_TIMEOUT;
@ -1590,9 +1588,9 @@ HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_A
/**
* @brief NAND memory Block erase
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress : pointer to NAND address structure
* @param pAddress pointer to NAND address structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress)
@ -1638,9 +1636,9 @@ HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTy
/**
* @brief Increment the NAND memory address
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param pAddress: pointer to NAND address structure
* @param pAddress pointer to NAND address structure
* @retval The new status of the increment address operation. It can be:
* - NAND_VALID_ADDRESS: When the new address is valid address
* - NAND_INVALID_ADDRESS: When the new address is invalid address
@ -1694,7 +1692,7 @@ uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pA
/**
* @brief Enables dynamically NAND ECC feature.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
@ -1720,7 +1718,7 @@ HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand)
/**
* @brief Disables dynamically FMC_NAND ECC feature.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL status
*/
@ -1746,10 +1744,10 @@ HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand)
/**
* @brief Disables dynamically NAND ECC feature.
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @param ECCval: pointer to ECC value
* @param Timeout: maximum timeout to wait
* @param ECCval pointer to ECC value
* @param Timeout maximum timeout to wait
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout)
@ -1796,7 +1794,7 @@ HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval,
/**
* @brief return the NAND state
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval HAL state
*/
@ -1807,7 +1805,7 @@ HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand)
/**
* @brief NAND memory read status
* @param hnand: pointer to a NAND_HandleTypeDef structure that contains
* @param hnand pointer to a NAND_HandleTypeDef structure that contains
* the configuration information for NAND module.
* @retval NAND status
*/

12
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_nand.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of NAND HAL module.
******************************************************************************
* @attention
@ -154,7 +152,7 @@ typedef struct
*/
/** @brief Reset NAND handle state
* @param __HANDLE__: specifies the NAND handle.
* @param __HANDLE__ specifies the NAND handle.
* @retval None
*/
#define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
@ -285,8 +283,8 @@ uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
/**
* @brief NAND memory address computation.
* @param __ADDRESS__: NAND memory address.
* @param __HANDLE__ : NAND handle.
* @param __ADDRESS__ NAND memory address.
* @param __HANDLE__ NAND handle.
* @retval NAND Raw address value
*/
#define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
@ -296,7 +294,7 @@ uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
/**
* @brief NAND memory address cycling.
* @param __ADDRESS__: NAND memory address.
* @param __ADDRESS__ NAND memory address.
* @retval NAND address cycling value.
*/
#define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
@ -306,7 +304,7 @@ uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
/**
* @brief NAND memory Columns cycling.
* @param __ADDRESS__: NAND memory address.
* @param __ADDRESS__ NAND memory address.
* @retval NAND Column address cycling value.
*/
#define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */

78
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_nor.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief NOR HAL module driver.
* This file provides a generic firmware to drive NOR memories mounted
* as external device.
@ -170,10 +168,10 @@ static uint32_t uwNORMemoryDataWidth = NOR_MEMORY_8B;
/**
* @brief Perform the NOR memory Initialization sequence
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param Timing: pointer to NOR control timing structure
* @param ExtTiming: pointer to NOR extended mode timing structure
* @param Timing pointer to NOR control timing structure
* @param ExtTiming pointer to NOR extended mode timing structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
@ -222,7 +220,7 @@ HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDe
/**
* @brief Perform NOR memory De-Initialization sequence
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @retval HAL status
*/
@ -245,7 +243,7 @@ HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
/**
* @brief NOR MSP Init
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @retval None
*/
@ -261,7 +259,7 @@ __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
/**
* @brief NOR MSP DeInit
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @retval None
*/
@ -277,9 +275,9 @@ __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
/**
* @brief NOR MSP Wait for Ready/Busy signal
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param Timeout: Maximum timeout value
* @param Timeout Maximum timeout value
* @retval None
*/
__weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
@ -313,9 +311,9 @@ __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
/**
* @brief Read NOR flash IDs
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param pNOR_ID : pointer to NOR ID structure
* @param pNOR_ID pointer to NOR ID structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
@ -374,7 +372,7 @@ HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_I
/**
* @brief Returns the NOR memory to Read mode.
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @retval HAL status
*/
@ -422,10 +420,10 @@ HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
/**
* @brief Read data from NOR memory
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param pAddress: pointer to Device address
* @param pData : pointer to read data
* @param pAddress pointer to Device address
* @param pData pointer to read data
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
@ -481,10 +479,10 @@ HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint
/**
* @brief Program data to NOR memory
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param pAddress: Device address
* @param pData : pointer to the data to write
* @param pAddress Device address
* @param pData pointer to the data to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
@ -540,11 +538,11 @@ HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, u
/**
* @brief Reads a half-word buffer from the NOR memory.
* @param hnor: pointer to the NOR handle
* @param uwAddress: NOR memory internal address to read from.
* @param pData: pointer to the buffer that receives the data read from the
* @param hnor pointer to the NOR handle
* @param uwAddress NOR memory internal address to read from.
* @param pData pointer to the buffer that receives the data read from the
* NOR memory.
* @param uwBufferSize : number of Half word to read.
* @param uwBufferSize number of Half word to read.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
@ -606,10 +604,10 @@ HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress
/**
* @brief Writes a half-word buffer to the NOR memory. This function must be used
only with S29GL128P NOR memory.
* @param hnor: pointer to the NOR handle
* @param uwAddress: NOR memory internal start write address
* @param pData: pointer to source data buffer.
* @param uwBufferSize: Size of the buffer to write
* @param hnor pointer to the NOR handle
* @param uwAddress NOR memory internal start write address
* @param pData pointer to source data buffer.
* @param uwBufferSize Size of the buffer to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
@ -686,10 +684,10 @@ HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddr
/**
* @brief Erase the specified block of the NOR memory
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param BlockAddress : Block to erase address
* @param Address: Device address
* @param BlockAddress Block to erase address
* @param Address Device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
@ -746,9 +744,9 @@ HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAdd
/**
* @brief Erase the entire NOR chip.
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param Address : Device address
* @param Address Device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
@ -804,9 +802,9 @@ HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
/**
* @brief Read NOR flash CFI IDs
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param pNOR_CFI : pointer to NOR CFI IDs structure
* @param pNOR_CFI pointer to NOR CFI IDs structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
@ -882,7 +880,7 @@ HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR
/**
* @brief Enables dynamically NOR write operation.
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @retval HAL status
*/
@ -905,7 +903,7 @@ HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
/**
* @brief Disables dynamically NOR write operation.
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @retval HAL status
*/
@ -950,7 +948,7 @@ HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
/**
* @brief return the NOR controller state
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @retval NOR controller state
*/
@ -961,10 +959,10 @@ HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
/**
* @brief Returns the NOR operation status.
* @param hnor: pointer to a NOR_HandleTypeDef structure that contains
* @param hnor pointer to a NOR_HandleTypeDef structure that contains
* the configuration information for NOR module.
* @param Address: Device address
* @param Timeout: NOR programming Timeout
* @param Address Device address
* @param Timeout NOR programming Timeout
* @retval NOR_Status: The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR
* or HAL_NOR_STATUS_TIMEOUT
*/

14
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_nor.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of NOR HAL module.
******************************************************************************
* @attention
@ -144,7 +142,7 @@ typedef struct
* @{
*/
/** @brief Reset NOR handle state
* @param __HANDLE__: specifies the NOR handle.
* @param __HANDLE__ specifies the NOR handle.
* @retval None
*/
#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
@ -257,9 +255,9 @@ HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Addres
*/
/**
* @brief NOR memory address shifting.
* @param __NOR_ADDRESS: NOR base address
* @param __NOR_MEMORY_WIDTH_: NOR memory width
* @param __ADDRESS__: NOR memory address
* @param __NOR_ADDRESS NOR base address
* @param __NOR_MEMORY_WIDTH_ NOR memory width
* @param __ADDRESS__ NOR memory address
* @retval NOR shifted address value
*/
#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
@ -269,8 +267,8 @@ HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Addres
/**
* @brief NOR memory write data to specified address.
* @param __ADDRESS__: NOR memory address
* @param __DATA__: Data to write
* @param __ADDRESS__ NOR memory address
* @param __DATA__ Data to write
* @retval None
*/
#define NOR_WRITE(__ADDRESS__, __DATA__) do{ \

179
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_pcd.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief PCD HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the USB Peripheral Controller:
@ -129,7 +127,7 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
/**
* @brief Initializes the PCD according to the specified
* parameters in the PCD_InitTypeDef and create the associated handle.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
@ -145,6 +143,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
// MBED: added
if(hpcd->State == HAL_PCD_STATE_RESET)
{
/* Allocate lock resource and initialize it */
@ -196,6 +195,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
hpcd->Instance->DIEPTXF[i] = 0;
}
/* Init Device */
USB_DevInit(hpcd->Instance, hpcd->Init);
@ -220,7 +220,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
/**
* @brief DeInitializes the PCD peripheral.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
@ -246,7 +246,7 @@ HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd)
/**
* @brief Initializes the PCD MSP.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
@ -261,7 +261,7 @@ __weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
/**
* @brief DeInitializes PCD MSP.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
@ -295,7 +295,7 @@ __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
/**
* @brief Start The USB OTG Device.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
@ -309,7 +309,7 @@ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
/**
* @brief Stop The USB OTG Device.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
@ -324,7 +324,7 @@ HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
/**
* @brief Handle PCD interrupt request.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
@ -367,6 +367,15 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_XFRC);
/* setup/out transaction management for Core ID >= 310A */
if (hpcd->Init.dma_enable == 1)
{
if (USBx_OUTEP(0)->DOEPINT & (1 << 15))
{
CLEAR_OUT_EP_INTR(epnum, (1 << 15));
}
}
if(hpcd->Init.dma_enable == 1)
{
hpcd->OUT_ep[epnum].xfer_count = hpcd->OUT_ep[epnum].maxpacket- (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ);
@ -386,6 +395,15 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP)
{
/* setup/out transaction management for Core ID >= 310A */
if (hpcd->Init.dma_enable == 1)
{
if (USBx_OUTEP(0)->DOEPINT & (1 << 15))
{
CLEAR_OUT_EP_INTR(epnum, (1 << 15));
}
}
/* Inform the upper layer that a setup packet is available */
HAL_PCD_SetupStageCallback(hpcd);
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP);
@ -422,7 +440,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
if(( epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC)
{
fifoemptymsk = 0x1 << epnum;
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk);
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED: changed
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC);
@ -523,7 +541,9 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
for (i = 0; i < hpcd->Init.dev_endpoints ; i++)
{
USBx_INEP(i)->DIEPINT = 0xFF;
USBx_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
USBx_OUTEP(i)->DOEPINT = 0xFF;
USBx_OUTEP(i)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
}
USBx_DEVICE->DAINT = 0xFFFFFFFF;
USBx_DEVICE->DAINTMSK |= 0x10001;
@ -707,8 +727,8 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Data OUT stage callback.
* @param hpcd: PCD handle
* @param epnum: endpoint number
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval None
*/
__weak void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
@ -723,8 +743,8 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Data IN stage callback.
* @param hpcd: PCD handle
* @param epnum: endpoint number
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval None
*/
__weak void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
@ -738,7 +758,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
}
/**
* @brief Setup stage callback.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
@ -753,7 +773,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief USB Start Of Frame callback.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
@ -768,7 +788,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief USB Reset callback.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
@ -783,7 +803,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Suspend event callback.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
@ -798,7 +818,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Resume event callback.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
@ -813,8 +833,8 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Incomplete ISO OUT callback.
* @param hpcd: PCD handle
* @param epnum: endpoint number
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval None
*/
__weak void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
@ -829,8 +849,8 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Incomplete ISO IN callback.
* @param hpcd: PCD handle
* @param epnum: endpoint number
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval None
*/
__weak void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
@ -845,7 +865,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Connection event callback.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
@ -860,7 +880,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Disconnection event callback.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval None
*/
__weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
@ -894,7 +914,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
/**
* @brief Connect the USB device.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
@ -907,7 +927,7 @@ HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd)
/**
* @brief Disconnect the USB device.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd)
@ -920,8 +940,8 @@ HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd)
/**
* @brief Set the USB Device address.
* @param hpcd: PCD handle
* @param address: new device address
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
@ -933,10 +953,10 @@ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
}
/**
* @brief Open and configure an endpoint.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param ep_mps: endpoint max packet size
* @param ep_type: endpoint type
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @param ep_mps endpoint max packet size
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type)
@ -977,8 +997,8 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint
/**
* @brief Deactivate an endpoint.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
@ -1006,10 +1026,10 @@ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
/**
* @brief Receive an amount of data.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param pBuf: pointer to the reception buffer
* @param len: amount of data to be received
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
@ -1030,25 +1050,26 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u
ep->dma_addr = (uint32_t)pBuf;
}
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED:added
if ((ep_addr & 0x7F) == 0 )
if ((ep_addr & 0x7F) == 0)
{
USB_EP0StartXfer(hpcd->Instance , ep, hpcd->Init.dma_enable);
USB_EP0StartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable);
}
else
{
USB_EPStartXfer(hpcd->Instance , ep, hpcd->Init.dma_enable);
USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable);
}
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added
return HAL_OK;
}
/**
* @brief Get Received Data Size.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
@ -1057,10 +1078,10 @@ uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
}
/**
* @brief Send an amount of data.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param pBuf: pointer to the transmission buffer
* @param len: amount of data to be sent
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
@ -1081,32 +1102,37 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
ep->dma_addr = (uint32_t)pBuf;
}
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added
if ((ep_addr & 0x7F) == 0 )
if ((ep_addr & 0x7F) == 0)
{
USB_EP0StartXfer(hpcd->Instance , ep, hpcd->Init.dma_enable);
USB_EP0StartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable);
}
else
{
USB_EPStartXfer(hpcd->Instance , ep, hpcd->Init.dma_enable);
USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable);
}
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added
return HAL_OK;
}
/**
* @brief Set a STALL condition over an endpoint.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
USB_OTG_EPTypeDef *ep;
if ((ep_addr & 0x0F) > hpcd->Init.dev_endpoints)
{
return HAL_ERROR;
}
if ((0x80 & ep_addr) == 0x80)
{
ep = &hpcd->IN_ep[ep_addr & 0x7F];
@ -1121,27 +1147,34 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
ep->is_in = ((ep_addr & 0x80) == 0x80);
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
USB_EPSetStall(hpcd->Instance , ep);
if((ep_addr & 0x7F) == 0)
{
USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup);
}
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
return HAL_OK;
}
/**
* @brief Clear a STALL condition over in an endpoint.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
USB_OTG_EPTypeDef *ep;
if ((ep_addr & 0x0F) > hpcd->Init.dev_endpoints)
{
return HAL_ERROR;
}
if ((0x80 & ep_addr) == 0x80)
{
ep = &hpcd->IN_ep[ep_addr & 0x7F];
@ -1155,22 +1188,22 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
ep->num = ep_addr & 0x7F;
ep->is_in = ((ep_addr & 0x80) == 0x80);
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
USB_EPClearStall(hpcd->Instance , ep);
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
return HAL_OK;
}
/**
* @brief Flush an endpoint.
* @param hpcd: PCD handle
* @param ep_addr: endpoint address
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
if ((ep_addr & 0x80) == 0x80)
{
@ -1181,14 +1214,14 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
USB_FlushRxFifo(hpcd->Instance);
}
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: change
return HAL_OK;
}
/**
* @brief Activate remote wakeup signalling.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
@ -1205,7 +1238,7 @@ HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
/**
* @brief De-activate remote wakeup signalling.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
@ -1237,7 +1270,7 @@ HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd)
/**
* @brief Return the PCD handle state.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL state
*/
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
@ -1259,8 +1292,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd)
/**
* @brief Check FIFO for the next packet to be loaded.
* @param hpcd: PCD handle
* @param epnum : endpoint number
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum)
@ -1304,7 +1337,7 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
if(len <= 0)
{
fifoemptymsk = 0x1 << epnum;
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk);
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED: changed
}

39
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_pcd.h
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief Header file of PCD HAL module.
******************************************************************************
* @attention
@ -196,16 +194,18 @@ typedef struct
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_HS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR |= (USB_OTG_HS_WAKEUP_EXTI_LINE);\
EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE;)\
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
EXTI->FTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE
}while(0)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_HS_WAKEUP_EXTI_LINE);\
EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
}while(0)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
EXTI->FTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
}while(0)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
@ -214,17 +214,20 @@ typedef struct
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
}while(0)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
}while(0)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE
EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
}while(0)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
/**

30
targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.c
View File

@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f7xx_hal_pcd_ex.c
* @author MCD Application Team
* @version V1.2.2
* @date 14-April-2017
* @brief PCD HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the USB Peripheral Controller:
@ -79,9 +77,9 @@
/**
* @brief Set Tx FIFO
* @param hpcd: PCD handle
* @param fifo: The number of Tx fifo
* @param size: Fifo size
* @param hpcd PCD handle
* @param fifo The number of Tx fifo
* @param size Fifo size
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size)
@ -122,8 +120,8 @@ HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uin
/**
* @brief Set Rx FIFO
* @param hpcd: PCD handle
* @param size: Size of Rx fifo
* @param hpcd PCD handle
* @param size Size of Rx fifo
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size)
@ -135,7 +133,7 @@ HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size)
/**
* @brief Activate LPM Feature
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd)
@ -152,7 +150,7 @@ HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd)
/**
* @brief DeActivate LPM feature.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd)
@ -169,7 +167,7 @@ HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd)
#if defined (USB_OTG_GCCFG_BCDEN)
/**
* @brief Handle BatteryCharging Process.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd)
@ -240,7 +238,7 @@ void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd)
/**
* @brief Activate BatteryCharging feature.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd)
@ -255,7 +253,7 @@ HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd)
/**
* @brief Deactivate BatteryCharging feature.
* @param hpcd: PCD handle
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd)
@ -269,8 +267,8 @@ HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd)
/**
* @brief Send BatteryCharging message to user layer callback.
* @param hpcd: PCD handle
* @param msg: LPM message
* @param hpcd PCD handle
* @param msg LPM message
* @retval HAL status
*/
__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg)
@ -287,8 +285,8 @@ __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef m
#endif /* USB_OTG_GCCFG_BCDEN */
/**
* @brief Send LPM message to user layer callback.
* @param hpcd: PCD handle
* @param msg: LPM message
* @param hpcd PCD handle
* @param msg LPM message
* @retval HAL status
*/
__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)

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