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Update to latest HAL 

- Add const and static qualifiers in places where they are
  applicable but missing
- Remove headers for drivers that aren't implemented yet
- Misc minor bugfixes
pull/11516/head
Kyle Kearney 2019-09-16 12:08:05 -07:00
parent 1713e79ccf
commit e8dc5f111c
22 changed files with 61 additions and 866 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

158
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_comp.h
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@ -1,158 +0,0 @@
/***************************************************************************//**
* \file cyhal_comp.h
*
* Provides a high level interface for interacting with the Cypress Comparator.
* This interface abstracts out the chip specific details.
* If any chip specific functionality is necessary, or performance is critical,
* the low level functions can be used directly.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
/**
* \addtogroup group_hal_comp COMP (Comparator)
* \ingroup group_hal
* \{
* High level interface for interacting with the Cypress Comparator.
*
* \defgroup group_hal_comp_macros Macros
* \defgroup group_hal_comp_functions Functions
* \defgroup group_hal_comp_data_structures Data Structures
* \defgroup group_hal_comp_enums Enumerated Types
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "cy_result.h"
#include "cyhal_hw_types.h"
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_hal_comp_enums
* \{
*/
/** Comparator interrupt triggers */
typedef enum {
CYHAL_COMP_IRQ_NONE, //!< Interrupts disabled
CYHAL_COMP_IRQ_RISE, //!< Rising edge
CYHAL_COMP_IRQ_FALL, //!< Falling edge
} cyhal_comp_irq_event_t;
/** Comparator power options */
typedef enum {
CYHAL_COMP_POWER_OFF, //!< Block is turned off
CYHAL_COMP_POWER_LOW, //!< Block runs in low power/speed mode
CYHAL_COMP_POWER_MEDIUM, //!< Block runs in medium power/speed mode
CYHAL_COMP_POWER_HIGH, //!< Block runs in high power/speed mode
} cyhal_comp_power_t;
/** Comparator output modes */
typedef enum {
CYHAL_COMP_OUTPUT_PULSE, //!< Pulse output
CYHAL_COMP_OUTPUT_DIRECT, //!< Level output directly
CYHAL_COMP_OUTPUT_SYNC, //!< Level output after synchronous edge detection
} cyhal_comp_output_t;
/** \} group_hal_comp_enums */
/**
* \addtogroup group_hal_comp_data_structures
* \{
*/
/** Configuration options for the comparator */
typedef struct
{
cyhal_comp_power_t power; //!< Power mode to operate in (0=off, 1=low, 2=medium, 3=high)
cyhal_comp_output_t output; //!< Output configuration (0=pulse, 1=direct, 2=sync)
bool hysteresis; //!< Should this use hysteresis
bool deepsleep; //!< Does this need to operate in deepsleep
} cyhal_comp_config_t;
/** Handler for comparator interrupts */
typedef void (*cyhal_comp_irq_handler_t)(void *handler_arg, cyhal_comp_irq_event_t event);
/** \} group_hal_comp_data_structures */
/**
* \addtogroup group_hal_comp_functions
* \{
*/
/** Initialize the comparator peripheral.
*
* @param[out] obj The comparator object
* @param[in] vinp The vplus pin
* @param[in] vinm The vminus pin
* @param[in] vout The vout pin
* @return The status of the init request
*/
cy_rslt_t cyhal_comp_init(cyhal_comp_t *obj, cyhal_gpio_t vinp, cyhal_gpio_t vinm, cyhal_gpio_t vout);
/** Release the comparator peripheral.
*
* @param[in,out] obj The comparator object
*/
void cyhal_comp_free(cyhal_comp_t *obj);
/** Reconfigure the comparator object
*
* @param[in,out] obj The comparator object
* @param[in] cfg Configuration to apply to the comparator
* @return The status of the power request
*/
cy_rslt_t cyhal_comp_configure(cyhal_comp_t *obj, const cyhal_comp_config_t cfg);
/** Gets the result of the comparator object
*
* @param[in] obj The comparator object
* @return The comparator output state
*/
bool cyhal_comp_output(cyhal_comp_t *obj);
/** Register/clear an interrupt handler for the comparator toggle IRQ event
*
* @param[in] obj The comparator object
* @param[in] handler The function to call when the specified event happens
* @param[in] handler_arg Generic argument that will be provided to the handler when called
*/
void cyhal_comp_register_irq(cyhal_comp_t *obj, cyhal_comp_irq_handler_t handler, void *handler_arg);
/** Enable or Disable the comparator IRQ
*
* @param[in] obj The comparator object
* @param[in] event The comparator IRQ event
* @param[in] enable True to turn on interrupts, False to turn off
*/
void cyhal_cyhal_comp_irq_enable(cyhal_comp_t *obj, cyhal_comp_irq_event_t event, bool enable);
/** \} group_hal_comp_functions */
#if defined(__cplusplus)
}
#endif
/** \} group_hal_comp */

162
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_dma.h
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@ -1,162 +0,0 @@
/***************************************************************************//**
* \file cyhal_dma.h
*
* \brief
* Provides a high level interface for interacting with the Cypress DMA.
* This interface abstracts out the chip specific details. If any chip specific
* functionality is necessary, or performance is critical the low level functions
* can be used directly.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
/**
* \addtogroup group_hal_dma DMA (Direct Memory Access)
* \ingroup group_hal
* \{
* High level interface for interacting with the Cypress DMA.
*
* \defgroup group_hal_dma_macros Macros
* \defgroup group_hal_dma_functions Functions
* \defgroup group_hal_dma_data_structures Data Structures
* \defgroup group_hal_dma_enums Enumerated Types
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "cy_result.h"
#include "cyhal_hw_types.h"
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_hal_dma_enums
* \{
*/
/** Direction for DMA transfers */
typedef enum
{
CYHAL_DMA_DIRECTION_MEM2MEM, //!< Memory to memory
CYHAL_DMA_DIRECTION_MEM2PERIPH, //!< Memory to peripheral
CYHAL_DMA_DIRECTION_PERIPH2MEM, //!< Peripheral to memory
} cyhal_dma_direction_t;
/** DMA interrupt triggers */
typedef enum {
/** TODO: Fill in */
CYHAL_DMA_TBD,
} cyhal_dma_irq_event_t;
/** \} group_hal_dma_enums */
/**
* \addtogroup group_hal_dma_data_structures
* \{
*/
/** Initial configuration of a DMA channel */
typedef struct
{
uint32_t src_addr; //!< source address
int8_t src_increment; //!< source address auto increment amount
uint32_t dst_addr; //!< destination address
int8_t dst_increment; //!< destination address auto increment amount
uint32_t length; //!< length of data to be transferred
uint8_t beat_size; //!< beat size to be set (8, 16, 32)
//cyhal_source_t trigger_source; //!< Source signal for initiating the DMA transfer
} cyhal_dma_cfg_t;
/** Handler for DMA interrupts */
typedef void (*cyhal_dma_irq_handler_t)(void *handler_arg, cyhal_dma_irq_event_t event);
/** \} group_hal_dma_data_structures */
/**
* \addtogroup group_hal_dma_functions
* \{
*/
/** Initialize the DMA peripheral
*
* @param[out] obj The DMA object to initialize
* @param[in] priority The priority of this DMA operation relative to others
* @param[in] direction The direction memory is copied
* @return The status of the init request
*/
cy_rslt_t cyhal_dma_init(cyhal_dma_t *obj, uint8_t priority, cyhal_dma_direction_t direction);
/** Release the DMA object
*
* @param[in,out] obj The DMA object
*/
void cyhal_dma_free(cyhal_dma_t *obj);
/** Setup a DMA descriptor for specified resource
*
* @param[in] obj The DMA object
* @param[in] cfg Configuration prameters for the transfer
* @return The status of the setup_transfer request
*/
cy_rslt_t cyhal_dma_setup_transfer(cyhal_dma_t *obj, const cyhal_dma_cfg_t *cfg);
/** Start DMA transfer
*
* Kick starts transfer in DMA channel with specified channel id
* @param[in] obj The DMA object
* @return The status of the start_transfer request
*/
cy_rslt_t cyhal_dma_start_transfer(cyhal_dma_t *obj);
/** DMA channel busy check
*
* To check whether DMA channel is busy with a job or not
* @param[in] obj The DMA object
* @return Is the DMA object being used
*/
bool cyhal_dma_busy(cyhal_dma_t *obj);
/** The DMA interrupt handler registration
*
* @param[in] obj The DMA object
* @param[in] handler The callback handler which will be invoked when the interrupt fires
* @param[in] handler_arg Generic argument that will be provided to the handler when called
*/
void cyhal_dma_register_irq(cyhal_dma_t *obj, cyhal_dma_irq_handler_t handler, void *handler_arg);
/** Configure DMA interrupt enablement.
*
* @param[in] obj The DMA object
* @param[in] event The DMA IRQ type
* @param[in] enable True to turn on interrupts, False to turn off
*/
void cyhal_dma_irq_enable(cyhal_dma_t *obj, cyhal_dma_irq_event_t event, bool enable);
/** \} group_hal_dma_functions */
#if defined(__cplusplus)
}
#endif
/** \} group_hal_dma */

176
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_i2s.h
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/***************************************************************************//**
* \file cyhal_i2s.h
*
* \brief
* Provides a high level interface for interacting with the Cypress I2S.
* This interface abstracts out the chip specific details. If any chip specific
* functionality is necessary, or performance is critical the low level functions
* can be used directly.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
/**
* \addtogroup group_hal_i2s I2S (Inter-IC Sound)
* \ingroup group_hal
* \{
* High level interface for interacting with the Cypress I2S.
*
* \defgroup group_hal_i2s_macros Macros
* \defgroup group_hal_i2s_functions Functions
* \defgroup group_hal_i2s_data_structures Data Structures
* \defgroup group_hal_i2s_enums Enumerated Types
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "cy_result.h"
#include "cyhal_hw_types.h"
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_hal_i2s_enums
* \{
*/
/** I2S interrupt triggers */
typedef enum {
/** TODO: Fill in */
CYHAL_I2S_TBD,
} cyhal_i2s_irq_t;
/** \} group_hal_i2s_enums */
/**
* \addtogroup group_hal_i2s_data_structures
* \{
*/
/** Handler for SPI interrupts */
typedef void (*cyhal_i2s_irq_handler_t)(void *handler_arg, cyhal_i2s_irq_t event);
/** \} group_hal_i2s_data_structures */
/**
* \addtogroup group_hal_i2s_functions
* \{
*/
/** Initialize the I2S peripheral. It sets the default parameters for I2S
* peripheral, and configures its specifieds pins.
*
* @param[out] obj The I2S object
* @param[in] tx_sck The transmit clock pin
* @param[in] tx_ws The transmit word select pin
* @param[in] tx_sdo The data out pin
* @param[in] rx_sck The receive clock pin
* @param[in] rx_ws The receive word select pin
* @param[in] rx_sdi The data in pin
* @return The status of the init request
*/
cy_rslt_t cyhal_i2s_init(cyhal_i2s_t *obj, cyhal_gpio_t tx_sck, cyhal_gpio_t tx_ws, cyhal_gpio_t tx_sdo, cyhal_gpio_t rx_sck, cyhal_gpio_t rx_ws, cyhal_gpio_t rx_sdi);
/** Deinitialize the i2s object
*
* @param[in,out] obj The i2s object
*/
void cyhal_i2s_free(cyhal_i2s_t *obj);
/** Configure the I2S frequency
*
* @param[in] obj The I2S object
* @param[in] hz Frequency in Hz
* @return The status of the frequency request
*/
cy_rslt_t cyhal_i2s_frequency(cyhal_i2s_t *obj, int hz);
/** Configure I2S as slave or master.
* @param[in] obj The I2S object
* @param[in] is_slave Enable hardware as a slave (true) or master (false)
* @return The status of the mode request
*/
cy_rslt_t cyhal_i2s_mode(cyhal_i2s_t *obj, int is_slave);
/** Blocking reading data
*
* @param[in] obj The I2S object
* @param[out] data The buffer for receiving
* @param[in,out] length in - Number of bytes to read, out - number of bytes read
* @return The status of the read request
*/
cy_rslt_t cyhal_i2s_read(cyhal_i2s_t *obj, uint8_t *data, size_t *length);
/** Blocking sending data
*
* @param[in] obj The I2S object
* @param[in] data The buffer for sending
* @param[in] length Number of bytes to write
* @param[in] stop Stop to be generated after the transfer is done
* @return The status of the write request
*/
cy_rslt_t cyhal_i2s_write(cyhal_i2s_t *obj, const uint8_t *data, size_t length, bool stop);
/** Start I2S asynchronous transfer
*
* @param[in] obj The I2S object
* @param[in] tx The transmit buffer
* @param[in,out] tx_length in - The number of bytes to transmit, out - The number of bytes actually transmitted
* @param[out] rx The receive buffer
* @param[in,out] rx_length in - The number of bytes to receive, out - The number of bytes actually received
* @return The status of the transfer_async request
*/
cy_rslt_t cyhal_i2s_transfer_async(cyhal_i2s_t *obj, const void *tx, size_t *tx_length, void *rx, size_t *rx_length);
/** Abort I2S asynchronous transfer
*
* This function does not perform any check - that should happen in upper layers.
* @param[in] obj The I2S object
* @return The status of the abort_async request
*/
cy_rslt_t cyhal_i2s_abort_async(cyhal_i2s_t *obj);
/** The I2S interrupt handler registration
*
* @param[in] obj The I2S object
* @param[in] handler The callback handler which will be invoked when the interrupt fires
* @param[in] handler_arg Generic argument that will be provided to the handler when called
*/
void cyhal_i2s_register_irq(cyhal_i2s_t *obj, cyhal_i2s_irq_handler_t handler, void *handler_arg);
/** Configure I2S interrupt. This function is used for word-approach
*
* @param[in] obj The I2S object
* @param[in] event The I2S IRQ type
* @param[in] enable True to turn on interrupts, False to turn off
*/
void cyhal_i2s_irq_enable(cyhal_i2s_t *obj, cyhal_i2s_irq_t event, bool enable);
/** \} group_hal_i2s_functions */
#if defined(__cplusplus)
}
#endif
/** \} group_hal_i2s */

45
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_implementation.h
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/***************************************************************************//**
* \file cyhal_implementation.h
*
* \brief
* Provides references for the PSoC 6 specific implementation of the HAL drivers.
* This includes references to implementation specific header files and any
* supporting data types. This file should not be used directly. It should only
* be referenced by HAL drivers to pull in the implementation specific code.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
/**
* \addtogroup group_hal_psoc6 PSoC 6 HAL Implementation
* \{
* PSoC 6 specific implementation of the HAL drivers
* \} group_hal_psoc6
*/
#pragma once
#include "cy_pdl.h"
#include "cyhal.h"
#include "cyhal_hw_types.h"
#include "cyhal_crc_impl.h"
#include "cyhal_gpio_impl.h"
#include "cyhal_scb_common.h"
#include "cyhal_utils.h"
#include "cyhal_system_impl.h"
#include "cyhal_trng_impl.h"

88
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_opamp.h
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@ -1,88 +0,0 @@
/***************************************************************************//**
* \file cyhal_opamp.h
*
* \brief
* Provides a high level interface for interacting with the Cypress OpAmp.
* This interface abstracts out the chip specific details. If any chip specific
* functionality is necessary, or performance is critical the low level functions
* can be used directly.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
/**
* \addtogroup group_hal_opamp OPAMP (Operational Amplifier)
* \ingroup group_hal
* \{
* High level interface for interacting with the Cypress OpAmp.
*
* \defgroup group_hal_opamp_macros Macros
* \defgroup group_hal_opamp_functions Functions
* \defgroup group_hal_opamp_data_structures Data Structures
* \defgroup group_hal_opamp_enums Enumerated Types
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "cy_result.h"
#include "cyhal_hw_types.h"
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_hal_opamp_functions
* \{
*/
/** Initialize the opamp peripheral.
* If vinp is NULL, it will initialize in follower mode.
*
* @param[out] obj The opamp object
* @param[in] vinp The vplus pin
* @param[in] vinm The vminus pin
* @param[in] vout The vout pin
* @return The status of the init request
*/
cy_rslt_t cyhal_opamp_init(cyhal_opamp_t *obj, cyhal_gpio_t vinp, cyhal_gpio_t vinm, cyhal_gpio_t vout);
/** Release the opamp peripheral.
*
* @param[in,out] obj The opamp object
*/
void cyhal_opamp_free(cyhal_opamp_t *obj);
/** Reconfigure the opamp object
*
* @param[in,out] obj The opamp object
* @param[in] power Power mode to operate in (0=off, 1=low, 2=medium, 3=high)
* @param[in] deepsleep Does this need to operate in deepsleep
* @return The status of the power request
*/
cy_rslt_t cyhal_opamp_power(cyhal_opamp_t *obj, uint8_t power, bool deepsleep);
/** \} group_hal_opamp_functions */
#if defined(__cplusplus)
}
#endif
/** \} group_hal_opamp */

173
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_pdmpcm.h
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@ -1,173 +0,0 @@
/***************************************************************************//**
* \file cyhal_pdmpcm.h
*
* \brief
* Provides a high level interface for interacting with the Cypress PDM/PCM.
* This interface abstracts out the chip specific details. If any chip specific
* functionality is necessary, or performance is critical the low level functions
* can be used directly.
*
********************************************************************************
* \copyright
* Copyright 2018-2019 Cypress Semiconductor Corporation
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
/**
* \addtogroup group_hal_pdmpcm PDM/PCM (PDM-PCM Converter)
* \ingroup group_hal
* \{
* High level interface for interacting with the Cypress PDM/PCM.
*
* \defgroup group_hal_pdmpcm_macros Macros
* \defgroup group_hal_pdmpcm_functions Functions
* \defgroup group_hal_pdmpcm_data_structures Data Structures
* \defgroup group_hal_pdmpcm_enums Enumerated Types
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "cy_result.h"
#include "cyhal_hw_types.h"
#if defined(__cplusplus)
extern "C" {
#endif
/**
* \addtogroup group_hal_pdmpcm_enums
* \{
*/
/** PDM/PCM interrupt triggers */
typedef enum {
/** TODO: Fill in */
CY_PDM_PCM_TBD,
} cyhal_pdm_pcm_irq_event_t;
/** \} group_hal_pdmpcm_enums */
/**
* \addtogroup group_hal_pdmpcm_data_structures
* \{
*/
/** Describes the current configuration of a PDM/PCM */
typedef struct
{
/** TODO: define */
void * cfg;
} cyhal_pdm_pcm_cfg_t;
/** Handler for PDM/PCM interrupts */
typedef void (*cyhal_pdm_pcm_irq_handler_t)(void *handler_arg, cyhal_pdm_pcm_irq_event_t event);
/** \} group_hal_pdmpcm_data_structures */
/**
* \addtogroup group_hal_pdmpcm_functions
* \{
*/
/** Initialize the PDM/PCM peripheral
*
* Configures the pins used by PDM/PCM converter, sets a default format and frequency, and enables the peripheral
* @param[out] obj The PDM/PCM object to initialize
* @param[in] in The pin to use for PDM input
* @param[in] clk The pin to use for PDM clock output
* @return The status of the init request
*/
cy_rslt_t cyhal_pdm_pcm_init(cyhal_pdm_pcm_t *obj, cyhal_gpio_t in, cyhal_gpio_t clk);
/** Release a PDM/PCM object
*
* Return the peripheral, pins and clock owned by the PDM/PCM object to their reset state
* @param[in,out] obj The PDM/PCM object to deinitialize
*/
void cyhal_pdm_pcm_free(cyhal_pdm_pcm_t *obj);
/** Updates the configuration of the PDM/PCM object
*
* @param[inout] obj The PDM/PCM object to configure
* @param[in] cfg The configuration of the PDM/PCM
* @return The status of the format request
*/
cy_rslt_t cyhal_pdm_pcm_config(cyhal_pdm_pcm_t *obj, const cyhal_pdm_pcm_cfg_t *cfg);
/** Clears the FIFO
*
* @param[in] obj The PDM/PCM peripheral to use for sending
* @return The status of the clear request
*/
cy_rslt_t cyhal_pdm_pcm_clear(cyhal_pdm_pcm_t *obj);
/** Reads a block out of the FIFO
*
* @param[in] obj The PDM/PCM peripheral to use for sending
* @param[out] data Pointer to the byte-array of data to read from the device
* @param[in,out] length Number of bytes to read, updated with the number actually read
* @return The status of the read request
*/
cy_rslt_t cyhal_pdm_pcm_read(cyhal_pdm_pcm_t *obj, uint8_t *data, uint32_t *length);
/** Begin the PDM/PCM transfer
*
* @param[in] obj The PDM/PCM object that holds the transfer information
* @param[out] data The receive buffer
* @param[in,out] length Number of bytes to read, updated with the number actually read
* @return The status of the read_async request
*/
cy_rslt_t cyhal_pdm_pcm_read_async(cyhal_pdm_pcm_t *obj, void *data, size_t length);
/** Checks if the specified PDM/PCM peripheral is in use
*
* @param[in] obj The PDM/PCM peripheral to check
* @return Indication of whether the PDM/PCM is still transmitting
*/
bool cyhal_pdm_pcm_is_busy(cyhal_pdm_pcm_t *obj);
/** Abort an PDM/PCM transfer
*
* @param[in] obj The PDM/PCM peripheral to stop
* @return The status of the abort_async request
*/
cy_rslt_t cyhal_pdm_pcm_abort_async(cyhal_pdm_pcm_t *obj);
/** The PDM/PCM interrupt handler registration
*
* @param[in] obj The PDM/PCM object
* @param[in] handler The callback handler which will be invoked when the interrupt fires
* @param[in] handler_arg Generic argument that will be provided to the handler when called
*/
void cyhal_pdm_pcm_register_irq(cyhal_pdm_pcm_t *obj, cyhal_pdm_pcm_irq_handler_t handler, void *handler_arg);
/** Configure PDM/PCM interrupt enablement.
*
* @param[in] obj The PDM/PCM object
* @param[in] event The PDM/PCM IRQ type
* @param[in] enable True to turn on interrupts, False to turn off
*/
void cyhal_pdm_pcm_irq_enable(cyhal_pdm_pcm_t *obj, cyhal_pdm_pcm_irq_event_t event, bool enable);
/** \} group_hal_pdmpcm_functions */
#if defined(__cplusplus)
}
#endif
/** \} group_hal_pdmpcm */

4
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_scb_common.h
View File

@ -51,9 +51,9 @@ extern "C" {
*/
/** The start address of the SCB blocks */
extern CySCB_Type* CYHAL_SCB_BASE_ADDRESSES[CY_IP_MXSCB_INSTANCES];
extern CySCB_Type* const CYHAL_SCB_BASE_ADDRESSES[CY_IP_MXSCB_INSTANCES];
/** The interrupt number of the SCB blocks. */
extern IRQn_Type CYHAL_SCB_IRQ_N[CY_IP_MXSCB_INSTANCES];
extern const IRQn_Type CYHAL_SCB_IRQ_N[CY_IP_MXSCB_INSTANCES];
/** The configuration structs for the resource in use on each SCB block (e.g. cyhal_i2c_t) */
extern void *cyhal_scb_config_structs[CY_IP_MXSCB_INSTANCES];

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/include/cyhal_utils.h
View File

@ -79,7 +79,7 @@ extern "C" {
*/
static inline uint32_t cyhal_divider_value(uint32_t frequency, uint32_t frac_bits)
{
return ((cy_PeriClkFreqHz * (1 << frac_bits)) + (frequency / 2)) / frequency - 1;
return ((Cy_SysClk_ClkPeriGetFrequency() * (1 << frac_bits)) + (frequency / 2)) / frequency - 1;
}
/** Converts the provided gpio pin to a resource instance object

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_adc.c
View File

@ -237,7 +237,7 @@ cy_rslt_t cyhal_adc_init(cyhal_adc_t *obj, cyhal_gpio_t pin, const cyhal_clock_d
{
if(obj->dedicated_clock)
{
uint32_t div = cy_PeriClkFreqHz / DESIRED_DIVIDER;
uint32_t div = Cy_SysClk_ClkPeriGetFrequency() / DESIRED_DIVIDER;
if (0 == div ||
CY_SYSCLK_SUCCESS != Cy_SysClk_PeriphSetDivider(obj->clock.div_type, obj->clock.div_num, div - 1) ||
CY_SYSCLK_SUCCESS != Cy_SysClk_PeriphEnableDivider(obj->clock.div_type, obj->clock.div_num))

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_crypto_common.c
View File

@ -33,7 +33,7 @@ extern "C"
{
#endif
static CRYPTO_Type* CYHAL_CRYPTO_BASE_ADDRESSES[CYHAL_CRYPTO_INST_COUNT] =
static CRYPTO_Type* const CYHAL_CRYPTO_BASE_ADDRESSES[CYHAL_CRYPTO_INST_COUNT] =
{
#ifdef CRYPTO
CRYPTO,

38
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_dac.c
View File

@ -56,25 +56,25 @@ static CTDAC_Type *const cyhal_ctdac_base[] = {
#endif
};
const cy_stc_ctdac_config_t CYHAL_CTDAC_DEFAULT_CONFIG =
{
.refSource = CY_CTDAC_REFSOURCE_VDDA,
.formatMode = CY_CTDAC_FORMAT_UNSIGNED,
.updateMode = CY_CTDAC_UPDATE_DIRECT_WRITE,
.deglitchMode = CY_CTDAC_DEGLITCHMODE_UNBUFFERED,
.outputMode = CY_CTDAC_OUTPUT_VALUE,
.outputBuffer = CY_CTDAC_OUTPUT_UNBUFFERED,
.deepSleep = CY_CTDAC_DEEPSLEEP_DISABLE,
.deglitchCycles = 0,
.value = 0,
.nextValue = 0,
.enableInterrupt = true,
.configClock = false,
// The following values are simply placeholders because configClock is false
.dividerType = CY_SYSCLK_DIV_8_BIT,
.dividerNum = 0,
.dividerIntValue = 0,
.dividerFracValue = 0,
static const cy_stc_ctdac_config_t CYHAL_CTDAC_DEFAULT_CONFIG =
{
.refSource = CY_CTDAC_REFSOURCE_VDDA,
.formatMode = CY_CTDAC_FORMAT_UNSIGNED,
.updateMode = CY_CTDAC_UPDATE_DIRECT_WRITE,
.deglitchMode = CY_CTDAC_DEGLITCHMODE_UNBUFFERED,
.outputMode = CY_CTDAC_OUTPUT_VALUE,
.outputBuffer = CY_CTDAC_OUTPUT_UNBUFFERED,
.deepSleep = CY_CTDAC_DEEPSLEEP_DISABLE,
.deglitchCycles = 0,
.value = 0,
.nextValue = 0,
.enableInterrupt = true,
.configClock = false,
// The following values are simply placeholders because configClock is false
.dividerType = CY_SYSCLK_DIV_8_BIT,
.dividerNum = 0,
.dividerIntValue = 0,
.dividerFracValue = 0,
};
/*******************************************************************************

1
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_hwmgr.c
View File

@ -624,6 +624,7 @@ void cyhal_hwmgr_free(const cyhal_resource_inst_t* obj)
uint32_t state = cyhal_system_critical_section_enter();
cy_rslt_t rslt = cyhal_clear_bit(cyhal_used, obj->type, obj->block_num, obj->channel_num);
CY_ASSERT(CY_RSLT_SUCCESS == rslt);
(void)rslt; //Avoid warning about unused variable in Release builds
cyhal_system_critical_section_exit(state);
}

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_i2c.c
View File

@ -82,6 +82,8 @@ static void cyhal_i2c_irq_handler(void)
if (obj->async)
{
/* This code is part of cyhal_i2c_master_transfer_async() API functionality */
/* cyhal_i2c_master_transfer_async() API uses this interrupt handler for RX Transfer */
if (0 == (Cy_SCB_I2C_MasterGetStatus(obj->base, &obj->context) & CY_SCB_I2C_MASTER_BUSY))
{
if (obj->tx_config.bufferSize)

4
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_pwm.c
View File

@ -90,7 +90,7 @@ cy_rslt_t cyhal_pwm_init(cyhal_pwm_t *obj, cyhal_gpio_t pin, const cyhal_clock_d
en_clk_dst_t pclk = (en_clk_dst_t)(CYHAL_TCPWM_DATA[obj->resource.block_num].clock_dst + obj->resource.channel_num);
if (NULL != clk)
{
obj->clock_hz = cy_PeriClkFreqHz / (1 + Cy_SysClk_PeriphGetDivider(clk->div_type, clk->div_num));
obj->clock_hz = Cy_SysClk_ClkPeriGetFrequency() / (1 + Cy_SysClk_PeriphGetDivider(clk->div_type, clk->div_num));
if (CY_SYSCLK_SUCCESS != Cy_SysClk_PeriphAssignDivider(pclk, clk->div_type, clk->div_num))
result = CYHAL_PWM_RSLT_FAILED_CLOCK_INIT;
}
@ -105,7 +105,7 @@ cy_rslt_t cyhal_pwm_init(cyhal_pwm_t *obj, cyhal_gpio_t pin, const cyhal_clock_d
result = CYHAL_PWM_RSLT_FAILED_CLOCK_INIT;
else
{
obj->clock_hz = cy_PeriClkFreqHz / div;
obj->clock_hz = Cy_SysClk_ClkPeriGetFrequency() / div;
}
}
}

4
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_qspi.c
View File

@ -83,7 +83,7 @@ static const cy_stc_smif_config_t default_qspi_config =
};
/* List of available QSPI instances */
SMIF_Type *smif_base_addresses[CY_IP_MXSMIF_INSTANCES] =
static SMIF_Type *const smif_base_addresses[CY_IP_MXSMIF_INSTANCES] =
{
#ifdef SMIF0
SMIF0,
@ -91,7 +91,7 @@ SMIF_Type *smif_base_addresses[CY_IP_MXSMIF_INSTANCES] =
};
/* List of available QSPI interrupt sources */
IRQn_Type CYHAL_QSPI_IRQ_N[CY_IP_MXSMIF_INSTANCES] =
static const IRQn_Type CYHAL_QSPI_IRQ_N[CY_IP_MXSMIF_INSTANCES] =
{
#ifdef SMIF0
smif_interrupt_IRQn,

4
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_scb_common.c
View File

@ -31,7 +31,7 @@ extern "C"
{
#endif
CySCB_Type* CYHAL_SCB_BASE_ADDRESSES[CY_IP_MXSCB_INSTANCES] =
CySCB_Type* const CYHAL_SCB_BASE_ADDRESSES[CY_IP_MXSCB_INSTANCES] =
{
#ifdef SCB0
SCB0,
@ -83,7 +83,7 @@ CySCB_Type* CYHAL_SCB_BASE_ADDRESSES[CY_IP_MXSCB_INSTANCES] =
#endif
};
IRQn_Type CYHAL_SCB_IRQ_N[CY_IP_MXSCB_INSTANCES] =
const IRQn_Type CYHAL_SCB_IRQ_N[CY_IP_MXSCB_INSTANCES] =
{
#ifdef SCB0
scb_0_interrupt_IRQn,

28
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_sdhc.c
View File

@ -157,7 +157,7 @@ static SDHC_Type * const CYHAL_SDHC_BASE_ADDRESSES[CY_IP_MXSDHC_INSTANCES] =
};
/* List of available SDHC HF clocks */
static uint8_t const CYHAL_SDHC_HF_CLOCKS[CY_IP_MXSDHC_INSTANCES] =
static const uint8_t CYHAL_SDHC_HF_CLOCKS[CY_IP_MXSDHC_INSTANCES] =
{
#ifdef SDHC0
4,
@ -170,7 +170,7 @@ static uint8_t const CYHAL_SDHC_HF_CLOCKS[CY_IP_MXSDHC_INSTANCES] =
/* List of available SDHC interrupt sources */
static IRQn_Type const CYHAL_SDHC_IRQ_N[CY_IP_MXSDHC_INSTANCES] =
static const IRQn_Type CYHAL_SDHC_IRQ_N[CY_IP_MXSDHC_INSTANCES] =
{
#ifdef SDHC0
sdhc_0_interrupt_general_IRQn,
@ -208,7 +208,7 @@ static void *cyhal_sd_config_structs[CY_IP_MXSDHC_INSTANCES];
/* Structure to map SDHC events on SDHC interrupts */
const uint32_t eventMap[SDHC_EVENTS_NUM][SDHC_EVENTS_MAP_NUM] =
static const uint32_t eventMap[SDHC_EVENTS_NUM][SDHC_EVENTS_MAP_NUM] =
{
{ (uint32_t)CYHAL_SDHC_CMD_COMPLETE, (uint32_t)CY_SD_HOST_CMD_COMPLETE},
{ (uint32_t)CYHAL_SDHC_XFER_COMPLETE, (uint32_t)CY_SD_HOST_XFER_COMPLETE },
@ -1089,16 +1089,13 @@ void cyhal_sdhc_enable_event(cyhal_sdhc_t *obj, cyhal_sdhc_event_t event, uint8_
/* Enable specific interrupt */
if((uint32_t) event < (uint32_t) CYHAL_SDHC_ALL_INTERRUPTS)
{
obj->irq_cause |= event;
uint32_t event_count = SDHC_EVENTS_NUM;
uint8_t i;
for (i = 0; i < event_count; i++)
for (uint8_t i = 0; i < SDHC_EVENTS_NUM; i++)
{
const uint32_t *map_entry = eventMap[i];
if ((map_entry[SDHC_EVENT] & obj->irq_cause) != 0)
if ((map_entry[SDHC_EVENT] & (uint32_t) event) != 0)
{
interruptMask |= map_entry[SDHC_ISR];
interruptMask |= map_entry[SDHC_ISR];
obj->irq_cause |= map_entry[SDHC_ISR];
}
}
}
@ -1114,16 +1111,13 @@ void cyhal_sdhc_enable_event(cyhal_sdhc_t *obj, cyhal_sdhc_event_t event, uint8_
{
if((uint32_t) event < (uint32_t) CYHAL_SDHC_ALL_INTERRUPTS)
{
obj->irq_cause &= ~event;
uint32_t event_count = SDHC_EVENTS_NUM;
uint8_t i;
for (i = 0; i < event_count; i++)
for (uint8_t i = 0; i < SDHC_EVENTS_NUM; i++)
{
const uint32_t *map_entry = eventMap[i];
if ((map_entry[SDHC_EVENT] & obj->irq_cause) != 0)
if ((map_entry[SDHC_EVENT] & (uint32_t) event) != 0)
{
interruptMask &= ~map_entry[SDHC_ISR];
interruptMask &= ~map_entry[SDHC_ISR];
obj->irq_cause &= ~map_entry[SDHC_ISR];
}
}
}

8
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_spi.c
View File

@ -500,17 +500,17 @@ static cy_rslt_t cyhal_int_spi_frequency(cyhal_spi_t *obj, uint32_t hz, uint8_t
for (oversample_value = SPI_OVERSAMPLE_MIN; oversample_value <= SPI_OVERSAMPLE_MAX; oversample_value++)
{
oversampled_freq = hz * oversample_value;
if ((hz * oversample_value > cy_PeriClkFreqHz) && (SPI_OVERSAMPLE_MIN == oversample_value))
if ((hz * oversample_value > Cy_SysClk_ClkPeriGetFrequency()) && (SPI_OVERSAMPLE_MIN == oversample_value))
{
return CYHAL_SPI_RSLT_CLOCK_ERROR;
}
else if (hz * oversample_value > cy_PeriClkFreqHz)
else if (hz * oversample_value > Cy_SysClk_ClkPeriGetFrequency())
{
continue;
}
divider_value = cyhal_divider_value(hz * oversample_value, 0);
divided_freq = cy_PeriClkFreqHz /(divider_value + 1);
divided_freq = Cy_SysClk_ClkPeriGetFrequency() /(divider_value + 1);
diff = max(oversampled_freq, divided_freq) - min(oversampled_freq, divided_freq);
if (diff < last_diff)
@ -534,7 +534,7 @@ static cy_rslt_t cyhal_int_spi_frequency(cyhal_spi_t *obj, uint32_t hz, uint8_t
float desired_period_us = 1 / (float)hz * 1e6;
uint32_t required_frequency = (uint32_t)(3e6 / (0.5f * desired_period_us - 36.66f / 1e3));
if (required_frequency > cy_PeriClkFreqHz)
if (required_frequency > Cy_SysClk_ClkPeriGetFrequency())
{
return CYHAL_SPI_RSLT_CLOCK_ERROR;
}

8
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_timer.c
View File

@ -35,7 +35,7 @@
extern "C" {
#endif
const cy_stc_tcpwm_counter_config_t default_config =
static const cy_stc_tcpwm_counter_config_t default_config =
{
.period = 32768,
.clockPrescaler = CY_TCPWM_COUNTER_PRESCALER_DIVBY_1,
@ -102,7 +102,7 @@ cy_rslt_t cyhal_timer_init(cyhal_timer_t *obj, cyhal_gpio_t pin, const cyhal_clo
{
obj->clock = *clk;
obj->dedicated_clock = false;
obj->clock_hz = cy_PeriClkFreqHz / (1 + Cy_SysClk_PeriphGetDivider(obj->clock.div_type, obj->clock.div_num));
obj->clock_hz = Cy_SysClk_ClkPeriGetFrequency() / (1 + Cy_SysClk_PeriphGetDivider(obj->clock.div_type, obj->clock.div_num));
if (CY_SYSCLK_SUCCESS != Cy_SysClk_PeriphAssignDivider(pclk, clk->div_type, clk->div_num))
{
result = CYHAL_TIMER_RSLT_ERR_CLOCK_INIT;
@ -215,7 +215,7 @@ cy_rslt_t cyhal_timer_set_frequency(cyhal_timer_t *obj, uint32_t hz)
if(CY_RSLT_SUCCESS == result)
{
uint32_t div = cy_PeriClkFreqHz / hz;
uint32_t div = Cy_SysClk_ClkPeriGetFrequency() / hz;
if (0 == div ||
CY_SYSCLK_SUCCESS != Cy_SysClk_PeriphSetDivider(obj->clock.div_type, obj->clock.div_num, div - 1) ||
CY_SYSCLK_SUCCESS != Cy_SysClk_PeriphEnableDivider(obj->clock.div_type, obj->clock.div_num))
@ -224,7 +224,7 @@ cy_rslt_t cyhal_timer_set_frequency(cyhal_timer_t *obj, uint32_t hz)
}
else
{
obj->clock_hz = cy_PeriClkFreqHz / div;
obj->clock_hz = Cy_SysClk_ClkPeriGetFrequency() / div;
}
}

2
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_uart.c
View File

@ -346,7 +346,7 @@ void cyhal_uart_free(cyhal_uart_t *obj)
static uint32_t cyhal_uart_actual_baud(uint32_t divider, uint32_t oversample)
{
return cy_PeriClkFreqHz / ((divider + 1) * oversample);
return Cy_SysClk_ClkPeriGetFrequency() / ((divider + 1) * oversample);
}
static uint32_t cyhal_uart_baud_perdif(uint32_t desired_baud, uint32_t actual_baud)

6
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_udb_sdio.c
View File

@ -74,7 +74,7 @@ static bool op_pending = false;
/*******************************************************************************
* (Internal) Configuration structures for SDIO pins
*******************************************************************************/
const cy_stc_gpio_pin_config_t pin_cmd_config =
static const cy_stc_gpio_pin_config_t pin_cmd_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_STRONG,
@ -91,7 +91,7 @@ const cy_stc_gpio_pin_config_t pin_cmd_config =
.vohSel = 0UL,
};
const cy_stc_gpio_pin_config_t pin_data_config =
static const cy_stc_gpio_pin_config_t pin_data_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_STRONG,
@ -108,7 +108,7 @@ const cy_stc_gpio_pin_config_t pin_data_config =
.vohSel = 0UL,
};
const cy_stc_gpio_pin_config_t pin_clk_config =
static const cy_stc_gpio_pin_config_t pin_clk_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_STRONG_IN_OFF,

10
targets/TARGET_Cypress/TARGET_PSOC6/psoc6csp/hal/src/cyhal_usb_dev.c
View File

@ -92,7 +92,7 @@ static USBFS_Type* const CYHAL_USB_DEV_BASE_ADDRESSES[CY_IP_MXUSBFS_INSTANCES] =
#endif
};
static IRQn_Type CYHAL_USBDEV_IRQ_N[CY_IP_MXUSBFS_INSTANCES] =
static const IRQn_Type CYHAL_USBDEV_IRQ_N[CY_IP_MXUSBFS_INSTANCES] =
{
#ifdef USBFS0
usb_interrupt_lo_IRQn,
@ -115,7 +115,7 @@ static void cyhal_usb_0_dev_ep0_setup_callback(USBFS_Type *base, struct cy_stc_u
static void cyhal_usb_0_dev_ep0_in_callback(USBFS_Type *base, struct cy_stc_usbfs_dev_drv_context *drvContext);
static void cyhal_usb_0_dev_ep0_out_callback(USBFS_Type *base, struct cy_stc_usbfs_dev_drv_context *drvContext);
static cyhal_usb_dev_event_callback_t cyhal_usb_dev_event_callback_table[CY_IP_MXUSBFS_INSTANCES][CYHAL_USB_DEV_EVENT_NUM];
static cy_cb_usbfs_dev_drv_callback_t cyhal_usb_dev_drv_event_cb_table[CY_IP_MXUSBFS_INSTANCES][CYHAL_USB_DEV_EVENT_NUM] =
static const cy_cb_usbfs_dev_drv_callback_t cyhal_usb_dev_drv_event_cb_table[CY_IP_MXUSBFS_INSTANCES][CYHAL_USB_DEV_EVENT_NUM] =
{
/* USBFS0 */
{
@ -128,7 +128,7 @@ static cy_cb_usbfs_dev_drv_callback_t cyhal_usb_dev_drv_event_cb_table[CY_IP_MXU
static void cyhal_usb_0_dev_sof_callback(USBFS_Type *base, struct cy_stc_usbfs_dev_drv_context *drvContext);
static cyhal_usb_dev_sof_callback_t cyhal_usb_dev_sof_user_callback[CY_IP_MXUSBFS_INSTANCES];
static cy_cb_usbfs_dev_drv_callback_t cyhal_usb_dev_drv_sof_cb_table[CY_IP_MXUSBFS_INSTANCES]=
static const cy_cb_usbfs_dev_drv_callback_t cyhal_usb_dev_drv_sof_cb_table[CY_IP_MXUSBFS_INSTANCES]=
{
/* USBFS0 */
&cyhal_usb_0_dev_sof_callback,
@ -136,7 +136,7 @@ static cy_cb_usbfs_dev_drv_callback_t cyhal_usb_dev_drv_sof_cb_table[CY_IP_MXUSB
static void cyhal_usb_0_dev_ep_callback(USBFS_Type *base, uint32_t ep_addr, uint32_t errorType, cy_stc_usbfs_dev_drv_context_t *drvContext);
static cyhal_usb_dev_endpoint_callback_t cyhal_usb_dev_ep_handler_table[CY_IP_MXUSBFS_INSTANCES][CYHAL_USB_DEV_EP_EVENT_NUM];
static cy_cb_usbfs_dev_drv_ep_callback_t cyhal_usb_dev_drv_ep_cb_table[CY_IP_MXUSBFS_INSTANCES] =
static const cy_cb_usbfs_dev_drv_ep_callback_t cyhal_usb_dev_drv_ep_cb_table[CY_IP_MXUSBFS_INSTANCES] =
{
/* USBFS0 */
&cyhal_usb_0_dev_ep_callback,
@ -388,7 +388,7 @@ static cy_rslt_t cyhal_usb_dev_peri_clock_setup(cyhal_usb_dev_t *obj, const cyha
if (CY_RSLT_SUCCESS == result)
{
/* Get divider to provide 100kHz clock or less */
uint32_t div_value = (cy_PeriClkFreqHz / CYHAL_USB_DEV_BUS_RESET_CLOCK_HZ) - 1U;
uint32_t div_value = (Cy_SysClk_ClkPeriGetFrequency() / CYHAL_USB_DEV_BUS_RESET_CLOCK_HZ) - 1U;
(void) Cy_SysClk_PeriphDisableDivider(obj->clock.div_type, obj->clock.div_num);
status = Cy_SysClk_PeriphSetDivider(obj->clock.div_type, obj->clock.div_num, div_value);