mirror of https://github.com/ARMmbed/mbed-os.git
Target_GigaDevice: Add ARM_LIB_STACK and ARM_LIB_HEAP section
Instead of user defined symbols in assembly files or C files, use linker scripts to add heap and stack - this is inconsistent with ARM std linker scriptspull/9766/head
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2a192509c3
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e731a1589f
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@ -8,10 +8,22 @@
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#endif
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x20000
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#define MBED_APP_SIZE 0x00020000
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#endif
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K)
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#define MBED_RAM_START 0x20000000
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#define MBED_RAM_SIZE 0x00008000
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
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#define VECTOR_SIZE 0x150
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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@ -19,9 +31,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K)
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.ANY (+RO)
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}
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; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
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RW_IRAM1 (0x20000000+0x150) (0x8000-0x150) { ; RW data
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -35,31 +35,9 @@
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;OF SUCH DAMAGE.
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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EXPORT __initial_sp
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Stack_Mem SPACE Stack_Size
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__initial_sp EQU 0x20008000 ; Top of RAM
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000400
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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EXPORT __heap_base
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EXPORT __heap_limit
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit EQU (__initial_sp - Stack_Size)
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PRESERVE8
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THUMB
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@ -11,7 +11,19 @@
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#define MBED_APP_SIZE 0x100000
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#endif
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K)
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#define MBED_RAM_START 0x20000000
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#define MBED_RAM_SIZE 0x00018000
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
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#define VECTOR_SIZE 0x150
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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@ -19,9 +31,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K)
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.ANY (+RO)
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}
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; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
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RW_IRAM1 (0x20000000+0x150) (0x18000-0x150) { ; RW data
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -34,31 +34,9 @@
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;OF SUCH DAMAGE.
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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EXPORT __initial_sp
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Stack_Mem SPACE Stack_Size
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__initial_sp EQU 0x20010000 ; Top of RAM
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000400
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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EXPORT __heap_base
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EXPORT __heap_limit
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit EQU (__initial_sp - Stack_Size)
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PRESERVE8
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THUMB
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@ -8,10 +8,22 @@
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#endif
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x200000
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#define MBED_APP_SIZE 0x00200000
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#endif
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (3*1024K)
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#define MBED_RAM_START 0x20000000
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#define MBED_RAM_SIZE 0x00020000
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned)
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#define VECTOR_SIZE 0x1B0
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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@ -19,8 +31,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (3*1024K)
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.ANY (+RO)
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}
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; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned)
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RW_IRAM1 (0x20000000+0x1B0) (0x20000-0x1B0) { ; RW data
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -36,31 +36,10 @@
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;OF SUCH DAMAGE.
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000800
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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EXPORT __initial_sp
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Stack_Mem SPACE Stack_Size
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__initial_sp EQU 0x20020000
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000400
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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EXPORT __heap_base
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EXPORT __heap_limit
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit EQU (__initial_sp - Stack_Size)
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PRESERVE8
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THUMB
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