From e731a1589f680cc9329dab1e1d612aad3273aaaa Mon Sep 17 00:00:00 2001 From: deepikabhavnani Date: Tue, 19 Feb 2019 14:42:40 -0600 Subject: [PATCH] Target_GigaDevice: Add ARM_LIB_STACK and ARM_LIB_HEAP section Instead of user defined symbols in assembly files or C files, use linker scripts to add heap and stack - this is inconsistent with ARM std linker scripts --- .../device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct | 30 ++++++++++++++----- .../TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S | 22 -------------- .../device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct | 30 ++++++++++++++----- .../TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S | 22 -------------- .../device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct | 29 ++++++++++++++---- .../TOOLCHAIN_ARM_MICRO/startup_gd32f450.S | 21 ------------- .../TOOLCHAIN_ARM_MICRO/efm32zg.sct | 2 +- 7 files changed, 70 insertions(+), 86 deletions(-) diff --git a/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct b/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct index 44243e7961..eb63e59dc8 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct @@ -4,24 +4,40 @@ ; ***** #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x20000 + #define MBED_APP_SIZE 0x00020000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K) +#define MBED_RAM_START 0x20000000 +#define MBED_RAM_SIZE 0x00008000 - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) +#define VECTOR_SIZE 0x150 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) - RW_IRAM1 (0x20000000+0x150) (0x8000-0x150) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S b/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S index 164bd83204..59a4333412 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S +++ b/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S @@ -35,31 +35,9 @@ ;OF SUCH DAMAGE. ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct index 35cb12437b..2a65094561 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct @@ -4,24 +4,40 @@ ; ***** #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K) +#define MBED_RAM_START 0x20000000 +#define MBED_RAM_SIZE 0x00018000 - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) +#define VECTOR_SIZE 0x150 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) - RW_IRAM1 (0x20000000+0x150) (0x18000-0x150) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S index b389e1775c..6eeefd2585 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S @@ -34,31 +34,9 @@ ;OF SUCH DAMAGE. ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20010000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct index 03be6293fe..d32494ae68 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct @@ -4,23 +4,40 @@ ; ***** #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x00200000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (3*1024K) +#define MBED_RAM_START 0x20000000 +#define MBED_RAM_SIZE 0x00020000 - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned) +#define VECTOR_SIZE 0x1B0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned) - RW_IRAM1 (0x20000000+0x1B0) (0x20000-0x1B0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/startup_gd32f450.S b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/startup_gd32f450.S index f111982475..7e37e40dab 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/startup_gd32f450.S +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/startup_gd32f450.S @@ -36,31 +36,10 @@ ;OF SUCH DAMAGE. ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000800 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct index 0ddbb487b6..34a62b7bd0 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct @@ -39,4 +39,4 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack } -} \ No newline at end of file +}