mirror of https://github.com/ARMmbed/mbed-os.git
Added Sleep, LED3 and LED4 definitions, switches
Sleep = KL25Z sleep (verified to work correctly) LED3 = LED1, LED4 = LED2 (for compatibility, similar to LED3 = LED4 in KL25Z code) SW1 and SW3 for the two switches (SW2 is reset switch)pull/140/head
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12e3614e38
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e5f13c047c
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@ -197,7 +197,13 @@ typedef enum {
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// mbed original LED naming
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LED1 = LED_GREEN,
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LED2 = LED_RED,
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LED3 = LED_GREEN,
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LED4 = LED_RED,
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//Push buttons
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SW1 = PTC3,
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SW3 = PTC12,
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// USB Pins
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USBTX = PTA2,
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USBRX = PTA1,
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@ -45,7 +45,7 @@
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#define DEVICE_LOCALFILESYSTEM 0
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#define DEVICE_ID_LENGTH 24
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#define DEVICE_SLEEP 0
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#define DEVICE_SLEEP 1
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#define DEVICE_DEBUG_AWARENESS 0
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@ -0,0 +1,51 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "sleep_api.h"
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#include "cmsis.h"
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//Normal wait mode
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void sleep(void)
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{
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SMC->PMPROT = SMC_PMPROT_AVLLS_MASK | SMC_PMPROT_ALLS_MASK | SMC_PMPROT_AVLP_MASK;
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//Normal sleep mode for ARM core:
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SCB->SCR = 0;
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__WFI();
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}
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//Very low-power stop mode
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void deepsleep(void)
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{
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//Check if PLL/FLL is enabled:
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uint32_t PLL_FLL_en = (MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0);
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SMC->PMPROT = SMC_PMPROT_AVLLS_MASK | SMC_PMPROT_ALLS_MASK | SMC_PMPROT_AVLP_MASK;
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SMC->PMCTRL = SMC_PMCTRL_STOPM(2);
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//Deep sleep for ARM core:
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SCB->SCR = 1<<SCB_SCR_SLEEPDEEP_Pos;
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__WFI();
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//Switch back to PLL as clock source if needed
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//The interrupt that woke up the device will run at reduced speed
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if (PLL_FLL_en) {
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if (MCG->C6 & (1<<MCG_C6_PLLS_SHIFT) != 0) /* If PLL */
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while((MCG->S & MCG_S_LOCK0_MASK) == 0x00U); /* Wait until locked */
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MCG->C1 &= ~MCG_C1_CLKS_MASK;
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}
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}
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