Added Sleep, LED3 and LED4 definitions, switches

Sleep = KL25Z sleep (verified to work correctly)
LED3 = LED1, LED4 = LED2 (for compatibility, similar to LED3 = LED4 in
KL25Z code)
SW1 and SW3 for the two switches (SW2 is reset switch)
pull/140/head
Sissors 2014-01-07 18:35:41 +01:00
parent 12e3614e38
commit e5f13c047c
3 changed files with 59 additions and 2 deletions

View File

@ -197,7 +197,13 @@ typedef enum {
// mbed original LED naming
LED1 = LED_GREEN,
LED2 = LED_RED,
LED3 = LED_GREEN,
LED4 = LED_RED,
//Push buttons
SW1 = PTC3,
SW3 = PTC12,
// USB Pins
USBTX = PTA2,
USBRX = PTA1,

View File

@ -45,7 +45,7 @@
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_ID_LENGTH 24
#define DEVICE_SLEEP 0
#define DEVICE_SLEEP 1
#define DEVICE_DEBUG_AWARENESS 0

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@ -0,0 +1,51 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "sleep_api.h"
#include "cmsis.h"
//Normal wait mode
void sleep(void)
{
SMC->PMPROT = SMC_PMPROT_AVLLS_MASK | SMC_PMPROT_ALLS_MASK | SMC_PMPROT_AVLP_MASK;
//Normal sleep mode for ARM core:
SCB->SCR = 0;
__WFI();
}
//Very low-power stop mode
void deepsleep(void)
{
//Check if PLL/FLL is enabled:
uint32_t PLL_FLL_en = (MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0);
SMC->PMPROT = SMC_PMPROT_AVLLS_MASK | SMC_PMPROT_ALLS_MASK | SMC_PMPROT_AVLP_MASK;
SMC->PMCTRL = SMC_PMCTRL_STOPM(2);
//Deep sleep for ARM core:
SCB->SCR = 1<<SCB_SCR_SLEEPDEEP_Pos;
__WFI();
//Switch back to PLL as clock source if needed
//The interrupt that woke up the device will run at reduced speed
if (PLL_FLL_en) {
if (MCG->C6 & (1<<MCG_C6_PLLS_SHIFT) != 0) /* If PLL */
while((MCG->S & MCG_S_LOCK0_MASK) == 0x00U); /* Wait until locked */
MCG->C1 &= ~MCG_C1_CLKS_MASK;
}
}