From e585eac31bd7a0dc6e17ee9ffbeac2a0385e9a72 Mon Sep 17 00:00:00 2001
From: Kevin Bracey <kevin.bracey@arm.com>
Date: Tue, 11 Dec 2018 16:01:34 +0200
Subject: [PATCH] Fix MPU synchronisation

Synchronisation instructions were not quite right - too strict on entry,
and not quite correctly synchronising the instruction stream on exit.

References:

* https://static.docs.arm.com/dai0321/a/DAI0321A_programming_guide_memory_barriers_for_m_profile.pdf
* https://static.docs.arm.com/100699/0100/armv8m_architecture_memory_protection_unit_100699_0100_00_en.pdf
---
 hal/mpu/mbed_mpu_v7m.c | 16 ++++++++--------
 hal/mpu/mbed_mpu_v8m.c | 16 ++++++++--------
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/hal/mpu/mbed_mpu_v7m.c b/hal/mpu/mbed_mpu_v7m.c
index 5778e74739..d4cfbcf79d 100644
--- a/hal/mpu/mbed_mpu_v7m.c
+++ b/hal/mpu/mbed_mpu_v7m.c
@@ -45,7 +45,7 @@ MBED_STATIC_ASSERT(
 void mbed_mpu_init()
 {
     // Flush memory writes before configuring the MPU.
-    __DSB();
+    __DMB();
 
     const uint32_t regions = (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos;
     if (regions < 4) {
@@ -178,40 +178,40 @@ void mbed_mpu_init()
         (1 << MPU_CTRL_ENABLE_Pos);                 // Enable MPU
 
     // Ensure changes take effect
-    __ISB();
     __DSB();
+    __ISB();
 }
 
 void mbed_mpu_free()
 {
     // Flush memory writes before configuring the MPU.
-    __DSB();
+    __DMB();
 
     // Disable the MPU
     MPU->CTRL = 0;
 
     // Ensure changes take effect
-    __ISB();
     __DSB();
+    __ISB();
 }
 
 void mbed_mpu_enable_rom_wn(bool enable)
 {
     // Flush memory writes before configuring the MPU.
-    __DSB();
+    __DMB();
 
     MPU->RNR = 0;
     MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable ? MPU_RASR_ENABLE_Msk : 0);
 
     // Ensure changes take effect
-    __ISB();
     __DSB();
+    __ISB();
 }
 
 void mbed_mpu_enable_ram_xn(bool enable)
 {
     // Flush memory writes before configuring the MPU.
-    __DSB();
+    __DMB();
 
     MPU->RNR = 1;
     MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable ? MPU_RASR_ENABLE_Msk : 0);
@@ -223,8 +223,8 @@ void mbed_mpu_enable_ram_xn(bool enable)
     MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable ? MPU_RASR_ENABLE_Msk : 0);
 
     // Ensure changes take effect
-    __ISB();
     __DSB();
+    __ISB();
 }
 
 #endif
diff --git a/hal/mpu/mbed_mpu_v8m.c b/hal/mpu/mbed_mpu_v8m.c
index 7304c149b9..15225733ad 100644
--- a/hal/mpu/mbed_mpu_v8m.c
+++ b/hal/mpu/mbed_mpu_v8m.c
@@ -35,7 +35,7 @@ MBED_STATIC_ASSERT(MBED_MPU_ROM_END == 0x1fffffff, "Changing MBED_MPU_ROM_END fo
 void mbed_mpu_init()
 {
     // Flush memory writes before configuring the MPU.
-    __DSB();
+    __DMB();
 
     const uint32_t regions = (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos;
     if (regions < 4) {
@@ -127,40 +127,40 @@ void mbed_mpu_init()
         (1 << MPU_CTRL_ENABLE_Pos);                 // Enable MPU
 
     // Ensure changes take effect
-    __ISB();
     __DSB();
+    __ISB();
 }
 
 void mbed_mpu_free()
 {
     // Flush memory writes before configuring the MPU.
-    __DSB();
+    __DMB();
 
     // Disable the MCU
     MPU->CTRL = 0;
 
     // Ensure changes take effect
-    __ISB();
     __DSB();
+    __ISB();
 }
 
 void mbed_mpu_enable_rom_wn(bool enable)
 {
     // Flush memory writes before configuring the MPU.
-    __DSB();
+    __DMB();
 
     MPU->RNR = 0;
     MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable ? MPU_RLAR_EN_Msk : 0);
 
     // Ensure changes take effect
-    __ISB();
     __DSB();
+    __ISB();
 }
 
 void mbed_mpu_enable_ram_xn(bool enable)
 {
     // Flush memory writes before configuring the MPU.
-    __DSB();
+    __DMB();
 
     MPU->RNR = 1;
     MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable ? MPU_RLAR_EN_Msk : 0);
@@ -172,8 +172,8 @@ void mbed_mpu_enable_ram_xn(bool enable)
     MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable ? MPU_RLAR_EN_Msk : 0);
 
     // Ensure changes take effect
-    __ISB();
     __DSB();
+    __ISB();
 }
 
 #endif