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added targets from LPCXpresso exporter 

added all targets from older LPCXpresso exporter
pull/4916/head
JojoS 2017-08-12 14:35:25 +02:00
parent 2bd7b4dee1
commit e41cc45297
11 changed files with 682 additions and 0 deletions
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51
tools/export/mcuxpresso/LPC824_cproject.tmpl Normal file
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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_2="LPC800_32.cfx" property_3="NXP" property_4="LPC824" property_count="5" version="70200"/>
<infoList vendor="NXP"><info chip="LPC824" flash_driver="LPC800_32.cfx" match_id="0x0" name="LPC824" stub="crt_emu_cm3_gen"><chip><name>LPC824</name>
<family>LPC82x</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/>
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
<peripheralInstance derived_from="V6M_NVIC" id="NVIC" location="0xe000e000"/>
<peripheralInstance derived_from="V6M_DCR" id="DCR" location="0xe000edf0"/>
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/>
<peripheralInstance derived_from="MRT" id="MRT" location="0x40004000"/>
<peripheralInstance derived_from="WKT" id="WKT" location="0x40008000"/>
<peripheralInstance derived_from="SWM" id="SWM" location="0x4000c000"/>
<peripheralInstance derived_from="ADC" id="ADC" location="0x4001c000"/>
<peripheralInstance derived_from="PMU" id="PMU" location="0x40020000"/>
<peripheralInstance derived_from="CMP" id="CMP" location="0x40024000"/>
<peripheralInstance derived_from="DMATRIGMUX" id="DMATRIGMUX" location="0x40028000"/>
<peripheralInstance derived_from="INPUTMUX" id="INPUTMUX" location="0x4002c000"/>
<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x40040000"/>
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40044000"/>
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40048000"/>
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40050000"/>
<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40054000"/>
<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40058000"/>
<peripheralInstance derived_from="SPI1" id="SPI1" location="0x4005c000"/>
<peripheralInstance derived_from="USART0" id="USART0" location="0x40064000"/>
<peripheralInstance derived_from="USART1" id="USART1" location="0x40068000"/>
<peripheralInstance derived_from="USART2" id="USART2" location="0x4006c000"/>
<peripheralInstance derived_from="I2C2" id="I2C2" location="0x40070000"/>
<peripheralInstance derived_from="I2C3" id="I2C3" location="0x40074000"/>
<peripheralInstance derived_from="CRC" id="CRC" location="0x50000000"/>
<peripheralInstance derived_from="SCT" id="SCT" location="0x50004000"/>
<peripheralInstance derived_from="DMA" id="DMA" location="0x50008000"/>
<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0xa0000000"/>
<peripheralInstance derived_from="PIN-INT" id="PIN-INT" location="0xa0004000"/>
</chip>
<processor><name gcc_name="cortex-m0">Cortex-M0</name>
<family>Cortex-M</family>
</processor>
<link href="LPC82x_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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tools/export/mcuxpresso/arch_pro_cproject.tmpl Normal file
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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
<infoList vendor="NXP">
<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
<chip>
<name>LPC1768</name>
<family>LPC17xx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
</chip>
<processor>
<name gcc_name="cortex-m3">Cortex-M3</name>
<family>Cortex-M</family>
</processor>
<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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tools/export/mcuxpresso/lpc1114_cproject.tmpl Normal file
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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_2="LPC11_12_13_32K_4K.cfx" property_3="NXP" property_4="LPC1114FN/102" property_count="5" version="60100"/>
<infoList vendor="NXP">
<info chip="LPC1114FN/102" flash_driver="LPC11_12_13_32K_4K.cfx" match_id="0x0A40902B,0x1A40902B" name="LPC1114FN/102" stub="crt_emu_lpc11_13_nxp">
<chip>
<name>LPC1114FN/102</name>
<family>LPC11xx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/>
<memoryInstance derived_from="RAM" id="RamLoc4" location="0x10000000" size="0x1000"/>
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
<peripheralInstance derived_from="UART" determined="infoFile" id="UART" location="0x40008000"/>
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
<peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40040000"/>
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
<peripheralInstance derived_from="GPIO0" determined="infoFile" id="GPIO0" location="0x50000000"/>
<peripheralInstance derived_from="GPIO1" determined="infoFile" id="GPIO1" location="0x50010000"/>
<peripheralInstance derived_from="GPIO2" determined="infoFile" id="GPIO2" location="0x50020000"/>
<peripheralInstance derived_from="GPIO3" determined="infoFile" id="GPIO3" location="0x50030000"/>
</chip>
<processor>
<name gcc_name="cortex-m0">Cortex-M0</name>
<family>Cortex-M</family>
</processor>
<link href="LPC11xx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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tools/export/mcuxpresso/lpc11u35_401_cproject.tmpl Normal file
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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/401" property_count="5" version="70002"/>
<infoList vendor="NXP">
<info chip="LPC11U35/401" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/401" stub="crt_emu_lpc11_13_nxp">
<chip>
<name>LPC11U35/401</name>
<family>LPC11Uxx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
</chip>
<processor>
<name gcc_name="cortex-m0">Cortex-M0</name>
<family>Cortex-M</family>
</processor>
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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tools/export/mcuxpresso/lpc11u35_501_cproject.tmpl Normal file
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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/501" property_count="5" version="70002"/>
<infoList vendor="NXP">
<info chip="LPC11U35/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/501" stub="crt_emu_lpc11_13_nxp">
<chip>
<name>LPC11U35/501</name>
<family>LPC11Uxx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
</chip>
<processor>
<name gcc_name="cortex-m0">Cortex-M0</name>
<family>Cortex-M</family>
</processor>
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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tools/export/mcuxpresso/lpc11u68_cproject.tmpl Normal file
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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_2="LPC11U6x_256K.cfx" property_3="NXP" property_4="LPC11U68" property_count="5" version="70200"/>
<infoList vendor="NXP">
<info chip="LPC11U68" flash_driver="LPC11U6x_256K.cfx" match_id="0x0" name="LPC11U68" stub="crt_emu_cm3_gen">
<chip>
<name>
LPC11U68</name>
<family>
LPC11U6x</family>
<vendor>
NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
<memoryInstance derived_from="RAM" id="Ram0_32" location="0x10000000" size="0x8000"/>
<memoryInstance derived_from="RAM" id="Ram1_2" location="0x20000000" size="0x800"/>
<memoryInstance derived_from="RAM" id="Ram2USB_2" location="0x20004000" size="0x800"/>
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
<peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40000000"/>
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
<peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40008000"/>
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
<peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40020000"/>
<peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40024000"/>
<peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/>
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
<peripheralInstance derived_from="USART4" determined="infoFile" id="USART4" location="0x4004c000"/>
<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
<peripheralInstance derived_from="GINT0" determined="infoFile" id="GINT0" location="0x4005c000"/>
<peripheralInstance derived_from="GINT1" determined="infoFile" id="GINT1" location="0x40060000"/>
<peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x4006c000"/>
<peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x40070000"/>
<peripheralInstance derived_from="USART3" determined="infoFile" id="USART3" location="0x40074000"/>
<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
<peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/>
<peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50004000"/>
<peripheralInstance derived_from="SCT0" determined="infoFile" id="SCT0" location="0x5000c000"/>
<peripheralInstance derived_from="SCT1" determined="infoFile" id="SCT1" location="0x5000e000"/>
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/>
<peripheralInstance derived_from="PINT" determined="infoFile" id="PINT" location="0xa0004000"/>
</chip>
<processor>
<name gcc_name="cortex-m0">Cortex-M0</name>
<family>Cortex-M</family>
</processor>
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
<infoList vendor="NXP">
<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
<chip>
<name>LPC1768</name>
<family>LPC17xx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
</chip>
<processor>
<name gcc_name="cortex-m3">Cortex-M3</name>
<family>Cortex-M</family>
</processor>
<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/>
<infoList vendor="NXP"><info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"><chip><name>LPC4088</name>
<family>LPC407x_8x</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
<memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/>
<memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/>
<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/>
<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/>
<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/>
<peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/>
<peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/>
<peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/>
<peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/>
<peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/>
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/>
<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/>
<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/>
<peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/>
<peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/>
<peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/>
<peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/>
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/>
<peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/>
<peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/>
<peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/>
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/>
<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/>
<peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/>
<peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/>
<peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/>
<peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/>
<peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/>
<peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/>
<peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/>
<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/>
<peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/>
<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/>
<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/>
<peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/>
<peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/>
<peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/>
<peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/>
<peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/>
<peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/>
<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/>
<peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/>
<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/>
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/>
</chip>
<processor><name gcc_name="cortex-m4">Cortex-M4</name>
<family>Cortex-M</family>
</processor>
<link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC4330" property_count="5" version="1"/>
<infoList vendor="NXP">
<info chip="LPC4330" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC4330" package="LPC43_lqfp100.xml">
<chip>
<name>LPC4330</name>
<family>LPC43xx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
<peripheralInstance derived_from="LPC43_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
<peripheralInstance derived_from="LPC43_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
<peripheralInstance derived_from="LPC43_I2S" determined="infoFile" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
<peripheralInstance derived_from="LPC43_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
<peripheralInstance derived_from="LPC43_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
<peripheralInstance derived_from="LPC43xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
<peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
<peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
<peripheralInstance derived_from="LPC43_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
<peripheralInstance derived_from="LPC43_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
<peripheralInstance derived_from="LPC43_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
<peripheralInstance derived_from="LPC43_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
<peripheralInstance derived_from="LPC43_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
<peripheralInstance derived_from="LPC43_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
<peripheralInstance derived_from="LPC43_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
<peripheralInstance derived_from="LPC43_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
<peripheralInstance derived_from="LPC43_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
<peripheralInstance derived_from="LPC43_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
<peripheralInstance derived_from="LPC43_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
<peripheralInstance derived_from="LPC43_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
<peripheralInstance derived_from="LPC4x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
<peripheralInstance derived_from="LPC43_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
<peripheralInstance derived_from="LPC43_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
<peripheralInstance derived_from="LPC43_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
<peripheralInstance derived_from="LPC43_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
<peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
<peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
<peripheralInstance derived_from="LPC43_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
</chip>
<processor>
<name gcc_name="cortex-m4">Cortex-M4</name>
<family>Cortex-M</family>
</processor>
<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U37/501" property_count="5" version="70002"/>
<infoList vendor="NXP">
<info chip="LPC11U37/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U37/501" stub="crt_emu_lpc11_13_nxp">
<chip>
<name>LPC11U37/501</name>
<family>LPC11Uxx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
</chip>
<processor>
<name gcc_name="cortex-m0">Cortex-M0</name>
<family>Cortex-M</family>
</processor>
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}

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{% extends "mcuxpresso/.cproject.tmpl" %}
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
<infoList vendor="NXP">
<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
<chip>
<name>LPC1768</name>
<family>LPC17xx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
</chip>
<processor>
<name gcc_name="cortex-m3">Cortex-M3</name>
<family>Cortex-M</family>
</processor>
<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>{% endblock %}