mirror of https://github.com/ARMmbed/mbed-os.git
MXRT1050_EVK: Ensure certain low power function are linked to internal memory
Low power functions related to powering off FLEXSPI and SDRAM needs to be copied to internal memory Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>pull/7419/head
parent
a1d8298057
commit
e18e0f12f4
|
@ -14,9 +14,9 @@
|
||||||
* limitations under the License.
|
* limitations under the License.
|
||||||
*/
|
*/
|
||||||
#include "pinmap.h"
|
#include "pinmap.h"
|
||||||
|
|
||||||
#include "fsl_clock_config.h"
|
#include "fsl_clock_config.h"
|
||||||
#include "fsl_clock.h"
|
#include "fsl_clock.h"
|
||||||
|
#include "lpm.h"
|
||||||
|
|
||||||
#define LPSPI_CLOCK_SOURCE_DIVIDER (7U)
|
#define LPSPI_CLOCK_SOURCE_DIVIDER (7U)
|
||||||
#define LPI2C_CLOCK_SOURCE_DIVIDER (5U)
|
#define LPI2C_CLOCK_SOURCE_DIVIDER (5U)
|
||||||
|
@ -124,11 +124,39 @@ void BOARD_ConfigMPU(void)
|
||||||
SCB_EnableICache();
|
SCB_EnableICache();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if defined(TOOLCHAIN_GCC_ARM)
|
||||||
|
extern uint32_t __ram_function_flash_start[];
|
||||||
|
#define __RAM_FUNCTION_FLASH_START __ram_function_flash_start
|
||||||
|
extern uint32_t __ram_function_ram_start[];
|
||||||
|
#define __RAM_FUNCTION_RAM_START __ram_function_ram_start
|
||||||
|
extern uint32_t __ram_function_size[];
|
||||||
|
#define __RAM_FUNCTION_SIZE __ram_function_size
|
||||||
|
void Board_CopyToRam()
|
||||||
|
{
|
||||||
|
unsigned char *source;
|
||||||
|
unsigned char *destiny;
|
||||||
|
unsigned int size;
|
||||||
|
|
||||||
|
source = (unsigned char *)(__RAM_FUNCTION_FLASH_START);
|
||||||
|
destiny = (unsigned char *)(__RAM_FUNCTION_RAM_START);
|
||||||
|
size = (unsigned long)(__RAM_FUNCTION_SIZE);
|
||||||
|
|
||||||
|
while (size--)
|
||||||
|
{
|
||||||
|
*destiny++ = *source++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
// called before main
|
// called before main
|
||||||
void mbed_sdk_init()
|
void mbed_sdk_init()
|
||||||
{
|
{
|
||||||
BOARD_ConfigMPU();
|
BOARD_ConfigMPU();
|
||||||
BOARD_BootClockRUN();
|
BOARD_BootClockRUN();
|
||||||
|
#if defined(TOOLCHAIN_GCC_ARM)
|
||||||
|
Board_CopyToRam();
|
||||||
|
#endif
|
||||||
|
LPM_Init();
|
||||||
}
|
}
|
||||||
|
|
||||||
void spi_setup_clock()
|
void spi_setup_clock()
|
||||||
|
|
|
@ -77,6 +77,9 @@
|
||||||
#define m_text_start 0x60002400
|
#define m_text_start 0x60002400
|
||||||
#define m_text_size 0x03FFDC00
|
#define m_text_size 0x03FFDC00
|
||||||
|
|
||||||
|
#define m_text2_start 0x00000000
|
||||||
|
#define m_text2_size 0x00020000
|
||||||
|
|
||||||
#define m_data_start 0x80000000
|
#define m_data_start 0x80000000
|
||||||
#define m_data_size 0x01E00000
|
#define m_data_size 0x01E00000
|
||||||
|
|
||||||
|
@ -139,6 +142,9 @@ LR_IROM1 m_flash_config_start m_text_start+m_text_size-m_flash_config_start {
|
||||||
}
|
}
|
||||||
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
|
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
|
||||||
}
|
}
|
||||||
|
RW_m_ram_text m_text2_start UNINIT m_text2_size { ; load address = execution address
|
||||||
|
* (RamFunction)
|
||||||
|
}
|
||||||
RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data
|
RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data
|
||||||
* (NonCacheable.init)
|
* (NonCacheable.init)
|
||||||
* (NonCacheable)
|
* (NonCacheable)
|
||||||
|
|
|
@ -72,6 +72,7 @@ MEMORY
|
||||||
m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000
|
m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000
|
||||||
m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400
|
m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400
|
||||||
m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x03FFDC00
|
m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x03FFDC00
|
||||||
|
m_text2 (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000
|
||||||
m_data (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000
|
m_data (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000
|
||||||
m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000
|
m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000
|
||||||
m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
|
m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
|
||||||
|
@ -225,7 +226,21 @@ SECTIONS
|
||||||
__data_end__ = .; /* define a global symbol at data end */
|
__data_end__ = .; /* define a global symbol at data end */
|
||||||
} > m_data
|
} > m_data
|
||||||
|
|
||||||
__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
|
__ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
|
||||||
|
|
||||||
|
.ram_function : AT(__ram_function_flash_start)
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__ram_function_ram_start = .;
|
||||||
|
*(RamFunction)
|
||||||
|
. = ALIGN(128);
|
||||||
|
__ram_function_ram_end = .;
|
||||||
|
} > m_text2
|
||||||
|
|
||||||
|
__ram_function_size = SIZEOF(.ram_function);
|
||||||
|
|
||||||
|
__NDATA_ROM = __ram_function_flash_start + SIZEOF(.ram_function);
|
||||||
|
|
||||||
.ncache.init : AT(__NDATA_ROM)
|
.ncache.init : AT(__NDATA_ROM)
|
||||||
{
|
{
|
||||||
__noncachedata_start__ = .; /* create a global symbol at ncache data start */
|
__noncachedata_start__ = .; /* create a global symbol at ncache data start */
|
||||||
|
|
|
@ -67,6 +67,9 @@ define symbol m_interrupts_end = 0x600023FF;
|
||||||
define symbol m_text_start = 0x60002400;
|
define symbol m_text_start = 0x60002400;
|
||||||
define symbol m_text_end = 0x63FFFFFF;
|
define symbol m_text_end = 0x63FFFFFF;
|
||||||
|
|
||||||
|
define symbol m_text2_start = 0x00000000;
|
||||||
|
define symbol m_text2_end = 0x0001FFFF;
|
||||||
|
|
||||||
define symbol m_interrupts_ram_start = 0x20000000;
|
define symbol m_interrupts_ram_start = 0x20000000;
|
||||||
define symbol m_interrupts_ram_end = 0x20000000 + __ram_vector_table_offset__;
|
define symbol m_interrupts_ram_end = 0x20000000 + __ram_vector_table_offset__;
|
||||||
|
|
||||||
|
@ -108,6 +111,8 @@ define memory mem with size = 4G;
|
||||||
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
|
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
|
||||||
| mem:[from m_text_start to m_text_end];
|
| mem:[from m_text_start to m_text_end];
|
||||||
|
|
||||||
|
define region TEXT2_region = mem:[from m_text2_start to m_text2_end];
|
||||||
|
|
||||||
define region DATA_region = mem:[from m_data_start to m_data_end];
|
define region DATA_region = mem:[from m_data_start to m_data_end];
|
||||||
define region DATA2_region = mem:[from m_data2_start to m_data2_end];
|
define region DATA2_region = mem:[from m_data2_start to m_data2_end];
|
||||||
define region DATA3_region = mem:[from m_data3_start to m_data3_end-__size_cstack__];
|
define region DATA3_region = mem:[from m_data3_start to m_data3_end-__size_cstack__];
|
||||||
|
@ -139,4 +144,5 @@ place in DATA3_region { block ZI };
|
||||||
place in DATA3_region { last block HEAP };
|
place in DATA3_region { last block HEAP };
|
||||||
place in CSTACK_region { block CSTACK };
|
place in CSTACK_region { block CSTACK };
|
||||||
place in NCACHE_region { block NCACHE_VAR };
|
place in NCACHE_region { block NCACHE_VAR };
|
||||||
|
place in TEXT2_region { section .textrw};
|
||||||
place in m_interrupts_ram_region { section m_interrupts_ram };
|
place in m_interrupts_ram_region { section m_interrupts_ram };
|
||||||
|
|
|
@ -347,35 +347,6 @@ _Pragma("diag_suppress=Pm120")
|
||||||
/* @} */
|
/* @} */
|
||||||
|
|
||||||
/*! @name Time sensitive region */
|
/*! @name Time sensitive region */
|
||||||
/* @{ */
|
|
||||||
#if defined(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE) && FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE
|
|
||||||
#if (defined(__ICCARM__))
|
|
||||||
#define AT_QUICKACCESS_SECTION_CODE(func) func @"CodeQuickAccess"
|
|
||||||
#define AT_QUICKACCESS_SECTION_DATA(func) func @"DataQuickAccess"
|
|
||||||
#elif(defined(__ARMCC_VERSION))
|
|
||||||
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"))) func
|
|
||||||
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
|
|
||||||
#elif(defined(__GNUC__))
|
|
||||||
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"))) func
|
|
||||||
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
|
|
||||||
#else
|
|
||||||
#error Toolchain not supported.
|
|
||||||
#endif /* defined(__ICCARM__) */
|
|
||||||
#else
|
|
||||||
#if (defined(__ICCARM__))
|
|
||||||
#define AT_QUICKACCESS_SECTION_CODE(func) func
|
|
||||||
#define AT_QUICKACCESS_SECTION_DATA(func) func
|
|
||||||
#elif(defined(__ARMCC_VERSION))
|
|
||||||
#define AT_QUICKACCESS_SECTION_CODE(func) func
|
|
||||||
#define AT_QUICKACCESS_SECTION_DATA(func) func
|
|
||||||
#elif(defined(__GNUC__))
|
|
||||||
#define AT_QUICKACCESS_SECTION_CODE(func) func
|
|
||||||
#define AT_QUICKACCESS_SECTION_DATA(func) func
|
|
||||||
#else
|
|
||||||
#error Toolchain not supported.
|
|
||||||
#endif
|
|
||||||
#endif /* __FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE */
|
|
||||||
/* @} */
|
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* API
|
* API
|
||||||
|
|
Loading…
Reference in New Issue