diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f746xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f746xx.h
index e6adc5d238..c981d2a612 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f746xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f746xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f746xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
   *
   *          This file contains:
@@ -314,7 +314,6 @@ typedef struct
   __IO uint32_t IER;          /*!< CEC interrupt enable register,                              Address offset:0x14 */
 }CEC_TypeDef;
 
-
 /** 
   * @brief CRC calculation unit 
   */
@@ -407,7 +406,6 @@ typedef struct
   __IO uint32_t HIFCR;  /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
 } DMA_TypeDef;
 
-
 /** 
   * @brief DMA2D Controller
   */
@@ -854,7 +852,6 @@ typedef struct
   __IO uint32_t   DIR;          /*!< Debug Information register,         Address offset: 0x18 */
 } SPDIFRX_TypeDef;
 
-
 /** 
   * @brief SD host Interface
   */
@@ -1322,7 +1319,7 @@ typedef struct
 #define IWDG                ((IWDG_TypeDef *) IWDG_BASE)
 #define SPI2                ((SPI_TypeDef *) SPI2_BASE)
 #define SPI3                ((SPI_TypeDef *) SPI3_BASE)
-#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE) 
+#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
 #define USART2              ((USART_TypeDef *) USART2_BASE)
 #define USART3              ((USART_TypeDef *) USART3_BASE)
 #define UART4               ((USART_TypeDef *) UART4_BASE)
@@ -3667,7 +3664,6 @@ typedef struct
                                                                      
 /********************  Bit definition for DMA2D_BGCLUT register  **************/
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                    External Interrupt/Event Controller                     */
@@ -3977,6 +3973,7 @@ typedef struct
 #define FLASH_OPTCR1_BOOT_ADD0              0x0000FFFFU
 #define FLASH_OPTCR1_BOOT_ADD1              0xFFFF0000U
 
+
 /******************************************************************************/
 /*                                                                            */
 /*                          Flexible Memory Controller                        */
@@ -6044,7 +6041,7 @@ typedef struct
 #define RTC_CR_OSEL_1                        0x00400000U
 #define RTC_CR_POL                           0x00100000U
 #define RTC_CR_COSEL                         0x00080000U
-#define RTC_CR_BCK                           0x00040000U
+#define RTC_CR_BKP                           0x00040000U
 #define RTC_CR_SUB1H                         0x00020000U
 #define RTC_CR_ADD1H                         0x00010000U
 #define RTC_CR_TSIE                          0x00008000U
@@ -6064,6 +6061,9 @@ typedef struct
 #define RTC_CR_WUCKSEL_1                     0x00000002U
 #define RTC_CR_WUCKSEL_2                     0x00000004U
 
+/* Legacy define */
+#define RTC_CR_BCK                           RTC_CR_BKP
+
 /********************  Bits definition for RTC_ISR register  ******************/
 #define RTC_ISR_ITSF                         0x00020000U
 #define RTC_ISR_RECALPF                      0x00010000U
@@ -6639,7 +6639,6 @@ typedef struct
 #define  SPDIFRX_DIR_THI                   0x000013FFU        /*!<Threshold LOW      */
 #define  SPDIFRX_DIR_TLO                   0x1FFF0000U        /*!<Threshold HIGH     */
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                          SD host Interface                                 */
@@ -8974,6 +8973,7 @@ typedef struct
 
 
 
+
 /**
   * @}
   */
@@ -9027,28 +9027,28 @@ typedef struct
 
 /******************************* GPIO Instances *******************************/
 #define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                            ((__INSTANCE__) == GPIOB) || \
+                                            ((__INSTANCE__) == GPIOC) || \
+                                            ((__INSTANCE__) == GPIOD) || \
+                                            ((__INSTANCE__) == GPIOE) || \
+                                            ((__INSTANCE__) == GPIOF) || \
+                                            ((__INSTANCE__) == GPIOG) || \
+                                            ((__INSTANCE__) == GPIOH) || \
+                                            ((__INSTANCE__) == GPIOI) || \
+                                            ((__INSTANCE__) == GPIOJ) || \
+                                            ((__INSTANCE__) == GPIOK))
 										
 #define IS_GPIO_AF_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                             ((__INSTANCE__) == GPIOB) || \
+                                             ((__INSTANCE__) == GPIOC) || \
+                                             ((__INSTANCE__) == GPIOD) || \
+                                             ((__INSTANCE__) == GPIOE) || \
+                                             ((__INSTANCE__) == GPIOF) || \
+                                             ((__INSTANCE__) == GPIOG) || \
+                                             ((__INSTANCE__) == GPIOH) || \
+                                             ((__INSTANCE__) == GPIOI) || \
+                                             ((__INSTANCE__) == GPIOJ) || \
+                                             ((__INSTANCE__) == GPIOK))
 
 /****************************** CEC Instances *********************************/
 #define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
@@ -9059,14 +9059,14 @@ typedef struct
                                         
 /******************************** I2C Instances *******************************/
 #define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
-                                       ((__INSTANCE__) == I2C2) || \
-                                       ((__INSTANCE__) == I2C3) || \
-                                       ((__INSTANCE__) == I2C4))
+                                           ((__INSTANCE__) == I2C2) || \
+                                           ((__INSTANCE__) == I2C3) || \
+                                           ((__INSTANCE__) == I2C4))
 
 /******************************** I2S Instances *******************************/
 #define IS_I2S_ALL_INSTANCE(__INSTANCE__)  (((__INSTANCE__) == SPI1) || \
-                                    ((__INSTANCE__) == SPI2) || \
-                                    ((__INSTANCE__) == SPI3))
+                                            ((__INSTANCE__) == SPI2) || \
+                                            ((__INSTANCE__) == SPI3))
 
 /******************************* LPTIM Instances ********************************/
 #define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
@@ -9076,6 +9076,7 @@ typedef struct
 
 
 
+
 /******************************* RNG Instances ********************************/
 #define IS_RNG_ALL_INSTANCE(__INSTANCE__)  ((__INSTANCE__) == RNG)
 
@@ -9098,11 +9099,11 @@ typedef struct
                                      
 /******************************** SPI Instances *******************************/
 #define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
-                                       ((__INSTANCE__) == SPI2) || \
-                                       ((__INSTANCE__) == SPI3) || \
-                                       ((__INSTANCE__) == SPI4) || \
-                                       ((__INSTANCE__) == SPI5) || \
-                                       ((__INSTANCE__) == SPI6))
+                                           ((__INSTANCE__) == SPI2) || \
+                                           ((__INSTANCE__) == SPI3) || \
+                                           ((__INSTANCE__) == SPI4) || \
+                                           ((__INSTANCE__) == SPI5) || \
+                                           ((__INSTANCE__) == SPI6))
 
 /****************** TIM Instances : All supported instances *******************/
 #define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1)   || \
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f7xx.h
index f100a98adb..30e11f3fe3 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS STM32F7xx Device Peripheral Access Layer Header File.           
   *            
   *          The file is the unique include file that the application programmer
@@ -75,7 +75,8 @@
    application 
   */
 #if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
-    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
+    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
+	!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
   /* #define STM32F756xx */   /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
                                    STM32F756NG Devices */
 #define STM32F746xx           /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
@@ -84,11 +85,16 @@
   /* #define STM32F765xx */   /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
                                    STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
   /* #define STM32F767xx */   /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
-                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
+                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
   /* #define STM32F769xx */   /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
-                                   STM32F769NG, STM32F769NI Devices */
-  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
-  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
+                                   STM32F769NG, STM32F769NI, STM32F768AI Devices */
+  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
+  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
+  /* #define STM32F722xx */   /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
+                                   STM32F722VC, STM32F722RC Devices */
+  /* #define STM32F723xx */   /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
+  /* #define STM32F732xx */   /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
+  /* #define STM32F733xx */   /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
 #endif
 
 /*  Tip: To avoid modifying this file each time you need to switch between these
@@ -105,11 +111,11 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number V1.1.0
+  * @brief CMSIS Device version number V1.1.2
   */
 #define __STM32F7_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
 #define __STM32F7_CMSIS_VERSION_SUB1   (0x01) /*!< [23:16] sub1 version */
-#define __STM32F7_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F7_CMSIS_VERSION_SUB2   (0x02) /*!< [15:8]  sub2 version */
 #define __STM32F7_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32F7_CMSIS_VERSION        ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
                                        |(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@@ -122,7 +128,15 @@
 /** @addtogroup Device_Included
   * @{
   */
-#if defined(STM32F756xx)
+#if defined(STM32F722xx)
+  #include "stm32f722xx.h"
+#elif defined(STM32F723xx)
+  #include "stm32f723xx.h"
+#elif defined(STM32F732xx)
+  #include "stm32f732xx.h"
+#elif defined(STM32F733xx)
+  #include "stm32f733xx.h"    
+#elif defined(STM32F756xx)
   #include "stm32f756xx.h"
 #elif defined(STM32F746xx)
   #include "stm32f746xx.h"
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.c
index 94831f7e06..fab899fb25 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f7xx.c
   * @author  MCD Application Team
-  * @version V1.0.2
-  * @date    21-September-2015
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
   *
   *   This file provides two functions and one global variable to be called from 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.h
index f452d4d8e5..649ba2d000 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.       
   ******************************************************************************  
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/stm32f769xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/stm32f769xx.h
index 69e99eda65..79419c03d1 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/stm32f769xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/stm32f769xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f769xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
   *
   *          This file contains:
@@ -326,7 +326,6 @@ typedef struct
   __IO uint32_t IER;          /*!< CEC interrupt enable register,                              Address offset:0x14 */
 }CEC_TypeDef;
 
-
 /** 
   * @brief CRC calculation unit 
   */
@@ -453,7 +452,6 @@ typedef struct
   __IO uint32_t HIFCR;  /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
 } DMA_TypeDef;
 
-
 /** 
   * @brief DMA2D Controller
   */
@@ -901,7 +899,6 @@ typedef struct
   __IO uint32_t   DIR;          /*!< Debug Information register,         Address offset: 0x18 */
 } SPDIFRX_TypeDef;
 
-
 /** 
   * @brief SD host Interface
   */
@@ -1584,7 +1581,7 @@ typedef struct
 #define IWDG                ((IWDG_TypeDef *) IWDG_BASE)
 #define SPI2                ((SPI_TypeDef *) SPI2_BASE)
 #define SPI3                ((SPI_TypeDef *) SPI3_BASE)
-#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE) 
+#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
 #define USART2              ((USART_TypeDef *) USART2_BASE)
 #define USART3              ((USART_TypeDef *) USART3_BASE)
 #define UART4               ((USART_TypeDef *) UART4_BASE)
@@ -4090,7 +4087,6 @@ typedef struct
                                                                      
 /********************  Bit definition for DMA2D_BGCLUT register  **************/
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                    External Interrupt/Event Controller                     */
@@ -4417,6 +4413,7 @@ typedef struct
 #define FLASH_OPTCR1_BOOT_ADD0              0x0000FFFFU
 #define FLASH_OPTCR1_BOOT_ADD1              0xFFFF0000U
 
+
 /******************************************************************************/
 /*                                                                            */
 /*                          Flexible Memory Controller                        */
@@ -6504,7 +6501,7 @@ typedef struct
 #define RTC_CR_OSEL_1                        0x00400000U
 #define RTC_CR_POL                           0x00100000U
 #define RTC_CR_COSEL                         0x00080000U
-#define RTC_CR_BCK                           0x00040000U
+#define RTC_CR_BKP                           0x00040000U
 #define RTC_CR_SUB1H                         0x00020000U
 #define RTC_CR_ADD1H                         0x00010000U
 #define RTC_CR_TSIE                          0x00008000U
@@ -6524,6 +6521,9 @@ typedef struct
 #define RTC_CR_WUCKSEL_1                     0x00000002U
 #define RTC_CR_WUCKSEL_2                     0x00000004U
 
+/* Legacy define */
+#define RTC_CR_BCK                           RTC_CR_BKP
+
 /********************  Bits definition for RTC_ISR register  ******************/
 #define RTC_ISR_ITSF                         0x00020000U
 #define RTC_ISR_RECALPF                      0x00010000U
@@ -7095,7 +7095,6 @@ typedef struct
 #define  SPDIFRX_DIR_THI                   0x000013FFU        /*!<Threshold LOW      */
 #define  SPDIFRX_DIR_TLO                   0x1FFF0000U        /*!<Threshold HIGH     */
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                          SD host Interface                                 */
@@ -9435,6 +9434,7 @@ typedef struct
 #define USB_OTG_PCGCCTL_GATECLK                 0x00000002U            /*!<Bit 0 */
 #define USB_OTG_PCGCCTL_PHYSUSP                 0x00000010U            /*!<Bit 1 */
 
+
 /******************************************************************************/
 /*                                                                            */
 /*                        JPEG Encoder/Decoder                                */
@@ -10882,28 +10882,28 @@ typedef struct
 
 /******************************* GPIO Instances *******************************/
 #define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                            ((__INSTANCE__) == GPIOB) || \
+                                            ((__INSTANCE__) == GPIOC) || \
+                                            ((__INSTANCE__) == GPIOD) || \
+                                            ((__INSTANCE__) == GPIOE) || \
+                                            ((__INSTANCE__) == GPIOF) || \
+                                            ((__INSTANCE__) == GPIOG) || \
+                                            ((__INSTANCE__) == GPIOH) || \
+                                            ((__INSTANCE__) == GPIOI) || \
+                                            ((__INSTANCE__) == GPIOJ) || \
+                                            ((__INSTANCE__) == GPIOK))
 										
 #define IS_GPIO_AF_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                             ((__INSTANCE__) == GPIOB) || \
+                                             ((__INSTANCE__) == GPIOC) || \
+                                             ((__INSTANCE__) == GPIOD) || \
+                                             ((__INSTANCE__) == GPIOE) || \
+                                             ((__INSTANCE__) == GPIOF) || \
+                                             ((__INSTANCE__) == GPIOG) || \
+                                             ((__INSTANCE__) == GPIOH) || \
+                                             ((__INSTANCE__) == GPIOI) || \
+                                             ((__INSTANCE__) == GPIOJ) || \
+                                             ((__INSTANCE__) == GPIOK))
 
 /****************************** CEC Instances *********************************/
 #define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
@@ -10914,14 +10914,14 @@ typedef struct
                                         
 /******************************** I2C Instances *******************************/
 #define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
-                                       ((__INSTANCE__) == I2C2) || \
-                                       ((__INSTANCE__) == I2C3) || \
-                                       ((__INSTANCE__) == I2C4))
+                                           ((__INSTANCE__) == I2C2) || \
+                                           ((__INSTANCE__) == I2C3) || \
+                                           ((__INSTANCE__) == I2C4))
 
 /******************************** I2S Instances *******************************/
 #define IS_I2S_ALL_INSTANCE(__INSTANCE__)  (((__INSTANCE__) == SPI1) || \
-                                    ((__INSTANCE__) == SPI2) || \
-                                    ((__INSTANCE__) == SPI3))
+                                            ((__INSTANCE__) == SPI2) || \
+                                            ((__INSTANCE__) == SPI3))
 
 /******************************* LPTIM Instances ********************************/
 #define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
@@ -10935,6 +10935,7 @@ typedef struct
 /****************************** MDIOS Instances ********************************/
 #define IS_JPEG_ALL_INSTANCE(__INSTANCE__)  ((__INSTANCE__) == JPEG)
 
+
 /******************************* RNG Instances ********************************/
 #define IS_RNG_ALL_INSTANCE(__INSTANCE__)  ((__INSTANCE__) == RNG)
 
@@ -10958,11 +10959,11 @@ typedef struct
                                      
 /******************************** SPI Instances *******************************/
 #define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
-                                       ((__INSTANCE__) == SPI2) || \
-                                       ((__INSTANCE__) == SPI3) || \
-                                       ((__INSTANCE__) == SPI4) || \
-                                       ((__INSTANCE__) == SPI5) || \
-                                       ((__INSTANCE__) == SPI6))
+                                           ((__INSTANCE__) == SPI2) || \
+                                           ((__INSTANCE__) == SPI3) || \
+                                           ((__INSTANCE__) == SPI4) || \
+                                           ((__INSTANCE__) == SPI5) || \
+                                           ((__INSTANCE__) == SPI6))
 
 /****************** TIM Instances : All supported instances *******************/
 #define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1)   || \
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/stm32f7xx.h
index 75cbad10f2..0c42d8078a 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS STM32F7xx Device Peripheral Access Layer Header File.           
   *            
   *          The file is the unique include file that the application programmer
@@ -75,7 +75,8 @@
    application 
   */
 #if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
-    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
+    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
+	!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
   /* #define STM32F756xx */   /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
                                    STM32F756NG Devices */
   /* #define STM32F746xx */   /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
@@ -84,11 +85,16 @@
   /* #define STM32F765xx */   /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
                                    STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
   /* #define STM32F767xx */   /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
-                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
-#define STM32F769xx    /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
-                                   STM32F769NG, STM32F769NI Devices */
-  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
-  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
+                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
+   #define STM32F769xx    /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
+                                   STM32F769NG, STM32F769NI, STM32F768AI Devices */
+  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
+  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
+  /* #define STM32F722xx */   /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
+                                   STM32F722VC, STM32F722RC Devices */
+  /* #define STM32F723xx */   /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
+  /* #define STM32F732xx */   /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
+  /* #define STM32F733xx */   /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
 #endif
 
 /*  Tip: To avoid modifying this file each time you need to switch between these
@@ -105,11 +111,11 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number V1.1.0
+  * @brief CMSIS Device version number V1.1.2
   */
 #define __STM32F7_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
 #define __STM32F7_CMSIS_VERSION_SUB1   (0x01) /*!< [23:16] sub1 version */
-#define __STM32F7_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F7_CMSIS_VERSION_SUB2   (0x02) /*!< [15:8]  sub2 version */
 #define __STM32F7_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32F7_CMSIS_VERSION        ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
                                        |(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@@ -122,7 +128,15 @@
 /** @addtogroup Device_Included
   * @{
   */
-#if defined(STM32F756xx)
+#if defined(STM32F722xx)
+  #include "stm32f722xx.h"
+#elif defined(STM32F723xx)
+  #include "stm32f723xx.h"
+#elif defined(STM32F732xx)
+  #include "stm32f732xx.h"
+#elif defined(STM32F733xx)
+  #include "stm32f733xx.h"    
+#elif defined(STM32F756xx)
   #include "stm32f756xx.h"
 #elif defined(STM32F746xx)
   #include "stm32f746xx.h"
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/system_stm32f7xx.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/system_stm32f7xx.c
index 367ce072d4..a55212170c 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/system_stm32f7xx.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/system_stm32f7xx.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f7xx.c
   * @author  MCD Application Team
-  * @version V1.0.2
-  * @date    21-September-2015
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
   *
   *   This file provides two functions and one global variable to be called from 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/system_stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/system_stm32f7xx.h
index f452d4d8e5..649ba2d000 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/system_stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/device/system_stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.       
   ******************************************************************************  
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F746ZG/device/stm32f746xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F746ZG/device/stm32f746xx.h
index e6adc5d238..c981d2a612 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F746ZG/device/stm32f746xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F746ZG/device/stm32f746xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f746xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
   *
   *          This file contains:
@@ -314,7 +314,6 @@ typedef struct
   __IO uint32_t IER;          /*!< CEC interrupt enable register,                              Address offset:0x14 */
 }CEC_TypeDef;
 
-
 /** 
   * @brief CRC calculation unit 
   */
@@ -407,7 +406,6 @@ typedef struct
   __IO uint32_t HIFCR;  /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
 } DMA_TypeDef;
 
-
 /** 
   * @brief DMA2D Controller
   */
@@ -854,7 +852,6 @@ typedef struct
   __IO uint32_t   DIR;          /*!< Debug Information register,         Address offset: 0x18 */
 } SPDIFRX_TypeDef;
 
-
 /** 
   * @brief SD host Interface
   */
@@ -1322,7 +1319,7 @@ typedef struct
 #define IWDG                ((IWDG_TypeDef *) IWDG_BASE)
 #define SPI2                ((SPI_TypeDef *) SPI2_BASE)
 #define SPI3                ((SPI_TypeDef *) SPI3_BASE)
-#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE) 
+#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
 #define USART2              ((USART_TypeDef *) USART2_BASE)
 #define USART3              ((USART_TypeDef *) USART3_BASE)
 #define UART4               ((USART_TypeDef *) UART4_BASE)
@@ -3667,7 +3664,6 @@ typedef struct
                                                                      
 /********************  Bit definition for DMA2D_BGCLUT register  **************/
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                    External Interrupt/Event Controller                     */
@@ -3977,6 +3973,7 @@ typedef struct
 #define FLASH_OPTCR1_BOOT_ADD0              0x0000FFFFU
 #define FLASH_OPTCR1_BOOT_ADD1              0xFFFF0000U
 
+
 /******************************************************************************/
 /*                                                                            */
 /*                          Flexible Memory Controller                        */
@@ -6044,7 +6041,7 @@ typedef struct
 #define RTC_CR_OSEL_1                        0x00400000U
 #define RTC_CR_POL                           0x00100000U
 #define RTC_CR_COSEL                         0x00080000U
-#define RTC_CR_BCK                           0x00040000U
+#define RTC_CR_BKP                           0x00040000U
 #define RTC_CR_SUB1H                         0x00020000U
 #define RTC_CR_ADD1H                         0x00010000U
 #define RTC_CR_TSIE                          0x00008000U
@@ -6064,6 +6061,9 @@ typedef struct
 #define RTC_CR_WUCKSEL_1                     0x00000002U
 #define RTC_CR_WUCKSEL_2                     0x00000004U
 
+/* Legacy define */
+#define RTC_CR_BCK                           RTC_CR_BKP
+
 /********************  Bits definition for RTC_ISR register  ******************/
 #define RTC_ISR_ITSF                         0x00020000U
 #define RTC_ISR_RECALPF                      0x00010000U
@@ -6639,7 +6639,6 @@ typedef struct
 #define  SPDIFRX_DIR_THI                   0x000013FFU        /*!<Threshold LOW      */
 #define  SPDIFRX_DIR_TLO                   0x1FFF0000U        /*!<Threshold HIGH     */
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                          SD host Interface                                 */
@@ -8974,6 +8973,7 @@ typedef struct
 
 
 
+
 /**
   * @}
   */
@@ -9027,28 +9027,28 @@ typedef struct
 
 /******************************* GPIO Instances *******************************/
 #define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                            ((__INSTANCE__) == GPIOB) || \
+                                            ((__INSTANCE__) == GPIOC) || \
+                                            ((__INSTANCE__) == GPIOD) || \
+                                            ((__INSTANCE__) == GPIOE) || \
+                                            ((__INSTANCE__) == GPIOF) || \
+                                            ((__INSTANCE__) == GPIOG) || \
+                                            ((__INSTANCE__) == GPIOH) || \
+                                            ((__INSTANCE__) == GPIOI) || \
+                                            ((__INSTANCE__) == GPIOJ) || \
+                                            ((__INSTANCE__) == GPIOK))
 										
 #define IS_GPIO_AF_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                             ((__INSTANCE__) == GPIOB) || \
+                                             ((__INSTANCE__) == GPIOC) || \
+                                             ((__INSTANCE__) == GPIOD) || \
+                                             ((__INSTANCE__) == GPIOE) || \
+                                             ((__INSTANCE__) == GPIOF) || \
+                                             ((__INSTANCE__) == GPIOG) || \
+                                             ((__INSTANCE__) == GPIOH) || \
+                                             ((__INSTANCE__) == GPIOI) || \
+                                             ((__INSTANCE__) == GPIOJ) || \
+                                             ((__INSTANCE__) == GPIOK))
 
 /****************************** CEC Instances *********************************/
 #define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
@@ -9059,14 +9059,14 @@ typedef struct
                                         
 /******************************** I2C Instances *******************************/
 #define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
-                                       ((__INSTANCE__) == I2C2) || \
-                                       ((__INSTANCE__) == I2C3) || \
-                                       ((__INSTANCE__) == I2C4))
+                                           ((__INSTANCE__) == I2C2) || \
+                                           ((__INSTANCE__) == I2C3) || \
+                                           ((__INSTANCE__) == I2C4))
 
 /******************************** I2S Instances *******************************/
 #define IS_I2S_ALL_INSTANCE(__INSTANCE__)  (((__INSTANCE__) == SPI1) || \
-                                    ((__INSTANCE__) == SPI2) || \
-                                    ((__INSTANCE__) == SPI3))
+                                            ((__INSTANCE__) == SPI2) || \
+                                            ((__INSTANCE__) == SPI3))
 
 /******************************* LPTIM Instances ********************************/
 #define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
@@ -9076,6 +9076,7 @@ typedef struct
 
 
 
+
 /******************************* RNG Instances ********************************/
 #define IS_RNG_ALL_INSTANCE(__INSTANCE__)  ((__INSTANCE__) == RNG)
 
@@ -9098,11 +9099,11 @@ typedef struct
                                      
 /******************************** SPI Instances *******************************/
 #define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
-                                       ((__INSTANCE__) == SPI2) || \
-                                       ((__INSTANCE__) == SPI3) || \
-                                       ((__INSTANCE__) == SPI4) || \
-                                       ((__INSTANCE__) == SPI5) || \
-                                       ((__INSTANCE__) == SPI6))
+                                           ((__INSTANCE__) == SPI2) || \
+                                           ((__INSTANCE__) == SPI3) || \
+                                           ((__INSTANCE__) == SPI4) || \
+                                           ((__INSTANCE__) == SPI5) || \
+                                           ((__INSTANCE__) == SPI6))
 
 /****************** TIM Instances : All supported instances *******************/
 #define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1)   || \
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F746ZG/device/stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F746ZG/device/stm32f7xx.h
index f100a98adb..30e11f3fe3 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F746ZG/device/stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F746ZG/device/stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS STM32F7xx Device Peripheral Access Layer Header File.           
   *            
   *          The file is the unique include file that the application programmer
@@ -75,7 +75,8 @@
    application 
   */
 #if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
-    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
+    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
+	!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
   /* #define STM32F756xx */   /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
                                    STM32F756NG Devices */
 #define STM32F746xx           /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
@@ -84,11 +85,16 @@
   /* #define STM32F765xx */   /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
                                    STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
   /* #define STM32F767xx */   /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
-                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
+                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
   /* #define STM32F769xx */   /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
-                                   STM32F769NG, STM32F769NI Devices */
-  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
-  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
+                                   STM32F769NG, STM32F769NI, STM32F768AI Devices */
+  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
+  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
+  /* #define STM32F722xx */   /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
+                                   STM32F722VC, STM32F722RC Devices */
+  /* #define STM32F723xx */   /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
+  /* #define STM32F732xx */   /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
+  /* #define STM32F733xx */   /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
 #endif
 
 /*  Tip: To avoid modifying this file each time you need to switch between these
@@ -105,11 +111,11 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number V1.1.0
+  * @brief CMSIS Device version number V1.1.2
   */
 #define __STM32F7_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
 #define __STM32F7_CMSIS_VERSION_SUB1   (0x01) /*!< [23:16] sub1 version */
-#define __STM32F7_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F7_CMSIS_VERSION_SUB2   (0x02) /*!< [15:8]  sub2 version */
 #define __STM32F7_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32F7_CMSIS_VERSION        ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
                                        |(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@@ -122,7 +128,15 @@
 /** @addtogroup Device_Included
   * @{
   */
-#if defined(STM32F756xx)
+#if defined(STM32F722xx)
+  #include "stm32f722xx.h"
+#elif defined(STM32F723xx)
+  #include "stm32f723xx.h"
+#elif defined(STM32F732xx)
+  #include "stm32f732xx.h"
+#elif defined(STM32F733xx)
+  #include "stm32f733xx.h"    
+#elif defined(STM32F756xx)
   #include "stm32f756xx.h"
 #elif defined(STM32F746xx)
   #include "stm32f746xx.h"
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F756ZG/device/stm32f756xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F756ZG/device/stm32f756xx.h
index 286cf4ea6e..def461b463 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F756ZG/device/stm32f756xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F756ZG/device/stm32f756xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f756xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
   *
   *          This file contains:
@@ -315,7 +315,6 @@ typedef struct
   __IO uint32_t IER;          /*!< CEC interrupt enable register,                              Address offset:0x14 */
 }CEC_TypeDef;
 
-
 /** 
   * @brief CRC calculation unit 
   */
@@ -408,7 +407,6 @@ typedef struct
   __IO uint32_t HIFCR;  /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
 } DMA_TypeDef;
 
-
 /** 
   * @brief DMA2D Controller
   */
@@ -855,7 +853,6 @@ typedef struct
   __IO uint32_t   DIR;          /*!< Debug Information register,         Address offset: 0x18 */
 } SPDIFRX_TypeDef;
 
-
 /** 
   * @brief SD host Interface
   */
@@ -1394,7 +1391,7 @@ typedef struct
 #define IWDG                ((IWDG_TypeDef *) IWDG_BASE)
 #define SPI2                ((SPI_TypeDef *) SPI2_BASE)
 #define SPI3                ((SPI_TypeDef *) SPI3_BASE)
-#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE) 
+#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
 #define USART2              ((USART_TypeDef *) USART2_BASE)
 #define USART3              ((USART_TypeDef *) USART3_BASE)
 #define UART4               ((USART_TypeDef *) UART4_BASE)
@@ -3795,7 +3792,6 @@ typedef struct
                                                                      
 /********************  Bit definition for DMA2D_BGCLUT register  **************/
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                    External Interrupt/Event Controller                     */
@@ -4105,6 +4101,7 @@ typedef struct
 #define FLASH_OPTCR1_BOOT_ADD0              0x0000FFFFU
 #define FLASH_OPTCR1_BOOT_ADD1              0xFFFF0000U
 
+
 /******************************************************************************/
 /*                                                                            */
 /*                          Flexible Memory Controller                        */
@@ -6231,7 +6228,7 @@ typedef struct
 #define RTC_CR_OSEL_1                        0x00400000U
 #define RTC_CR_POL                           0x00100000U
 #define RTC_CR_COSEL                         0x00080000U
-#define RTC_CR_BCK                           0x00040000U
+#define RTC_CR_BKP                           0x00040000U
 #define RTC_CR_SUB1H                         0x00020000U
 #define RTC_CR_ADD1H                         0x00010000U
 #define RTC_CR_TSIE                          0x00008000U
@@ -6251,6 +6248,9 @@ typedef struct
 #define RTC_CR_WUCKSEL_1                     0x00000002U
 #define RTC_CR_WUCKSEL_2                     0x00000004U
 
+/* Legacy define */
+#define RTC_CR_BCK                           RTC_CR_BKP
+
 /********************  Bits definition for RTC_ISR register  ******************/
 #define RTC_ISR_ITSF                         0x00020000U
 #define RTC_ISR_RECALPF                      0x00010000U
@@ -6826,7 +6826,6 @@ typedef struct
 #define  SPDIFRX_DIR_THI                   0x000013FFU        /*!<Threshold LOW      */
 #define  SPDIFRX_DIR_TLO                   0x1FFF0000U        /*!<Threshold HIGH     */
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                          SD host Interface                                 */
@@ -9161,6 +9160,7 @@ typedef struct
 
 
 
+
 /**
   * @}
   */
@@ -9214,28 +9214,28 @@ typedef struct
 
 /******************************* GPIO Instances *******************************/
 #define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                            ((__INSTANCE__) == GPIOB) || \
+                                            ((__INSTANCE__) == GPIOC) || \
+                                            ((__INSTANCE__) == GPIOD) || \
+                                            ((__INSTANCE__) == GPIOE) || \
+                                            ((__INSTANCE__) == GPIOF) || \
+                                            ((__INSTANCE__) == GPIOG) || \
+                                            ((__INSTANCE__) == GPIOH) || \
+                                            ((__INSTANCE__) == GPIOI) || \
+                                            ((__INSTANCE__) == GPIOJ) || \
+                                            ((__INSTANCE__) == GPIOK))
 										
 #define IS_GPIO_AF_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                             ((__INSTANCE__) == GPIOB) || \
+                                             ((__INSTANCE__) == GPIOC) || \
+                                             ((__INSTANCE__) == GPIOD) || \
+                                             ((__INSTANCE__) == GPIOE) || \
+                                             ((__INSTANCE__) == GPIOF) || \
+                                             ((__INSTANCE__) == GPIOG) || \
+                                             ((__INSTANCE__) == GPIOH) || \
+                                             ((__INSTANCE__) == GPIOI) || \
+                                             ((__INSTANCE__) == GPIOJ) || \
+                                             ((__INSTANCE__) == GPIOK))
 
 /****************************** CEC Instances *********************************/
 #define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
@@ -9246,14 +9246,14 @@ typedef struct
                                         
 /******************************** I2C Instances *******************************/
 #define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
-                                       ((__INSTANCE__) == I2C2) || \
-                                       ((__INSTANCE__) == I2C3) || \
-                                       ((__INSTANCE__) == I2C4))
+                                           ((__INSTANCE__) == I2C2) || \
+                                           ((__INSTANCE__) == I2C3) || \
+                                           ((__INSTANCE__) == I2C4))
 
 /******************************** I2S Instances *******************************/
 #define IS_I2S_ALL_INSTANCE(__INSTANCE__)  (((__INSTANCE__) == SPI1) || \
-                                    ((__INSTANCE__) == SPI2) || \
-                                    ((__INSTANCE__) == SPI3))
+                                            ((__INSTANCE__) == SPI2) || \
+                                            ((__INSTANCE__) == SPI3))
 
 /******************************* LPTIM Instances ********************************/
 #define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
@@ -9263,6 +9263,7 @@ typedef struct
 
 
 
+
 /******************************* RNG Instances ********************************/
 #define IS_RNG_ALL_INSTANCE(__INSTANCE__)  ((__INSTANCE__) == RNG)
 
@@ -9285,11 +9286,11 @@ typedef struct
                                      
 /******************************** SPI Instances *******************************/
 #define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
-                                       ((__INSTANCE__) == SPI2) || \
-                                       ((__INSTANCE__) == SPI3) || \
-                                       ((__INSTANCE__) == SPI4) || \
-                                       ((__INSTANCE__) == SPI5) || \
-                                       ((__INSTANCE__) == SPI6))
+                                           ((__INSTANCE__) == SPI2) || \
+                                           ((__INSTANCE__) == SPI3) || \
+                                           ((__INSTANCE__) == SPI4) || \
+                                           ((__INSTANCE__) == SPI5) || \
+                                           ((__INSTANCE__) == SPI6))
 
 /****************** TIM Instances : All supported instances *******************/
 #define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1)   || \
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F756ZG/device/stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F756ZG/device/stm32f7xx.h
index 47b6ee63fd..2dc2b0edab 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F756ZG/device/stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/TARGET_NUCLEO_F756ZG/device/stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS STM32F7xx Device Peripheral Access Layer Header File.           
   *            
   *          The file is the unique include file that the application programmer
@@ -75,8 +75,9 @@
    application 
   */
 #if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
-    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
-  #define STM32F756xx         /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
+    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
+	!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
+  #define STM32F756xx    /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
                                    STM32F756NG Devices */
   /* #define STM32F746xx */   /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
                                    STM32F746BE, STM32F746BG, STM32F746NE, STM32F746NG Devices */
@@ -84,11 +85,16 @@
   /* #define STM32F765xx */   /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
                                    STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
   /* #define STM32F767xx */   /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
-                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
+                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
   /* #define STM32F769xx */   /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
-                                   STM32F769NG, STM32F769NI Devices */
-  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
-  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
+                                   STM32F769NG, STM32F769NI, STM32F768AI Devices */
+  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
+  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
+  /* #define STM32F722xx */   /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
+                                   STM32F722VC, STM32F722RC Devices */
+  /* #define STM32F723xx */   /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
+  /* #define STM32F732xx */   /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
+  /* #define STM32F733xx */   /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
 #endif
 
 /*  Tip: To avoid modifying this file each time you need to switch between these
@@ -105,11 +111,11 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number V1.1.0
+  * @brief CMSIS Device version number V1.1.2
   */
 #define __STM32F7_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
 #define __STM32F7_CMSIS_VERSION_SUB1   (0x01) /*!< [23:16] sub1 version */
-#define __STM32F7_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F7_CMSIS_VERSION_SUB2   (0x02) /*!< [15:8]  sub2 version */
 #define __STM32F7_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32F7_CMSIS_VERSION        ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
                                        |(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@@ -122,7 +128,15 @@
 /** @addtogroup Device_Included
   * @{
   */
-#if defined(STM32F756xx)
+#if defined(STM32F722xx)
+  #include "stm32f722xx.h"
+#elif defined(STM32F723xx)
+  #include "stm32f723xx.h"
+#elif defined(STM32F732xx)
+  #include "stm32f732xx.h"
+#elif defined(STM32F733xx)
+  #include "stm32f733xx.h"    
+#elif defined(STM32F756xx)
   #include "stm32f756xx.h"
 #elif defined(STM32F746xx)
   #include "stm32f746xx.h"
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/device/system_stm32f7xx.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/device/system_stm32f7xx.c
index 9b3d57eecf..ae2c75da2d 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/device/system_stm32f7xx.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/device/system_stm32f7xx.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f7xx.c
   * @author  MCD Application Team
-  * @version V1.0.2
-  * @date    21-September-2015
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
   *
   *   This file provides two functions and one global variable to be called from 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/device/system_stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/device/system_stm32f7xx.h
index f452d4d8e5..649ba2d000 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/device/system_stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_F746_F756/device/system_stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.       
   ******************************************************************************  
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/stm32f767xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/stm32f767xx.h
index 3976ab0176..14ff933b75 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/stm32f767xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/stm32f767xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f767xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
   *
   *          This file contains:
@@ -325,7 +325,6 @@ typedef struct
   __IO uint32_t IER;          /*!< CEC interrupt enable register,                              Address offset:0x14 */
 }CEC_TypeDef;
 
-
 /** 
   * @brief CRC calculation unit 
   */
@@ -452,7 +451,6 @@ typedef struct
   __IO uint32_t HIFCR;  /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
 } DMA_TypeDef;
 
-
 /** 
   * @brief DMA2D Controller
   */
@@ -900,7 +898,6 @@ typedef struct
   __IO uint32_t   DIR;          /*!< Debug Information register,         Address offset: 0x18 */
 } SPDIFRX_TypeDef;
 
-
 /** 
   * @brief SD host Interface
   */
@@ -1502,7 +1499,7 @@ typedef struct
 #define IWDG                ((IWDG_TypeDef *) IWDG_BASE)
 #define SPI2                ((SPI_TypeDef *) SPI2_BASE)
 #define SPI3                ((SPI_TypeDef *) SPI3_BASE)
-#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE) 
+#define SPDIFRX             ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
 #define USART2              ((USART_TypeDef *) USART2_BASE)
 #define USART3              ((USART_TypeDef *) USART3_BASE)
 #define UART4               ((USART_TypeDef *) UART4_BASE)
@@ -4007,7 +4004,6 @@ typedef struct
                                                                      
 /********************  Bit definition for DMA2D_BGCLUT register  **************/
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                    External Interrupt/Event Controller                     */
@@ -4334,6 +4330,7 @@ typedef struct
 #define FLASH_OPTCR1_BOOT_ADD0              0x0000FFFFU
 #define FLASH_OPTCR1_BOOT_ADD1              0xFFFF0000U
 
+
 /******************************************************************************/
 /*                                                                            */
 /*                          Flexible Memory Controller                        */
@@ -6417,7 +6414,7 @@ typedef struct
 #define RTC_CR_OSEL_1                        0x00400000U
 #define RTC_CR_POL                           0x00100000U
 #define RTC_CR_COSEL                         0x00080000U
-#define RTC_CR_BCK                           0x00040000U
+#define RTC_CR_BKP                           0x00040000U
 #define RTC_CR_SUB1H                         0x00020000U
 #define RTC_CR_ADD1H                         0x00010000U
 #define RTC_CR_TSIE                          0x00008000U
@@ -6437,6 +6434,9 @@ typedef struct
 #define RTC_CR_WUCKSEL_1                     0x00000002U
 #define RTC_CR_WUCKSEL_2                     0x00000004U
 
+/* Legacy define */
+#define RTC_CR_BCK                           RTC_CR_BKP
+
 /********************  Bits definition for RTC_ISR register  ******************/
 #define RTC_ISR_ITSF                         0x00020000U
 #define RTC_ISR_RECALPF                      0x00010000U
@@ -7008,7 +7008,6 @@ typedef struct
 #define  SPDIFRX_DIR_THI                   0x000013FFU        /*!<Threshold LOW      */
 #define  SPDIFRX_DIR_TLO                   0x1FFF0000U        /*!<Threshold HIGH     */
 
-
 /******************************************************************************/
 /*                                                                            */
 /*                          SD host Interface                                 */
@@ -9348,6 +9347,7 @@ typedef struct
 #define USB_OTG_PCGCCTL_GATECLK                 0x00000002U            /*!<Bit 0 */
 #define USB_OTG_PCGCCTL_PHYSUSP                 0x00000010U            /*!<Bit 1 */
 
+
 /******************************************************************************/
 /*                                                                            */
 /*                        JPEG Encoder/Decoder                                */
@@ -9606,28 +9606,28 @@ typedef struct
 
 /******************************* GPIO Instances *******************************/
 #define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                            ((__INSTANCE__) == GPIOB) || \
+                                            ((__INSTANCE__) == GPIOC) || \
+                                            ((__INSTANCE__) == GPIOD) || \
+                                            ((__INSTANCE__) == GPIOE) || \
+                                            ((__INSTANCE__) == GPIOF) || \
+                                            ((__INSTANCE__) == GPIOG) || \
+                                            ((__INSTANCE__) == GPIOH) || \
+                                            ((__INSTANCE__) == GPIOI) || \
+                                            ((__INSTANCE__) == GPIOJ) || \
+                                            ((__INSTANCE__) == GPIOK))
 										
 #define IS_GPIO_AF_INSTANCE(__INSTANCE__)   (((__INSTANCE__) == GPIOA) || \
-                                        ((__INSTANCE__) == GPIOB) || \
-                                        ((__INSTANCE__) == GPIOC) || \
-                                        ((__INSTANCE__) == GPIOD) || \
-                                        ((__INSTANCE__) == GPIOE) || \
-                                        ((__INSTANCE__) == GPIOF) || \
-                                        ((__INSTANCE__) == GPIOG) || \
-                                        ((__INSTANCE__) == GPIOH) || \
-                                        ((__INSTANCE__) == GPIOI) || \
-                                        ((__INSTANCE__) == GPIOJ) || \
-                                        ((__INSTANCE__) == GPIOK))
+                                             ((__INSTANCE__) == GPIOB) || \
+                                             ((__INSTANCE__) == GPIOC) || \
+                                             ((__INSTANCE__) == GPIOD) || \
+                                             ((__INSTANCE__) == GPIOE) || \
+                                             ((__INSTANCE__) == GPIOF) || \
+                                             ((__INSTANCE__) == GPIOG) || \
+                                             ((__INSTANCE__) == GPIOH) || \
+                                             ((__INSTANCE__) == GPIOI) || \
+                                             ((__INSTANCE__) == GPIOJ) || \
+                                             ((__INSTANCE__) == GPIOK))
 
 /****************************** CEC Instances *********************************/
 #define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
@@ -9638,14 +9638,14 @@ typedef struct
                                         
 /******************************** I2C Instances *******************************/
 #define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
-                                       ((__INSTANCE__) == I2C2) || \
-                                       ((__INSTANCE__) == I2C3) || \
-                                       ((__INSTANCE__) == I2C4))
+                                           ((__INSTANCE__) == I2C2) || \
+                                           ((__INSTANCE__) == I2C3) || \
+                                           ((__INSTANCE__) == I2C4))
 
 /******************************** I2S Instances *******************************/
 #define IS_I2S_ALL_INSTANCE(__INSTANCE__)  (((__INSTANCE__) == SPI1) || \
-                                    ((__INSTANCE__) == SPI2) || \
-                                    ((__INSTANCE__) == SPI3))
+                                            ((__INSTANCE__) == SPI2) || \
+                                            ((__INSTANCE__) == SPI3))
 
 /******************************* LPTIM Instances ********************************/
 #define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
@@ -9659,6 +9659,7 @@ typedef struct
 /****************************** MDIOS Instances ********************************/
 #define IS_JPEG_ALL_INSTANCE(__INSTANCE__)  ((__INSTANCE__) == JPEG)
 
+
 /******************************* RNG Instances ********************************/
 #define IS_RNG_ALL_INSTANCE(__INSTANCE__)  ((__INSTANCE__) == RNG)
 
@@ -9682,11 +9683,11 @@ typedef struct
                                      
 /******************************** SPI Instances *******************************/
 #define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
-                                       ((__INSTANCE__) == SPI2) || \
-                                       ((__INSTANCE__) == SPI3) || \
-                                       ((__INSTANCE__) == SPI4) || \
-                                       ((__INSTANCE__) == SPI5) || \
-                                       ((__INSTANCE__) == SPI6))
+                                           ((__INSTANCE__) == SPI2) || \
+                                           ((__INSTANCE__) == SPI3) || \
+                                           ((__INSTANCE__) == SPI4) || \
+                                           ((__INSTANCE__) == SPI5) || \
+                                           ((__INSTANCE__) == SPI6))
 
 /****************** TIM Instances : All supported instances *******************/
 #define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1)   || \
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/stm32f7xx.h
index 2797ce2ab5..07e2e3f3cc 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS STM32F7xx Device Peripheral Access Layer Header File.           
   *            
   *          The file is the unique include file that the application programmer
@@ -75,7 +75,8 @@
    application 
   */
 #if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
-    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
+    !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
+	!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
   /* #define STM32F756xx */   /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
                                    STM32F756NG Devices */
   /* #define STM32F746xx */   /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
@@ -83,12 +84,17 @@
   /* #define STM32F745xx */   /*!< STM32F745VE, STM32F745VG, STM32F745ZG, STM32F745ZE, STM32F745IE, STM32F745IG Devices */
   /* #define STM32F765xx */   /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
                                    STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
-#define STM32F767xx           /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
-                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
+  #define STM32F767xx   /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
+                                   STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
   /* #define STM32F769xx */   /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
-                                   STM32F769NG, STM32F769NI Devices */
-  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
-  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
+                                   STM32F769NG, STM32F769NI, STM32F768AI Devices */
+  /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
+  /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
+  /* #define STM32F722xx */   /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
+                                   STM32F722VC, STM32F722RC Devices */
+  /* #define STM32F723xx */   /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
+  /* #define STM32F732xx */   /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
+  /* #define STM32F733xx */   /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
 #endif
 
 /*  Tip: To avoid modifying this file each time you need to switch between these
@@ -105,11 +111,11 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number V1.1.0
+  * @brief CMSIS Device version number V1.1.2
   */
 #define __STM32F7_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
 #define __STM32F7_CMSIS_VERSION_SUB1   (0x01) /*!< [23:16] sub1 version */
-#define __STM32F7_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F7_CMSIS_VERSION_SUB2   (0x02) /*!< [15:8]  sub2 version */
 #define __STM32F7_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32F7_CMSIS_VERSION        ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
                                        |(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@@ -122,7 +128,15 @@
 /** @addtogroup Device_Included
   * @{
   */
-#if defined(STM32F756xx)
+#if defined(STM32F722xx)
+  #include "stm32f722xx.h"
+#elif defined(STM32F723xx)
+  #include "stm32f723xx.h"
+#elif defined(STM32F732xx)
+  #include "stm32f732xx.h"
+#elif defined(STM32F733xx)
+  #include "stm32f733xx.h"    
+#elif defined(STM32F756xx)
   #include "stm32f756xx.h"
 #elif defined(STM32F746xx)
   #include "stm32f746xx.h"
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/system_stm32f7xx.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/system_stm32f7xx.c
index 77ae1c2f01..c12e67e0f6 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/system_stm32f7xx.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/system_stm32f7xx.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f7xx.c
   * @author  MCD Application Team
-  * @version V1.0.2
-  * @date    21-September-2015
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
   *
   *   This file provides two functions and one global variable to be called from 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/system_stm32f7xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/system_stm32f7xx.h
index f452d4d8e5..649ba2d000 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/system_stm32f7xx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/system_stm32f7xx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f7xx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.       
   ******************************************************************************  
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/Release_Notes_stm32f7xx_hal.html b/targets/TARGET_STM/TARGET_STM32F7/device/Release_Notes_stm32f7xx_hal.html
index 6d4487249b..1f258ba583 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/Release_Notes_stm32f7xx_hal.html
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/Release_Notes_stm32f7xx_hal.html
@@ -676,7 +676,64 @@ Notes for STM32F7xx HAL Drivers</span><span style="font-size: 20pt; font-family:
 <tr style="">
 <td style="padding: 0in;" valign="top">
 <h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">Update History</span></h2>
-<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 22-April-2016</span></h3>
+<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.2 / 23-September-2016</span></h3>
+<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
+Changes</span></u></b></p><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: Verdana,sans-serif; font-size: 10pt;">General updates 
+to fix known defects and enhancements implementation</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     Cortex</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">&nbsp;update</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Move HAL_MPU_Disable() and
+      HAL_MPU_Enable() from stm32f7xx_hal_cortex.h to stm32f7xx_hal_cortex.c</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Clear the whole MPU control
+      register in&nbsp;HAL_MPU_Disable() API</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     CRC</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">&nbsp;update</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update HAL_CRC_DeInit()
+      function to reset IDR register</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     DMA</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">&nbsp;update</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add a check on DMA stream
+      instance in HAL_DMA_DeInit() API</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li></ul></ul>
+
+<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     DSI</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">&nbsp;update</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update
+      HAL_DSI_ConfigHostTimeouts() and HAL_DSI_Init() functions to avoid
+      scratch in DSI_CCR register</span></li></ul></ul><ul style="margin-top: 0cm;" type="square"><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL ETH</span> update&nbsp;</span></li><ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana,sans-serif; font-size: 10pt;">Fix wrong definitions in driver header file stm32f7_hal_eth.h</span></li></ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL FLASH</span> update&nbsp;</span></li><ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Update the clearing of error flags</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     GPIO</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">&nbsp;update&nbsp;</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add GPIO_AF14_LTDC definition</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     I2C</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">&nbsp;update&nbsp;</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add I2C_FIRST_AND_NEXT_FRAME
+      for I2C Sequential Transfer Options</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL IRDA</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US"> update</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add IRDA_CLOCKSOURCE_UNDEFINED
+      define</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add
+      __HAL_IRDA_FLUSH_DRREGISTER() macro for IRDA DR register flush</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add macros for specific flag
+      clear <o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_FLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_PEFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_FEFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_NEFLAG() <o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_OREFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_IDLEFLAG()<o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add new functions and call
+      backs for Transfer Abort<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_Abort()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_AbortTransmit()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_AbortReceive()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_Abort_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_AbortTransmit_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_AbortReceive_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_AbortCpltCallback()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_AbortTransmitCpltCallback()<o:p></o:p></span></li></ul></ul></ul>
+<ul style="margin-top: 0cm;" type="square"><ul style="margin-top: 0cm;" type="square"><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_IRDA_AbortReceiveCpltCallback()<o:p></o:p></span></li></ul></ul></ul>
+<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     JPEG</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">&nbsp;update&nbsp;</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update the output data
+      management when&nbsp;HAL_JPEG_Pause() is performed during the last data
+      sending</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update JPEG_FIFO_SIZE
+      definition</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     RCC&nbsp;</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">update</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Enable PWR only if necessary
+      for LSE configuration in HAL_RCC_OscConfig() API</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL RTC</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US"> update<o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update
+      HAL_RTCEx_SetTimeStamp_IT() function implementation to clear RTC
+      Timestamp flag<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update
+      HAL_RTCEx_SetTamper_IT() function implementation for better management of
+      different RTC tampers flags<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update
+      HAL_RTCEx_SetWakeUpTimer_IT() function implementation to clear wake up
+      timer flag</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL SMARTCARD</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US"> update</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Rename NACKState to NACKEnable
+      in the SMARTCARD_InitTypeDef structure</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add macros for specific flag
+      clear <o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_SMARTCARD_CLEAR_FLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_SMARTCARD_CLEAR_PEFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_SMARTCARD_CLEAR_FEFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_SMARTCARD_CLEAR_NEFLAG()
+       <o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_CLEAR_OREFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">__HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_CLEAR_IDLEFLAG()<o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add new functions and call backs
+      for Transfer Abort<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_Abort()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_AbortTransmit()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_AbortReceive()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_Abort_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_AbortTransmit_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_AbortReceive_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_AbortCpltCallback()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_AbortTransmitCpltCallback()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">SMARTCARD_AbortReceiveCpltCallback()<o:p></o:p></span></li></ul></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL SPI</span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US"> update</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update SPI_EndRxTxTransaction() function to RX FiFo at the end of each transaction</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add HAL_SPI_STATE_ABORT in the
+      HAL_SPI_StateTypeDef enum<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Add new functions and call
+      backs for Transfer Abort<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_SPI_Abort ()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_SPI_Abort_IT()</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">HAL_SPI_AbortCpltCallback()<br></span></li></ul></ul></ul>
+
+<span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif; color: black;" lang="EN-US"></span>
+
+<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     UART </span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">update<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update HAL_UART_Receive_IT()
+      and HAL_UART_DMAStop() functions implementations to manage Parity error
+      interrupt<o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">HAL
+     USART </span></b><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;">update<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update HAL_USART_Init() function by removing the clear&nbsp;of CLKEN bit</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update HAL_USART_Receive_IT()
+      and HAL_USART_DMAStop() functions implementations to manage Parity error
+      interrupt<o:p></o:p></span></li></ul></ul>
+<ul style="margin-top: 0cm;" type="square"><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL USB</span> update</span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,sans-serif;" lang="EN-US">Update PENA bit clearing in
+      OTG_HPRT0 register</span><span style="font-size: 12pt; font-family: &quot;Times New Roman&quot;,serif;" lang="EN-US"><o:p></o:p></span></li></ul></ul>
+<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.1 / 01-July-2016</span></h3>
+<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
+Changes</span></u></b></p><ul style="margin-top: 0cm;" type="square"><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL DMA</span> update&nbsp;</span></li><ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana,sans-serif; font-size: 10pt;">Update HAL_DMA_PollForTransfer() function implementation to&nbsp;avoid early TIMEOUT error.</span> </li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL JPEG</span> update</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Update HAL_JPEG_ConfigEncoding() function to properly set the ImageHeight and ImageWidth</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL SPI</span> update</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Update SPI_DMATransmitReceiveCplt() function to properly handle the CRC and avoid conditional statement duplication<br></span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 22-April-2016</span></h3>
 <p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
 Changes</span></u></b></p><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Official release to add the support of <span style="font-weight: bold;">STM32F765xx, STM32F767xx, STM32F768xx, STM32F769xx, STM32F777xx, STM32F778xx</span> <span style="font-weight: bold;">and STM32F779xx</span> devices<br></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: Verdana,sans-serif; font-size: 10pt;">General updates 
 to fix known defects and enhancements implementation</span></li><li class="MsoNormal" style="margin: 4.5pt 0in; font-size: 12pt; font-family: 'Times New Roman',serif; color: black;"><span style="font-size: 10pt; font-family: Verdana,sans-serif;">Add new HAL drivers for<span class="Apple-converted-space"> </span><span style="font-weight: bold;">DFSDM, DSI<span class="Apple-converted-space">, JPEG </span></span>and<span class="Apple-converted-space"> </span><span style="font-weight: bold;">MDIOS<span class="Apple-converted-space"> </span></span>peripherals</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Enhance HAL delay and timebase implementation</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"></span><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Add new 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32_hal_legacy.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32_hal_legacy.h
index e7cb8812cc..8e0d3967bc 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32_hal_legacy.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32_hal_legacy.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32_hal_legacy.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   This file contains aliases definition for the STM32Cube HAL constants 
   *          macros and functions maintained for legacy purpose.
   ******************************************************************************
@@ -138,6 +138,7 @@
 #define COMP_EXTI_LINE_COMP5_EVENT     COMP_EXTI_LINE_COMP5
 #define COMP_EXTI_LINE_COMP6_EVENT     COMP_EXTI_LINE_COMP6
 #define COMP_EXTI_LINE_COMP7_EVENT     COMP_EXTI_LINE_COMP7
+#define COMP_LPTIMCONNECTION_ENABLED   COMP_LPTIMCONNECTION_IN1_ENABLED    /*!< COMPX output is connected to LPTIM input 1 */
 #define COMP_OUTPUT_COMP6TIM2OCREFCLR  COMP_OUTPUT_COMP6_TIM2OCREFCLR
 #if defined(STM32F373xC) || defined(STM32F378xx)
 #define COMP_OUTPUT_TIM3IC1            COMP_OUTPUT_COMP1_TIM3IC1
@@ -150,6 +151,9 @@
 #define COMP_NONINVERTINGINPUT_IO1      COMP_INPUT_PLUS_IO1
 #define COMP_NONINVERTINGINPUT_IO2      COMP_INPUT_PLUS_IO2
 #define COMP_NONINVERTINGINPUT_IO3      COMP_INPUT_PLUS_IO3
+#define COMP_NONINVERTINGINPUT_IO4      COMP_INPUT_PLUS_IO4
+#define COMP_NONINVERTINGINPUT_IO5      COMP_INPUT_PLUS_IO5
+#define COMP_NONINVERTINGINPUT_IO6      COMP_INPUT_PLUS_IO6
  
 #define COMP_INVERTINGINPUT_1_4VREFINT  COMP_INPUT_MINUS_1_4VREFINT
 #define COMP_INVERTINGINPUT_1_2VREFINT  COMP_INPUT_MINUS_1_2VREFINT
@@ -160,8 +164,16 @@
 #define COMP_INVERTINGINPUT_DAC1        COMP_INPUT_MINUS_DAC1_CH1
 #define COMP_INVERTINGINPUT_DAC2        COMP_INPUT_MINUS_DAC1_CH2
 #define COMP_INVERTINGINPUT_IO1         COMP_INPUT_MINUS_IO1
+#if defined(STM32L0)
+/* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2),     */
+/* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding   */
+/* to the second dedicated IO (only for COMP2).                               */
+#define COMP_INVERTINGINPUT_IO2         COMP_INPUT_MINUS_DAC1_CH2
+#define COMP_INVERTINGINPUT_IO3         COMP_INPUT_MINUS_IO2
+#else
 #define COMP_INVERTINGINPUT_IO2         COMP_INPUT_MINUS_IO2
 #define COMP_INVERTINGINPUT_IO3         COMP_INPUT_MINUS_IO3
+#endif
 #define COMP_INVERTINGINPUT_IO4         COMP_INPUT_MINUS_IO4
 #define COMP_INVERTINGINPUT_IO5         COMP_INPUT_MINUS_IO5
 
@@ -344,6 +356,7 @@
 #define OB_RDP_LEVEL0                 OB_RDP_LEVEL_0
 #define OB_RDP_LEVEL1                 OB_RDP_LEVEL_1
 #define OB_RDP_LEVEL2                 OB_RDP_LEVEL_2
+
 /**
   * @}
   */
@@ -841,6 +854,8 @@
 #define __DIVFRAQ_SAMPLING8             UART_DIVFRAQ_SAMPLING8
 #define __UART_BRR_SAMPLING8            UART_BRR_SAMPLING8
 
+#define __DIV_LPUART                    UART_DIV_LPUART
+
 #define UART_WAKEUPMETHODE_IDLELINE     UART_WAKEUPMETHOD_IDLELINE
 #define UART_WAKEUPMETHODE_ADDRESSMARK  UART_WAKEUPMETHOD_ADDRESSMARK
 
@@ -2637,10 +2652,22 @@
 
 #define RCC_IT_HSI14                RCC_IT_HSI14RDY
 
-#if defined(STM32L0)
-#define RCC_IT_LSECSS              RCC_IT_CSSLSE 
-#define RCC_IT_CSS                 RCC_IT_CSSHSE
-#endif
+#define RCC_IT_CSSLSE               RCC_IT_LSECSS
+#define RCC_IT_CSSHSE               RCC_IT_CSS
+
+#define RCC_PLLMUL_3                RCC_PLL_MUL3
+#define RCC_PLLMUL_4                RCC_PLL_MUL4
+#define RCC_PLLMUL_6                RCC_PLL_MUL6
+#define RCC_PLLMUL_8                RCC_PLL_MUL8
+#define RCC_PLLMUL_12               RCC_PLL_MUL12
+#define RCC_PLLMUL_16               RCC_PLL_MUL16
+#define RCC_PLLMUL_24               RCC_PLL_MUL24
+#define RCC_PLLMUL_32               RCC_PLL_MUL32
+#define RCC_PLLMUL_48               RCC_PLL_MUL48
+
+#define RCC_PLLDIV_2                RCC_PLL_DIV2
+#define RCC_PLLDIV_3                RCC_PLL_DIV3
+#define RCC_PLLDIV_4                RCC_PLL_DIV4
 
 #define IS_RCC_MCOSOURCE            IS_RCC_MCO1SOURCE
 #define __HAL_RCC_MCO_CONFIG        __HAL_RCC_MCO1_CONFIG
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.c
index 4048d4d0ec..9d917614bd 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   HAL module driver.
   *          This is the common part of the HAL initialization
   *
@@ -68,11 +68,11 @@
   * @{
   */
 /**
- * @brief STM32F7xx HAL Driver version number V1.1.0
+ * @brief STM32F7xx HAL Driver version number V1.1.2
    */
 #define __STM32F7xx_HAL_VERSION_MAIN   (0x01) /*!< [31:24] main version */
 #define __STM32F7xx_HAL_VERSION_SUB1   (0x01) /*!< [23:16] sub1 version */
-#define __STM32F7xx_HAL_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32F7xx_HAL_VERSION_SUB2   (0x02) /*!< [15:8]  sub2 version */
 #define __STM32F7xx_HAL_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32F7xx_HAL_VERSION         ((__STM32F7xx_HAL_VERSION_MAIN << 24)\
                                         |(__STM32F7xx_HAL_VERSION_SUB1 << 16)\
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.h
index 23a1881e5b..9ccadf14cc 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   This file contains all the functions prototypes for the HAL 
   *          module driver.
   ******************************************************************************
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.c
index 8f9028a5f6..2bf59480f7 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_adc.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   This file provides firmware functions to manage the following 
   *          functionalities of the Analog to Digital Convertor (ADC) peripheral:
   *           + Initialization and de-initialization functions
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.h
index 35ae67cb7b..84b30b50a7 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_adc.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of ADC HAL extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.c
index 4cb8ca8c5d..6924d01990 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_adc_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   This file provides firmware functions to manage the following 
   *          functionalities of the ADC extension peripheral:
   *           + Extended features functions
@@ -804,7 +804,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
   assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
 #endif /* USE_FULL_ASSERT  */
 
-  if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START)
+  if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
   {
     assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
   }
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.h
index 8b5c321c72..de4bf51c18 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_adc.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of ADC HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.c
index c60b11f11a..101d1c09f5 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_can.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CAN HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Controller Area Network (CAN) peripheral:
@@ -381,10 +381,12 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTy
 
   /* Initialisation mode for the filter */
   can_ip->FMR |= (uint32_t)CAN_FMR_FINIT;
-  
+
+#if defined (CAN2)  
   /* Select the start slave bank */
   can_ip->FMR &= ~((uint32_t)CAN_FMR_CAN2SB);
   can_ip->FMR |= (uint32_t)(sFilterConfig->BankNumber << 8);
+#endif
      
   /* Filter Deactivation */
   can_ip->FA1R &= ~(uint32_t)filternbrbitpos;
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.h
index 3fd25c5ccf..2c2ad21b0b 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_can.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_can.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of CAN HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.c
index 222eeb53b3..1214d723b2 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_cec.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CEC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the High Definition Multimedia Interface 
@@ -88,6 +88,7 @@
   * @{
   */
 #ifdef HAL_CEC_MODULE_ENABLED
+#if defined (CEC)
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
@@ -655,7 +656,8 @@ uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
 
 /**
   * @}
-  */  
+  */
+#endif /* CEC */
 #endif /* HAL_CEC_MODULE_ENABLED */
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.h
index e59cffff96..b542c52250 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cec.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_cec.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of CEC HAL module.
   ******************************************************************************
   * @attention
@@ -43,6 +43,8 @@
  extern "C" {
 #endif
 
+#if defined (CEC) 
+
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal_def.h"
 
@@ -737,7 +739,9 @@ uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
 /**
   * @}
   */ 
-  
+
+#endif /* CEC */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_conf.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_conf.h
index d329ae6db6..9260ccee56 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_conf.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_conf.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_conf.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   HAL configuration file.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.c
index 069c811774..e4e9c47209 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_cortex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CORTEX HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the CORTEX:
@@ -269,6 +269,46 @@ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
   */
 
 #if (__MPU_PRESENT == 1)
+/**
+  * @brief  Disables the MPU
+  * @retval None
+  */
+void HAL_MPU_Disable(void)
+{
+  /* Make sure outstanding transfers are done */
+  __DMB();
+
+  /* Disable fault exceptions */
+  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+  
+  /* Disable the MPU and clear the control register*/
+  MPU->CTRL = 0;
+}
+
+/**
+  * @brief  Enables the MPU
+  * @param  MPU_Control: Specifies the control mode of the MPU during hard fault, 
+  *          NMI, FAULTMASK and privileged access to the default memory 
+  *          This parameter can be one of the following values:
+  *            @arg MPU_HFNMI_PRIVDEF_NONE
+  *            @arg MPU_HARDFAULT_NMI
+  *            @arg MPU_PRIVILEGED_DEFAULT
+  *            @arg MPU_HFNMI_PRIVDEF
+  * @retval None
+  */
+void HAL_MPU_Enable(uint32_t MPU_Control)
+{
+  /* Enable the MPU */
+  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+  
+  /* Enable fault exceptions */
+  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+  
+  /* Ensure MPU setting take effects */
+  __DSB();
+  __ISB();
+}
+
 /**
   * @brief  Initializes and configures the Region and the memory to be protected.
   * @param  MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.h
index e85f140bb4..8cbffabdd9 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cortex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_cortex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of CORTEX HAL module.
   ******************************************************************************
   * @attention
@@ -291,6 +291,8 @@ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
  */
 /* Peripheral Control functions ***********************************************/
 #if (__MPU_PRESENT == 1)
+void HAL_MPU_Enable(uint32_t MPU_Control);
+void HAL_MPU_Disable(void);
 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
 #endif /* __MPU_PRESENT */
 uint32_t HAL_NVIC_GetPriorityGrouping(void);
@@ -401,53 +403,8 @@ void HAL_SYSTICK_Callback(void);
 #endif /* __MPU_PRESENT */
 
 /**                                                                          
-  * @}                                                                  
-  */                                                                            
-                                                                                   
-/* Private functions ---------------------------------------------------------*/   
-/** @defgroup CORTEX_Private_Functions CORTEX Private Functions
-  * @brief    CORTEX private  functions 
-  * @{
-  */
-
-#if (__MPU_PRESENT == 1)
-/**
-  * @brief  Disables the MPU
-  * @retval None
-  */
-__STATIC_INLINE void HAL_MPU_Disable(void)
-{
-  /* Disable fault exceptions */
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-  
-  /* Disable the MPU */
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-/**
-  * @brief  Enables the MPU
-  * @param  MPU_Control: Specifies the control mode of the MPU during hard fault, 
-  *          NMI, FAULTMASK and privileged access to the default memory 
-  *          This parameter can be one of the following values:
-  *            @arg MPU_HFNMI_PRIVDEF_NONE
-  *            @arg MPU_HARDFAULT_NMI
-  *            @arg MPU_PRIVILEGED_DEFAULT
-  *            @arg MPU_HFNMI_PRIVDEF
-  * @retval None
-  */
-__STATIC_INLINE void HAL_MPU_Enable(uint32_t MPU_Control)
-{
-  /* Enable the MPU */
-  MPU->CTRL   = MPU_Control | MPU_CTRL_ENABLE_Msk;
-  
-  /* Enable fault exceptions */
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-}
-#endif /* __MPU_PRESENT */
-
-/**
   * @}
-  */
+  */                                                                            
 
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.c
index c8f357bd23..df41c2b680 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_crc.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CRC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Cyclic Redundancy Check (CRC) peripheral:
@@ -214,6 +214,9 @@ HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
   
   /* Reset CRC calculation unit */
   __HAL_CRC_DR_RESET(hcrc);
+  
+  /* Reset IDR register content */
+  CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR);
 
   /* DeInit the low level hardware */
   HAL_CRC_MspDeInit(hcrc);
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.h
index 29a573a098..7b276565b5 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_crc.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of CRC HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.c
index 14a187b8bc..85e7d0ee3e 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_crc_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Extended CRC HAL module driver.
   *    
   *          This file provides firmware functions to manage the following 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.h
index c3fff76877..cff90c2ec6 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_crc_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_crc_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of CRC HAL extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.c
index 8943fbbaa9..affe5040d3 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_cryp.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   CRYP HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Cryptography (CRYP) peripheral:
@@ -100,18 +100,18 @@
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal.h"
 
+#ifdef HAL_CRYP_MODULE_ENABLED
+
+#if defined (CRYP)
+
 /** @addtogroup STM32F7xx_HAL_Driver
   * @{
   */
-#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
 /** @defgroup CRYP CRYP
   * @brief CRYP HAL module driver.
   * @{
   */
 
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
 /** @addtogroup CRYP_Private_define
@@ -3808,16 +3808,14 @@ HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
 /**
   * @}
   */
+/**
+  * @}
+  */
+/**
+  * @}
+  */
+#endif /* CRYP */
 
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
-
-/**
-  * @}
-  */
-#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
-/**
-  * @}
-  */
-
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.h
index 83e191b34c..33ae4893f2 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_cryp.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of CRYP HAL module.
   ******************************************************************************
   * @attention
@@ -43,10 +43,10 @@
  extern "C" {
 #endif
 
-#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal_def.h"
 
+#if defined (CRYP)
 /** @addtogroup STM32F7xx_HAL_Driver
   * @{
   */
@@ -521,7 +521,7 @@ HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp);
   * @}
   */ 
 
-#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
+#endif /* CRYP */
 
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.c
index 71de5aa6bd..d13c690787 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_cryp_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Extended CRYP HAL module driver
   *          This file provides firmware functions to manage the following 
   *          functionalities of CRYP extension peripheral:
@@ -102,7 +102,6 @@
 /** @addtogroup STM32F7xx_HAL_Driver
   * @{
   */
-#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
 /** @defgroup CRYPEx CRYPEx
   * @brief CRYP Extension HAL module driver.
   * @{
@@ -111,6 +110,8 @@
 
 #ifdef HAL_CRYP_MODULE_ENABLED
 
+#if defined (CRYP)
+
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
 /** @addtogroup CRYPEx_Private_define
@@ -3027,12 +3028,15 @@ void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp)
 /**
   * @}
   */
+  
+#endif /* CRYP */
+  
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 /**
   * @}
   */
-#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
+
 /**
   * @}
   */
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.h
index f3b2425da0..b57efa4aba 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_cryp_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_cryp_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of CRYP HAL Extension module.
   ******************************************************************************
   * @attention
@@ -43,10 +43,11 @@
  extern "C" {
 #endif
 
-#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal_def.h"
 
+#if defined (CRYP)
+
 /** @addtogroup STM32F7xx_HAL_Driver
   * @{
   */
@@ -206,7 +207,8 @@ void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp);
   * @}
   */ 
 
-#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
+#endif /* CRYP */
+
 
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.c
index ab83cf7e3d..45623d94f5 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dac.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   DAC HAL module driver.
   *         This file provides firmware functions to manage the following 
   *         functionalities of the Digital to Analog Converter (DAC) peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.h
index e7cf931bb0..073b38ce10 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dac.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DAC HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.c
index 2a6014aca4..dadf2cbf97 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dac_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Extended DAC HAL module driver.
   *         This file provides firmware functions to manage the following 
   *         functionalities of DAC extension peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.h
index 668c0a1473..29d118fd34 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dac_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dac.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DAC HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.c
index 9a3169082b..e00732de96 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dcmi.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   DCMI HAL module driver
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Digital Camera Interface (DCMI) peripheral:
@@ -102,6 +102,7 @@
   */
 
 #ifdef HAL_DCMI_MODULE_ENABLED
+#if defined (DCMI)
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
@@ -892,6 +893,7 @@ static void DCMI_DMAError(DMA_HandleTypeDef *hdma)
 /**
   * @}
   */
+#endif /* DCMI */
 #endif /* HAL_DCMI_MODULE_ENABLED */
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.h
index 798286c733..a96fc9bd8a 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dcmi.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DCMI HAL module.
   ******************************************************************************
   * @attention
@@ -43,6 +43,8 @@
  extern "C" {
 #endif
 
+#if defined (DCMI)
+
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal_def.h"
  
@@ -615,6 +617,7 @@ uint32_t              HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
 /**
   * @}
   */ 
+#endif /* DCMI */
 
 #ifdef __cplusplus
 }
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.c
index d4b1578ca0..4a956bb5cb 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dcmi_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Empty file; This file is no longer used to handle the Black&White
   *          feature. Its content is now moved to common files
   *          (stm32f7xx_hal_dcmi.c/.h) as there's no device's dependency within F7
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.h
index 4a037e4f33..914dab5d8f 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dcmi_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dcmi_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DCMI Extension HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h
index 2919b4dfef..f7843f84a2 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_def.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   This file contains HAL common defines, enumeration, macros and 
   *          structures definitions. 
   ******************************************************************************
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.c
index d0b51cf3d1..ce18015f38 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dfsdm.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   This file provides firmware functions to manage the following 
   *          functionalities of the Digital Filter for Sigma-Delta Modulators
   *          (DFSDM) peripherals:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.h
index 802165951e..9c913f5243 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dfsdm.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dfsdm.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DFSDM HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.c
index 54c4e43eda..cbe50bcece 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dma.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   DMA HAL module driver.
   *    
   *          This file provides firmware functions to manage the following 
@@ -19,21 +19,25 @@
    (#) Enable and configure the peripheral to be connected to the DMA Stream
        (except for internal SRAM/FLASH memories: no initialization is 
        necessary) please refer to Reference manual for connection between peripherals
-       and DMA requests . 
+       and DMA requests. 
           
    (#) For a given Stream, program the required configuration through the following parameters:   
        Transfer Direction, Source and Destination data formats, 
        Circular, Normal or peripheral flow control mode, Stream Priority level, 
        Source and Destination Increment mode, FIFO mode and its Threshold (if needed), 
        Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function.
+   
+   -@-   Prior to HAL_DMA_Init() the clock must be enabled for DMA through the following macros:
+         __HAL_RCC_DMA1_CLK_ENABLE() or __HAL_RCC_DMA2_CLK_ENABLE().
                      
      *** Polling mode IO operation ***
      =================================   
     [..] 
           (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source 
-              address and destination address and the Length of data to be transferred
+              address and destination address and the Length of data to be transferred.
           (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this  
               case a fixed Timeout can be configured by User depending from his application.
+          (+) Use HAL_DMA_Abort() function to abort the current transfer.
                
      *** Interrupt mode IO operation ***    
      =================================== 
@@ -51,7 +55,7 @@
      (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error 
          detection.
          
-     (#) Use HAL_DMA_Abort() function to abort the current transfer
+     (#) Use HAL_DMA_Abort_IT() function to abort the current transfer
      
      -@-   In Memory-to-Memory transfer mode, Circular mode is not allowed.
     
@@ -72,9 +76,6 @@
        
       (+) __HAL_DMA_ENABLE: Enable the specified DMA Stream.
       (+) __HAL_DMA_DISABLE: Disable the specified DMA Stream.
-      (+) __HAL_DMA_GET_FS: Return the current DMA Stream FIFO filled level.
-      (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Stream interrupts.
-      (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Stream interrupts.
       (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Stream interrupt has occurred or not. 
      
      [..] 
@@ -335,6 +336,9 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
     /* Return error status */
     return HAL_BUSY;
   }
+  
+  /* Check the parameters */
+  assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
 
   /* Disable the selected DMA Streamx */
   __HAL_DMA_DISABLE(hdma);
@@ -613,13 +617,21 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
 {
   HAL_StatusTypeDef status = HAL_OK; 
-  uint32_t temp;
+  uint32_t mask_cpltlevel;
   uint32_t tickstart = HAL_GetTick(); 
   uint32_t tmpisr;
   
   /* calculate DMA base and stream number */
   DMA_Base_Registers *regs;
   
+  if(HAL_DMA_STATE_BUSY != hdma->State)
+  {
+    /* No transfer ongoing */
+    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
+    __HAL_UNLOCK(hdma);
+    return HAL_ERROR;
+  }
+  
   /* Polling mode not supported in circular mode and double buffering mode */
   if ((hdma->Instance->CR & DMA_SxCR_CIRC) != RESET)
   {
@@ -631,18 +643,18 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
   if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
   {
     /* Transfer Complete flag */
-    temp = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
+    mask_cpltlevel = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
   }
   else
   {
     /* Half Transfer Complete flag */
-    temp = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
+    mask_cpltlevel = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
   }
   
   regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
   tmpisr = regs->ISR;
   
-  while((tmpisr & temp) == RESET )
+  while(((tmpisr & mask_cpltlevel) == RESET) && ((hdma->ErrorCode & HAL_DMA_ERROR_TE) == RESET))
   {
     /* Check for the Timeout (Not applicable in circular mode)*/
     if(Timeout != HAL_MAX_DELAY)
@@ -662,6 +674,9 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
       }
     }
     
+    /* Get the ISR register value */
+    tmpisr = regs->ISR;
+    
     if((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)
     {
       /* Update error code */
@@ -707,8 +722,6 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
 
       return HAL_ERROR;
    }
-
-   status = HAL_ERROR;
   }
   
   /* Get the level transfer complete flag */
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.h
index 69a1a431af..7e9e4a54f2 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dma.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DMA HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.c
index d3ca0b2412..084a23e6fd 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dma2d.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   DMA2D HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the DMA2D peripheral:
@@ -138,6 +138,7 @@
   */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
+#if defined (DMA2D)
 
 /* Private types -------------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
@@ -589,8 +590,8 @@ HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
 
   /* Abort the DMA2D transfer */
   /* START bit is reset to make sure not to set it again, in the event the HW clears it
-     between the register read and the register write by the CPU (writing ‘0’ has no 
-     effect on START bitvalue). */
+     between the register read and the register write by the CPU (writing 0 has no 
+     effect on START bitvalue) */
    MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_ABORT|DMA2D_CR_START, DMA2D_CR_ABORT);
 
   /* Get tick */
@@ -638,7 +639,7 @@ HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
 
   /* Suspend the DMA2D transfer */
   /* START bit is reset to make sure not to set it again, in the event the HW clears it
-     between the register read and the register write by the CPU (writing ‘0’ has no 
+     between the register read and the register write by the CPU (writing 0 has no 
      effect on START bitvalue). */
   MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_SUSP|DMA2D_CR_START, DMA2D_CR_SUSP);
 
@@ -693,7 +694,7 @@ HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
 
   /* Resume the DMA2D transfer */
   /* START bit is reset to make sure not to set it again, in the event the HW clears it
-     between the register read and the register write by the CPU (writing ‘0’ has no 
+     between the register read and the register write by the CPU (writing 0 has no 
      effect on START bitvalue). */
   CLEAR_BIT(hdma2d->Instance->CR, (DMA2D_CR_SUSP|DMA2D_CR_START));  
 
@@ -1750,6 +1751,7 @@ static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_
 /**
   * @}
   */
+#endif /* DMA2D */
 #endif /* HAL_DMA2D_MODULE_ENABLED */
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.h
index 1bf1fed0cb..1e4a139622 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma2d.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dma2d.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DMA2D HAL module.
   ******************************************************************************
   * @attention
@@ -43,6 +43,8 @@
  extern "C" {
 #endif
 
+#if defined (DMA2D)
+
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal_def.h"
 
@@ -624,6 +626,7 @@ uint32_t               HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
   * @}
   */
 
+#endif /* DMA2D */
 
 #ifdef __cplusplus
 }
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.c
index 165b6791db..4fcaf50701 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dma_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   DMA Extension HAL module driver
   *         This file provides firmware functions to manage the following 
   *         functionalities of the DMA Extension peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.h
index 1006992dc6..f2f3a4f9b6 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dma_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dma_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DMA HAL extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.c
index 785795d217..d60ec186d3 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dsi.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   DSI HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the DSI peripheral:
@@ -222,7 +222,7 @@ HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef *hdsi, DSI_PLLInitTypeDef *PLLI
   
     /* Set the TX escape clock division factor */
     hdsi->Instance->CCR &= ~DSI_CCR_TXECKDIV;
-    hdsi->Instance->CCR = hdsi->Init.TXEscapeCkdiv;
+    hdsi->Instance->CCR |= hdsi->Init.TXEscapeCkdiv;
     
     /* Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4) */
     /* The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 )          */
@@ -1005,7 +1005,7 @@ HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef *hdsi, DSI_HOST_T
   
   /* Set the timeout clock division factor */
   hdsi->Instance->CCR &= ~DSI_CCR_TOCKDIV;
-  hdsi->Instance->CCR = ((HostTimeouts->TimeoutCkdiv)<<8);
+  hdsi->Instance->CCR |= ((HostTimeouts->TimeoutCkdiv)<<8);
   
   /* High-speed transmission timeout */
   hdsi->Instance->TCCR[0] &= ~DSI_TCCR0_HSTX_TOCNT;
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.h
index 5e8a3007ba..3d30437402 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_dsi.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_dsi.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of DSI HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.c
index 4d3b009ef3..f250a98992 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_eth.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   ETH HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Ethernet (ETH) peripheral:
@@ -108,6 +108,7 @@
   */
 
 #ifdef HAL_ETH_MODULE_ENABLED
+#if defined (ETH)
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
@@ -2031,6 +2032,7 @@ static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth)
   * @}
   */
 
+#endif /* ETH */
 #endif /* HAL_ETH_MODULE_ENABLED */
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.h
index c674c60014..970b4152c7 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_eth.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of ETH HAL module.
   ******************************************************************************
   * @attention
@@ -43,6 +43,8 @@
  extern "C" {
 #endif
 
+#if defined (ETH)   
+
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal_def.h"
 
@@ -692,7 +694,7 @@ typedef struct
 
 /* 5 Ethernet driver receive buffers are used (in a chained linked list)*/ 
 #ifndef ETH_RXBUFNB
- #define ETH_RXBUFNB             ((uint32_t)5U     /*  5 Rx buffers of size ETH_RX_BUF_SIZE */
+ #define ETH_RXBUFNB             ((uint32_t)5U)     /*  5 Rx buffers of size ETH_RX_BUF_SIZE */
 #endif
 
 
@@ -719,7 +721,7 @@ typedef struct
 
 /* 5 Ethernet driver transmit buffers are used (in a chained linked list)*/ 
 #ifndef ETH_TXBUFNB
- #define ETH_TXBUFNB             ((uint32_t)5U      /* 5  Tx buffers of size ETH_TX_BUF_SIZE */
+ #define ETH_TXBUFNB             ((uint32_t)5U)      /* 5  Tx buffers of size ETH_TX_BUF_SIZE */
 #endif
 
  /**
@@ -2169,6 +2171,8 @@ HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth);
 /**
   * @}
   */
+#endif /* ETH */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.c
index 59fe163b70..7ac109eb6d 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_flash.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   FLASH HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the internal FLASH memory:
@@ -327,6 +327,9 @@ void HAL_FLASH_IRQHandler(void)
   /* Check FLASH End of Operation flag  */
   if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET)
   {
+    /* Clear FLASH End of Operation pending bit */
+    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
+    
     switch (pFlash.ProcedureOnGoing)
     {
       case FLASH_PROC_SECTERASE :
@@ -341,9 +344,6 @@ void HAL_FLASH_IRQHandler(void)
           /* Indicate user which sector has been erased */
           HAL_FLASH_EndOfOperationCallback(temp);
 
-          /* Clear pending flags (if any) */  
-          __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);  
-
           /* Increment sector number */
           temp = ++pFlash.Sector;
           FLASH_Erase_Sector(temp, pFlash.VoltageForErase);
@@ -357,8 +357,6 @@ void HAL_FLASH_IRQHandler(void)
           HAL_FLASH_EndOfOperationCallback(temp);
           /* Sector Erase procedure is completed */
           pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-          /* Clear FLASH End of Operation pending bit */
-          __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
         }
         break;
       }
@@ -370,8 +368,6 @@ void HAL_FLASH_IRQHandler(void)
         HAL_FLASH_EndOfOperationCallback(0);
         /* MAss Erase procedure is completed */
         pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-        /* Clear FLASH End of Operation pending bit */
-        __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
         break;
       }
 
@@ -382,8 +378,6 @@ void HAL_FLASH_IRQHandler(void)
         HAL_FLASH_EndOfOperationCallback(pFlash.Address);
         /* Programming procedure is completed */
         pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
-        /* Clear FLASH End of Operation pending bit */
-        __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
         break;
       }
       default :
@@ -392,7 +386,7 @@ void HAL_FLASH_IRQHandler(void)
   }
   
   /* Check FLASH operation error flags */
-  if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR  | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR )) != RESET)
+  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_ALL_ERRORS) != RESET)
   {
     switch (pFlash.ProcedureOnGoing)
     {
@@ -423,8 +417,6 @@ void HAL_FLASH_IRQHandler(void)
 
     /* FLASH error interrupt user callback */
     HAL_FLASH_OperationErrorCallback(temp);
-    /* Clear FLASH error pending bits */
-    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPERR  | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR );
 
     /*Stop the procedure ongoing */
     pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
@@ -641,13 +633,19 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
     } 
   }
   
-  if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
-                           FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR )) != RESET)
+  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_ALL_ERRORS) != RESET)
   {
     /*Save the error code*/
     FLASH_SetErrorCode();
     return HAL_ERROR;
   }
+  
+  /* Check FLASH End of Operation flag  */
+  if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET)
+  {
+    /* Clear FLASH End of Operation pending bit */
+    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
+  }
 
   /* If there is an error flag set */
   return HAL_OK;
@@ -777,7 +775,12 @@ static void FLASH_Program_Byte(uint32_t Address, uint8_t Data)
   * @retval None
   */
 static void FLASH_SetErrorCode(void)
-{ 
+{
+  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR) != RESET)
+  {
+    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPERATION;
+  }
+  
   if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) != RESET)
   {
    pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
@@ -798,10 +801,8 @@ static void FLASH_SetErrorCode(void)
     pFlash.ErrorCode |= HAL_FLASH_ERROR_ERS;
   }
   
-  if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR) != RESET)
-  {
-    pFlash.ErrorCode |= HAL_FLASH_ERROR_OPERATION;
-  }
+  /* Clear error programming flags */
+  __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
 }
 
 /**
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.h
index cad67d6594..acb2afa98d 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_flash.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of FLASH HAL module.
   ******************************************************************************
   * @attention
@@ -136,7 +136,11 @@ typedef struct
 #define FLASH_FLAG_PGAERR              FLASH_SR_PGAERR         /*!< FLASH Programming Alignment error flag    */
 #define FLASH_FLAG_PGPERR              FLASH_SR_PGPERR         /*!< FLASH Programming Parallelism error flag  */
 #define FLASH_FLAG_ERSERR              FLASH_SR_ERSERR         /*!< FLASH Erasing Sequence error flag         */
-#define FLASH_FLAG_BSY                 FLASH_SR_BSY            /*!< FLASH Busy flag                           */ 
+#define FLASH_FLAG_BSY                 FLASH_SR_BSY            /*!< FLASH Busy flag                           */
+
+
+#define FLASH_FLAG_ALL_ERRORS     (FLASH_FLAG_OPERR   | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
+                                   FLASH_FLAG_PGPERR  | FLASH_FLAG_ERSERR)
 /**
   * @}
   */
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.c
index ab5bd9b78f..47d0a6c9ee 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_flash_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Extended FLASH HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the FLASH extension peripheral:
@@ -90,8 +90,8 @@
 /** @addtogroup FLASHEx_Private_Constants
   * @{
   */    
-#define SECTOR_MASK               ((uint32_t)0xFFFFFF07)
-#define FLASH_TIMEOUT_VALUE       ((uint32_t)50000)/* 50 s */
+#define SECTOR_MASK               0xFFFFFF07U
+#define FLASH_TIMEOUT_VALUE       50000U/* 50 s */
 /**
   * @}
   */
@@ -774,7 +774,7 @@ static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint3
 static uint32_t FLASH_OB_GetUser(void)
 {
   /* Return the User Option Byte */
-  return ((uint32_t)(FLASH->OPTCR & 0xC00000F0));
+  return ((uint32_t)(FLASH->OPTCR & 0xC00000F0U));
 }
 #endif /* FLASH_OPTCR_nDBANK */
 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.h
index 94a452b659..213dcde793 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_flash_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_flash_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of FLASH HAL Extension module.
   ******************************************************************************
   * @attention
@@ -540,7 +540,7 @@ void              HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
                                  ((SECTOR) == FLASH_SECTOR_4)   || ((SECTOR) == FLASH_SECTOR_5)   ||\
                                  ((SECTOR) == FLASH_SECTOR_6)   || ((SECTOR) == FLASH_SECTOR_7))
 
-#define IS_OB_WRP_SECTOR(SECTOR)  ((((SECTOR) & (uint32_t)0xFF00FFFF) == 0x00000000U) && ((SECTOR) != 0x00000000U))
+#define IS_OB_WRP_SECTOR(SECTOR)  ((((SECTOR) & 0xFF00FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U))
 #endif /* FLASH_SECTOR_TOTAL == 8 */
 
 #if (FLASH_SECTOR_TOTAL == 24)
@@ -557,7 +557,7 @@ void              HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
                                  ((SECTOR) == FLASH_SECTOR_20)  || ((SECTOR) == FLASH_SECTOR_21)  ||\
                                  ((SECTOR) == FLASH_SECTOR_22)  || ((SECTOR) == FLASH_SECTOR_23))
 
-#define IS_OB_WRP_SECTOR(SECTOR)  ((((SECTOR) & (uint32_t)0xF000FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U))
+#define IS_OB_WRP_SECTOR(SECTOR)  ((((SECTOR) & 0xF000FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U))
 #endif /* FLASH_SECTOR_TOTAL == 24 */
 
 #if defined (FLASH_OPTCR_nDBANK)
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.c
index 5c77f4dde2..90d33c040f 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_gpio.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   GPIO HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.h
index f019772387..fb8748d329 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_gpio.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of GPIO HAL module.
   ******************************************************************************
   * @attention
@@ -280,7 +280,7 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
   * @{
   */
 #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
-#define IS_GPIO_PIN(PIN)           (((PIN) & GPIO_PIN_MASK ) != (uint32_t)0x00)
+#define IS_GPIO_PIN(__PIN__)        ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00))
 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT)              ||\
                             ((MODE) == GPIO_MODE_OUTPUT_PP)          ||\
                             ((MODE) == GPIO_MODE_OUTPUT_OD)          ||\
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio_ex.h
index 52c9fda3e6..c0b07ae68a 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_gpio_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of GPIO HAL Extension module.
   ******************************************************************************
   * @attention
@@ -64,7 +64,9 @@
 /** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
   * @{
   */  
-
+/*--------------- STM32F74xxx/STM32F75xxx/STM32F76xxx/STM32F77xxx -------------*/
+#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) ||\
+    defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)   
 /** 
   * @brief   AF 0 selection  
   */ 
@@ -188,7 +190,8 @@
 #define GPIO_AF10_SAI2          ((uint8_t)0xAU)  /* SAI2 Alternate Function mapping */
 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
 #define GPIO_AF10_DFSDM1         ((uint8_t)0x0AU)  /* DFSDM1 Alternate Function mapping  */
-#define GPIO_AF10_SDMMC2        ((uint8_t)0x0AU)  /* SDMMC2 Alternate Function mapping */   
+#define GPIO_AF10_SDMMC2         ((uint8_t)0x0AU)  /* SDMMC2 Alternate Function mapping */   
+#define GPIO_AF10_LTDC           ((uint8_t)0x0AU)  /* LCD-TFT Alternate Function mapping */
 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */   
 
 /** 
@@ -231,7 +234,8 @@
   * @brief   AF 15 selection  
   */ 
 #define GPIO_AF15_EVENTOUT      ((uint8_t)0x0FU)  /* EVENTOUT Alternate Function mapping */
-
+#endif /* STM32F745xx || STM32F746xx || STM32F756xx || STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
+/*----------------------------------------------------------------------------*/
 
 /**
   * @}
@@ -291,6 +295,8 @@
 /** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
   * @{
   */
+#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) ||\
+    defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
 #define GPIO_GET_INDEX(__GPIOx__)   (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
                                               ((__GPIOx__) == (GPIOB))? 1U :\
                                               ((__GPIOx__) == (GPIOC))? 2U :\
@@ -300,7 +306,9 @@
                                               ((__GPIOx__) == (GPIOG))? 6U :\
                                               ((__GPIOx__) == (GPIOH))? 7U :\
                                               ((__GPIOx__) == (GPIOI))? 8U :\
-                                              ((__GPIOx__) == (GPIOJ))? 9U : 10U)			
+                                              ((__GPIOx__) == (GPIOJ))? 9U : 10U)
+#endif /* STM32F745xx || STM32F746xx || STM32F756xx || STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
+
 /**
   * @}
   */
@@ -352,9 +360,9 @@
                           ((AF) == GPIO_AF12_FMC)       || ((AF) == GPIO_AF15_EVENTOUT)  || \
                           ((AF) == GPIO_AF13_DCMI)      || ((AF) == GPIO_AF14_LTDC))
 #elif defined(STM32F745xx)
-#define IS_GPIO_AF(AF)   (((AF) == GPIO_AF0_RTC_50Hz)   || ((AF) == GPIO_AF1_TIM1)        || \
+#define IS_GPIO_AF(AF)   (((AF) == GPIO_AF0_RTC_50Hz)   || ((AF) == GPIO_AF1_TIM1)       || \
                           ((AF) == GPIO_AF0_SWJ)        || ((AF) == GPIO_AF0_TRACE)      || \
-                          ((AF) == GPIO_AF0_MCO)       || ((AF) == GPIO_AF1_TIM2)       || \
+                          ((AF) == GPIO_AF0_MCO)       || ((AF) == GPIO_AF1_TIM2)        || \
                           ((AF) == GPIO_AF2_TIM3)       || ((AF) == GPIO_AF2_TIM4)       || \
                           ((AF) == GPIO_AF2_TIM5)       || ((AF) == GPIO_AF3_TIM8)       || \
                           ((AF) == GPIO_AF3_TIM9)       || ((AF) == GPIO_AF3_TIM10)      || \
@@ -379,7 +387,7 @@
                           ((AF) == GPIO_AF13_DCMI)      || ((AF) == GPIO_AF10_OTG_FS)    || \
                           ((AF) == GPIO_AF10_OTG_HS)    || ((AF) == GPIO_AF10_SAI2)      || \
                           ((AF) == GPIO_AF10_QUADSPI)   || ((AF) == GPIO_AF11_ETH)       || \
-                          ((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1)     || \
+                          ((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1)    || \
                           ((AF) == GPIO_AF12_FMC)       || ((AF) == GPIO_AF15_EVENTOUT))
 #elif defined(STM32F767xx) || defined(STM32F777xx)
 #define IS_GPIO_AF(AF)   (((AF) == GPIO_AF0_RTC_50Hz)   || ((AF) == GPIO_AF1_TIM1)        || \
@@ -409,10 +417,11 @@
                           ((AF) == GPIO_AF10_OTG_FS)    || ((AF) == GPIO_AF9_LTDC)       || \
                           ((AF) == GPIO_AF10_OTG_HS)    || ((AF) == GPIO_AF10_SAI2)      || \
                           ((AF) == GPIO_AF10_QUADSPI)   || ((AF) == GPIO_AF11_ETH)       || \
+                          ((AF) == GPIO_AF10_SDMMC2)    || ((AF) == GPIO_AF11_SDMMC2)    || \
                           ((AF) == GPIO_AF11_CAN3)      || ((AF) == GPIO_AF12_OTG_HS_FS) || \
                           ((AF) == GPIO_AF12_SDMMC1)    || ((AF) == GPIO_AF12_FMC)       || \
                           ((AF) == GPIO_AF15_EVENTOUT)  || ((AF) == GPIO_AF13_DCMI)      || \
-						  ((AF) == GPIO_AF14_LTDC))
+		                  ((AF) == GPIO_AF14_LTDC))
 #elif defined(STM32F769xx) || defined(STM32F779xx)
 #define IS_GPIO_AF(AF)   (((AF) == GPIO_AF0_RTC_50Hz)   || ((AF) == GPIO_AF1_TIM1)        || \
                           ((AF) == GPIO_AF0_SWJ)        || ((AF) == GPIO_AF0_TRACE)      || \
@@ -441,6 +450,7 @@
                           ((AF) == GPIO_AF9_LTDC)       || ((AF) == GPIO_AF10_OTG_FS)    || \
                           ((AF) == GPIO_AF10_OTG_HS)    || ((AF) == GPIO_AF10_SAI2)      || \
                           ((AF) == GPIO_AF10_QUADSPI)   || ((AF) == GPIO_AF11_ETH)       || \
+                          ((AF) == GPIO_AF10_SDMMC2)    || ((AF) == GPIO_AF11_SDMMC2)    || \
                           ((AF) == GPIO_AF11_CAN3)      || ((AF) == GPIO_AF12_OTG_HS_FS) || \
                           ((AF) == GPIO_AF12_SDMMC1)    || ((AF) == GPIO_AF12_FMC)       || \
                           ((AF) == GPIO_AF15_EVENTOUT)  || ((AF) == GPIO_AF13_DCMI)      || \
@@ -472,6 +482,7 @@
                           ((AF) == GPIO_AF9_TIM14)      || ((AF) == GPIO_AF9_QUADSPI)    || \
                           ((AF) == GPIO_AF10_OTG_HS)    || ((AF) == GPIO_AF10_SAI2)      || \
                           ((AF) == GPIO_AF10_QUADSPI)   || ((AF) == GPIO_AF11_ETH)       || \
+                          ((AF) == GPIO_AF10_SDMMC2)    || ((AF) == GPIO_AF11_SDMMC2)    || \
                           ((AF) == GPIO_AF11_CAN3)      || ((AF) == GPIO_AF12_OTG_HS_FS) || \
                           ((AF) == GPIO_AF12_SDMMC1)    || ((AF) == GPIO_AF12_FMC)       || \
                           ((AF) == GPIO_AF15_EVENTOUT)  || ((AF) == GPIO_AF13_DCMI)      || \
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.c
index 5fad5d4fd4..dc6882c631 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_hash.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   HASH HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the HASH peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.h
index 24c9d4cc35..bbeee61865 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_hash.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of HASH HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.c
index e116825bef..5328b8351c 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_hash_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   HASH HAL Extension module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of HASH peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.h
index 27178fad2e..5109158a77 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hash_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_hash_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of HASH HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c
index 1ac92a912b..52c73f1f2d 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_hcd.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   HCD HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the USB Peripheral Controller:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.h
index 45b752b9bd..4653ef8a4d 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_hcd.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of HCD HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.c
index 2e985b34a1..8734d31f1a 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_i2c.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   I2C HAL module driver.
   *          This file provides firmware functions to manage the following
   *          functionalities of the Inter Integrated Circuit (I2C) peripheral:
@@ -98,6 +98,9 @@
       (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
       (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
                             and data to transfer without a final stop condition
+	  (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
+                            and data to transfer without a final stop condition, an then permit a call the same master sequential interface
+                            several times (like HAL_I2C_Master_Sequential_Transmit_IT() then HAL_I2C_Master_Sequential_Transmit_IT())
       (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
                             and with new data to transfer if the direction change or manage only the new data to transfer
                             if no direction change and without a final stop condition in both cases
@@ -284,15 +287,17 @@
 #define I2C_STATE_MEM_BUSY_TX     ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM))               /*!< Memory Busy TX, combinaison of State LSB and Mode enum */
 #define I2C_STATE_MEM_BUSY_RX     ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM))               /*!< Memory Busy RX, combinaison of State LSB and Mode enum */
 
-
 /* Private define to centralize the enable/disable of Interrupts */
-#define I2C_XFER_TX_IT          ((uint32_t)0x00000001)
-#define I2C_XFER_RX_IT          ((uint32_t)0x00000002)
-#define I2C_XFER_LISTEN_IT      ((uint32_t)0x00000004)
+#define I2C_XFER_TX_IT          ((uint32_t)0x00000001U)
+#define I2C_XFER_RX_IT          ((uint32_t)0x00000002U)
+#define I2C_XFER_LISTEN_IT      ((uint32_t)0x00000004U)
 
-#define I2C_XFER_ERROR_IT       ((uint32_t)0x00000011)
-#define I2C_XFER_CPLT_IT        ((uint32_t)0x00000012)
-#define I2C_XFER_RELOAD_IT      ((uint32_t)0x00000012)
+#define I2C_XFER_ERROR_IT       ((uint32_t)0x00000011U)
+#define I2C_XFER_CPLT_IT        ((uint32_t)0x00000012U)
+#define I2C_XFER_RELOAD_IT      ((uint32_t)0x00000012U)
+
+/* Private define Sequential Transfer Options default/reset value */
+#define I2C_NO_OPTION_FRAME     ((uint32_t)0xFFFF0000U)
 /**
   * @}
   */
@@ -400,13 +405,13 @@ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c,  uint16_t DevAddress, ui
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
-{ 
+{
   /* Check the I2C handle allocation */
   if(hi2c == NULL)
   {
     return HAL_ERROR;
   }
-  
+
   /* Check the parameters */
   assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
   assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
@@ -421,35 +426,34 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
   {
     /* Allocate lock resource and initialize it */
     hi2c->Lock = HAL_UNLOCKED;
-    
+
     /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
     HAL_I2C_MspInit(hi2c);
   }
 
   hi2c->State = HAL_I2C_STATE_BUSY;
-  
+
   /* Disable the selected I2C peripheral */
   __HAL_I2C_DISABLE(hi2c);
-  
+
   /*---------------------------- I2Cx TIMINGR Configuration ------------------*/
   /* Configure I2Cx: Frequency range */
   hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
-  
+
   /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
-  /* Configure I2Cx: Own Address1 and ack own address1 mode */
+  /* Disable Own Address1 before set the Own Address1 configuration */
   hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
-  if(hi2c->Init.OwnAddress1 != 0)
+
+  /* Configure I2Cx: Own Address1 and ack own address1 mode */
+  if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
   {
-    if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
-    {
-      hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
-    }
-    else /* I2C_ADDRESSINGMODE_10BIT */
-    {
-      hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
-    }
+    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
   }
-  
+  else /* I2C_ADDRESSINGMODE_10BIT */
+  {
+    hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
+  }
+
   /*---------------------------- I2Cx CR2 Configuration ----------------------*/
   /* Configure I2Cx: Addressing Master mode */
   if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
@@ -458,15 +462,18 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
   }
   /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
   hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
-  
+
   /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
+  /* Disable Own Address2 before set the Own Address2 configuration */
+  hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
+
   /* Configure I2Cx: Dual mode and Own Address2 */
   hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
 
   /*---------------------------- I2Cx CR1 Configuration ----------------------*/
   /* Configure I2Cx: Generalcall and NoStretch mode */
   hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
-  
+
   /* Enable the selected I2C peripheral */
   __HAL_I2C_ENABLE(hi2c);
   
@@ -613,7 +620,8 @@ __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
   * @brief  Transmits in master mode an amount of data in blocking mode.
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress: Target device address. The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @param  pData: Pointer to data buffer
   * @param  Size: Amount of data to be sent
   * @param  Timeout: Timeout duration
@@ -736,7 +744,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA
   * @brief  Receives in master mode an amount of data in blocking mode.
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress: Target device address. The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @param  pData: Pointer to data buffer
   * @param  Size: Amount of data to be sent
   * @param  Timeout: Timeout duration
@@ -1131,7 +1140,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData,
   * @brief  Transmit in master mode an amount of data in non-blocking mode with Interrupt
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress: Target device address. The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @param  pData: Pointer to data buffer
   * @param  Size: Amount of data to be sent
   * @retval HAL status
@@ -1199,7 +1209,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D
   * @brief  Receive in master mode an amount of data in non-blocking mode with Interrupt
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress: Target device address. The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @param  pData: Pointer to data buffer
   * @param  Size: Amount of data to be sent
   * @retval HAL status
@@ -1365,7 +1376,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa
   * @brief  Transmit in master mode an amount of data in non-blocking mode with DMA
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress: Target device address. The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @param  pData: Pointer to data buffer
   * @param  Size: Amount of data to be sent
   * @retval HAL status
@@ -1449,7 +1461,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t
   * @brief  Receive in master mode an amount of data in non-blocking mode with DMA
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress: Target device address. The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @param  pData: Pointer to data buffer
   * @param  Size: Amount of data to be sent
   * @retval HAL status
@@ -2510,7 +2523,8 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
   * @note   This interface allow to manage repeated start condition when a direction change during transfer
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress: Target device address. The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @param  pData: Pointer to data buffer
   * @param  Size: Amount of data to be sent
   * @param  XferOptions: Options of Transfer, value of @ref I2C_XFEROPTIONS
@@ -2575,7 +2589,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
   * @note   This interface allow to manage repeated start condition when a direction change during transfer
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress: Target device address. The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @param  pData: Pointer to data buffer
   * @param  Size: Amount of data to be sent
   * @param  XferOptions: Options of Transfer, value of @ref I2C_XFEROPTIONS
@@ -2826,7 +2841,8 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
   * @brief  Abort a master I2C IT or DMA process communication with Interrupt.
   * @param  hi2c: Pointer to a I2C_HandleTypeDef structure that contains
   *               the configuration information for the specified I2C.
-  * @param  DevAddress: Target device address
+  * @param  DevAddress Target device address: The device 7 bits address value
+  *         in datasheet must be shift at right before call interface
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.h
index d41ace7ca3..52bc36ac79 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_i2c.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of I2C HAL module.
   ******************************************************************************
   * @attention
@@ -247,8 +247,8 @@ typedef struct __I2C_HandleTypeDef
 /** @defgroup I2C_XFEROPTIONS  I2C Sequential Transfer Options
   * @{
   */
-#define I2C_NO_OPTION_FRAME             ((uint32_t)0xFFFF0000U)
 #define I2C_FIRST_FRAME                 ((uint32_t)I2C_SOFTEND_MODE)
+#define I2C_FIRST_AND_NEXT_FRAME        ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
 #define I2C_NEXT_FRAME                  ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
 #define I2C_FIRST_AND_LAST_FRAME        ((uint32_t)I2C_AUTOEND_MODE)
 #define I2C_LAST_FRAME                  ((uint32_t)I2C_AUTOEND_MODE)
@@ -660,6 +660,7 @@ uint32_t             HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
                                          ((REQUEST) == I2C_NO_STARTSTOP))
 
 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST)  (((REQUEST) == I2C_FIRST_FRAME)          || \
+                                                   ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
                                                    ((REQUEST) == I2C_NEXT_FRAME)           || \
                                                    ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
                                                    ((REQUEST) == I2C_LAST_FRAME))
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.c
index 07cdd7abfc..682bf4b425 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_i2c_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   I2C Extended HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of I2C Extended peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.h
index 12203e7e9f..1eb4486fd6 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2c_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_i2c_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of I2C HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.c
index 5563b9cb99..b2c4041e75 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_i2s.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   I2S HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Integrated Interchip Sound (I2S) peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.h
index b2777bef95..c49460b2fd 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_i2s.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_i2s.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of I2S HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.c
index bf865611da..a3ba2be05a 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.c
@@ -2,14 +2,16 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_irda.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   IRDA HAL module driver.
   *          This file provides firmware functions to manage the following
-  *          functionalities of the IrDA SIR ENDEC block (IrDA):
-  *           + Initialization and de-initialization methods
-  *           + IO operation methods
-  *           + Peripheral Control methods
+  *          functionalities of the IrDA (Infrared Data Association) Peripheral
+  *          (IRDA)
+  *           + Initialization and de-initialization functions
+  *           + IO operation functions
+  *           + Peripheral State and Errors functions
+  *           + Peripheral Control functions
   *
   @verbatim
   ==============================================================================
@@ -18,35 +20,41 @@
   [..]
     The IRDA HAL driver can be used as follows:
 
-    (#) Declare a IRDA_HandleTypeDef handle structure.
-    (#) Initialize the IRDA low level resources by implementing the HAL_IRDA_MspInit() API:
-        (##) Enable the USARTx interface clock.
-        (##) IRDA pins configuration:
-            (+++) Enable the clock for the IRDA GPIOs.
-            (+++) Configure these IRDA pins as alternate function pull-up.
-        (##) NVIC configuration if you need to use interrupt process (HAL_IRDA_Transmit_IT()
-             and HAL_IRDA_Receive_IT() APIs):
-            (+++) Configure the USARTx interrupt priority.
-            (+++) Enable the NVIC USART IRQ handle.
-        (##) DMA Configuration if you need to use DMA process (HAL_IRDA_Transmit_DMA()
+    (#) Declare a IRDA_HandleTypeDef handle structure (eg. IRDA_HandleTypeDef hirda).
+    (#) Initialize the IRDA low level resources by implementing the HAL_IRDA_MspInit() API
+        in setting the associated USART or UART in IRDA mode:
+        (++) Enable the USARTx/UARTx interface clock.
+        (++) USARTx/UARTx pins configuration:
+            (+++) Enable the clock for the USARTx/UARTx GPIOs.
+            (+++) Configure these USARTx/UARTx pins (TX as alternate function pull-up, RX as alternate function Input).
+        (++) NVIC configuration if you need to use interrupt process (HAL_IRDA_Transmit_IT()
+             and HAL_IRDA_Receive_IT() APIs): 
+            (+++) Configure the USARTx/UARTx interrupt priority.
+            (+++) Enable the NVIC USARTx/UARTx IRQ handle.            
+            (+++) The specific IRDA interrupts (Transmission complete interrupt,
+                  RXNE interrupt and Error Interrupts) will be managed using the macros
+                  __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
+                
+        (++) DMA Configuration if you need to use DMA process (HAL_IRDA_Transmit_DMA()
              and HAL_IRDA_Receive_DMA() APIs):
-            (+++) Declare a DMA handle structure for the Tx/Rx stream.
+            (+++) Declare a DMA handle structure for the Tx/Rx channel.
             (+++) Enable the DMAx interface clock.
             (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
-            (+++) Configure the DMA Tx/Rx Stream.
+            (+++) Configure the DMA Tx/Rx channel.
             (+++) Associate the initialized DMA handle to the IRDA DMA Tx/Rx handle.
-            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx Stream.
+            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
 
     (#) Program the Baud Rate, Word Length, Parity, IrDA Mode, Prescaler
         and Mode(Receiver/Transmitter) in the hirda Init structure.
 
     (#) Initialize the IRDA registers by calling the HAL_IRDA_Init() API:
         (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
-            by calling the customized HAL_IRDA_MspInit() API.
-    -@@- The specific IRDA interrupts (Transmission complete interrupt,
-        RXNE interrupt and Error Interrupts) will be managed using the macros
-        __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
-
+             by calling the customized HAL_IRDA_MspInit() API.
+        
+         -@@- The specific IRDA interrupts (Transmission complete interrupt,
+             RXNE interrupt and Error Interrupts) will be managed using the macros
+             __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process.
+     
     (#) Three operation modes are available within this driver :
 
     *** Polling mode IO operation ***
@@ -135,49 +143,57 @@
   * @brief HAL IRDA module driver
   * @{
   */
+
 #ifdef HAL_IRDA_MODULE_ENABLED
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
-/** @addtogroup IRDA_Private_Constants
+/** @defgroup IRDA_Private_Constants IRDA Private Constants
   * @{
   */
-#define TEACK_REACK_TIMEOUT            1000U
+#define IRDA_TEACK_REACK_TIMEOUT       1000U
 #define HAL_IRDA_TXDMA_TIMEOUTVALUE    22000U
 #define IRDA_CR1_FIELDS  ((uint32_t)(USART_CR1_M | USART_CR1_PCE \
-                                   | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE))
+                                   | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE))  /*!< UART or USART CR1 fields of parameters set by IRDA_SetConfig API */
 /**
   * @}
   */
-/* Private macro -------------------------------------------------------------*/
+
+/* Private macros ------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
 /** @addtogroup IRDA_Private_Functions
   * @{
   */
+static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda);
+static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda);
+static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
+static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda);
+static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda);
 static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma);
 static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma);
 static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
 static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma);
 static void IRDA_DMAError(DMA_HandleTypeDef *hdma);
 static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda);
-static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda);
-static void IRDA_SetConfig (IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda);
-static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
+static void IRDA_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
+static void IRDA_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
+static void IRDA_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
+static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
 static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda);
 static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda);
 static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
 /**
   * @}
   */
+
 /* Exported functions --------------------------------------------------------*/
-/** @defgroup IRDA_Exported_Functions IrDA Exported Functions
+
+/** @defgroup IRDA_Exported_Functions IRDA Exported Functions
   * @{
   */
 
-/** @defgroup IRDA_Exported_Functions_Group1 IrDA Initialization and de-initialization functions
+/** @defgroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
   *  @brief    Initialization and Configuration functions
   *
 @verbatim
@@ -210,119 +226,123 @@ static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
   */
 
 /**
-  * @brief  Initializes the IRDA mode according to the specified
-  *         parameters in the IRDA_InitTypeDef and create the associated handle.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief Initialize the IRDA mode according to the specified
+  *        parameters in the IRDA_InitTypeDef and initialize the associated handle.
+  * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
 {
-    /* Check the IRDA handle allocation */
-    if(hirda == NULL)
-    {
-        return HAL_ERROR;
-    }
+  /* Check the IRDA handle allocation */
+  if(hirda == NULL)
+  {
+    return HAL_ERROR;
+  }
 
-    /* Check the USART/UART associated to the IRDA handle */
-    assert_param(IS_IRDA_INSTANCE(hirda->Instance));
+  /* Check the USART/UART associated to the IRDA handle */
+  assert_param(IS_IRDA_INSTANCE(hirda->Instance));
 
-    if(hirda->gState == HAL_IRDA_STATE_RESET)
-    {
-        /* Allocate lock resource and initialize it */
-        hirda->Lock = HAL_UNLOCKED;
-        /* Init the low level hardware : GPIO, CLOCK, CORTEX */
-        HAL_IRDA_MspInit(hirda);
-    }
+  if(hirda->gState == HAL_IRDA_STATE_RESET)
+  {
+    /* Allocate lock resource and initialize it */
+    hirda->Lock = HAL_UNLOCKED;
 
-    hirda->gState = HAL_IRDA_STATE_BUSY;
+    /* Init the low level hardware : GPIO, CLOCK */
+    HAL_IRDA_MspInit(hirda);
+  }
 
-    /* Disable the Peripheral to update the configuration registers */
-    __HAL_IRDA_DISABLE(hirda);
+  hirda->gState = HAL_IRDA_STATE_BUSY;
 
-    /* Set the IRDA Communication parameters */
-    IRDA_SetConfig(hirda);
+  /* Disable the Peripheral to update the configuration registers */
+  __HAL_IRDA_DISABLE(hirda);
 
-    /* In IRDA mode, the following bits must be kept cleared:
-    - LINEN, STOP and CLKEN bits in the USART_CR2 register,
-    - SCEN and HDSEL bits in the USART_CR3 register.*/
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR2_LINEN | USART_CR2_STOP | USART_CR2_CLKEN);
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_SCEN | USART_CR3_HDSEL);
+  /* Set the IRDA Communication parameters */
+  if (IRDA_SetConfig(hirda) == HAL_ERROR)
+  {
+    return HAL_ERROR;
+  }
 
-    /* set the UART/USART in IRDA mode */
-    SET_BIT(hirda->Instance->CR3, USART_CR3_IREN);
+  /* In IRDA mode, the following bits must be kept cleared:
+  - LINEN, STOP and CLKEN bits in the USART_CR2 register,
+  - SCEN and HDSEL bits in the USART_CR3 register.*/
+  CLEAR_BIT(hirda->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
+  CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
 
-    /* Enable the Peripheral */
-    __HAL_IRDA_ENABLE(hirda);
+  /* set the UART/USART in IRDA mode */
+  hirda->Instance->CR3 |= USART_CR3_IREN;
 
-    /* TEACK and/or REACK to check before moving hirda->State to Ready */
-    return (IRDA_CheckIdleState(hirda));
+  /* Enable the Peripheral */
+  __HAL_IRDA_ENABLE(hirda);
+
+  /* TEACK and/or REACK to check before moving hirda->gState and hirda->RxState to Ready */
+  return (IRDA_CheckIdleState(hirda));
 }
 
 /**
-  * @brief  DeInitializes the IRDA peripheral
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief DeInitialize the IRDA peripheral.
+  * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
 {
-    /* Check the IRDA handle allocation */
-    if(hirda == NULL)
-    {
-        return HAL_ERROR;
-    }
+  /* Check the IRDA handle allocation */
+  if(hirda == NULL)
+  {
+    return HAL_ERROR;
+  }
 
-    /* Check the parameters */
-    assert_param(IS_IRDA_INSTANCE(hirda->Instance));
+  /* Check the USART/UART associated to the IRDA handle */
+  assert_param(IS_IRDA_INSTANCE(hirda->Instance));
 
-    hirda->gState = HAL_IRDA_STATE_BUSY;
+  hirda->gState = HAL_IRDA_STATE_BUSY;
 
-    /* DeInit the low level hardware */
-    HAL_IRDA_MspDeInit(hirda);
-    /* Disable the Peripheral */
-    __HAL_IRDA_DISABLE(hirda);
+  /* DeInit the low level hardware */
+  HAL_IRDA_MspDeInit(hirda);
+  /* Disable the Peripheral */
+  __HAL_IRDA_DISABLE(hirda);
 
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-    hirda->gState = HAL_IRDA_STATE_RESET;
-    hirda->RxState = HAL_IRDA_STATE_RESET;
+  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+  hirda->gState    = HAL_IRDA_STATE_RESET;
+  hirda->RxState   = HAL_IRDA_STATE_RESET;
 
-    /* Release Lock */
-    __HAL_UNLOCK(hirda);
+  /* Release Lock */
+  __HAL_UNLOCK(hirda);
 
-    return HAL_OK;
+  return HAL_OK;
 }
 
 /**
-  * @brief  IRDA MSP Init.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief Initialize the IRDA MSP.
+  * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval None
   */
 __weak void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda)
 {
-    /* Prevent unused argument(s) compilation warning */
-    UNUSED(hirda);
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
 
-    /* NOTE : This function Should not be modified, when the callback is needed,
-              the HAL_IRDA_MspInit could be implemented in the user file
-     */
+  /* NOTE: This function should not be modified, when the callback is needed,
+           the HAL_IRDA_MspInit can be implemented in the user file
+   */
 }
 
 /**
-  * @brief  IRDA MSP DeInit.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief DeInitialize the IRDA MSP.
+  * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval None
   */
 __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
 {
-    /* Prevent unused argument(s) compilation warning */
-    UNUSED(hirda);
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
 
-    /* NOTE : This function Should not be modified, when the callback is needed,
-              the HAL_IRDA_MspDeInit could be implemented in the user file
-     */
+  /* NOTE: This function should not be modified, when the callback is needed,
+           the HAL_IRDA_MspDeInit can be implemented in the user file
+   */
 }
 
 /**
@@ -330,14 +350,16 @@ __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
   */
 
 /** @defgroup IRDA_Exported_Functions_Group2 IO operation functions
-  *  @brief   IRDA Transmit/Receive functions
+  *  @brief   IRDA Transmit and Receive functions
   *
 @verbatim
  ===============================================================================
                       ##### IO operation functions #####
  ===============================================================================
+  [..]
     This subsection provides a set of functions allowing to manage the IRDA data transfers.
-    [..]
+
+  [..]
     IrDA is a half duplex communication protocol. If the Transmitter is busy, any data
     on the IrDA receive line will be ignored by the IrDA decoder and if the Receiver
     is busy, data on the TX from the USART to IrDA will not be encoded by IrDA.
@@ -345,23 +367,23 @@ __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
     could be corrupted.
 
     (#) There are two modes of transfer:
-       (++) Blocking mode: the communication is performed in polling mode.
-            The HAL status of all data processing is returned by the same function
-            after finishing transfer.
-       (++) No-Blocking mode: the communication is performed using Interrupts
-           or DMA, these API's return the HAL status.
-           The end of the data processing will be indicated through the
-           dedicated IRDA IRQ when using Interrupt mode or the DMA IRQ when
-           using DMA mode.
-           The HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxCpltCallback() user callbacks
-           will be executed respectively at the end of the Transmit or Receive process
-           The HAL_IRDA_ErrorCallback() user callback will be executed when a communication error is detected
+        (++) Blocking mode: the communication is performed in polling mode.
+             The HAL status of all data processing is returned by the same function
+             after finishing transfer.
+        (++) Non-Blocking mode: the communication is performed using Interrupts
+             or DMA, these API's return the HAL status.
+             The end of the data processing will be indicated through the
+             dedicated IRDA IRQ when using Interrupt mode or the DMA IRQ when
+             using DMA mode.
+             The HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxCpltCallback() user callbacks
+             will be executed respectively at the end of the Transmit or Receive process
+             The HAL_IRDA_ErrorCallback() user callback will be executed when a communication error is detected
 
-    (#) Blocking mode API's are :
+    (#) Blocking mode APIs are :
         (++) HAL_IRDA_Transmit()
         (++) HAL_IRDA_Receive()
 
-    (#) Non-Blocking mode API's with Interrupt are :
+    (#) Non-Blocking mode APIs with Interrupt are :
         (++) HAL_IRDA_Transmit_IT()
         (++) HAL_IRDA_Receive_IT()
         (++) HAL_IRDA_IRQHandler()
@@ -371,806 +393,1268 @@ __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
     (#) Non-Blocking mode functions with DMA are :
         (++) HAL_IRDA_Transmit_DMA()
         (++) HAL_IRDA_Receive_DMA()
+        (++) HAL_IRDA_DMAPause()
+        (++) HAL_IRDA_DMAResume()
+        (++) HAL_IRDA_DMAStop()
 
-    (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
+    (#) A set of Transfer Complete Callbacks are provided in Non-Blocking mode:
+        (++) HAL_IRDA_TxHalfCpltCallback()
         (++) HAL_IRDA_TxCpltCallback()
+        (++) HAL_IRDA_RxHalfCpltCallback()
         (++) HAL_IRDA_RxCpltCallback()
         (++) HAL_IRDA_ErrorCallback()
 
+    (#) Non-Blocking mode transfers could be aborted using Abort API's :
+        (+) HAL_IRDA_Abort()
+        (+) HAL_IRDA_AbortTransmit()
+        (+) HAL_IRDA_AbortReceive()
+        (+) HAL_IRDA_Abort_IT()
+        (+) HAL_IRDA_AbortTransmit_IT()
+        (+) HAL_IRDA_AbortReceive_IT()
+
+    (#) For Abort services based on interrupts (HAL_IRDA_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
+        (+) HAL_IRDA_AbortCpltCallback()
+        (+) HAL_IRDA_AbortTransmitCpltCallback()
+        (+) HAL_IRDA_AbortReceiveCpltCallback()
+
+    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
+        Errors are handled as follows :
+       (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
+           to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
+           Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
+           and HAL_IRDA_ErrorCallback() user callback is executed. Transfer is kept ongoing on IRDA side.
+           If user wants to abort it, Abort services should be called by user.
+       (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
+           This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
+           Error code is set to allow user to identify error type, and HAL_IRDA_ErrorCallback() user callback is executed.
+
 @endverbatim
   * @{
   */
 
 /**
-  * @brief  Sends an amount of data in blocking mode.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @param  pData: Pointer to data buffer
-  * @param  Size: Amount of data to be sent
-  * @param  Timeout: Specify timeout value
+  * @brief  Send an amount of data in blocking mode.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @param  pData Pointer to data buffer.
+  * @param  Size Amount of data to be sent.
+  * @param  Timeout Specify timeout value.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
-    uint16_t* tmp;
-    uint32_t tickstart = 0U;
+  uint16_t* tmp;
+  uint32_t tickstart = 0U;
 
-    /* Check that a Tx process is not already ongoing */
-    if(hirda->gState == HAL_IRDA_STATE_READY)
+  /* Check that a Tx process is not already ongoing */
+  if(hirda->gState == HAL_IRDA_STATE_READY)
+  {
+    if((pData == NULL) || (Size == 0))
     {
-        if((pData == NULL) || (Size == 0U))
-        {
-            return  HAL_ERROR;
-        }
-
-        /* Process Locked */
-        __HAL_LOCK(hirda);
-        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-        hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-        /* Init tickstart for timeout managment*/
-        tickstart = HAL_GetTick();
-
-        hirda->TxXferSize = Size;
-        hirda->TxXferCount = Size;
-        while(hirda->TxXferCount > 0U)
-        {
-            hirda->TxXferCount--;
-
-            if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
-            {
-                return HAL_TIMEOUT;
-            }
-            if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-            {
-                tmp = (uint16_t*) pData;
-                hirda->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
-                pData +=2;
-            }
-            else
-            {
-                hirda->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
-            }
-        }
-
-        if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
-        {
-            return HAL_TIMEOUT;
-        }
-
-        /* At end of Tx process, restore hirda->gState to Ready */
-        hirda->gState = HAL_IRDA_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hirda);
-
-        return HAL_OK;
+      return  HAL_ERROR;
     }
-    else
+
+    /* Process Locked */
+    __HAL_LOCK(hirda);
+
+    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
+
+    /* Init tickstart for timeout managment*/
+    tickstart = HAL_GetTick();
+
+    hirda->TxXferSize = Size;
+    hirda->TxXferCount = Size;
+    while(hirda->TxXferCount > 0)
     {
-        return HAL_BUSY;
+      hirda->TxXferCount--;
+
+      if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
+      {
+        return HAL_TIMEOUT;
+      }
+      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
+      {
+        tmp = (uint16_t*) pData;
+        hirda->Instance->TDR = (*tmp & (uint16_t)0x01FF);
+        pData += 2;
+      }
+      else
+      {
+        hirda->Instance->TDR = (*pData++ & (uint8_t)0xFF);
+      }
     }
+
+    if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
+    {
+      return HAL_TIMEOUT;
+    }
+
+    /* At end of Tx process, restore hirda->gState to Ready */
+    hirda->gState = HAL_IRDA_STATE_READY;
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hirda);
+
+    return HAL_OK;
+  }
+  else
+  {
+    return HAL_BUSY;
+  }
 }
 
 /**
   * @brief  Receive an amount of data in blocking mode.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @param  pData: Pointer to data buffer
-  * @param  Size: Amount of data to be received
-  * @param  Timeout: Specify timeout value
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @param  pData Pointer to data buffer.
+  * @param  Size Amount of data to be received.
+  * @param  Timeout Specify timeout value.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
-    uint16_t* tmp;
-    uint16_t uhMask;
-    uint32_t tickstart = 0U;
+  uint16_t* tmp;
+  uint16_t uhMask;
+  uint32_t tickstart = 0;
 
-    /* Check that a Rx process is not already ongoing */
-    if(hirda->RxState == HAL_IRDA_STATE_READY)
+  /* Check that a Rx process is not already ongoing */
+  if(hirda->RxState == HAL_IRDA_STATE_READY)
+  {
+    if((pData == NULL) || (Size == 0))
     {
-        if((pData == NULL) || (Size == 0U))
-        {
-            return  HAL_ERROR;
-        }
-
-        /* Process Locked */
-        __HAL_LOCK(hirda);
-        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-        hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-        /* Init tickstart for timeout managment*/
-        tickstart = HAL_GetTick();
-
-        hirda->RxXferSize = Size;
-        hirda->RxXferCount = Size;
-
-        /* Computation of the mask to apply to the RDR register
-           of the UART associated to the IRDA */
-        IRDA_MASK_COMPUTATION(hirda);
-        uhMask = hirda->Mask;
-
-        /* Check data remaining to be received */
-        while(hirda->RxXferCount > 0U)
-        {
-            hirda->RxXferCount--;
-
-            if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
-            {
-                return HAL_TIMEOUT;
-            }
-            if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-            {
-                tmp = (uint16_t*) pData ;
-                *tmp = (uint16_t)(hirda->Instance->RDR & uhMask);
-                pData +=2;
-            }
-            else
-            {
-                *pData++ = (uint8_t)(hirda->Instance->RDR & (uint8_t)uhMask);
-            }
-        }
-
-        /* At end of Rx process, restore hirda->RxState to Ready */
-        hirda->RxState = HAL_IRDA_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hirda);
-
-        return HAL_OK;
+      return  HAL_ERROR;
     }
-    else
+
+    /* Process Locked */
+    __HAL_LOCK(hirda);
+
+    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
+
+    /* Init tickstart for timeout managment*/
+    tickstart = HAL_GetTick();
+
+    hirda->RxXferSize = Size;
+    hirda->RxXferCount = Size;
+
+    /* Computation of the mask to apply to RDR register
+       of the UART associated to the IRDA */
+    IRDA_MASK_COMPUTATION(hirda);
+    uhMask = hirda->Mask;
+
+    /* Check data remaining to be received */
+    while(hirda->RxXferCount > 0)
     {
-        return HAL_BUSY;
+      hirda->RxXferCount--;
+
+      if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
+      {
+        return HAL_TIMEOUT;
+      }
+      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
+      {
+        tmp = (uint16_t*) pData ;
+        *tmp = (uint16_t)(hirda->Instance->RDR & uhMask);
+        pData +=2;
+      }
+      else
+      {
+        *pData++ = (uint8_t)(hirda->Instance->RDR & (uint8_t)uhMask);
+      }
     }
+
+    /* At end of Rx process, restore hirda->RxState to Ready */
+    hirda->RxState = HAL_IRDA_STATE_READY;
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hirda);
+
+    return HAL_OK;
+  }
+  else
+  {
+    return HAL_BUSY;
+  }
 }
 
 /**
-  * @brief  Send an amount of data in non blocking mode.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @param  pData: Pointer to data buffer
-  * @param  Size: Amount of data to be sent
+  * @brief  Send an amount of data in interrupt mode.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+ *                the configuration information for the specified IRDA module.
+  * @param  pData Pointer to data buffer.
+  * @param  Size Amount of data to be sent.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
 {
-    /* Check that a Tx process is not already ongoing */
-    if(hirda->gState == HAL_IRDA_STATE_READY)
+  /* Check that a Tx process is not already ongoing */
+  if(hirda->gState == HAL_IRDA_STATE_READY)
+  {
+    if((pData == NULL) || (Size == 0))
     {
-        if((pData == NULL) || (Size == 0U))
-        {
-            return HAL_ERROR;
-        }
-
-        /* Process Locked */
-        __HAL_LOCK(hirda);
-
-        hirda->pTxBuffPtr = pData;
-        hirda->TxXferSize = Size;
-        hirda->TxXferCount = Size;
-
-        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-        hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hirda);
-
-        /* Enable the IRDA Transmit Complete Interrupt */
-        SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-
-        return HAL_OK;
-    }
-    else
-    {
-        return HAL_BUSY;
+      return HAL_ERROR;
     }
+
+    /* Process Locked */
+    __HAL_LOCK(hirda);
+
+    hirda->pTxBuffPtr = pData;
+    hirda->TxXferSize = Size;
+    hirda->TxXferCount = Size;
+
+    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hirda);
+
+    /* Enable the IRDA Transmit Data Register Empty Interrupt */
+    SET_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
+
+    return HAL_OK;
+  }
+  else
+  {
+    return HAL_BUSY;
+  }
 }
 
 /**
-  * @brief  Receives an amount of data in non blocking mode.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @param  pData: Pointer to data buffer
-  * @param  Size: Amount of data to be received
+  * @brief  Receive an amount of data in interrupt mode.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @param  pData Pointer to data buffer.
+  * @param  Size Amount of data to be received.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
 {
-    /* Check that a Rx process is not already ongoing */
-    if(hirda->RxState == HAL_IRDA_STATE_READY)
+  /* Check that a Rx process is not already ongoing */
+  if(hirda->RxState == HAL_IRDA_STATE_READY)
+  {
+    if((pData == NULL) || (Size == 0))
     {
-        if((pData == NULL) || (Size == 0U))
-        {
-            return HAL_ERROR;
-        }
-
-        /* Process Locked */
-        __HAL_LOCK(hirda);
-
-        hirda->pRxBuffPtr = pData;
-        hirda->RxXferSize = Size;
-        hirda->RxXferCount = Size;
-
-        /* Computation of the mask to apply to the RDR register
-           of the UART associated to the IRDA */
-        IRDA_MASK_COMPUTATION(hirda);
-
-        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-        hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hirda);
-
-        /* Enable the IRDA Parity Error Interrupt */
-        SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-
-        /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
-        SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-        /* Enable the IRDA Data Register not empty Interrupt */
-        SET_BIT(hirda->Instance->CR1, USART_CR1_RXNEIE);
-
-        return HAL_OK;
-    }
-    else
-    {
-        return HAL_BUSY;
+      return HAL_ERROR;
     }
+
+    /* Process Locked */
+    __HAL_LOCK(hirda);
+
+    hirda->pRxBuffPtr = pData;
+    hirda->RxXferSize = Size;
+    hirda->RxXferCount = Size;
+
+    /* Computation of the mask to apply to the RDR register
+       of the UART associated to the IRDA */
+    IRDA_MASK_COMPUTATION(hirda);
+
+    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hirda);
+
+    /* Enable the IRDA Parity Error and Data Register not empty Interrupts */
+    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE| USART_CR1_RXNEIE);
+
+    /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
+    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+
+    return HAL_OK;
+  }
+  else
+  {
+    return HAL_BUSY;
+  }
 }
 
 /**
-  * @brief  Sends an amount of data in non blocking mode.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @param  pData: Pointer to data buffer
-  * @param  Size: Amount of data to be sent
+  * @brief  Send an amount of data in DMA mode.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @param  pData pointer to data buffer.
+  * @param  Size amount of data to be sent.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
 {
-    uint32_t *tmp;
-
-    /* Check that a Tx process is not already ongoing */
-    if(hirda->gState == HAL_IRDA_STATE_READY)
+  /* Check that a Tx process is not already ongoing */
+  if(hirda->gState == HAL_IRDA_STATE_READY)
+  {
+    if((pData == NULL) || (Size == 0))
     {
-        if((pData == NULL) || (Size == 0U))
-        {
-            return HAL_ERROR;
-        }
-
-        /* Process Locked */
-        __HAL_LOCK(hirda);
-
-        hirda->pTxBuffPtr = pData;
-        hirda->TxXferSize = Size;
-        hirda->TxXferCount = Size;
-
-        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-        hirda->gState = HAL_IRDA_STATE_BUSY_TX;
-
-        /* Set the IRDA DMA transfer complete callback */
-        hirda->hdmatx->XferCpltCallback = IRDA_DMATransmitCplt;
-
-        /* Set the IRDA DMA half transfer complete callback */
-        hirda->hdmatx->XferHalfCpltCallback = IRDA_DMATransmitHalfCplt;
-
-        /* Set the DMA error callback */
-        hirda->hdmatx->XferErrorCallback = IRDA_DMAError;
-
-        /* Set the DMA abort callback */
-        hirda->hdmatx->XferAbortCallback = NULL;
-
-        /* Enable the IRDA transmit DMA channel */
-        tmp = (uint32_t*)&pData;
-        HAL_DMA_Start_IT(hirda->hdmatx, *(uint32_t*)tmp, (uint32_t)&hirda->Instance->TDR, Size);
-
-        /* Clear the TC flag in the SR register by writing 0 to it */
-        __HAL_IRDA_CLEAR_IT(hirda, IRDA_FLAG_TC);
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hirda);
-
-        /* Enable the DMA transfer for transmit request by setting the DMAT bit
-           in the IRDA CR3 register */
-        SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-        return HAL_OK;
-    }
-    else
-    {
-        return HAL_BUSY;
+      return HAL_ERROR;
     }
+
+    /* Process Locked */
+    __HAL_LOCK(hirda);
+
+    hirda->pTxBuffPtr = pData;
+    hirda->TxXferSize = Size;
+    hirda->TxXferCount = Size;
+
+    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
+
+    /* Set the IRDA DMA transfer complete callback */
+    hirda->hdmatx->XferCpltCallback = IRDA_DMATransmitCplt;
+
+    /* Set the IRDA DMA half transfer complete callback */
+    hirda->hdmatx->XferHalfCpltCallback = IRDA_DMATransmitHalfCplt;
+
+    /* Set the DMA error callback */
+    hirda->hdmatx->XferErrorCallback = IRDA_DMAError;
+
+    /* Set the DMA abort callback */
+    hirda->hdmatx->XferAbortCallback = NULL;
+
+    /* Enable the IRDA transmit DMA channel */
+    HAL_DMA_Start_IT(hirda->hdmatx, (uint32_t)hirda->pTxBuffPtr, (uint32_t)&hirda->Instance->TDR, Size);
+
+    /* Clear the TC flag in the ICR register */
+    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_TCF);
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hirda);
+
+    /* Enable the DMA transfer for transmit request by setting the DMAT bit
+       in the USART CR3 register */
+    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+
+    return HAL_OK;
+  }
+  else
+  {
+    return HAL_BUSY;
+  }
 }
 
 /**
-  * @brief  Receives an amount of data in non blocking mode.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @param  pData: Pointer to data buffer
-  * @param  Size: Amount of data to be received
-  * @note   When the IRDA parity is enabled (PCE = 1) the data received contain the parity bit.
+  * @brief  Receive an amount of data in DMA mode.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @param  pData Pointer to data buffer.
+  * @param  Size Amount of data to be received.
+  * @note   When the IRDA parity is enabled (PCE = 1), the received data contains
+  *         the parity bit (MSB position).
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
 {
-    uint32_t *tmp;
-
-    /* Check that a Rx process is not already ongoing */
-    if(hirda->RxState == HAL_IRDA_STATE_READY)
+  /* Check that a Rx process is not already ongoing */
+  if(hirda->RxState == HAL_IRDA_STATE_READY)
+  {
+    if((pData == NULL) || (Size == 0))
     {
-        if((pData == NULL) || (Size == 0U))
-        {
-            return HAL_ERROR;
-        }
-
-        /* Process Locked */
-        __HAL_LOCK(hirda);
-
-        hirda->pRxBuffPtr = pData;
-        hirda->RxXferSize = Size;
-
-        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-        hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
-
-        /* Set the IRDA DMA transfer complete callback */
-        hirda->hdmarx->XferCpltCallback = IRDA_DMAReceiveCplt;
-
-        /* Set the IRDA DMA half transfer complete callback */
-        hirda->hdmarx->XferHalfCpltCallback = IRDA_DMAReceiveHalfCplt;
-
-        /* Set the DMA error callback */
-        hirda->hdmarx->XferErrorCallback = IRDA_DMAError;
-
-        /* Set the DMA abort callback */
-        hirda->hdmarx->XferAbortCallback = NULL;
-
-        /* Enable the DMA channel */
-        tmp = (uint32_t*)&pData;
-        HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->RDR, *(uint32_t*)tmp, Size);
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hirda);
-
-        /* Enable the IRDA Parity Error Interrupt */
-        SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-
-        /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
-        SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-        /* Enable the DMA transfer for the receiver request by setting the DMAR bit
-        in the USART CR3 register */
-        SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-        return HAL_OK;
-    }
-    else
-    {
-        return HAL_BUSY;
+      return HAL_ERROR;
     }
+
+    /* Process Locked */
+    __HAL_LOCK(hirda);
+
+    hirda->pRxBuffPtr = pData;
+    hirda->RxXferSize = Size;
+
+    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
+
+    /* Set the IRDA DMA transfer complete callback */
+    hirda->hdmarx->XferCpltCallback = IRDA_DMAReceiveCplt;
+
+    /* Set the IRDA DMA half transfer complete callback */
+    hirda->hdmarx->XferHalfCpltCallback = IRDA_DMAReceiveHalfCplt;
+
+    /* Set the DMA error callback */
+    hirda->hdmarx->XferErrorCallback = IRDA_DMAError;
+
+    /* Set the DMA abort callback */
+    hirda->hdmarx->XferAbortCallback = NULL;
+
+    /* Enable the DMA channel */
+    HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->RDR, (uint32_t)hirda->pRxBuffPtr, Size);
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hirda);
+
+    /* Enable the UART Parity Error Interrupt */
+    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
+
+    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
+    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+
+    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
+       in the USART CR3 register */
+    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+
+    return HAL_OK;
+  }
+  else
+  {
+    return HAL_BUSY;
+  }
 }
 
+
 /**
-  * @brief Pauses the DMA Transfer.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief  Pause the DMA Transfer.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda)
 {
-    /* Process Locked */
-    __HAL_LOCK(hirda);
+  /* Process Locked */
+  __HAL_LOCK(hirda);
 
-    if((hirda->gState == HAL_IRDA_STATE_BUSY_TX)&&
-            (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
-    {
-        /* Disable the UART DMA Tx request */
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-    }
-    if((hirda->RxState == HAL_IRDA_STATE_BUSY_RX)&&
-            (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-    {
-        /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-        CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+  if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
+      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
+  {
+    /* Disable the IRDA DMA Tx request */
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+  }
+  if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
+      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
+  {
+    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
+    CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
 
-        /* Disable the UART DMA Rx request */
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-    }
+    /* Disable the IRDA DMA Rx request */
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+  }
 
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
+  /* Process Unlocked */
+  __HAL_UNLOCK(hirda);
 
-    return HAL_OK;
+  return HAL_OK;
 }
 
 /**
-  * @brief Resumes the DMA Transfer.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified UART module.
+  * @brief  Resume the DMA Transfer.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified UART module.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda)
 {
-    /* Process Locked */
-    __HAL_LOCK(hirda);
+  /* Process Locked */
+  __HAL_LOCK(hirda);
 
-    if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-    {
-        /* Enable the UART DMA Tx request */
-        SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-    }
-    if(hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-    {
-        /* Clear the Overrun flag before resuming the Rx transfer*/
-        __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF);
+  if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
+  {
+    /* Enable the IRDA DMA Tx request */
+    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+  }
+  if(hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
+  {
+    /* Clear the Overrun flag before resuming the Rx transfer*/
+    __HAL_IRDA_CLEAR_OREFLAG(hirda);
 
-        /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
-        SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-        SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+    /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
+    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
+    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
 
-        /* Enable the UART DMA Rx request */
-        SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-    }
+    /* Enable the IRDA DMA Rx request */
+    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+  }
 
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
+  /* Process Unlocked */
+  __HAL_UNLOCK(hirda);
 
-    return HAL_OK;
+  return HAL_OK;
 }
 
 /**
-  * @brief Stops the DMA Transfer.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified UART module.
+  * @brief  Stop the DMA Transfer.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified UART module.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda)
 {
-    /* The Lock is not implemented on this API to allow the user application
-       to call the HAL IRDA API under callbacks HAL_IRDA_TxCpltCallback() / HAL_IRDA_RxCpltCallback() /
-       HAL_IRDA_TxHalfCpltCallback / HAL_IRDA_RxHalfCpltCallback:
-       indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
-       interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
-       the stream and the corresponding call back is executed. */
+  /* The Lock is not implemented on this API to allow the user application
+     to call the HAL IRDA API under callbacks HAL_IRDA_TxCpltCallback() / HAL_IRDA_RxCpltCallback() /
+     HAL_IRDA_TxHalfCpltCallback / HAL_IRDA_RxHalfCpltCallback: 
+     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete  
+     interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of 
+     the stream and the corresponding call back is executed. */
 
-    /* Stop IRDA DMA Tx request if ongoing */
-    if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
-            (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
+  /* Stop IRDA DMA Tx request if ongoing */
+  if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
+      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the IRDA DMA Tx channel */
+    if(hirda->hdmatx != NULL)
     {
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
-
-        /* Abort the IRDA DMA Tx channel */
-        if(hirda->hdmatx != NULL)
-        {
-            HAL_DMA_Abort(hirda->hdmatx);
-        }
-        IRDA_EndTxTransfer(hirda);
+      HAL_DMA_Abort(hirda->hdmatx);
     }
 
-    /* Stop IRDA DMA Rx request if ongoing */
-    if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
-            (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-    {
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+    IRDA_EndTxTransfer(hirda);
+  }
 
-        /* Abort the IRDA DMA Rx channel */
-        if(hirda->hdmarx != NULL)
-        {
-            HAL_DMA_Abort(hirda->hdmarx);
-        }
-        IRDA_EndRxTransfer(hirda);
+  /* Stop IRDA DMA Rx request if ongoing */
+  if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
+      (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+
+    /* Abort the IRDA DMA Rx channel */
+    if(hirda->hdmarx != NULL)
+    {
+      HAL_DMA_Abort(hirda->hdmarx);
     }
-    return HAL_OK;
+
+    IRDA_EndRxTransfer(hirda);
+  }
+
+  return HAL_OK;
 }
 
 /**
-  * @brief DMA IRDA communication abort callback, when call by HAL services on Error
-  *        (To be called at end of DMA Abort procedure following error occurrence).
-  * @param hdma: DMA handle.
-  * @retval None
-  */
-static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma)
+  * @brief  Abort ongoing transfers (blocking mode).
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified UART module.
+  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable IRDA Interrupts (Tx and Rx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda)
 {
-    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-    hirda->RxXferCount = 0U;
-    hirda->TxXferCount = 0U;
+  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
+  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
 
-    HAL_IRDA_ErrorCallback(hirda);
+  /* Disable the IRDA DMA Tx request if enabled */
+  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the IRDA DMA Tx channel : use blocking DMA Abort API (no callback) */
+    if(hirda->hdmatx != NULL)
+    {
+      /* Set the IRDA DMA Abort callback to Null. 
+         No call back execution at end of DMA abort procedure */
+      hirda->hdmatx->XferAbortCallback = NULL;
+
+      HAL_DMA_Abort(hirda->hdmatx);
+    }
+  }
+
+  /* Disable the IRDA DMA Rx request if enabled */
+  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+
+    /* Abort the IRDA DMA Rx channel : use blocking DMA Abort API (no callback) */
+    if(hirda->hdmarx != NULL)
+    {
+      /* Set the IRDA DMA Abort callback to Null. 
+         No call back execution at end of DMA abort procedure */
+      hirda->hdmarx->XferAbortCallback = NULL;
+
+      HAL_DMA_Abort(hirda->hdmarx);
+    }
+  }
+
+  /* Reset Tx and Rx transfer counters */
+  hirda->TxXferCount = 0; 
+  hirda->RxXferCount = 0; 
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
+
+  /* Restore hirda->gState and hirda->RxState to Ready */
+  hirda->gState  = HAL_IRDA_STATE_READY;
+  hirda->RxState = HAL_IRDA_STATE_READY;
+
+  /* Reset Handle ErrorCode to No Error */
+  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+
+  return HAL_OK;
 }
 
 /**
-  * @brief  This function handles IRDA interrupt request.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief  Abort ongoing Transmit transfer (blocking mode).
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified UART module.
+  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable IRDA Interrupts (Tx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda)
+{
+  /* Disable TXEIE and TCIE interrupts */
+  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
+
+  /* Disable the IRDA DMA Tx request if enabled */
+  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the IRDA DMA Tx channel : use blocking DMA Abort API (no callback) */
+    if(hirda->hdmatx != NULL)
+    {
+      /* Set the IRDA DMA Abort callback to Null. 
+         No call back execution at end of DMA abort procedure */
+      hirda->hdmatx->XferAbortCallback = NULL;
+
+      HAL_DMA_Abort(hirda->hdmatx);
+    }
+  }
+
+  /* Reset Tx transfer counter */
+  hirda->TxXferCount = 0; 
+
+  /* Restore hirda->gState to Ready */
+  hirda->gState = HAL_IRDA_STATE_READY;
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing Receive transfer (blocking mode).
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified UART module.
+  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable IRDA Interrupts (Rx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda)
+{
+  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+
+  /* Disable the IRDA DMA Rx request if enabled */
+  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+
+    /* Abort the IRDA DMA Rx channel : use blocking DMA Abort API (no callback) */
+    if(hirda->hdmarx != NULL)
+    {
+      /* Set the IRDA DMA Abort callback to Null. 
+         No call back execution at end of DMA abort procedure */
+      hirda->hdmarx->XferAbortCallback = NULL;
+
+      HAL_DMA_Abort(hirda->hdmarx);
+    }
+  }
+
+  /* Reset Rx transfer counter */
+  hirda->RxXferCount = 0; 
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
+
+  /* Restore hirda->RxState to Ready */
+  hirda->RxState = HAL_IRDA_STATE_READY;
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing transfers (Interrupt mode).
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified UART module.
+  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable IRDA Interrupts (Tx and Rx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  *           - At abort completion, call user abort complete callback
+  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
+  *         considered as completed only when user abort complete callback is executed (not when exiting function).
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda)
+{
+  uint32_t abortcplt = 1;
+  
+  /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
+  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+
+  /* If DMA Tx and/or DMA Rx Handles are associated to IRDA Handle, DMA Abort complete callbacks should be initialised
+     before any call to DMA Abort functions */
+  /* DMA Tx Handle is valid */
+  if(hirda->hdmatx != NULL)
+  {
+    /* Set DMA Abort Complete callback if IRDA DMA Tx request if enabled.
+       Otherwise, set it to NULL */
+    if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
+    {
+      hirda->hdmatx->XferAbortCallback = IRDA_DMATxAbortCallback;
+    }
+    else
+    {
+      hirda->hdmatx->XferAbortCallback = NULL;
+    }
+  }
+  /* DMA Rx Handle is valid */
+  if(hirda->hdmarx != NULL)
+  {
+    /* Set DMA Abort Complete callback if IRDA DMA Rx request if enabled.
+       Otherwise, set it to NULL */
+    if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
+    {
+      hirda->hdmarx->XferAbortCallback = IRDA_DMARxAbortCallback;
+    }
+    else
+    {
+      hirda->hdmarx->XferAbortCallback = NULL;
+    }
+  }
+  
+  /* Disable the IRDA DMA Tx request if enabled */
+  if(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
+  {
+    /* Disable DMA Tx at UART level */
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the IRDA DMA Tx channel : use non blocking DMA Abort API (callback) */
+    if(hirda->hdmatx != NULL)
+    {
+      /* IRDA Tx DMA Abort callback has already been initialised : 
+         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
+
+      /* Abort DMA TX */
+      if(HAL_DMA_Abort_IT(hirda->hdmatx) != HAL_OK)
+      {
+        hirda->hdmatx->XferAbortCallback = NULL;
+      }
+      else
+      {
+        abortcplt = 0;
+      }
+    }
+  }
+
+  /* Disable the IRDA DMA Rx request if enabled */
+  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+
+    /* Abort the IRDA DMA Rx channel : use non blocking DMA Abort API (callback) */
+    if(hirda->hdmarx != NULL)
+    {
+      /* IRDA Rx DMA Abort callback has already been initialised : 
+         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
+
+      /* Abort DMA RX */
+      if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
+      {
+        hirda->hdmarx->XferAbortCallback = NULL;
+        abortcplt = 1;
+      }
+      else
+      {
+        abortcplt = 0;
+      }
+    }
+  }
+
+  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
+  if (abortcplt == 1)
+  {
+    /* Reset Tx and Rx transfer counters */
+    hirda->TxXferCount = 0; 
+    hirda->RxXferCount = 0;
+
+    /* Reset errorCode */
+    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+
+    /* Clear the Error flags in the ICR register */
+    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
+
+    /* Restore hirda->gState and hirda->RxState to Ready */
+    hirda->gState  = HAL_IRDA_STATE_READY;
+    hirda->RxState = HAL_IRDA_STATE_READY;
+
+    /* As no DMA to be aborted, call directly user Abort complete callback */
+    HAL_IRDA_AbortCpltCallback(hirda);
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing Transmit transfer (Interrupt mode).
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified UART module.
+  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable IRDA Interrupts (Tx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  *           - At abort completion, call user abort complete callback
+  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
+  *         considered as completed only when user abort complete callback is executed (not when exiting function).
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda)
+{
+  /* Disable TXEIE and TCIE interrupts */
+  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
+
+  /* Disable the IRDA DMA Tx request if enabled */
+  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the IRDA DMA Tx channel : use non blocking DMA Abort API (callback) */
+    if(hirda->hdmatx != NULL)
+    {
+      /* Set the IRDA DMA Abort callback : 
+         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
+      hirda->hdmatx->XferAbortCallback = IRDA_DMATxOnlyAbortCallback;
+
+      /* Abort DMA TX */
+      if(HAL_DMA_Abort_IT(hirda->hdmatx) != HAL_OK)
+      {
+        /* Call Directly hirda->hdmatx->XferAbortCallback function in case of error */
+        hirda->hdmatx->XferAbortCallback(hirda->hdmatx);
+      }
+    }
+    else
+    {
+      /* Reset Tx transfer counter */
+      hirda->TxXferCount = 0; 
+
+      /* Restore hirda->gState to Ready */
+      hirda->gState = HAL_IRDA_STATE_READY;
+
+      /* As no DMA to be aborted, call directly user Abort complete callback */
+      HAL_IRDA_AbortTransmitCpltCallback(hirda);
+    }
+  }
+  else
+  {
+    /* Reset Tx transfer counter */
+    hirda->TxXferCount = 0; 
+
+    /* Restore hirda->gState to Ready */
+    hirda->gState = HAL_IRDA_STATE_READY;
+
+    /* As no DMA to be aborted, call directly user Abort complete callback */
+    HAL_IRDA_AbortTransmitCpltCallback(hirda);
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing Receive transfer (Interrupt mode).
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified UART module.
+  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable IRDA Interrupts (Rx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  *           - At abort completion, call user abort complete callback
+  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
+  *         considered as completed only when user abort complete callback is executed (not when exiting function).
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda)
+{
+  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+
+  /* Disable the IRDA DMA Rx request if enabled */
+  if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
+  {
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+
+    /* Abort the IRDA DMA Rx channel : use non blocking DMA Abort API (callback) */
+    if(hirda->hdmarx != NULL)
+    {
+      /* Set the IRDA DMA Abort callback : 
+         will lead to call HAL_IRDA_AbortCpltCallback() at end of DMA abort procedure */
+      hirda->hdmarx->XferAbortCallback = IRDA_DMARxOnlyAbortCallback;
+
+      /* Abort DMA RX */
+      if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
+      {
+        /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
+        hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
+      }
+    }
+    else
+    {
+      /* Reset Rx transfer counter */
+      hirda->RxXferCount = 0; 
+
+      /* Clear the Error flags in the ICR register */
+      __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
+
+      /* Restore hirda->RxState to Ready */
+      hirda->RxState = HAL_IRDA_STATE_READY;
+
+      /* As no DMA to be aborted, call directly user Abort complete callback */
+      HAL_IRDA_AbortReceiveCpltCallback(hirda);
+    }
+  }
+  else
+  {
+    /* Reset Rx transfer counter */
+    hirda->RxXferCount = 0; 
+
+    /* Clear the Error flags in the ICR register */
+    __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
+
+    /* Restore hirda->RxState to Ready */
+    hirda->RxState = HAL_IRDA_STATE_READY;
+
+    /* As no DMA to be aborted, call directly user Abort complete callback */
+    HAL_IRDA_AbortReceiveCpltCallback(hirda);
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Handle IRDA interrupt request.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval None
   */
 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda)
 {
-    uint32_t isrflags, cr1its, cr3its, errorflags;
+  uint32_t isrflags   = READ_REG(hirda->Instance->ISR);
+  uint32_t cr1its     = READ_REG(hirda->Instance->CR1);
+  uint32_t cr3its;
+  uint32_t errorflags;
 
-    isrflags   = READ_REG(hirda->Instance->ISR);
-    cr1its     = READ_REG(hirda->Instance->CR1);
-    cr3its     = READ_REG(hirda->Instance->CR3);
-
-    /* If no error occurs */
-    errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
-    if (errorflags == RESET)
+  /* If no error occurs */
+  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
+  if (errorflags == RESET)
+  {
+    /* IRDA in mode Receiver ---------------------------------------------------*/
+    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
     {
-        /* IRDA in mode Receiver ---------------------------------------------------*/
-        if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-        {
-            IRDA_Receive_IT(hirda);
-            /* Clear RXNE interrupt flag */
-            __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST);
-        }
+      IRDA_Receive_IT(hirda);
+      return;
+    }
+  }  
+
+  /* If some errors occur */
+  cr3its = READ_REG(hirda->Instance->CR3);
+  if(   (errorflags != RESET) 
+     && (    ((cr3its & USART_CR3_EIE) != RESET)
+          || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
+  {
+    /* IRDA parity error interrupt occurred -------------------------------------*/
+    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
+    {
+      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_PEF);
+
+      hirda->ErrorCode |= HAL_IRDA_ERROR_PE;
     }
 
-    /* If some errors occur */
-    if((errorflags != RESET) && ((cr3its & (USART_CR3_EIE | USART_CR1_PEIE)) != RESET))
+    /* IRDA frame error interrupt occurred --------------------------------------*/
+    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
     {
-        /* IRDA parity error interrupt occurred -------------------------------------*/
-        if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-        {
-            __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_PEF);
-            hirda->ErrorCode |= HAL_IRDA_ERROR_PE;
-        }
+      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_FEF);
 
-        /* IRDA frame error interrupt occurred --------------------------------------*/
-        if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-        {
-            __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_FEF);
-            hirda->ErrorCode |= HAL_IRDA_ERROR_FE;
-        }
-
-        /* IRDA noise error interrupt occurred --------------------------------------*/
-        if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-        {
-            __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_NEF);
-            hirda->ErrorCode |= HAL_IRDA_ERROR_NE;
-        }
-
-        /* IRDA Over-Run interrupt occurred -----------------------------------------*/
-        if(((isrflags & USART_ISR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-        {
-            __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF);
-            hirda->ErrorCode |= HAL_IRDA_ERROR_ORE;
-        }
-
-        /* Call IRDA Error Call back function if need be --------------------------*/
-        if(hirda->ErrorCode != HAL_IRDA_ERROR_NONE)
-        {
-            /* IRDA in mode Receiver ---------------------------------------------------*/
-            if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
-            {
-                IRDA_Receive_IT(hirda);
-            }
-
-            /* If Overrun error occurs, or if any error occurs in DMA mode reception,
-            consider error as blocking */
-            if (((hirda->ErrorCode & HAL_UART_ERROR_ORE) != RESET) ||
-                    (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
-            {
-                /* Blocking error : transfer is aborted
-                Set the IRDA state ready to be able to start again the process,
-                Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-                IRDA_EndRxTransfer(hirda);
-
-                /* Disable the IRDA DMA Rx request if enabled */
-                if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
-                {
-                    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
-
-                    /* Abort the IRDA DMA Rx channel */
-                    if(hirda->hdmarx != NULL)
-                    {
-                        /* Set the IRDA DMA Abort callback :
-                        will lead to call HAL_IRDA_ErrorCallback() at end of DMA abort procedure */
-                        hirda->hdmarx->XferAbortCallback = IRDA_DMAAbortOnError;
-
-                        /* Abort DMA RX */
-                        if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
-                        {
-                          /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
-                          hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
-                        }
-                    }
-                    else
-                    {
-                        /* Call user error callback */
-                        HAL_IRDA_ErrorCallback(hirda);
-                    }
-                }
-                else
-                {
-                    /* Call user error callback */
-                    HAL_IRDA_ErrorCallback(hirda);
-                }
-            }
-            else
-            {
-                /* Non Blocking error : transfer could go on.
-                Error is notified to user through user error callback */
-                HAL_IRDA_ErrorCallback(hirda);
-                hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
-            }
-        }
-        return;
-
-    } /* End if some error occurs */
-
-    /* IRDA in mode Transmitter ------------------------------------------------*/
-    if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
-    {
-        IRDA_Transmit_IT(hirda);
-        return;
+      hirda->ErrorCode |= HAL_IRDA_ERROR_FE;
     }
 
-    /* IRDA in mode Transmitter (transmission end) -----------------------------*/
-    if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
+    /* IRDA noise error interrupt occurred --------------------------------------*/
+    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
     {
-        IRDA_EndTransmit_IT(hirda);
-        return;
+      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_NEF);
+
+      hirda->ErrorCode |= HAL_IRDA_ERROR_NE;
     }
+
+    /* IRDA Over-Run interrupt occurred -----------------------------------------*/
+    if(((isrflags & USART_ISR_ORE) != RESET) &&
+       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
+    {
+      __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF);
+
+      hirda->ErrorCode |= HAL_IRDA_ERROR_ORE;
+    }
+
+    /* Call IRDA Error Call back function if need be --------------------------*/
+    if(hirda->ErrorCode != HAL_IRDA_ERROR_NONE)
+    {
+      /* IRDA in mode Receiver ---------------------------------------------------*/
+      if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
+      {
+        IRDA_Receive_IT(hirda);
+      }
+
+      /* If Overrun error occurs, or if any error occurs in DMA mode reception,
+         consider error as blocking */
+      if (((hirda->ErrorCode & HAL_IRDA_ERROR_ORE) != RESET) ||
+          (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
+      {  
+        /* Blocking error : transfer is aborted
+           Set the IRDA state ready to be able to start again the process,
+           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
+        IRDA_EndRxTransfer(hirda);
+
+        /* Disable the IRDA DMA Rx request if enabled */
+        if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
+        {
+          CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+
+          /* Abort the IRDA DMA Rx channel */
+          if(hirda->hdmarx != NULL)
+          {
+            /* Set the IRDA DMA Abort callback : 
+               will lead to call HAL_IRDA_ErrorCallback() at end of DMA abort procedure */
+            hirda->hdmarx->XferAbortCallback = IRDA_DMAAbortOnError;
+
+            /* Abort DMA RX */
+            if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
+            {
+              /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
+              hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
+            }
+          }
+          else
+          {
+            /* Call user error callback */
+            HAL_IRDA_ErrorCallback(hirda);
+          }
+        }
+        else
+        {
+          /* Call user error callback */
+          HAL_IRDA_ErrorCallback(hirda);
+        }
+      }
+      else
+      {
+        /* Non Blocking error : transfer could go on. 
+           Error is notified to user through user error callback */
+        HAL_IRDA_ErrorCallback(hirda);
+        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+      }
+    }
+    return;
+
+  } /* End if some error occurs */
+
+  /* IRDA in mode Transmitter ------------------------------------------------*/
+  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
+  {
+    IRDA_Transmit_IT(hirda);
+    return;
+  }
+
+  /* IRDA in mode Transmitter (transmission end) -----------------------------*/
+  if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
+  {
+    IRDA_EndTransmit_IT(hirda);
+    return;
+  }
+
 }
 
 /**
-  * @brief  End ongoing Tx transfer on IRDA peripheral (following error detection or Transmit completion).
-  * @param  hirda: IRDA handle.
-  * @retval None
-  */
-static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda)
-{
-    /* Disable TXEIE and TCIE interrupts */
-    CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-
-    /* At end of Tx process, restore hirda->gState to Ready */
-    hirda->gState = HAL_IRDA_STATE_READY;
-}
-
-/**
-  * @brief  End ongoing Rx transfer on IRDA peripheral (following error detection or Reception completion).
-  * @param  hirda: IRDA handle.
-  * @retval None
-  */
-static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda)
-{
-    /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-    CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* At end of Rx process, restore huart->RxState to Ready */
-    hirda->RxState = HAL_IRDA_STATE_READY;
-}
-
-/**
-  * @brief  Tx Transfer complete callbacks.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-    /* Prevent unused argument(s) compilation warning */
-    UNUSED(hirda);
-
-    /* NOTE : This function should not be modified, when the callback is needed,
-              the HAL_IRDA_TxHalfCpltCallback can be implemented in the user file
-     */
-}
-
-/**
-  * @brief  Tx Half Transfer completed callbacks.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified USART module.
+  * @brief  Tx Transfer completed callback.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval None
   */
 __weak void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda)
 {
-    /* Prevent unused argument(s) compilation warning */
-    UNUSED(hirda);
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
 
-    /* NOTE : This function should not be modified, when the callback is needed,
-              the HAL_IRDA_TxCpltCallback can be implemented in the user file
-     */
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_IRDA_TxCpltCallback can be implemented in the user file.
+   */
 }
 
 /**
-  * @brief  Rx Transfer complete callbacks.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
+  * @brief  Tx Half Transfer completed callback.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified USART module.
+  * @retval None
+  */
+__weak void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_IRDA_TxHalfCpltCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  Rx Transfer completed callback.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval None
+  */
+__weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_IRDA_RxCpltCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  Rx Half Transfer complete callback.
+  * @param  hirda: Pointer to a IRDA_HandleTypeDef structure that contains
   *                the configuration information for the specified IRDA module.
   * @retval None
   */
 __weak void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
 {
-    /* Prevent unused argument(s) compilation warning */
-    UNUSED(hirda);
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
 
-    /* NOTE : This function should not be modified, when the callback is needed,
-              the HAL_IRDA_RxHalfCpltCallback can be implemented in the user file
-     */
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_IRDA_RxHalfCpltCallback can be implemented in the user file.
+   */
 }
 
 /**
-  * @brief  Rx Half Transfer complete callbacks.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @retval None
-  */
-__weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda)
-{
-    /* Prevent unused argument(s) compilation warning */
-    UNUSED(hirda);
-
-    /* NOTE : This function should not be modified, when the callback is needed,
-              the HAL_IRDA_RxCpltCallback can be implemented in the user file
-     */
-}
-
-/**
-  * @brief IRDA error callbacks.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief  IRDA error callback.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval None
   */
 __weak void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda)
 {
-    /* Prevent unused argument(s) compilation warning */
-    UNUSED(hirda);
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
 
-    /* NOTE : This function should not be modified, when the callback is needed,
-              the HAL_IRDA_ErrorCallback can be implemented in the user file
-     */
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_IRDA_ErrorCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  IRDA Abort Complete callback.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval None
+  */
+__weak void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_IRDA_AbortCpltCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  IRDA Abort Complete callback.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval None
+  */
+__weak void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_IRDA_AbortTransmitCpltCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  IRDA Abort Receive Complete callback.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval None
+  */
+__weak void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hirda);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_IRDA_AbortReceiveCpltCallback can be implemented in the user file.
+   */
 }
 
 /**
   * @}
   */
 
-/** @defgroup IRDA_Exported_Functions_Group3 Peripheral Control functions
-  *  @brief   IRDA control functions
+/** @defgroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions
+  *  @brief   IRDA State and Errors functions
   *
 @verbatim
- ===============================================================================
-                      ##### Peripheral Control functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to control the IRDA.
-     (+) HAL_IRDA_GetState() API can be helpful to check in run-time the state of the IRDA peripheral.
-     (+) IRDA_SetConfig() API is used to configure the IRDA communications parameters.
+  ==============================================================================
+            ##### Peripheral State and Error functions #####
+  ==============================================================================
+  [..]
+    This subsection provides a set of functions allowing to return the State of IrDA
+    communication process and also return Peripheral Errors occurred during communication process
+     (+) HAL_IRDA_GetState() API can be helpful to check in run-time the state
+         of the IRDA peripheral handle.
+     (+) HAL_IRDA_GetError() checks in run-time errors that could occur during
+         communication.
+
 @endverbatim
   * @{
   */
 
 /**
-  * @brief  Returns the IRDA state.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief  Return the IRDA handle state.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval HAL state
   */
 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda)
 {
-    uint32_t temp1 = 0x00U, temp2 = 0x00U;
-    temp1 = hirda->gState;
-    temp2 = hirda->RxState;
+  /* Return IRDA handle state */
+  uint32_t temp1= 0x00, temp2 = 0x00;
+  temp1 = hirda->gState;
+  temp2 = hirda->RxState;
 
-    return (HAL_IRDA_StateTypeDef)(temp1 | temp2);
+  return (HAL_IRDA_StateTypeDef)(temp1 | temp2);
 }
 
 /**
-  * @brief  Return the IRDA error code
-  * @param  hirda : pointer to a IRDA_HandleTypeDef structure that contains
-  *              the configuration information for the specified IRDA.
-* @retval IRDA Error Code
-*/
+  * @brief  Return the IRDA handle error code.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval IRDA Error Code
+  */
 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda)
 {
-    uint32_t temp1 = 0x00U, temp2 = 0x00U;
-    temp1 = hirda->gState;
-    temp2 = hirda->RxState;
-
-    return (HAL_IRDA_StateTypeDef)(temp1 | temp2);
+  return hirda->ErrorCode;
 }
 
 /**
@@ -1178,390 +1662,584 @@ uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda)
   */
 
 /**
-  * @brief Configure the IRDA peripheral
-  * @param hirda: irda handle
+  * @}
+  */
+
+/** @defgroup IRDA_Private_Functions IRDA Private Functions
+  * @{
+  */
+
+/**
+  * @brief  Configure the IRDA peripheral.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval None
   */
-static void IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
+static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
 {
-    uint32_t tmpreg      = 0x00000000U;
-    uint32_t clocksource = 0x00000000U;
+  uint32_t tmpreg                     = 0x00000000;
+  IRDA_ClockSourceTypeDef clocksource = IRDA_CLOCKSOURCE_UNDEFINED;
+  HAL_StatusTypeDef ret               = HAL_OK;
 
-    /* Check the communication parameters */
-    assert_param(IS_IRDA_BAUDRATE(hirda->Init.BaudRate));
-    assert_param(IS_IRDA_WORD_LENGTH(hirda->Init.WordLength));
-    assert_param(IS_IRDA_PARITY(hirda->Init.Parity));
-    assert_param(IS_IRDA_TX_RX_MODE(hirda->Init.Mode));
-    assert_param(IS_IRDA_PRESCALER(hirda->Init.Prescaler));
-    assert_param(IS_IRDA_POWERMODE(hirda->Init.PowerMode));
-    /*-------------------------- USART CR1 Configuration -----------------------*/
-    /* Configure the IRDA Word Length, Parity and transfer Mode:
-    Set the M bits according to hirda->Init.WordLength value
-    Set PCE and PS bits according to hirda->Init.Parity value
-    Set TE and RE bits according to hirda->Init.Mode value */
-    tmpreg = (uint32_t)hirda->Init.WordLength | hirda->Init.Parity | hirda->Init.Mode ;
+  /* Check the communication parameters */
+  assert_param(IS_IRDA_BAUDRATE(hirda->Init.BaudRate));
+  assert_param(IS_IRDA_WORD_LENGTH(hirda->Init.WordLength));
+  assert_param(IS_IRDA_PARITY(hirda->Init.Parity));
+  assert_param(IS_IRDA_TX_RX_MODE(hirda->Init.Mode));
+  assert_param(IS_IRDA_PRESCALER(hirda->Init.Prescaler));
+  assert_param(IS_IRDA_POWERMODE(hirda->Init.PowerMode));
 
-    MODIFY_REG(hirda->Instance->CR1, IRDA_CR1_FIELDS, tmpreg);
+  /*-------------------------- USART CR1 Configuration -----------------------*/
+  /* Configure the IRDA Word Length, Parity and transfer Mode:
+     Set the M bits according to hirda->Init.WordLength value
+     Set PCE and PS bits according to hirda->Init.Parity value
+     Set TE and RE bits according to hirda->Init.Mode value */
+  tmpreg = (uint32_t)hirda->Init.WordLength | hirda->Init.Parity | hirda->Init.Mode ;
 
-    /*-------------------------- USART CR3 Configuration -----------------------*/
-    MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.PowerMode);
+  MODIFY_REG(hirda->Instance->CR1, IRDA_CR1_FIELDS, tmpreg);
 
-    /*-------------------------- USART GTPR Configuration ----------------------*/
-    MODIFY_REG(hirda->Instance->GTPR, (uint32_t)USART_GTPR_PSC, hirda->Init.Prescaler);
+  /*-------------------------- USART CR3 Configuration -----------------------*/
+  MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.PowerMode);
 
-    /*-------------------------- USART BRR Configuration -----------------------*/
-    IRDA_GETCLOCKSOURCE(hirda, clocksource);
-    switch (clocksource)
-    {
+  /*-------------------------- USART GTPR Configuration ----------------------*/
+  MODIFY_REG(hirda->Instance->GTPR, USART_GTPR_PSC, hirda->Init.Prescaler);
+
+  /*-------------------------- USART BRR Configuration -----------------------*/
+  IRDA_GETCLOCKSOURCE(hirda, clocksource);
+  switch (clocksource)
+  {
     case IRDA_CLOCKSOURCE_PCLK1:
-        hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
-        break;
+      hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
+      break;
     case IRDA_CLOCKSOURCE_PCLK2:
-        hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK2Freq() + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
-        break;
+      hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK2Freq() + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
+      break;
     case IRDA_CLOCKSOURCE_HSI:
-        hirda->Instance->BRR = (uint16_t)((HSI_VALUE + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
-        break;
+      hirda->Instance->BRR = (uint16_t)((HSI_VALUE + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
+      break;
     case IRDA_CLOCKSOURCE_SYSCLK:
-        hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
-        break;
+      hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
+      break;
     case IRDA_CLOCKSOURCE_LSE:
-        hirda->Instance->BRR = (uint16_t)((LSE_VALUE + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
-        break;
+      hirda->Instance->BRR = (uint16_t)((LSE_VALUE  + (hirda->Init.BaudRate/2)) / hirda->Init.BaudRate);
+      break;
+    case IRDA_CLOCKSOURCE_UNDEFINED:
     default:
-        break;
-    }
+      ret = HAL_ERROR;
+      break;
+  }
+
+  return ret;
 }
 
 /**
-  * @brief Check the IRDA Idle State
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
+  * @brief  Check the IRDA Idle State.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
   * @retval HAL status
   */
 static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda)
 {
-    uint32_t tickstart = 0U;
+  uint32_t tickstart = 0;
 
-    /* Initialize the IRDA ErrorCode */
-    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+  /* Initialize the IRDA ErrorCode */
+  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
 
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
+  /* Init tickstart for timeout managment*/
+  tickstart = HAL_GetTick();
 
-    /* Check if the Transmitter is enabled */
-    if((hirda->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
+  /* Check if the Transmitter is enabled */
+  if((hirda->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
+  {
+    /* Wait until TEACK flag is set */
+    if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_TEACK, RESET, tickstart, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK)
     {
-        /* Wait until TEACK flag is set */
-        if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_TEACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)
-        {
-            return HAL_TIMEOUT;
-        }
+      /* Timeout occurred */
+      return HAL_TIMEOUT;
     }
-    /* Check if the Receiver is enabled */
-    if((hirda->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
+  }
+  /* Check if the Receiver is enabled */
+  if((hirda->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
+  {
+    /* Wait until REACK flag is set */
+    if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_REACK, RESET, tickstart, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK)
     {
-        if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_REACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)
-        {
-            return HAL_TIMEOUT;
-        }
+      /* Timeout occurred */
+      return HAL_TIMEOUT;
     }
-    /* Process Unlocked */
-    __HAL_UNLOCK(hirda);
+  }
 
-    /* Initialize the IRDA state*/
-    hirda->gState= HAL_IRDA_STATE_READY;
-    hirda->RxState= HAL_IRDA_STATE_READY;
+  /* Initialize the IRDA state*/
+  hirda->gState  = HAL_IRDA_STATE_READY;
+  hirda->RxState = HAL_IRDA_STATE_READY;
 
-    return HAL_OK;
+  /* Process Unlocked */
+  __HAL_UNLOCK(hirda);
+
+  return HAL_OK;
 }
 
 /**
-  * @brief  This function handles IRDA Communication Timeout.
-  * @param  hirda pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @param  Flag specifies the IRDA flag to check.
-  * @param  Status The new Flag status (SET or RESET).
+  * @brief  Handle IRDA Communication Timeout.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @param  Flag Specifies the IRDA flag to check.
+  * @param  Status Flag status (SET or RESET)
   * @param  Tickstart Tick start value
   * @param  Timeout Timeout duration
   * @retval HAL status
   */
 static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 {
-    /* Wait until flag is set */
-    while((__HAL_IRDA_GET_FLAG(hirda, Flag) ? SET : RESET) == Status)
+  /* Wait until flag is set */
+  while((__HAL_IRDA_GET_FLAG(hirda, Flag) ? SET : RESET) == Status)
+  {
+    /* Check for the Timeout */
+    if(Timeout != HAL_MAX_DELAY)
     {
-        /* Check for the Timeout */
-        if(Timeout != HAL_MAX_DELAY)
-        {
-            if((Timeout == 0)||((HAL_GetTick() - Tickstart ) > Timeout))
-            {
-                /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-                CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
-                CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+      if((Timeout == 0) || ((HAL_GetTick()-Tickstart) > Timeout))
+      {
+        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
+        CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
+        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
 
-                hirda->gState= HAL_IRDA_STATE_READY;
-                hirda->RxState= HAL_IRDA_STATE_READY;
+        hirda->gState  = HAL_IRDA_STATE_READY;
+        hirda->RxState = HAL_IRDA_STATE_READY;
 
-                /* Process Unlocked */
-                __HAL_UNLOCK(hirda);
-
-                return HAL_TIMEOUT;
-            }
-        }
+        /* Process Unlocked */
+        __HAL_UNLOCK(hirda);
+        return HAL_TIMEOUT;
+      }
     }
-    return HAL_OK;
+  }
+  return HAL_OK;
 }
 
+
 /**
-  * @brief  Send an amount of data in non blocking mode.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @retval HAL status
+  * @brief  End ongoing Tx transfer on IRDA peripheral (following error detection or Transmit completion).
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval None
   */
-static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
+static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda)
 {
-    uint16_t* tmp;
+  /* Disable TXEIE and TCIE interrupts */
+  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
 
-    /* Check that a Tx process is ongoing */
-    if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-    {
-        if(hirda->Init.WordLength == IRDA_WORDLENGTH_9B)
-        {
-            tmp = (uint16_t*) hirda->pTxBuffPtr;
-            hirda->Instance->RDR = (uint16_t)(*tmp & (uint16_t)0x01FFU);
-            if(hirda->Init.Parity == IRDA_PARITY_NONE)
-            {
-                hirda->pTxBuffPtr += 2U;
-            }
-            else
-            {
-                hirda->pTxBuffPtr += 1U;
-            }
-        }
-        else
-        {
-            hirda->Instance->RDR = (uint8_t)(*hirda->pTxBuffPtr++ & (uint8_t)0x00FFU);
-        }
-
-        if(--hirda->TxXferCount == 0U)
-        {
-            /* Disable the IRDA Transmit Data Register Empty Interrupt */
-            CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
-
-            /* Enable the IRDA Transmit Complete Interrupt */
-            SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-        }
-
-        return HAL_OK;
-    }
-    else
-    {
-        return HAL_BUSY;
-    }
+  /* At end of Tx process, restore hirda->gState to Ready */
+  hirda->gState = HAL_IRDA_STATE_READY;
 }
 
+
 /**
-  * @brief  Wraps up transmission in non blocking mode.
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @retval HAL status
+  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval None
   */
-static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda)
+static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda)
 {
-    /* Disable the IRDA Transmit Complete Interrupt */
-    CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
+  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+  CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
 
-    /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
-    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-    /* Tx process is ended, restore hirda->gState to Ready */
-    hirda->gState = HAL_IRDA_STATE_READY;
-
-    HAL_IRDA_TxCpltCallback(hirda);
-
-    return HAL_OK;
+  /* At end of Rx process, restore hirda->RxState to Ready */
+  hirda->RxState = HAL_IRDA_STATE_READY;
 }
 
-/**
-  * @brief Receive an amount of data in non blocking mode.
-  *         Function called under interruption only, once
-  *         interruptions have been enabled by HAL_IRDA_Receive_IT()
-  * @param  hirda: pointer to a IRDA_HandleTypeDef structure that contains
-  *                the configuration information for the specified IRDA module.
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda)
-{
-    uint16_t* tmp;
-    uint16_t  uhdata;
-    uint16_t  uhMask = hirda->Mask;
-
-    if(hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-    {
-        uhdata = (uint16_t) READ_REG(hirda->Instance->RDR);
-        if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
-        {
-            tmp = (uint16_t*) hirda->pRxBuffPtr ;
-            *tmp = (uint16_t)(uhdata & uhMask);
-            hirda->pRxBuffPtr  +=2U;
-        }
-        else
-        {
-            *hirda->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask);
-        }
-
-        if(--hirda->RxXferCount == 0U)
-        {
-            CLEAR_BIT(hirda->Instance->CR1, USART_CR1_RXNEIE);
-
-            /* Disable the IRDA Parity Error Interrupt */
-            CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-
-            /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
-            CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
-
-            /* Rx process is completed, restore hirda->RxState to Ready */
-            hirda->RxState = HAL_IRDA_STATE_READY;
-
-            HAL_IRDA_RxCpltCallback(hirda);
-
-            return HAL_OK;
-        }
-        return HAL_OK;
-    }
-    else
-    {
-        /* Clear RXNE interrupt flag */
-        __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST);
-        return HAL_BUSY;
-    }
-}
 
 /**
-  * @brief DMA IRDA Tx transfer completed callback
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
+  * @brief  DMA IRDA transmit process complete callback.
+  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
+  *              the configuration information for the specified DMA module.
   * @retval None
   */
 static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma)
 {
-    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
 
-    /* DMA Normal mode*/
-    if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
-    {
-        hirda->TxXferCount = 0U;
+  /* DMA Normal mode */
+  if ( HAL_IS_BIT_CLR(hdma->Instance->CR, DMA_SxCR_CIRC) )
+  {
+    hirda->TxXferCount = 0;
 
-        /* Disable the DMA transfer for transmit request by setting the DMAT bit
-           in the IRDA CR3 register */
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+    /* Disable the DMA transfer for transmit request by resetting the DMAT bit
+       in the IRDA CR3 register */
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
+
+    /* Enable the IRDA Transmit Complete Interrupt */
+    SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
+  }
+  /* DMA Circular mode */
+  else
+  {
+    HAL_IRDA_TxCpltCallback(hirda);
+  }
 
-        /* Enable the IRDA Transmit Complete Interrupt */
-        SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
-    }
-    /* DMA Circular mode */
-    else
-    {
-        HAL_IRDA_TxCpltCallback(hirda);
-    }
 }
 
 /**
-  * @brief DMA IRDA receive process half complete callback
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
+  * @brief  DMA IRDA transmit process half complete callback.
+  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
+  *              the configuration information for the specified DMA module.
   * @retval None
   */
 static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma)
 {
-    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
 
-    HAL_IRDA_TxHalfCpltCallback(hirda);
+  HAL_IRDA_TxHalfCpltCallback(hirda);
 }
 
 /**
-  * @brief DMA IRDA Rx Transfer completed callback
-  * @param hdma: DMA handle
+  * @brief  DMA IRDA receive process complete callback.
+  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
+  *               the configuration information for the specified DMA module.
   * @retval None
   */
 static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
 {
-    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
 
-    /* DMA Normal mode */
-    if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
-    {
-        hirda->RxXferCount = 0U;
+  /* DMA Normal mode */
+  if ( HAL_IS_BIT_CLR(hdma->Instance->CR, DMA_SxCR_CIRC) )
+  {
+    hirda->RxXferCount = 0;
 
-        /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-        CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+    /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
+    CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
 
-        /* Disable the DMA transfer for the receiver request by setting the DMAR bit
-           in the IRDA CR3 register */
-        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
+    /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
+       in the IRDA CR3 register */
+    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
 
-        /* At end of Rx process, restore hirda->RxState to Ready */
-        hirda->RxState = HAL_IRDA_STATE_READY;
-    }
+    /* At end of Rx process, restore hirda->RxState to Ready */
+    hirda->RxState = HAL_IRDA_STATE_READY;
+  }
 
-    HAL_IRDA_RxCpltCallback(hirda);
+  HAL_IRDA_RxCpltCallback(hirda);
 }
 
 /**
-  * @brief DMA IRDA receive process half complete callback
-  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
-  *                the configuration information for the specified DMA module.
+  * @brief DMA IRDA receive process half complete callback.
+  * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
+  *              the configuration information for the specified DMA module.
   * @retval None
   */
 static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma)
 {
-    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
 
-    HAL_IRDA_RxHalfCpltCallback(hirda);
+  HAL_IRDA_RxHalfCpltCallback(hirda);
 }
 
 /**
-  * @brief DMA IRDA communication error callback
-  * @param hdma: DMA handle
+  * @brief  DMA IRDA communication error callback.
+  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
+  *              the configuration information for the specified DMA module.
   * @retval None
   */
 static void IRDA_DMAError(DMA_HandleTypeDef *hdma)
 {
-    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
 
-    hirda->RxXferCount = 0U;
-    hirda->TxXferCount = 0U;
+  /* Stop IRDA DMA Tx request if ongoing */
+  if (  (hirda->gState == HAL_IRDA_STATE_BUSY_TX)
+      &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)) )
+  {
+    hirda->TxXferCount = 0;
+    IRDA_EndTxTransfer(hirda);
+  }
 
-    /* Stop IRDA DMA Tx request if ongoing */
-    if (  (hirda->gState == HAL_IRDA_STATE_BUSY_TX)
-            &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)) )
-    {
-        IRDA_EndTxTransfer(hirda);
-    }
+  /* Stop IRDA DMA Rx request if ongoing */
+  if (  (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
+      &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)) )
+  {
+    hirda->RxXferCount = 0;
+    IRDA_EndRxTransfer(hirda);
+  }
 
-    /* Stop IRDA DMA Rx request if ongoing */
-    if (  (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
-            &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)) )
-    {
-        IRDA_EndRxTransfer(hirda);
-    }
-
-    hirda->ErrorCode |= HAL_IRDA_ERROR_DMA;
-
-    HAL_IRDA_ErrorCallback(hirda);
+  hirda->ErrorCode |= HAL_IRDA_ERROR_DMA;
+  HAL_IRDA_ErrorCallback(hirda);
 }
 
 /**
-  * @}
+  * @brief  DMA IRDA communication abort callback, when initiated by HAL services on Error
+  *         (To be called at end of DMA Abort procedure following error occurrence).
+  * @param  hdma DMA handle.
+  * @retval None
   */
+static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma)
+{
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
+  hirda->RxXferCount = 0;
+  hirda->TxXferCount = 0;
+
+  HAL_IRDA_ErrorCallback(hirda);
+}
+
+/**
+  * @brief  DMA IRDA Tx communication abort callback, when initiated by user
+  *         (To be called at end of DMA Tx Abort procedure following user abort request).
+  * @note   When this callback is executed, User Abort complete call back is called only if no
+  *         Abort still ongoing for Rx DMA Handle.
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void IRDA_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef* )(hdma->Parent);
+  
+  hirda->hdmatx->XferAbortCallback = NULL;
+
+  /* Check if an Abort process is still ongoing */
+  if(hirda->hdmarx != NULL)
+  {
+    if(hirda->hdmarx->XferAbortCallback != NULL)
+    {
+      return;
+    }
+  }
+  
+  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
+  hirda->TxXferCount = 0;
+  hirda->RxXferCount = 0;
+
+  /* Reset errorCode */
+  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
+
+  /* Restore hirda->gState and hirda->RxState to Ready */
+  hirda->gState  = HAL_IRDA_STATE_READY;
+  hirda->RxState = HAL_IRDA_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_IRDA_AbortCpltCallback(hirda);
+}
+
+
+/**
+  * @brief  DMA IRDA Rx communication abort callback, when initiated by user
+  *         (To be called at end of DMA Rx Abort procedure following user abort request).
+  * @note   When this callback is executed, User Abort complete call back is called only if no
+  *         Abort still ongoing for Tx DMA Handle.
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void IRDA_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef* )(hdma->Parent);
+  
+  hirda->hdmarx->XferAbortCallback = NULL;
+
+  /* Check if an Abort process is still ongoing */
+  if(hirda->hdmatx != NULL)
+  {
+    if(hirda->hdmatx->XferAbortCallback != NULL)
+    {
+      return;
+    }
+  }
+  
+  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
+  hirda->TxXferCount = 0;
+  hirda->RxXferCount = 0;
+
+  /* Reset errorCode */
+  hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
+
+  /* Restore hirda->gState and hirda->RxState to Ready */
+  hirda->gState  = HAL_IRDA_STATE_READY;
+  hirda->RxState = HAL_IRDA_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_IRDA_AbortCpltCallback(hirda);
+}
+
+
+/**
+  * @brief  DMA IRDA Tx communication abort callback, when initiated by user by a call to
+  *         HAL_IRDA_AbortTransmit_IT API (Abort only Tx transfer)
+  *         (This callback is executed at end of DMA Tx Abort procedure following user abort request,
+  *         and leads to user Tx Abort Complete callback execution).
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void IRDA_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  IRDA_HandleTypeDef* hirda = (IRDA_HandleTypeDef*)(hdma->Parent);
+
+  hirda->TxXferCount = 0;
+
+  /* Restore hirda->gState to Ready */
+  hirda->gState = HAL_IRDA_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_IRDA_AbortTransmitCpltCallback(hirda);
+}
+
+/**
+  * @brief  DMA IRDA Rx communication abort callback, when initiated by user by a call to
+  *         HAL_IRDA_AbortReceive_IT API (Abort only Rx transfer)
+  *         (This callback is executed at end of DMA Rx Abort procedure following user abort request,
+  *         and leads to user Rx Abort Complete callback execution).
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+
+  hirda->RxXferCount = 0;
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_OREF | IRDA_CLEAR_NEF | IRDA_CLEAR_PEF | IRDA_CLEAR_FEF);
+
+  /* Restore hirda->RxState to Ready */
+  hirda->RxState = HAL_IRDA_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_IRDA_AbortReceiveCpltCallback(hirda);
+}
+
+/**
+  * @brief  Send an amount of data in interrupt mode.
+  * @note   Function is called under interruption only, once
+  *         interruptions have been enabled by HAL_IRDA_Transmit_IT().
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
+{
+  uint16_t* tmp;
+
+  /* Check that a Tx process is ongoing */
+  if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
+  {
+    if(hirda->TxXferCount == 0)
+    {
+      /* Disable the IRDA Transmit Data Register Empty Interrupt */
+      CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);
+
+      /* Enable the IRDA Transmit Complete Interrupt */
+      SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
+
+      return HAL_OK;
+    }
+    else
+    {
+      if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
+      {
+        tmp = (uint16_t*) hirda->pTxBuffPtr;
+        hirda->Instance->TDR = (*tmp & (uint16_t)0x01FF);
+        hirda->pTxBuffPtr += 2;
+      }
+      else
+      {
+        hirda->Instance->TDR = (uint8_t)(*hirda->pTxBuffPtr++ & (uint8_t)0xFF);
+      }
+      hirda->TxXferCount--;
+
+      return HAL_OK;
+    }
+  }
+  else
+  {
+    return HAL_BUSY;
+  }
+}
+
+/**
+  * @brief  Wrap up transmission in non-blocking mode.
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda)
+{
+  /* Disable the IRDA Transmit Complete Interrupt */
+  CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
+
+  /* Tx process is ended, restore hirda->gState to Ready */
+  hirda->gState = HAL_IRDA_STATE_READY;
+
+  HAL_IRDA_TxCpltCallback(hirda);
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Receive an amount of data in interrupt mode.
+  * @note   Function is called under interruption only, once
+  *         interruptions have been enabled by HAL_IRDA_Receive_IT()
+  * @param  hirda Pointer to a IRDA_HandleTypeDef structure that contains
+  *               the configuration information for the specified IRDA module.
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda)
+{
+  uint16_t* tmp;
+  uint16_t  uhMask = hirda->Mask;
+  uint16_t  uhdata;
+
+  /* Check that a Rx process is ongoing */
+  if (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
+  {
+    uhdata = (uint16_t) READ_REG(hirda->Instance->RDR);
+    if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
+    {
+      tmp = (uint16_t*) hirda->pRxBuffPtr ;
+      *tmp = (uint16_t)(uhdata & uhMask);
+      hirda->pRxBuffPtr +=2;
+    }
+    else
+    {
+      *hirda->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask);
+    }
+
+    if(--hirda->RxXferCount == 0)
+    {
+      /* Disable the IRDA Parity Error Interrupt and RXNE interrupt */
+      CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+
+      /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
+      CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);
+
+      /* Rx process is completed, restore hirda->RxState to Ready */
+      hirda->RxState = HAL_IRDA_STATE_READY;
+
+      HAL_IRDA_RxCpltCallback(hirda);
+
+      return HAL_OK;
+    }
+
+    return HAL_OK;
+  }
+  else
+  {
+    /* Clear RXNE interrupt flag */
+    __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST);
+
+    return HAL_BUSY;
+  }
+}
 
 /**
   * @}
   */
 
 #endif /* HAL_IRDA_MODULE_ENABLED */
+/**
+  * @}
+  */
 
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.h
index deb8253efb..b5e23eb700 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_irda.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of IRDA HAL module.
   ******************************************************************************
   * @attention
@@ -157,7 +157,8 @@ typedef enum
   IRDA_CLOCKSOURCE_PCLK2      = 0x01U,    /*!< PCLK2 clock source  */
   IRDA_CLOCKSOURCE_HSI        = 0x02U,    /*!< HSI clock source    */
   IRDA_CLOCKSOURCE_SYSCLK     = 0x04U,    /*!< SYSCLK clock source */
-  IRDA_CLOCKSOURCE_LSE        = 0x08U     /*!< LSE clock source     */
+  IRDA_CLOCKSOURCE_LSE        = 0x08U,    /*!< LSE clock source     */
+  IRDA_CLOCKSOURCE_UNDEFINED  = 0x10      /*!< Undefined clock source */
 }IRDA_ClockSourceTypeDef;
 
 /** 
@@ -173,13 +174,13 @@ typedef struct
 
   uint16_t                 TxXferSize;       /* IRDA Tx Transfer size              */
 
-  uint16_t                 TxXferCount;      /* IRDA Tx Transfer Counter           */
+  __IO uint16_t            TxXferCount;      /* IRDA Tx Transfer Counter           */
 
   uint8_t                  *pRxBuffPtr;      /* Pointer to IRDA Rx transfer Buffer */
 
   uint16_t                 RxXferSize;       /* IRDA Rx Transfer size              */
 
-  uint16_t                 RxXferCount;      /* IRDA Rx Transfer Counter           */
+  __IO uint16_t            RxXferCount;      /* IRDA Rx Transfer Counter           */
 
   uint16_t                 Mask;             /* IRDA RX RDR register mask         */
 
@@ -401,6 +402,60 @@ typedef struct
   */
 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
 
+/** @brief  Flush the IRDA DR register.
+  * @param  __HANDLE__: specifies the IRDA Handle.
+  * @retval None
+  */
+#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__)                            \
+    do{                                                                    \
+         SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \
+         SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \
+      } while(0)
+
+/** @brief  Clear the specified IRDA pending flag.
+  * @param  __HANDLE__: specifies the IRDA Handle.
+  * @param  __FLAG__: specifies the flag to check.
+  *          This parameter can be any combination of the following values:
+  *            @arg @ref IRDA_CLEAR_PEF
+  *            @arg @ref IRDA_CLEAR_FEF
+  *            @arg @ref IRDA_CLEAR_NEF
+  *            @arg @ref IRDA_CLEAR_OREF
+  *            @arg @ref IRDA_CLEAR_TCF
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
+
+/** @brief  Clear the IRDA PE pending flag.
+  * @param  __HANDLE__: specifies the IRDA Handle.
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)    __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_PEF)
+
+
+/** @brief  Clear the IRDA FE pending flag.
+  * @param  __HANDLE__: specifies the IRDA Handle.
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__)    __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_FEF)
+
+/** @brief  Clear the IRDA NE pending flag.
+  * @param  __HANDLE__: specifies the IRDA Handle.
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__)    __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_NEF)
+
+/** @brief  Clear the IRDA ORE pending flag.
+  * @param  __HANDLE__: specifies the IRDA Handle.
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__)    __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_OREF)
+
+/** @brief  Clear the IRDA IDLE pending flag.
+  * @param  __HANDLE__: specifies the IRDA Handle.
+  * @retval None
+  */
+#define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__)   __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_IDLEF)
+
 /** @brief  Check whether the specified IRDA flag is set or not.
   * @param  __HANDLE__: specifies the IRDA Handle.
   *         The Handle Instance which can be USART1 or USART2.
@@ -575,12 +630,24 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData
 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
+/* Transfer Abort functions */
+HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda);
+HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda);
+
 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda);
+void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda);
+
 /**
  * @}
  */
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda_ex.h
index bfbe113de0..04e80d0ab3 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_irda_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_irda_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of IRDA HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.c
index 01e2db86d4..0616729f5f 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_iwdg.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   IWDG HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Independent Watchdog (IWDG) peripheral:
@@ -50,20 +50,20 @@
   ==============================================================================
   [..]
     (#) Use IWDG using HAL_IWDG_Init() function to :
-      (+) Enable instance by writing Start keyword in IWDG_KEY register. LSI 
+      (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI 
            clock is forced ON and IWDG counter starts downcounting.
-      (+) Enable write access to configuration register: IWDG_PR, IWDG_RLR & 
+      (++) Enable write access to configuration register: IWDG_PR, IWDG_RLR & 
            IWDG_WINR.
-      (+) Configure the IWDG prescaler and counter reload value. This reload 
+      (++) Configure the IWDG prescaler and counter reload value. This reload 
            value will be loaded in the IWDG counter each time the watchdog is 
            reloaded, then the IWDG will start counting down from this value.
-      (+) wait for status flags to be reset"
-      (+) Depending on window parameter:
-        (++) If Window Init parameter is same as Window register value, 
-             nothing more is done but reload counter value in order to exit 
-             function withy exact time base.
-        (++) Else modify Window register. This will automatically reload
-             watchdog counter.
+      (++) wait for status flags to be reset
+      (++) Depending on window parameter:
+         (+++) If Window Init parameter is same as Window register value, 
+               nothing more is done but reload counter value in order to exit 
+               function withy exact time base.
+         (+++) Else modify Window register. This will automatically reload
+               watchdog counter.
 
     (#) Then the application program must refresh the IWDG counter at regular
         intervals during normal operation to prevent an MCU reset, using
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.h
index 4a47853b3b..3cb3c5a3de 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_iwdg.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of IWDG HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.c
index e6d986e393..a63678f2f8 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_jpeg.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   JPEG HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the JPEG encoder/decoder peripheral:
@@ -60,57 +60,57 @@
          consumed by the peripheral and to ask for a new data chunk if the operation
          (encoding/decoding) has not been complete yet.
 
-         This CallBack should be implemented in the application side. It should 
-         call the function HAL_JPEG_ConfigInputBuffer if new input data are available, 
-         or call HAL_JPEG_Pause with parameter XferSelection set to "JPEG_PAUSE_RESUME_INPUT" 
-         to inform the JPEG HAL driver that the ongoing operation shall pause waiting for the
-         application to provide a new input data chunk. 
-         Once the application succeed getting new data and if the input has been paused,
-         the application can call the function HAL_JPEG_ConfigInputBuffer to set the new
-         input buffer and size, then resume the JPEG HAL input by calling new function HAL_JPEG_Resume.
-         If the application has ended feeding the HAL JPEG with input data (no more input data), the application 
-         Should call the function “HAL_JPEG_ConfigInputBuffer” (within the callback HAL_JPEG_GetDataCallback) 
-         with the parameter “InDataLength” set to zero.
+        (++) This CallBack should be implemented in the application side. It should 
+             call the function HAL_JPEG_ConfigInputBuffer if new input data are available, 
+             or call HAL_JPEG_Pause with parameter XferSelection set to JPEG_PAUSE_RESUME_INPUT 
+             to inform the JPEG HAL driver that the ongoing operation shall pause waiting for the
+             application to provide a new input data chunk. 
+             Once the application succeed getting new data and if the input has been paused,
+             the application can call the function HAL_JPEG_ConfigInputBuffer to set the new
+             input buffer and size, then resume the JPEG HAL input by calling new function HAL_JPEG_Resume.
+             If the application has ended feeding the HAL JPEG with input data (no more input data), the application 
+             Should call the function HAL_JPEG_ConfigInputBuffer (within the callback HAL_JPEG_GetDataCallback) 
+             with the parameter InDataLength set to zero.
        
-         The mechanism of HAL_JPEG_ConfigInputBuffer/HAL_JPEG_Pause/HAL_JPEG_Resume allows
-         to the application to provide the input data (for encoding or decoding) by chunks.
-         If the new input data chunk is not available (because data should be read from an input file
-         for example) the application can pause the JPEG input (using function HAL_JPEG_Pause)
-         Once the new input data chunk is available ( read from a file for example), the application
-         can call the function "HAL_JPEG_ConfigInputBuffer" to provide the HAL with the new chunk
-         then resume the JPEG HAL input by calling function "HAL_JPEG_Resume".
+         (++) The mechanism of HAL_JPEG_ConfigInputBuffer/HAL_JPEG_Pause/HAL_JPEG_Resume allows
+              to the application to provide the input data (for encoding or decoding) by chunks.
+              If the new input data chunk is not available (because data should be read from an input file
+              for example) the application can pause the JPEG input (using function HAL_JPEG_Pause)
+              Once the new input data chunk is available ( read from a file for example), the application
+              can call the function HAL_JPEG_ConfigInputBuffer to provide the HAL with the new chunk
+              then resume the JPEG HAL input by calling function HAL_JPEG_Resume.
         
-         The application can call  functions “HAL_JPEG_ConfigInputBuffer “ then "HAL_JPEG_Resume".
-         any time (outside the HAL_JPEG_GetDataCallback)  Once the new input chunk data available.
-         However, to keep data coherency, the function “HAL_JPEG_Pause” must be imperatively called
-        (if necessary) within the callback “HAL_JPEG_GetDataCallback”, i.e when the HAL JPEG has ended
-         Transferring the previous chunk buffer to the JPEG peripheral.
+         (++) The application can call functions HAL_JPEG_ConfigInputBuffer then HAL_JPEG_Resume.
+              any time (outside the HAL_JPEG_GetDataCallback)  Once the new input chunk data available.
+              However, to keep data coherency, the function HAL_JPEG_Pause must be imperatively called
+              (if necessary) within the callback HAL_JPEG_GetDataCallback, i.e when the HAL JPEG has ended
+              Transferring the previous chunk buffer to the JPEG peripheral.
         
      (#) Callback HAL_JPEG_DataReadyCallback is asserted when the HAL JPEG driver
          has filled the given output buffer with the given size.
          
-         This CallBack should be implemented in the application side. It should 
-         call the function HAL_JPEG_ConfigOutputBuffer to provide the HAL JPEG driver
-         with the new output buffer location and size to be used  to store next data chunk.
-         if the application is not ready to provide the output chunk location then it can
-         call the function "HAL_JPEG_Pause" with parameter XferSelection set to "JPEG_PAUSE_RESUME_OUTPUT"
-         to inform the JPEG HAL driver that it shall pause output data. Once the application
-         is ready to receive the new data chunk (output buffer location free or available) it should call
-         the function "HAL_JPEG_ConfigOutputBuffer" to provide the HAL JPEG driver
-         with the new output chunk buffer location and size, then call "HAL_JPEG_Resume" 
-         to inform the HAL that it shall resume outputting data in the given output buffer.
+         (++) This CallBack should be implemented in the application side. It should 
+              call the function HAL_JPEG_ConfigOutputBuffer to provide the HAL JPEG driver
+              with the new output buffer location and size to be used  to store next data chunk.
+              if the application is not ready to provide the output chunk location then it can
+              call the function HAL_JPEG_Pause with parameter XferSelection set to "JPEG_PAUSE_RESUME_OUTPUT"
+              to inform the JPEG HAL driver that it shall pause output data. Once the application
+              is ready to receive the new data chunk (output buffer location free or available) it should call
+              the function HAL_JPEG_ConfigOutputBuffer to provide the HAL JPEG driver
+              with the new output chunk buffer location and size, then call "HAL_JPEG_Resume" 
+              to inform the HAL that it shall resume outputting data in the given output buffer.
 
-         The mechanism of HAL_JPEG_ConfigOutputBuffer/HAL_JPEG_Pause/HAL_JPEG_Resume allows
-         the application to receive data from the JPEG peripheral by chunks. when a chunk
-         is received, the application can pause the HAL JPEG output data to be able to process
-         these received data (YCbCr to RGB conversion in case of decoding or data storage in case
-         of encoding).
+         (++) The mechanism of HAL_JPEG_ConfigOutputBuffer/HAL_JPEG_Pause/HAL_JPEG_Resume allows
+              the application to receive data from the JPEG peripheral by chunks. when a chunk
+              is received, the application can pause the HAL JPEG output data to be able to process
+              these received data (YCbCr to RGB conversion in case of decoding or data storage in case
+              of encoding).
 
-        The application can call  functions “HAL_JPEG_ ConfigOutputBuffer“ then "HAL_JPEG_Resume".
-        any time (outside the HAL_JPEG_ DataReadyCallback)  Once the output data buffer is free to use.
-        However, to keep data coherency, the function “HAL_JPEG_Pause” must be imperatively called
-        (if necessary) within the callback “HAL_JPEG_ DataReadyCallback”, i.e when the HAL JPEG has ended
-        Transferring the previous chunk buffer from the JPEG peripheral to the application.
+         (++) The application can call  functions HAL_JPEG_ ConfigOutputBuffer then HAL_JPEG_Resume.
+              any time (outside the HAL_JPEG_DataReadyCallback) Once the output data buffer is free to use.
+              However, to keep data coherency, the function HAL_JPEG_Pause must be imperatively called
+              (if necessary) within the callback HAL_JPEG_ DataReadyCallback, i.e when the HAL JPEG has ended
+              Transferring the previous chunk buffer from the JPEG peripheral to the application.
 
      (#) Callback HAL_JPEG_EncodeCpltCallback is asserted when the HAL JPEG driver has
          ended the current JPEG encoding operation, and all output data has been transmitted
@@ -125,10 +125,10 @@
          to retrieve the error codes.
 
      (#) By default the HAL JPEG driver uses the default quantization tables
-          as provide in the JPEG specification (ISO/IEC 10918-1 standard) for encoding.
-          User can change these default tables if necessary using the function "HAL_JPEG_SetUserQuantTables"
-          Note that for decoding the quantization tables are automatically extracted from
-          the JPEG header.
+         as provide in the JPEG specification (ISO/IEC 10918-1 standard) for encoding.
+         User can change these default tables if necessary using the function HAL_JPEG_SetUserQuantTables
+         Note that for decoding the quantization tables are automatically extracted from
+         the JPEG header.
 
       (#) To control JPEG state you can use the following function: HAL_JPEG_GetState()      
 
@@ -202,7 +202,7 @@
 #define JPEG_AC_HUFF_TABLE_SIZE  ((uint32_t)162U) /* Huffman AC table size : 162 codes*/
 #define JPEG_DC_HUFF_TABLE_SIZE  ((uint32_t)12U)  /* Huffman AC table size : 12 codes*/
 
-#define JPEG_FIFO_SIZE ((uint32_t)8U)             /* JPEG Input/Output HW FIFO size in words*/
+#define JPEG_FIFO_SIZE ((uint32_t)16U)             /* JPEG Input/Output HW FIFO size in words*/
 
 #define JPEG_INTERRUPT_MASK  ((uint32_t)0x0000007EU) /* JPEG Interrupt Mask*/
 
@@ -438,6 +438,7 @@ static uint32_t JPEG_GetQuality(JPEG_HandleTypeDef *hjpeg);
 static HAL_StatusTypeDef JPEG_DMA_StartProcess(JPEG_HandleTypeDef *hjpeg);
 static uint32_t JPEG_DMA_ContinueProcess(JPEG_HandleTypeDef *hjpeg);
 static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg);
+static void JPEG_DMA_PollResidualData(JPEG_HandleTypeDef *hjpeg);
 static void JPEG_DMAOutCpltCallback(DMA_HandleTypeDef *hdma);
 static void JPEG_DMAInCpltCallback(DMA_HandleTypeDef *hdma);
 static void JPEG_DMAErrorCallback(DMA_HandleTypeDef *hdma);
@@ -720,7 +721,7 @@ HAL_StatusTypeDef HAL_JPEG_ConfigEncoding(JPEG_HandleTypeDef *hjpeg, JPEG_ConfTy
           error |= JPEG_Set_Quantization_Mem(hjpeg, hjpeg->QuantTable2, (uint32_t *)(hjpeg->Instance->QMEM2));
  
           /*Use Quantization 1 table for component 1*/
-          hjpeg->Instance->CONFR5 &=  (~JPEG_CONFR6_QT);           
+          hjpeg->Instance->CONFR5 &=  (~JPEG_CONFR5_QT);           
           hjpeg->Instance->CONFR5 |=  JPEG_CONFR5_QT_0; 
           
           /*Use Quantization 2 table for component 2*/
@@ -769,8 +770,8 @@ HAL_StatusTypeDef HAL_JPEG_ConfigEncoding(JPEG_HandleTypeDef *hjpeg, JPEG_ConfTy
         return  HAL_ERROR;
       }
       /* Set the image size*/
-      hjpeg->Instance->CONFR1 |= ((hjpeg->Conf.ImageHeight & 0x0000FFFF) << 16); /* set the number of lines*/
-      hjpeg->Instance->CONFR3 |= ((hjpeg->Conf.ImageWidth & 0x0000FFFF) << 16);  /* set the number of pixels per line*/
+      MODIFY_REG(hjpeg->Instance->CONFR1, JPEG_CONFR1_YSIZE, ((hjpeg->Conf.ImageHeight & 0x0000FFFF) << 16));  /* set the number of lines*/
+      MODIFY_REG(hjpeg->Instance->CONFR3, JPEG_CONFR3_XSIZE, ((hjpeg->Conf.ImageWidth & 0x0000FFFF) << 16));  /* set the number of pixels per line*/
       
       if(hjpeg->Conf.ChromaSubsampling == JPEG_420_SUBSAMPLING)  /* 4:2:0*/
       {
@@ -1593,6 +1594,12 @@ HAL_StatusTypeDef  HAL_JPEG_Resume(JPEG_HandleTypeDef *hjpeg, uint32_t XferSelec
 
   assert_param(IS_JPEG_PAUSE_RESUME_STATE(XferSelection));  
   
+  if(((hjpeg->Context & JPEG_CONTEXT_PAUSE_INPUT) == 0) &&  ((hjpeg->Context & JPEG_CONTEXT_PAUSE_OUTPUT) == 0)) 
+  {
+    /* if nothing paused to resume return error*/
+    return HAL_ERROR;      
+  }
+
   if((hjpeg->Context & JPEG_CONTEXT_METHOD_MASK) == JPEG_CONTEXT_DMA)
   {
     
@@ -1614,11 +1621,20 @@ HAL_StatusTypeDef  HAL_JPEG_Resume(JPEG_HandleTypeDef *hjpeg, uint32_t XferSelec
     }
     if((XferSelection & JPEG_PAUSE_RESUME_OUTPUT) == JPEG_PAUSE_RESUME_OUTPUT)
     {
-      hjpeg->Context &= (~JPEG_CONTEXT_PAUSE_OUTPUT);
-      mask |= JPEG_DMA_ODMA;
       
-      /* Start DMA FIFO Out transfer */
-      HAL_DMA_Start_IT(hjpeg->hdmaout, (uint32_t)&hjpeg->Instance->DOR, (uint32_t)hjpeg->pJpegOutBuffPtr, hjpeg->OutDataLength >> 2);
+      if((hjpeg->Context & JPEG_CONTEXT_ENDING_DMA) != 0)
+      {
+        JPEG_DMA_PollResidualData(hjpeg);
+      }
+      else
+      {
+        hjpeg->Context &= (~JPEG_CONTEXT_PAUSE_OUTPUT);
+        mask |= JPEG_DMA_ODMA;
+        
+        /* Start DMA FIFO Out transfer */
+        HAL_DMA_Start_IT(hjpeg->hdmaout, (uint32_t)&hjpeg->Instance->DOR, (uint32_t)hjpeg->pJpegOutBuffPtr, hjpeg->OutDataLength >> 2);
+      }  
+      
     }    
     JPEG_ENABLE_DMA(hjpeg,mask);
 
@@ -1758,7 +1774,7 @@ HAL_StatusTypeDef HAL_JPEG_Abort(JPEG_HandleTypeDef *hjpeg)
  *
 @verbatim   
   ==============================================================================
-              #####  JPEG Decode/Encode callback functions  #####
+              #####  JPEG Decode and Encode callback functions  #####
   ==============================================================================  
     [..]  This section provides callback functions:
       (+) HAL_JPEG_InfoReadyCallback()  : Decoding JPEG Info ready callback
@@ -1993,7 +2009,7 @@ static HAL_StatusTypeDef JPEG_Bits_To_SizeCodes(uint8_t *Bits, uint8_t *Huffsize
 {  
   uint32_t i, p, l, code, si;
    
-  /* Figure C.1 – Generation of table of Huffman code sizes */
+  /* Figure C.1: Generation of table of Huffman code sizes */
   p = 0;
   for (l = 0; l < 16; l++) 
   {
@@ -2011,7 +2027,7 @@ static HAL_StatusTypeDef JPEG_Bits_To_SizeCodes(uint8_t *Bits, uint8_t *Huffsize
   Huffsize[p] = 0;
   *LastK = p; 
   
-  /* Figure C.2 – Generation of table of Huffman codes */ 
+  /* Figure C.2: Generation of table of Huffman codes */ 
   code = 0;
   si = Huffsize[0];
   p = 0;
@@ -2056,7 +2072,7 @@ static HAL_StatusTypeDef JPEG_ACHuff_BitsVals_To_SizeCodes(JPEG_ACHuffTableTypeD
     return  error;
   }
   
-  /* Figure C.3 – Ordering procedure for encoding procedure code tables */
+  /* Figure C.3: Ordering procedure for encoding procedure code tables */
   k=0;
    
   while(k < lastK)
@@ -2227,7 +2243,7 @@ static HAL_StatusTypeDef JPEG_Set_HuffAC_Mem(JPEG_HandleTypeDef *hjpeg, JPEG_ACH
     {
       return  error;
     }
-    /* Default values settings : 162–167 FFFh , 168–175 FD0h–FD7h */
+    /* Default values settings: 162:167 FFFh , 168:175 FD0h_FD7h */
     /* Locations 162:175 of each AC table contain information used internally by the core */
 
     addressDef = address;
@@ -3155,8 +3171,7 @@ static uint32_t JPEG_DMA_ContinueProcess(JPEG_HandleTypeDef *hjpeg)
   */
 static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg)
 {
-  uint32_t tmpContext, count = JPEG_FIFO_SIZE, *pDataOut;
-  
+  uint32_t tmpContext;  
   hjpeg->JpegOutCount = hjpeg->OutDataLength - ((hjpeg->hdmaout->Instance->NDTR & DMA_SxNDT) << 2);
   
   /*if Output Buffer is full, call HAL_JPEG_DataReadyCallback*/
@@ -3166,6 +3181,51 @@ static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg)
     hjpeg->JpegOutCount = 0;
   }
   
+  /*Check if remaining data in the output FIFO*/
+  if(__HAL_JPEG_GET_FLAG(hjpeg, JPEG_FLAG_OFNEF) == 0)
+  {
+    /*Stop Encoding/Decoding*/
+    hjpeg->Instance->CONFR0 &=  ~JPEG_CONFR0_START;
+    
+    tmpContext = hjpeg->Context;
+    /*Clear all context fileds execpt JPEG_CONTEXT_CONF_ENCODING and JPEG_CONTEXT_CUSTOM_TABLES*/
+    hjpeg->Context &= (JPEG_CONTEXT_CONF_ENCODING | JPEG_CONTEXT_CUSTOM_TABLES);
+    
+    /* Process Unlocked */
+    __HAL_UNLOCK(hjpeg);
+    
+    /* Change the JPEG state */
+    hjpeg->State = HAL_JPEG_STATE_READY;
+    
+    /*Call End of Encoding/Decoding callback */
+    if((tmpContext & JPEG_CONTEXT_OPERATION_MASK) == JPEG_CONTEXT_DECODE)
+    {
+      HAL_JPEG_DecodeCpltCallback(hjpeg);
+    }
+    else if((tmpContext & JPEG_CONTEXT_OPERATION_MASK) == JPEG_CONTEXT_ENCODE)
+    {
+      HAL_JPEG_EncodeCpltCallback(hjpeg);        
+    }    
+  }  
+  else if((hjpeg->Context &  JPEG_CONTEXT_PAUSE_OUTPUT) == 0)
+  {
+    JPEG_DMA_PollResidualData(hjpeg);
+
+    return JPEG_PROCESS_DONE; 
+  }  
+  
+  return JPEG_PROCESS_ONGOING; 
+}
+
+/**
+  * @brief  Poll residual output data when DMA process (encoding/decoding) 
+  * @param  hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
+  *         the configuration information for JPEG module
+  * @retval None.
+  */
+static void JPEG_DMA_PollResidualData(JPEG_HandleTypeDef *hjpeg)
+{
+  uint32_t tmpContext, count = JPEG_FIFO_SIZE, *pDataOut;  
   pDataOut = (uint32_t *)(hjpeg->pJpegOutBuffPtr + hjpeg->JpegOutCount);
   
   while((__HAL_JPEG_GET_FLAG(hjpeg, JPEG_FLAG_OFNEF) != 0) && (count > 0))
@@ -3213,9 +3273,6 @@ static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg)
   {
     HAL_JPEG_EncodeCpltCallback(hjpeg);        
   }
-  
-  
-  return JPEG_PROCESS_DONE; 
 }
 
 /**
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.h
index 90a99d935d..732600f15f 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_jpeg.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_jpeg.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of JPEG HAL module.
   ******************************************************************************
   * @attention
@@ -128,7 +128,7 @@ typedef struct
 
   DMA_HandleTypeDef        *hdmaout;         /*!< JPEG Out DMA handle parameters */
 
-  uint8_t                  CustomQuanTable;  /*!< If set to ‘1’ specify that user customized quantization tables are used */
+  uint8_t                  CustomQuanTable;  /*!< If set to 1 specify that user customized quantization tables are used */
       
   uint8_t                  *QuantTable0;     /*!< Basic Quantization Table for component 0 */
 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.c
index 0aaa27d72a..f6dce43e5e 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_lptim.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   LPTIM HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Low Power Timer (LPTIM) peripheral:
@@ -24,29 +24,29 @@
         HAL_LPTIM_MspInit():
          (##) Enable the LPTIM interface clock using __LPTIMx_CLK_ENABLE().
          (##) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
-             (+) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
-             (+) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
-             (+) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
+             (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
+             (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
+             (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
     
       (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
          configures mainly:
          (##) The instance: LPTIM1.
          (##) Clock: the counter clock.
-                 - Source   : it can be either the ULPTIM input (IN1) or one of
+               (+++) Source: it can be either the ULPTIM input (IN1) or one of
                               the internal clock; (APB, LSE, LSI or MSI).
-                 - Prescaler: select the clock divider.
+               (+++) Prescaler: select the clock divider.
          (##)  UltraLowPowerClock : To be used only if the ULPTIM is selected
                as counter clock source.
-                 - Polarity:   polarity of the active edge for the counter unit
+               (+++) Polarity:   polarity of the active edge for the counter unit
                                if the ULPTIM input is selected.
-                 - SampleTime: clock sampling time to configure the clock glitch
+               (+++) SampleTime: clock sampling time to configure the clock glitch
                                filter.              
          (##) Trigger: How the counter start.
-                 - Source: trigger can be software or one of the hardware triggers.
-                 - ActiveEdge : only for hardware trigger.
-                 - SampleTime : trigger sampling time to configure the trigger
+              (+++) Source: trigger can be software or one of the hardware triggers.
+              (+++) ActiveEdge: only for hardware trigger.
+              (+++) SampleTime: trigger sampling time to configure the trigger
                                 glitch filter.
-         (##) OutputPolarity : 2 opposite polarities are possibles.
+         (##) OutputPolarity: 2 opposite polarities are possibles.
          (##) UpdateMode: specifies whether the update of the autoreload and
               the compare values is done immediately or after the end of current
               period.   
@@ -87,7 +87,7 @@
           HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
           already started in interruption mode.
          
-       (#)Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
+      (#) Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
 
   @endverbatim
   ******************************************************************************
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.h
index df50aa32d2..dc52854521 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_lptim.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of LPTIM HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.c
index fa80f9b0ef..3df29600c1 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_ltdc.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   LTDC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the LTDC peripheral:
@@ -44,15 +44,15 @@
          functions: HAL_LTDC_SetPixelFormat(), HAL_LTDC_SetAlpha(), HAL_LTDC_SetWindowSize(),
          HAL_LTDC_SetWindowPosition(), HAL_LTDC_SetAddress.
 
-     (#) Variant functions with “_NoReload” post fix allows to set the LTDC configuration/settings without immediate reload.
+     (#) Variant functions with "_NoReload" post fix allows to set the LTDC configuration/settings without immediate reload.
          This is useful in case when the program requires to modify serval LTDC settings (on one or both layers) 
-         then applying(reload) these settings in one shot by calling the function “HAL_LTDC_Reload”
+         then applying(reload) these settings in one shot by calling the function "HAL_LTDC_Reload"
 
-         After calling the “_NoReload” functions to set different color/format/layer settings, 
-         the program can call the function  “HAL_LTDC_Reload” To apply(Reload) these settings. 
-         Function “HAL_LTDC_Reload” can be called with the parameter  “ReloadType” 
+         After calling the "_NoReload" functions to set different color/format/layer settings, 
+         the program can call the function "HAL_LTDC_Reload" To apply(Reload) these settings. 
+         Function "HAL_LTDC_Reload" can be called with the parameter "ReloadType" 
          set to LTDC_RELOAD_IMMEDIATE if an immediate reload is required.
-         Function “HAL_LTDC_Reload” can be called with the parameter  “ReloadType” 
+         Function "HAL_LTDC_Reload" can be called with the parameter "ReloadType" 
          set to LTDC_RELOAD_VERTICAL_BLANKING if the reload should be done in the next vertical blanking period, 
          this option allows to avoid display flicker by applying the new settings during the vertical blanking period.
            
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.h
index 60672acf4c..90ead1ad5a 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_ltdc.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of LTDC HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.c
index c3b519f3e4..9fa6569b01 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_ltdc_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   LTDC Extension HAL module driver.
   ******************************************************************************
   * @attention
@@ -87,15 +87,13 @@ HAL_StatusTypeDef HAL_LTDC_StructInitFromVideoConfig(LTDC_HandleTypeDef* hltdc,
 {
   /* Retrieve signal polarities from DSI */
   
-  /* The following polarities are inverted:
-                     LTDC_DEPOLARITY_AL <-> LTDC_DEPOLARITY_AH
-	                   LTDC_VSPOLARITY_AL <-> LTDC_VSPOLARITY_AH
-	                   LTDC_HSPOLARITY_AL <-> LTDC_HSPOLARITY_AH)*/
+  /* The following polarity is inverted:
+                     LTDC_DEPOLARITY_AL <-> LTDC_DEPOLARITY_AH */
   
   /* Note 1 : Code in line w/ Current LTDC specification */
   hltdc->Init.DEPolarity = (VidCfg->DEPolarity == DSI_DATA_ENABLE_ACTIVE_HIGH) ? LTDC_DEPOLARITY_AL : LTDC_DEPOLARITY_AH;
-  hltdc->Init.VSPolarity = (VidCfg->VSPolarity == DSI_VSYNC_ACTIVE_HIGH) ? LTDC_VSPOLARITY_AL : LTDC_VSPOLARITY_AH;
-  hltdc->Init.HSPolarity = (VidCfg->HSPolarity == DSI_HSYNC_ACTIVE_HIGH) ? LTDC_HSPOLARITY_AL : LTDC_HSPOLARITY_AH;
+  hltdc->Init.VSPolarity = (VidCfg->VSPolarity == DSI_VSYNC_ACTIVE_HIGH) ? LTDC_VSPOLARITY_AH : LTDC_VSPOLARITY_AL;
+  hltdc->Init.HSPolarity = (VidCfg->HSPolarity == DSI_HSYNC_ACTIVE_HIGH) ? LTDC_HSPOLARITY_AH : LTDC_HSPOLARITY_AL;
 
   /* Note 2: Code to be used in case LTDC polarities inversion updated in the specification */
   /* hltdc->Init.DEPolarity = VidCfg->DEPolarity << 29;
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.h
index e88f8d27c6..932a035ebc 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_ltdc_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_ltdc_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of LTDC HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c
index 500cacf3a3..3ffefba797 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c
@@ -2,23 +2,21 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_mdios.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   MDIOS HAL module driver.
-  * 
   *          This file provides firmware functions to manage the following 
   *          functionalities of the MDIOS Peripheral.
   *           + Initialization and de-initialization functions
   *           + IO operation functions
   *           + Peripheral Control functions
-  *
   *           
   @verbatim       
  ===============================================================================
                         ##### How to use this driver #####
  ===============================================================================
     [..]
-    The MDIOS HAL driver can be used as follow:
+    The MDIOS HAL driver can be used as follows:
 
     (#) Declare a MDIOS_HandleTypeDef handle structure.
 
@@ -53,9 +51,9 @@
         (##) a DOUTn register read by the Master
         (##) an error occur
 
-        (@) A callback is executed for each genereted interrupt, so the driver provide the following 
+       -@@- A callback is executed for each genereted interrupt, so the driver provides the following 
             HAL_MDIOS_WriteCpltCallback(), HAL_MDIOS_ReadCpltCallback() and HAL_MDIOS_ErrorCallback()
-        (@) HAL_MDIOS_IRQHandler() must be called from the MDIOS IRQ Handler, to handle the interrupt
+       -@@- HAL_MDIOS_IRQHandler() must be called from the MDIOS IRQ Handler, to handle the interrupt
             and execute the previous callbacks
    
     (#) Reset the MDIOS peripheral and all related ressources by calling the HAL_MDIOS_DeInit() API.
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.h
index a0f98c4883..a3e394b760 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_mdios.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of MDIOS HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.c
index f7622df7e9..1586d84224 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_nand.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   NAND HAL module driver.
   *          This file provides a generic firmware to drive NAND memories mounted 
   *          as external device.
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.h
index 715d52d633..7e36a81c88 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nand.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_nand.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of NAND HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.c
index afc745d358..452dffdc0e 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_nor.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   NOR HAL module driver.
   *          This file provides a generic firmware to drive NOR memories mounted 
   *          as external device.
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.h
index 699ccac6c5..1c44e7cec0 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_nor.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_nor.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of NOR HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c
index 72c5f77a2b..df4ac95b30 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_pcd.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   PCD HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the USB Peripheral Controller:
@@ -202,7 +202,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
  hpcd->State= HAL_PCD_STATE_READY;
  
  /* Activate LPM */
- if (hpcd->Init.lpm_enable == 1)
+ if (hpcd->Init.lpm_enable ==1)
  {
    HAL_PCDEx_ActivateLPM(hpcd);
  }
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h
index c06346c4e2..109a00bd56 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_pcd.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of PCD HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.c
index c7300a023f..2a7a836b70 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_pcd_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   PCD HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the USB Peripheral Controller:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.h
index 609a9a70d7..f99d50714f 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_pcd_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of PCD HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr.c
index 9d59c0124f..66435d3d4b 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_pwr.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   PWR HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Power Controller (PWR) peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr.h
index f5bc1d1f17..bd3b48116e 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_pwr.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of PWR HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.c
index 78a046f2e7..3303591954 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_pwr_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Extended PWR HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of PWR extension peripheral:           
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.h
index 1fa56efa0b..15980ae94b 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pwr_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_pwr_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of PWR HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_qspi.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_qspi.c
index 165faea3fe..99ccf45efd 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_qspi.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_qspi.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_qspi.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   QSPI HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the QuadSPI interface (QSPI).
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_qspi.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_qspi.h
index 4ab01706a8..b5b86b1863 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_qspi.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_qspi.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_qspi.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of QSPI HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc.c
index 9655a029e1..e02f7a8972 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rcc.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   RCC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Reset and Clock Control (RCC) peripheral:
@@ -256,7 +256,7 @@ void HAL_RCC_DeInit(void)
   *         first and then HSE On or HSE Bypass.
   * @retval HAL status
   */
-__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
+HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 {
   uint32_t tickstart = 0;  
  
@@ -491,6 +491,9 @@ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruc
         assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
         assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
         assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
+#if defined (RCC_PLLCFGR_PLLR)
+        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
+#endif
         
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
@@ -508,11 +511,21 @@ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruc
         }
         
         /* Configure the main PLL clock source, multiplication and division factors. */
-        WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource                                            | \
-                                 RCC_OscInitStruct->PLL.PLLM                                                 | \
-                                 (RCC_OscInitStruct->PLL.PLLN << POSITION_VAL(RCC_PLLCFGR_PLLN))             | \
-                                 (((RCC_OscInitStruct->PLL.PLLP >> 1) -1) << POSITION_VAL(RCC_PLLCFGR_PLLP)) | \
-                                 (RCC_OscInitStruct->PLL.PLLQ << POSITION_VAL(RCC_PLLCFGR_PLLQ))));
+#if defined (RCC_PLLCFGR_PLLR)
+        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
+                             RCC_OscInitStruct->PLL.PLLM,
+                             RCC_OscInitStruct->PLL.PLLN,
+                             RCC_OscInitStruct->PLL.PLLP,
+                             RCC_OscInitStruct->PLL.PLLQ,
+                             RCC_OscInitStruct->PLL.PLLR);
+#else
+        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
+                             RCC_OscInitStruct->PLL.PLLM,
+                             RCC_OscInitStruct->PLL.PLLN,
+                             RCC_OscInitStruct->PLL.PLLP,
+                             RCC_OscInitStruct->PLL.PLLQ);
+#endif
+
         /* Enable the main PLL. */
         __HAL_RCC_PLL_ENABLE();
 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc.h
index 283797b887..4dc5e72f2d 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rcc.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of RCC HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc_ex.c
index ab7b3303bd..440120ffb7 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rcc_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Extension RCC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities RCC extension peripheral:
@@ -109,6 +109,8 @@
 @endverbatim
   * @{
   */
+#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || \
+    defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)  
 /**
   * @brief  Initializes the RCC extended peripherals clocks according to the specified
   *         parameters in the RCC_PeriphCLKInitTypeDef.
@@ -814,6 +816,7 @@ void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
     PeriphClkInit->TIMPresSelection = RCC_TIMPRES_ACTIVATED;
   }
 }
+#endif /* STM32F745xx || STM32F746xx || STM32F756xx || STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
 
 /**
   * @brief  Return the peripheral clock frequency for a given peripheral(SAI..) 
@@ -1003,323 +1006,6 @@ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
   return frequency;
 }
 
-#if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
-/**
-  * @brief  Initializes the RCC Oscillators according to the specified parameters in the
-  *         RCC_OscInitTypeDef.
-  * @param  RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
-  *         contains the configuration information for the RCC Oscillators.
-  * @note   The PLL is not disabled when used as system clock.
-  * @note   Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
-  *         supported by this function. User should request a transition to LSE Off
-  *         first and then LSE On or LSE Bypass.
-  * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
-  *         supported by this function. User should request a transition to HSE Off
-  *         first and then HSE On or HSE Bypass.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
-{
-  uint32_t tickstart = 0;  
- 
-  /* Check the parameters */
-  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
-  
-  /*------------------------------- HSE Configuration ------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
-    /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
-       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
-    {
-	  if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
-      {
-        return HAL_ERROR;
-      }
-    }
-    else
-    {
-      /* Set the new HSE configuration ---------------------------------------*/
-      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
-      
-      /* Check the HSE State */
-      if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
-      {
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSE is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-      else
-      {
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
-        
-        /* Wait till HSE is bypassed or disabled */
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
-        {
-           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-  }
-  /*----------------------------- HSI Configuration --------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
-    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
-    
-    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ 
-    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
-       || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
-    {
-      /* When HSI is used as system clock it will not disabled */
-      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
-      {
-        return HAL_ERROR;
-      }
-      /* Otherwise, just the calibration is allowed */
-      else
-      {
-        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
-        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
-      }
-    }
-    else
-    {
-      /* Check the HSI State */
-      if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
-      {
-        /* Enable the Internal High Speed oscillator (HSI). */
-        __HAL_RCC_HSI_ENABLE();
-
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
-
-        /* Wait till HSI is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-                
-        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
-        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
-      }
-      else
-      {
-        /* Disable the Internal High Speed oscillator (HSI). */
-        __HAL_RCC_HSI_DISABLE();
-
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
-      
-        /* Wait till HSI is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          } 
-        } 
-      }
-    }
-  }
-  /*------------------------------ LSI Configuration -------------------------*/
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
-
-    /* Check the LSI State */
-    if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
-    {
-      /* Enable the Internal Low Speed oscillator (LSI). */
-      __HAL_RCC_LSI_ENABLE();
-      
-      /* Get Start Tick*/
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSI is ready */
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-    else
-    {
-      /* Disable the Internal Low Speed oscillator (LSI). */
-      __HAL_RCC_LSI_DISABLE();
-      
-      /* Get Start Tick*/
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSI is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }
-      }
-    }
-  }
-  /*------------------------------ LSE Configuration -------------------------*/ 
-  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
-  {
-    /* Check the parameters */
-    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
-    
-    /* Enable Power Clock*/
-    __HAL_RCC_PWR_CLK_ENABLE();
-    
-    /* Enable write access to Backup domain */
-    PWR->CR1 |= PWR_CR1_DBP;
-    
-    /* Wait for Backup domain Write protection disable */
-    tickstart = HAL_GetTick();
-    
-    while((PWR->CR1 & PWR_CR1_DBP) == RESET)
-    {
-      if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
-      {
-        return HAL_TIMEOUT;
-      }      
-    }
-
-    /* Set the new LSE configuration -----------------------------------------*/
-    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
-    /* Check the LSE State */
-    if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
-    {
-      /* Get Start Tick*/
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSE is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }       
-      }
-    }
-    else
-    {
-      /* Get Start Tick*/
-      tickstart = HAL_GetTick();
-      
-      /* Wait till LSE is ready */  
-      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
-      {
-        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
-        {
-          return HAL_TIMEOUT;
-        }       
-      }
-    }
-  }
-  /*-------------------------------- PLL Configuration -----------------------*/
-  /* Check the parameters */
-  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
-  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
-  {
-    /* Check if the PLL is used as system clock or not */
-    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
-    { 
-      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
-      {
-        /* Check the parameters */
-        assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
-        assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
-        assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
-        assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
-        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
-        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
-        
-        /* Disable the main PLL. */
-        __HAL_RCC_PLL_DISABLE();
-        
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-        
-        /* Configure the main PLL clock source, multiplication and division factors. */
-        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
-                             RCC_OscInitStruct->PLL.PLLM,
-                             RCC_OscInitStruct->PLL.PLLN,
-                             RCC_OscInitStruct->PLL.PLLP,
-                             RCC_OscInitStruct->PLL.PLLQ,
-                             RCC_OscInitStruct->PLL.PLLR);
-        
-        /* Enable the main PLL. */
-        __HAL_RCC_PLL_ENABLE();
-
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          } 
-        }
-      }
-      else
-      {
-        /* Disable the main PLL. */
-        __HAL_RCC_PLL_DISABLE();
- 
-        /* Get Start Tick*/
-        tickstart = HAL_GetTick();
-        
-        /* Wait till PLL is ready */  
-        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
-        {
-          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
-          {
-            return HAL_TIMEOUT;
-          }
-        }
-      }
-    }
-    else
-    {
-      return HAL_ERROR;
-    }
-  }
-  return HAL_OK;
-}
-#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
-
 /**
   * @}
   */
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc_ex.h
index ada75ec937..ea10360f89 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rcc_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rcc_ex.h
   * @author  MCD Application Team                                                                                                     
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of RCC HAL Extension module.
   ******************************************************************************
   * @attention
@@ -105,9 +105,12 @@ typedef struct
                             This parameter must be a number between Min_Data = 2 and Max_Data = 15. 
                             This parameter will be used only when PLLI2S is selected as Clock Source SAI */
 
+#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
+    defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
   uint32_t PLLI2SP;    /*!< Specifies the division factor for SPDIF-RX clock.
                             This parameter must be a value of @ref RCCEx_PLLI2SP_Clock_Divider. 
                             This parameter will be used only when PLLI2S is selected as Clock Source SPDIF-RX */
+#endif /* STM32F745xx || STM32F746xx || STM32F756xx || STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */  
 }RCC_PLLI2SInitTypeDef;
 
 /** 
@@ -122,11 +125,14 @@ typedef struct
   uint32_t PLLSAIQ;    /*!< Specifies the division factor for SAI1 clock.
                             This parameter must be a number between Min_Data = 2 and Max_Data = 15.
                             This parameter will be used only when PLLSAI is selected as Clock Source SAI or LTDC */
-                              
+  
+#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
+    defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
   uint32_t PLLSAIR;    /*!< specifies the division factor for LTDC clock
                             This parameter must be a number between Min_Data = 2 and Max_Data = 7.
                             This parameter will be used only when PLLSAI is selected as Clock Source LTDC */
-
+#endif /* STM32F745xx || STM32F746xx || STM32F756xx || STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
+  
   uint32_t PLLSAIP;    /*!< Specifies the division factor for 48MHz clock.
                             This parameter must be a value of @ref RCCEx_PLLSAIP_Clock_Divider
                             This parameter will be used only when PLLSAI is disabled */
@@ -273,12 +279,14 @@ typedef struct
 #define RCC_PERIPHCLK_SDMMC2          ((uint32_t)0x04000000U)
 #define RCC_PERIPHCLK_DFSDM1           ((uint32_t)0x08000000U)
 #define RCC_PERIPHCLK_DFSDM1_AUDIO      ((uint32_t)0x10000000U)    
-#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
+#endif /* STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
     
 /**
   * @}
   */
 
+#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) || \
+    defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
 /** @defgroup RCCEx_PLLI2SP_Clock_Divider RCCEx PLLI2SP Clock Divider
   * @{
   */
@@ -289,6 +297,7 @@ typedef struct
 /**
   * @}
   */
+#endif /* STM32F745xx || STM32F746xx || STM32F756xx || STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
   
 /** @defgroup RCCEx_PLLSAIP_Clock_Divider RCCEx PLLSAIP Clock Divider
   * @{
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rng.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rng.c
index 33166732c3..9fef4983b7 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rng.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rng.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rng.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   RNG HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Random Number Generator (RNG) peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rng.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rng.h
index 46016824b2..5d93ae6577 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rng.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rng.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rng.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of RNG HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.c
index d8973d120d..102b106824 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rtc.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   RTC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Real Time Clock (RTC) peripheral:
@@ -515,7 +515,7 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim
     hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
      
     /* Clear the bits to be configured */
-    hrtc->Instance->CR &= (uint32_t)~RTC_CR_BCK;
+    hrtc->Instance->CR &= (uint32_t)~RTC_CR_BKP;
     
     /* Configure the RTC_CR register */
     hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation);
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.h
index 9aea57d0f2..46517bda5d 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rtc.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of RTC HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc_ex.c
index 9b56828bac..9fa76b4c34 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rtc_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   RTC HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Real Time Clock (RTC) Extension peripheral:
@@ -241,7 +241,10 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t Ti
   hrtc->Instance->CR = (uint32_t)tmpreg;
   
   hrtc->Instance->OR &= (uint32_t)~RTC_OR_TSINSEL;
-  hrtc->Instance->OR |= (uint32_t)(RTC_TimeStampPin); 
+  hrtc->Instance->OR |= (uint32_t)(RTC_TimeStampPin);
+  
+  /* Clear RTC Timestamp flag */
+  __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
   
   __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
   
@@ -589,6 +592,22 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType
                                        (uint32_t)RTC_TAMPCR_TAMP2MF | (uint32_t)RTC_TAMPCR_TAMP3MF);
 
   hrtc->Instance->TAMPCR |= tmpreg;
+  
+  if(sTamper->Tamper == RTC_TAMPER_1)
+  {
+    /* Clear RTC Tamper 1 flag */
+    __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
+  }
+  else if(sTamper->Tamper == RTC_TAMPER_2)
+  {
+    /* Clear RTC Tamper 2 flag */
+    __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);    
+  }
+  else
+  {
+    /* Clear RTC Tamper 3 flag */
+    __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F);  
+  }
 
   /* RTC Tamper Interrupt Configuration: EXTI configuration */
   __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
@@ -1085,6 +1104,9 @@ HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t
   
   EXTI->RTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT;
   
+  /* Clear RTC Wake Up timer Flag */
+  __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
+  
   /* Configure the Interrupt in the RTC_CR register */
   __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT);
   
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc_ex.h
index 99373da96b..ab2b6b084e 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_rtc_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_rtc_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of RTC HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.c
index 1719038b67..4c8a1ec01f 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sai.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   SAI HAL module driver.
   *          This file provides firmware functions to manage the following
   *          functionalities of the Serial Audio Interface (SAI) peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.h
index 931df77a98..41c6f0b60c 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sai.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SAI HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai_ex.c
index a277d3d5f8..0483d03c39 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sai_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Empty file; This file is no longer used to set synchronization and
   *          to get SAI block frequency. Its content is now moved to common files
   *          (stm32f7xx_hal_sai.c/.h) as there's no device's dependency within F7
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai_ex.h
index 56c2abd377..53273640ea 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sai_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SAI Extension HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sd.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sd.c
index 1a5ee1528c..0d7fa4d2f7 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sd.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sd.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sd.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   SD card HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Secure Digital (SD) peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sd.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sd.h
index 51250ec35c..17bbc5f961 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sd.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sd.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sd.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SD HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.c
index f6d18d3c72..44a6c2e589 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sdram.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   SDRAM HAL module driver.
   *          This file provides a generic firmware to drive SDRAM memories mounted 
   *          as external device.
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.h
index f1c447a169..2d502c8ea0 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sdram.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sdram.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SDRAM HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard.c
index d06aacf5ee..e7c76b58a3 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard.c
@@ -2,24 +2,25 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_smartcard.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   SMARTCARD HAL module driver.
   *          This file provides firmware functions to manage the following
   *          functionalities of the SMARTCARD peripheral:
   *           + Initialization and de-initialization functions
   *           + IO operation functions
-  *           + Peripheral State and Errors functions 
-  *           
-  @verbatim       
+  *           + Peripheral Control functions
+  *           + Peripheral State and Error functions
+  *
+  @verbatim
   ==============================================================================
                      ##### How to use this driver #####
   ==============================================================================
   [..]
-    The SMARTCARD HAL driver can be used as follow:
-    
-    (#) Declare a SMARTCARD_HandleTypeDef handle structure.
-    (#) Associate a USART to the SMARTCARD handle hsc.
+    The SMARTCARD HAL driver can be used as follows:
+
+    (#) Declare a SMARTCARD_HandleTypeDef handle structure (eg. SMARTCARD_HandleTypeDef hsmartcard).
+    (#) Associate a USART to the SMARTCARD handle hsmartcard.
     (#) Initialize the SMARTCARD low level resources by implementing the HAL_SMARTCARD_MspInit() API:
         (##) Enable the USARTx interface clock.
         (##) SMARTCARD pins configuration:
@@ -43,18 +44,66 @@
 
     (#) Program the Baud Rate, Parity, Mode(Receiver/Transmitter), clock enabling/disabling and accordingly,
         the clock parameters (parity, phase, last bit), prescaler value, guard time and NACK on transmission
-        error enabling or disabling in the hsc Init structure.
-        
-    (#) If required, program SMARTCARD advanced features (TX/RX pins swap, TimeOut, auto-retry counter,...)
-        in the hsc AdvancedInit structure.
+        error enabling or disabling in the hsmartcard handle Init structure.
+
+    (#) If required, program SMARTCARD advanced features (TX/RX pins swap, TimeOut, auto-retry counter,...)
+        in the hsmartcard handle AdvancedInit structure.
+
+    (#) Initialize the SMARTCARD registers by calling the HAL_SMARTCARD_Init() API:
+        (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
+             by calling the customized HAL_SMARTCARD_MspInit() API.
+        [..]
+        (@) The specific SMARTCARD interrupts (Transmission complete interrupt,
+             RXNE interrupt and Error Interrupts) will be managed using the macros
+             __HAL_SMARTCARD_ENABLE_IT() and __HAL_SMARTCARD_DISABLE_IT() inside the transmit and receive process.
+
+    [..]
+    [..] Three operation modes are available within this driver :
+
+     *** Polling mode IO operation ***
+     =================================
+     [..]
+       (+) Send an amount of data in blocking mode using HAL_SMARTCARD_Transmit()
+       (+) Receive an amount of data in blocking mode using HAL_SMARTCARD_Receive()
+
+     *** Interrupt mode IO operation ***
+     ===================================
+     [..]
+       (+) Send an amount of data in non-blocking mode using HAL_SMARTCARD_Transmit_IT()
+       (+) At transmission end of transfer HAL_SMARTCARD_TxCpltCallback() is executed and user can
+            add his own code by customization of function pointer HAL_SMARTCARD_TxCpltCallback()
+       (+) Receive an amount of data in non-blocking mode using HAL_SMARTCARD_Receive_IT()
+       (+) At reception end of transfer HAL_SMARTCARD_RxCpltCallback() is executed and user can
+            add his own code by customization of function pointer HAL_SMARTCARD_RxCpltCallback()
+       (+) In case of transfer Error, HAL_SMARTCARD_ErrorCallback() function is executed and user can
+            add his own code by customization of function pointer HAL_SMARTCARD_ErrorCallback()
+
+     *** DMA mode IO operation ***
+     ==============================
+     [..]
+       (+) Send an amount of data in non-blocking mode (DMA) using HAL_SMARTCARD_Transmit_DMA()
+       (+) At transmission end of transfer HAL_SMARTCARD_TxCpltCallback() is executed and user can
+            add his own code by customization of function pointer HAL_SMARTCARD_TxCpltCallback()
+       (+) Receive an amount of data in non-blocking mode (DMA) using HAL_SMARTCARD_Receive_DMA()
+       (+) At reception end of transfer HAL_SMARTCARD_RxCpltCallback() is executed and user can
+            add his own code by customization of function pointer HAL_SMARTCARD_RxCpltCallback()
+       (+) In case of transfer Error, HAL_SMARTCARD_ErrorCallback() function is executed and user can
+            add his own code by customization of function pointer HAL_SMARTCARD_ErrorCallback()
+
+     *** SMARTCARD HAL driver macros list ***
+     ========================================
+     [..]
+       Below the list of most used macros in SMARTCARD HAL driver.
+
+       (+) __HAL_SMARTCARD_GET_FLAG : Check whether or not the specified SMARTCARD flag is set
+       (+) __HAL_SMARTCARD_CLEAR_FLAG : Clear the specified SMARTCARD pending flag
+       (+) __HAL_SMARTCARD_ENABLE_IT: Enable the specified SMARTCARD interrupt
+       (+) __HAL_SMARTCARD_DISABLE_IT: Disable the specified SMARTCARD interrupt
+       (+) __HAL_SMARTCARD_GET_IT_SOURCE: Check whether or not the specified SMARTCARD interrupt is enabled
+
+     [..]
+       (@) You can refer to the SMARTCARD HAL driver header file for more useful macros
 
-    (#) Initialize the SMARTCARD associated USART registers by calling
-        the HAL_SMARTCARD_Init() API. 
-    
-  [..]
-    (@) HAL_SMARTCARD_Init() API also configure also the low level Hardware GPIO, CLOCK, CORTEX...etc) by 
-        calling the customized HAL_SMARTCARD_MspInit() API.
-          
   @endverbatim
   ******************************************************************************
   * @attention
@@ -94,211 +143,241 @@
   */
 
 /** @defgroup SMARTCARD SMARTCARD
-  * @brief HAL USART SMARTCARD module driver
+  * @brief HAL SMARTCARD module driver
   * @{
   */
+
 #ifdef HAL_SMARTCARD_MODULE_ENABLED
+
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
 /** @defgroup SMARTCARD_Private_Constants SMARTCARD Private Constants
  * @{
  */
-#define TEACK_REACK_TIMEOUT               1000U
+#define SMARTCARD_TEACK_REACK_TIMEOUT               1000U
 #define HAL_SMARTCARD_TXDMA_TIMEOUTVALUE  22000U
 #define USART_CR1_FIELDS      ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
-                                          USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8))
-#define USART_CR2_CLK_FIELDS  ((uint32_t)(USART_CR2_CLKEN|USART_CR2_CPOL|USART_CR2_CPHA|USART_CR2_LBCL))   
-#define USART_CR2_FIELDS      ((uint32_t)(USART_CR2_RTOEN|USART_CR2_CLK_FIELDS|USART_CR2_STOP))
-#define USART_CR3_FIELDS      ((uint32_t)(USART_CR3_ONEBIT|USART_CR3_NACK|USART_CR3_SCARCNT))  
+                                     USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8))       /*!< USART CR1 fields of parameters set by SMARTCARD_SetConfig API */
+#define USART_CR2_CLK_FIELDS  ((uint32_t)(USART_CR2_CLKEN|USART_CR2_CPOL|USART_CR2_CPHA|USART_CR2_LBCL)) /*!< SMARTCARD clock-related USART CR2 fields of parameters */
+#define USART_CR2_FIELDS      ((uint32_t)(USART_CR2_RTOEN|USART_CR2_CLK_FIELDS|USART_CR2_STOP)) /*!< USART CR2 fields of parameters set by SMARTCARD_SetConfig API */
+#define USART_CR3_FIELDS      ((uint32_t)(USART_CR3_ONEBIT|USART_CR3_NACK|USART_CR3_SCARCNT))   /*!< USART CR3 fields of parameters set by SMARTCARD_SetConfig API */
 /**
   * @}
   */
-/* Private macros -------------------------------------------------------------*/
+
+/* Private macros ------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
 /** @addtogroup SMARTCARD_Private_Functions
   * @{
   */
+static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard);
+static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsmartcard);
+static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmartcard);
+static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
+static void SMARTCARD_EndTxTransfer(SMARTCARD_HandleTypeDef *hsmartcard);
+static void SMARTCARD_EndRxTransfer(SMARTCARD_HandleTypeDef *hsmartcard);
 static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma);
 static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
 static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma);
 static void SMARTCARD_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static void SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsc);
-static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsc, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
-static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsc);
-static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc);
-static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc);
-static void SMARTCARD_EndTxTransfer(SMARTCARD_HandleTypeDef *hsc);
-static void SMARTCARD_EndRxTransfer(SMARTCARD_HandleTypeDef *hsc);
-static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsc);
+static void SMARTCARD_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
+static void SMARTCARD_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
+static void SMARTCARD_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
+static void SMARTCARD_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
+static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard);
+static HAL_StatusTypeDef SMARTCARD_EndTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard);
+static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard);
 /**
   * @}
   */
+
 /* Exported functions --------------------------------------------------------*/
+
 /** @defgroup SMARTCARD_Exported_Functions SMARTCARD Exported Functions
   * @{
   */
 
-/** @defgroup SMARTCARD_Exported_Functions_Group1 SmartCard Initialization and de-initialization functions
+/** @defgroup SMARTCARD_Exported_Functions_Group1 Initialization and de-initialization functions
   *  @brief    Initialization and Configuration functions
   *
 @verbatim
-===============================================================================
-            ##### Initialization and Configuration functions #####
- ===============================================================================
+  ==============================================================================
+              ##### Initialization and Configuration functions #####
+  ==============================================================================
   [..]
-  This subsection provides a set of functions allowing to initialize the USART
+  This subsection provides a set of functions allowing to initialize the USARTx
   associated to the SmartCard.
-      (+) These parameters can be configured: 
-        (++) Baud Rate
-        (++) Parity: parity should be enabled,
-             Frame Length is fixed to 8 bits plus parity.
-        (++) Receiver/transmitter modes
-        (++) Synchronous mode (and if enabled, phase, polarity and last bit parameters)
-        (++) Prescaler value
-        (++) Guard bit time 
-        (++) NACK enabling or disabling on transmission error               
+  (+) These parameters can be configured:
+      (++) Baud Rate
+      (++) Parity: parity should be enabled, frame Length is fixed to 8 bits plus parity
+      (++) Receiver/transmitter modes
+      (++) Synchronous mode (and if enabled, phase, polarity and last bit parameters)
+      (++) Prescaler value
+      (++) Guard bit time
+      (++) NACK enabling or disabling on transmission error
 
-      (+) The following advanced features can be configured as well:
-        (++) TX and/or RX pin level inversion
-        (++) data logical level inversion
-        (++) RX and TX pins swap
-        (++) RX overrun detection disabling
-        (++) DMA disabling on RX error
-        (++) MSB first on communication line
-        (++) Time out enabling (and if activated, timeout value)
-        (++) Block length
-        (++) Auto-retry counter       
-        
-    [..]                                                  
-    The HAL_SMARTCARD_Init() API follow respectively the USART (a)synchronous configuration procedures 
-    (details for the procedures are available in reference manual).
+  (+) The following advanced features can be configured as well:
+      (++) TX and/or RX pin level inversion
+      (++) data logical level inversion
+      (++) RX and TX pins swap
+      (++) RX overrun detection disabling
+      (++) DMA disabling on RX error
+      (++) MSB first on communication line
+      (++) Time out enabling (and if activated, timeout value)
+      (++) Block length
+      (++) Auto-retry counter
+  [..]
+  The HAL_SMARTCARD_Init() API follows the USART synchronous configuration procedures
+  (details for the procedures are available in reference manual).
 
 @endverbatim
 
   The USART frame format is given in the following table:
 
-     +---------------------------------------------------------------+
-     | M1M0 bits |  PCE bit  |            USART frame                |
-     |-----------------------|---------------------------------------|
-     |     01    |    1      |    | SB | 8 bit data | PB | STB |     |
-     +---------------------------------------------------------------+
+    Table 1. USART frame format.
+    +---------------------------------------------------------------+        
+    | M1M0 bits |  PCE bit  |            USART frame                |        
+    |-----------------------|---------------------------------------|        
+    |     01    |    1      |    | SB | 8 bit data | PB | STB |     |        
+    +---------------------------------------------------------------+        
+
 
   * @{
   */
 
 /**
-  * @brief Initializes the SMARTCARD mode according to the specified
-  *         parameters in the SMARTCARD_InitTypeDef and create the associated handle .
-  * @param hsc: SMARTCARD handle
+  * @brief  Initialize the SMARTCARD mode according to the specified
+  *         parameters in the SMARTCARD_HandleTypeDef and initialize the associated handle.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsc)
+HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsmartcard)
 {
   /* Check the SMARTCARD handle allocation */
-  if(hsc == NULL)
+  if(hsmartcard == NULL)
   {
     return HAL_ERROR;
   }
 
-  /* Check the parameters */
-  assert_param(IS_SMARTCARD_INSTANCE(hsc->Instance));
-  
-  if(hsc->gState == HAL_SMARTCARD_STATE_RESET)
-  { 
-    /* Allocate lock resource and initialize it */
-    hsc->Lock = HAL_UNLOCKED; 
-    /* Init the low level hardware : GPIO, CLOCK, CORTEX */
-    HAL_SMARTCARD_MspInit(hsc);
-  }
-  
-  hsc->gState = HAL_SMARTCARD_STATE_BUSY;
+  /* Check the USART associated to the SMARTCARD handle */
+  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
 
-  /* Disable the Peripheral */
-  __HAL_SMARTCARD_DISABLE(hsc);
-
-  /* Set the SMARTCARD Communication parameters */
-  SMARTCARD_SetConfig(hsc);
-
-  if(hsc->AdvancedInit.AdvFeatureInit != SMARTCARD_ADVFEATURE_NO_INIT)
+  if(hsmartcard->gState == HAL_SMARTCARD_STATE_RESET)
   {
-    SMARTCARD_AdvFeatureConfig(hsc);
+    /* Allocate lock resource and initialize it */
+    hsmartcard->Lock = HAL_UNLOCKED;
+
+    /* Init the low level hardware : GPIO, CLOCK */
+    HAL_SMARTCARD_MspInit(hsmartcard);
   }
 
-  /* In SmartCard mode, the following bits must be kept cleared: 
+  hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
+
+  /* Disable the Peripheral to set smartcard mode */
+  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+
+  /* In SmartCard mode, the following bits must be kept cleared:
   - LINEN in the USART_CR2 register,
   - HDSEL and IREN  bits in the USART_CR3 register.*/
-  CLEAR_BIT(hsc->Instance->CR2, USART_CR2_LINEN);
-  CLEAR_BIT(hsc->Instance->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
+  CLEAR_BIT(hsmartcard->Instance->CR2, USART_CR2_LINEN);
+  CLEAR_BIT(hsmartcard->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN));
 
   /* set the USART in SMARTCARD mode */
-  SET_BIT(hsc->Instance->CR3, USART_CR3_SCEN);
+  SET_BIT(hsmartcard->Instance->CR3, USART_CR3_SCEN);
+
+  /* Set the SMARTCARD Communication parameters */
+  if (SMARTCARD_SetConfig(hsmartcard) == HAL_ERROR)
+  {
+    return HAL_ERROR;
+  }
   
+  /* Set the SMARTCARD transmission completion indication */  
+  SMARTCARD_TRANSMISSION_COMPLETION_SETTING(hsmartcard);
+
+  if (hsmartcard->AdvancedInit.AdvFeatureInit != SMARTCARD_ADVFEATURE_NO_INIT)
+  {
+    SMARTCARD_AdvFeatureConfig(hsmartcard);
+  }
+
   /* Enable the Peripheral */
-  __HAL_SMARTCARD_ENABLE(hsc);
-  
-  /* TEACK and/or REACK to check before moving hsc->State to Ready */
-  return (SMARTCARD_CheckIdleState(hsc));
+  SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+
+  /* TEACK and/or REACK to check before moving hsmartcard->gState and hsmartcard->RxState to Ready */
+  return (SMARTCARD_CheckIdleState(hsmartcard));
 }
 
 /**
-  * @brief DeInitializes the SMARTCARD peripheral 
-  * @param hsc: SMARTCARD handle
+  * @brief  DeInitialize the SMARTCARD peripheral.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsc)
+HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsmartcard)
 {
   /* Check the SMARTCARD handle allocation */
-  if(hsc == NULL)
+  if(hsmartcard == NULL)
   {
     return HAL_ERROR;
   }
 
-  /* Check the parameters */
-  assert_param(IS_SMARTCARD_INSTANCE(hsc->Instance));
+  /* Check the USART/UART associated to the SMARTCARD handle */
+  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
 
-  hsc->gState = HAL_SMARTCARD_STATE_BUSY;
+  hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY;
+
+  /* Disable the Peripheral */
+  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+
+  WRITE_REG(hsmartcard->Instance->CR1, 0x0);
+  WRITE_REG(hsmartcard->Instance->CR2, 0x0);
+  WRITE_REG(hsmartcard->Instance->CR3, 0x0);
+  WRITE_REG(hsmartcard->Instance->RTOR, 0x0);
+  WRITE_REG(hsmartcard->Instance->GTPR, 0x0);
 
   /* DeInit the low level hardware */
-  HAL_SMARTCARD_MspDeInit(hsc);
+  HAL_SMARTCARD_MspDeInit(hsmartcard);
 
-  hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-  hsc->gState = HAL_SMARTCARD_STATE_RESET;
-  hsc->RxState = HAL_SMARTCARD_STATE_RESET;
+  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+  hsmartcard->gState    = HAL_SMARTCARD_STATE_RESET;
+  hsmartcard->RxState   = HAL_SMARTCARD_STATE_RESET;
 
-  /* Release Lock */
-  __HAL_UNLOCK(hsc);
+  /* Process Unlock */
+  __HAL_UNLOCK(hsmartcard);
 
   return HAL_OK;
 }
 
 /**
-  * @brief SMARTCARD MSP Init
-  * @param hsc: SMARTCARD handle
+  * @brief  Initialize the SMARTCARD MSP.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
   * @retval None
   */
- __weak void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsc)
+__weak void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsmartcard)
 {
   /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsc);
- 
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_MspInit could be implemented in the user file
+  UNUSED(hsmartcard);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SMARTCARD_MspInit can be implemented in the user file
    */
 }
 
 /**
-  * @brief SMARTCARD MSP DeInit
-  * @param hsc: SMARTCARD handle
+  * @brief  DeInitialize the SMARTCARD MSP.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
   * @retval None
   */
- __weak void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsc)
+__weak void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsmartcard)
 {
   /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsc);
- 
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_MspDeInit could be implemented in the user file
+  UNUSED(hsmartcard);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SMARTCARD_MspDeInit can be implemented in the user file
    */
 }
 
@@ -306,155 +385,156 @@ HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsc)
   * @}
   */
 
-/** @defgroup SMARTCARD_Exported_Functions_Group2 IO operation functions 
-  *  @brief   SMARTCARD Transmit and Receive functions 
+/** @defgroup SMARTCARD_Exported_Functions_Group2 IO operation functions
+  *  @brief   SMARTCARD Transmit and Receive functions
   *
-@verbatim   
- ===============================================================================
-                      ##### IO operation functions #####
- ===============================================================================  
+@verbatim
+  ==============================================================================
+                         ##### IO operation functions #####
+  ==============================================================================
+  [..]
     This subsection provides a set of functions allowing to manage the SMARTCARD data transfers.
 
-    (#) There are two modes of transfer:
-       (+) Blocking mode: The communication is performed in polling mode. 
-            The HAL status of all data processing is returned by the same function 
-            after finishing transfer.  
-       (+) No-Blocking mode: The communication is performed using Interrupts 
-           or DMA, These API's return the HAL status.
-           The end of the data processing will be indicated through the 
-           dedicated SMARTCARD IRQ when using Interrupt mode or the DMA IRQ when 
-           using DMA mode.
-           The HAL_SMARTCARD_TxCpltCallback(), HAL_SMARTCARD_RxCpltCallback() user callbacks 
-           will be executed respectively at the end of the Transmit or Receive process
-           The HAL_SMARTCARD_ErrorCallback()user callback will be executed when a communication error is detected
+  [..]
+    Smartcard is a single wire half duplex communication protocol.
+    The Smartcard interface is designed to support asynchronous protocol Smartcards as
+    defined in the ISO 7816-3 standard. The USART should be configured as:
+    (+) 8 bits plus parity: where M=1 and PCE=1 in the USART_CR1 register
+    (+) 1.5 stop bits when transmitting and receiving: where STOP=11 in the USART_CR2 register.
 
-    (#) Blocking mode API's are :
-        (+) HAL_SMARTCARD_Transmit()
-        (+) HAL_SMARTCARD_Receive() 
-        
-    (#) Non-Blocking mode API's with Interrupt are :
-        (+) HAL_SMARTCARD_Transmit_IT()
-        (+) HAL_SMARTCARD_Receive_IT()
-        (+) HAL_SMARTCARD_IRQHandler()
-        (+) SMARTCARD_Transmit_IT()
-        (+) SMARTCARD_Receive_IT()    
+  [..]
+    (+) There are two modes of transfer:
+        (++) Blocking mode: The communication is performed in polling mode.
+             The HAL status of all data processing is returned by the same function
+             after finishing transfer.
+        (++) Non-Blocking mode: The communication is performed using Interrupts
+             or DMA, the relevant API's return the HAL status.
+             The end of the data processing will be indicated through the
+             dedicated SMARTCARD IRQ when using Interrupt mode or the DMA IRQ when
+             using DMA mode.
+        (++) The HAL_SMARTCARD_TxCpltCallback(), HAL_SMARTCARD_RxCpltCallback() user callbacks
+             will be executed respectively at the end of the Transmit or Receive process
+             The HAL_SMARTCARD_ErrorCallback() user callback will be executed when a communication
+             error is detected.
 
-    (#) No-Blocking mode functions with DMA are :
-        (+) HAL_SMARTCARD_Transmit_DMA()
-        (+) HAL_SMARTCARD_Receive_DMA()
+    (+) Blocking mode APIs are :
+        (++) HAL_SMARTCARD_Transmit()
+        (++) HAL_SMARTCARD_Receive()
+
+    (+) Non Blocking mode APIs with Interrupt are :
+        (++) HAL_SMARTCARD_Transmit_IT()
+        (++) HAL_SMARTCARD_Receive_IT()
+        (++) HAL_SMARTCARD_IRQHandler()
+
+    (+) Non Blocking mode functions with DMA are :
+        (++) HAL_SMARTCARD_Transmit_DMA()
+        (++) HAL_SMARTCARD_Receive_DMA()
+
+    (+) A set of Transfer Complete Callbacks are provided in non Blocking mode:
+        (++) HAL_SMARTCARD_TxCpltCallback()
+        (++) HAL_SMARTCARD_RxCpltCallback()
+        (++) HAL_SMARTCARD_ErrorCallback()
+
+    (#) Non-Blocking mode transfers could be aborted using Abort API's :
+        (+) HAL_SMARTCARD_Abort()
+        (+) HAL_SMARTCARD_AbortTransmit()
+        (+) HAL_SMARTCARD_AbortReceive()
+        (+) HAL_SMARTCARD_Abort_IT()
+        (+) HAL_SMARTCARD_AbortTransmit_IT()
+        (+) HAL_SMARTCARD_AbortReceive_IT()
+
+    (#) For Abort services based on interrupts (HAL_SMARTCARD_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
+        (+) HAL_SMARTCARD_AbortCpltCallback()
+        (+) HAL_SMARTCARD_AbortTransmitCpltCallback()
+        (+) HAL_SMARTCARD_AbortReceiveCpltCallback()
+
+    (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
+        Errors are handled as follows :
+       (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 
+           to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
+           Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
+           and HAL_SMARTCARD_ErrorCallback() user callback is executed. Transfer is kept ongoing on SMARTCARD side.
+           If user wants to abort it, Abort services should be called by user.
+       (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
+           This concerns Frame Error in Interrupt mode tranmission, Overrun Error in Interrupt mode reception and all errors in DMA mode.
+           Error code is set to allow user to identify error type, and HAL_SMARTCARD_ErrorCallback() user callback is executed.
 
-    (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
-        (+) HAL_SMARTCARD_TxCpltCallback()
-        (+) HAL_SMARTCARD_RxCpltCallback()
-        (+) HAL_SMARTCARD_ErrorCallback()
-      
 @endverbatim
   * @{
   */
 
 /**
-  * @brief Send an amount of data in blocking mode 
-  * @param hsc: SMARTCARD handle
-  * @param pData: pointer to data buffer
-  * @param Size: amount of data to be sent
-  * @param Timeout: Timeout duration
+  * @brief  Send an amount of data in blocking mode.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @param  pData pointer to data buffer.
+  * @param  Size amount of data to be sent.
+  * @param  Timeout  Timeout duration.
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size, uint32_t Timeout)
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
-  uint32_t tickstart = 0U;
-  
-  if(hsc->gState == HAL_SMARTCARD_STATE_READY)
+  uint32_t tickstart = 0;
+
+  /* Check that a Tx process is not already ongoing */
+  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
   {
-    if((pData == NULL) || (Size == 0U)) 
+    if((pData == NULL) || (Size == 0))
     {
       return  HAL_ERROR;
     }
 
     /* Process Locked */
-    __HAL_LOCK(hsc);
-    hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;    
-    hsc->gState = HAL_SMARTCARD_STATE_BUSY_TX;
-    
+    __HAL_LOCK(hsmartcard);
+
+    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
+
     /* Init tickstart for timeout managment*/
     tickstart = HAL_GetTick();
     
-    hsc->TxXferSize = Size;
-    hsc->TxXferCount = Size;
-    while(hsc->TxXferCount > 0U)
+    /* Disable the Peripheral first to update mode for TX master */
+    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+
+    /* Disable Rx, enable Tx */
+    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
+    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
+    
+    /* Enable the Peripheral */
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+
+    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+    hsmartcard->TxXferSize = Size;
+    hsmartcard->TxXferCount = Size;
+
+    while(hsmartcard->TxXferCount > 0)
     {
-      hsc->TxXferCount--;
-      if(SMARTCARD_WaitOnFlagUntilTimeout(hsc, SMARTCARD_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)  
-      { 
-        return HAL_TIMEOUT;
-      }
-      hsc->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
-    }
-    if(SMARTCARD_WaitOnFlagUntilTimeout(hsc, SMARTCARD_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)  
-    { 
-      return HAL_TIMEOUT;
-    }
-    
-    /* At end of Tx process, restore hsc->gState to Ready */
-    hsc->gState = HAL_SMARTCARD_STATE_READY;
-    
-    /* Process Unlocked */
-    __HAL_UNLOCK(hsc);
-
-    return HAL_OK;
-  }
-  else
-  {
-    return HAL_BUSY;
-  }
-}
-
-/**
-  * @brief Receive an amount of data in blocking mode 
-  * @param hsc: SMARTCARD handle
-  * @param pData: pointer to data buffer
-  * @param Size: amount of data to be received
-  * @param Timeout: Timeout duration
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size, uint32_t Timeout)
-{
-  uint32_t tickstart = 0U;
-  
-  if(hsc->RxState == HAL_SMARTCARD_STATE_READY)
-  {
-    if((pData == NULL) || (Size == 0U)) 
-    {
-      return  HAL_ERROR;
-    }
-
-    /* Process Locked */
-    __HAL_LOCK(hsc);
-    
-    hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsc->RxState = HAL_SMARTCARD_STATE_BUSY_RX;
-    
-    /* Init tickstart for timeout managment*/
-    tickstart = HAL_GetTick();
-
-    hsc->RxXferSize = Size;
-    hsc->RxXferCount = Size;
-    /* Check the remain data to be received */
-    while(hsc->RxXferCount > 0U)
-    {
-      hsc->RxXferCount--;
-      if(SMARTCARD_WaitOnFlagUntilTimeout(hsc, SMARTCARD_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)  
+      hsmartcard->TxXferCount--;
+      if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
       {
         return HAL_TIMEOUT;
       }
-      *pData++ = (uint8_t)(hsc->Instance->RDR & (uint8_t)0x00FFU);
+      hsmartcard->Instance->TDR = (*pData++ & (uint8_t)0xFF);
     }
-
-    /* At end of Rx process, restore hsc->RxState to Ready */
-    hsc->RxState = HAL_SMARTCARD_STATE_READY;
+    if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_TRANSMISSION_COMPLETION_FLAG(hsmartcard), RESET, tickstart, Timeout) != HAL_OK)
+    {
+      return HAL_TIMEOUT;
+    }
+    /* Re-enable Rx at end of transmission if initial mode is Rx/Tx */
+    if(hsmartcard->Init.Mode == SMARTCARD_MODE_TX_RX)
+    {
+      /* Disable the Peripheral first to update modes */
+      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+      SET_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
+      /* Enable the Peripheral */
+      SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+    }
+    
+    /* At end of Tx process, restore hsmartcard->gState to Ready */
+    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
 
     /* Process Unlocked */
-    __HAL_UNLOCK(hsc);
+    __HAL_UNLOCK(hsmartcard);
 
     return HAL_OK;
   }
@@ -465,40 +545,111 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsc, uint8_t *p
 }
 
 /**
-  * @brief Send an amount of data in interrupt mode 
-  * @param hsc: SMARTCARD handle
-  * @param pData: pointer to data buffer
-  * @param Size: amount of data to be sent
+  * @brief  Receive an amount of data in blocking mode.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @param  pData pointer to data buffer.
+  * @param  Size amount of data to be received.
+  * @param  Timeout Timeout duration.
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout)
+{
+  uint32_t tickstart = 0;
+
+  /* Check that a Rx process is not already ongoing */
+  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
+  {
+    if((pData == NULL) || (Size == 0))
+    {
+      return  HAL_ERROR;
+    }
+
+    /* Process Locked */
+    __HAL_LOCK(hsmartcard);
+
+    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
+
+    /* Init tickstart for timeout managment*/
+    tickstart = HAL_GetTick();
+
+    hsmartcard->RxXferSize = Size;
+    hsmartcard->RxXferCount = Size;
+
+    /* Check the remain data to be received */
+    while(hsmartcard->RxXferCount > 0)
+    {
+      hsmartcard->RxXferCount--;
+
+      if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
+      {
+        return HAL_TIMEOUT;
+      }
+      *pData++ = (uint8_t)(hsmartcard->Instance->RDR & (uint8_t)0x00FF);
+    }
+
+    /* At end of Rx process, restore hsmartcard->RxState to Ready */
+    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+    /* Process Unlocked */
+    __HAL_UNLOCK(hsmartcard);
+
+    return HAL_OK;
+  }
+  else
+  {
+    return HAL_BUSY;
+  }
+}
+
+/**
+  * @brief  Send an amount of data in interrupt mode.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @param  pData pointer to data buffer.
+  * @param  Size amount of data to be sent.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
 {
   /* Check that a Tx process is not already ongoing */
-  if(hsc->gState == HAL_SMARTCARD_STATE_READY)
+  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
   {
-    if((pData == NULL) || (Size == 0U)) 
+    if((pData == NULL) || (Size == 0))
     {
       return HAL_ERROR;
     }
 
     /* Process Locked */
-    __HAL_LOCK(hsc);
+    __HAL_LOCK(hsmartcard);
 
-    hsc->pTxBuffPtr = pData;
-    hsc->TxXferSize = Size;
-    hsc->TxXferCount = Size;
+    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
 
-    hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsc->gState = HAL_SMARTCARD_STATE_BUSY_TX;
+    hsmartcard->pTxBuffPtr = pData;
+    hsmartcard->TxXferSize = Size;
+    hsmartcard->TxXferCount = Size;
+
+    /* Disable the Peripheral first to update mode for TX master */
+    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+
+    /* Disable Rx, enable Tx */
+    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
+    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
     
+    /* Enable the Peripheral */
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+
     /* Process Unlocked */
-    __HAL_UNLOCK(hsc);
+    __HAL_UNLOCK(hsmartcard);
 
-    /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-    CLEAR_BIT(hsc->Instance->CR3, USART_CR3_EIE);
+    /* Enable the SMARTCARD Error Interrupt: (Frame error) */
+    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
 
-    /* Enable the SMARTCARD Transmit Complete Interrupt */
-    CLEAR_BIT(hsc->Instance->CR1, USART_CR1_TCIE);
+    /* Enable the SMARTCARD Transmit Data Register Empty Interrupt */
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TXEIE);
 
     return HAL_OK;
   }
@@ -509,43 +660,41 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, uint8_
 }
 
 /**
-  * @brief Receive an amount of data in interrupt mode 
-  * @param hsc: SMARTCARD handle
-  * @param pData: pointer to data buffer
-  * @param Size: amount of data to be received
+  * @brief  Receive an amount of data in interrupt mode.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @param  pData pointer to data buffer.
+  * @param  Size amount of data to be received.
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
 {
-  /* Check that a Rx process is not already ongoing */ 
-  if(hsc->RxState == HAL_SMARTCARD_STATE_READY) 
+  /* Check that a Rx process is not already ongoing */
+  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
   {
-    if((pData == NULL) || (Size == 0U)) 
+    if((pData == NULL) || (Size == 0))
     {
       return HAL_ERROR;
     }
 
     /* Process Locked */
-    __HAL_LOCK(hsc);
+    __HAL_LOCK(hsmartcard);
 
-    hsc->pRxBuffPtr = pData;
-    hsc->RxXferSize = Size;
-    hsc->RxXferCount = Size;
+    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
+
+    hsmartcard->pRxBuffPtr = pData;
+    hsmartcard->RxXferSize = Size;
+    hsmartcard->RxXferCount = Size;
 
-    hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsc->RxState = HAL_SMARTCARD_STATE_BUSY_RX;
-    
     /* Process Unlocked */
-    __HAL_UNLOCK(hsc);
-    
-    /* Enable the SMARTCARD Parity Error Interrupt */
-    SET_BIT(hsc->Instance->CR1, USART_CR1_PEIE);
+    __HAL_UNLOCK(hsmartcard);
+
+    /* Enable the SMARTCARD Parity Error and Data Register not empty Interrupts */
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE| USART_CR1_RXNEIE);
 
     /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hsc->Instance->CR3, USART_CR3_EIE);
-
-    /* Enable the SMARTCARD Data Register not empty Interrupt */
-    SET_BIT(hsc->Instance->CR1, USART_CR1_RXNEIE);
+    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
 
     return HAL_OK;
   }
@@ -556,56 +705,68 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t
 }
 
 /**
-  * @brief Send an amount of data in DMA mode 
-  * @param hsc: SMARTCARD handle
-  * @param pData: pointer to data buffer
-  * @param Size: amount of data to be sent
+  * @brief  Send an amount of data in DMA mode.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @param  pData pointer to data buffer.
+  * @param  Size amount of data to be sent.
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
 {
-  uint32_t *tmp;
-  
   /* Check that a Tx process is not already ongoing */
-  if(hsc->gState == HAL_SMARTCARD_STATE_READY)
+  if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
   {
-    if((pData == NULL) || (Size == 0U)) 
+    if((pData == NULL) || (Size == 0))
     {
       return HAL_ERROR;
     }
 
     /* Process Locked */
-    __HAL_LOCK(hsc);
+    __HAL_LOCK(hsmartcard);
 
-    hsc->pTxBuffPtr = pData;
-    hsc->TxXferSize = Size;
-    hsc->TxXferCount = Size;
+    hsmartcard->gState = HAL_SMARTCARD_STATE_BUSY_TX;
 
-    hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsc->gState = HAL_SMARTCARD_STATE_BUSY_TX;
+    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+    hsmartcard->pTxBuffPtr = pData;
+    hsmartcard->TxXferSize = Size;
+    hsmartcard->TxXferCount = Size;
+
+    /* Disable the Peripheral first to update mode for TX master */
+    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+
+    /* Disable Rx, enable Tx */
+    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
+    SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST);
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE);
+    
+    /* Enable the Peripheral */
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
 
     /* Set the SMARTCARD DMA transfer complete callback */
-    hsc->hdmatx->XferCpltCallback = SMARTCARD_DMATransmitCplt;
+    hsmartcard->hdmatx->XferCpltCallback = SMARTCARD_DMATransmitCplt;
 
     /* Set the SMARTCARD error callback */
-    hsc->hdmatx->XferErrorCallback = SMARTCARD_DMAError;
-    
-    /* Set the DMA abort callback */
-    hsc->hdmatx->XferAbortCallback = NULL;
+    hsmartcard->hdmatx->XferErrorCallback = SMARTCARD_DMAError;
+
+    /* Set the DMA abort callback */
+    hsmartcard->hdmatx->XferAbortCallback = NULL;
+
+    /* Enable the SMARTCARD transmit DMA channel */
+    HAL_DMA_Start_IT(hsmartcard->hdmatx, (uint32_t)hsmartcard->pTxBuffPtr, (uint32_t)&hsmartcard->Instance->TDR, Size);
+
+    /* Clear the TC flag in the ICR register */
+    CLEAR_BIT(hsmartcard->Instance->ICR, USART_ICR_TCCF);
 
-    /* Enable the SMARTCARD transmit DMA Stream */
-    tmp = (uint32_t*)&pData;
-    HAL_DMA_Start_IT(hsc->hdmatx, *(uint32_t*)tmp, (uint32_t)&hsc->Instance->TDR, Size);
-    
-	/* Clear the TC flag in the SR register by writing 0 to it */
-    __HAL_SMARTCARD_CLEAR_IT(hsc, SMARTCARD_FLAG_TC);
-    
     /* Process Unlocked */
-    __HAL_UNLOCK(hsc);
+    __HAL_UNLOCK(hsmartcard);
+
+    /* Enable the UART Error Interrupt: (Frame error) */
+    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
 
     /* Enable the DMA transfer for transmit request by setting the DMAT bit
        in the SMARTCARD associated USART CR3 register */
-    SET_BIT(hsc->Instance->CR3, USART_CR3_DMAT);
+    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
 
     return HAL_OK;
   }
@@ -616,60 +777,58 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, uint8
 }
 
 /**
-  * @brief Receive an amount of data in DMA mode 
-  * @param hsc: SMARTCARD handle
-  * @param pData: pointer to data buffer
-  * @param Size: amount of data to be received
-  * @note   The SMARTCARD-associated USART parity is enabled (PCE = 1), 
-  *         the received data contain the parity bit (MSB position)   
+  * @brief  Receive an amount of data in DMA mode.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @param  pData pointer to data buffer.
+  * @param  Size amount of data to be received.
+  * @note   The SMARTCARD-associated USART parity is enabled (PCE = 1),
+  *         the received data contain the parity bit (MSB position).
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size)
 {
-  uint32_t *tmp;
-  
   /* Check that a Rx process is not already ongoing */
-  if(hsc->RxState == HAL_SMARTCARD_STATE_READY)
+  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
   {
-    if((pData == NULL) || (Size == 0U)) 
+    if((pData == NULL) || (Size == 0))
     {
       return HAL_ERROR;
     }
 
     /* Process Locked */
-    __HAL_LOCK(hsc);
+    __HAL_LOCK(hsmartcard);
 
-    hsc->pRxBuffPtr = pData;
-    hsc->RxXferSize = Size;
+    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+    hsmartcard->RxState   = HAL_SMARTCARD_STATE_BUSY_RX;
 
-    hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-    hsc->RxState = HAL_SMARTCARD_STATE_BUSY_RX;
+    hsmartcard->pRxBuffPtr = pData;
+    hsmartcard->RxXferSize = Size;
 
     /* Set the SMARTCARD DMA transfer complete callback */
-    hsc->hdmarx->XferCpltCallback = SMARTCARD_DMAReceiveCplt;
+    hsmartcard->hdmarx->XferCpltCallback = SMARTCARD_DMAReceiveCplt;
 
     /* Set the SMARTCARD DMA error callback */
-    hsc->hdmarx->XferErrorCallback = SMARTCARD_DMAError;
-    
+    hsmartcard->hdmarx->XferErrorCallback = SMARTCARD_DMAError;
+
     /* Set the DMA abort callback */
-    hsc->hdmatx->XferAbortCallback = NULL;
+    hsmartcard->hdmarx->XferAbortCallback = NULL;
+
+    /* Enable the DMA channel */
+    HAL_DMA_Start_IT(hsmartcard->hdmarx, (uint32_t)&hsmartcard->Instance->RDR, (uint32_t)hsmartcard->pRxBuffPtr, Size);
 
-    /* Enable the DMA Stream */
-    tmp = (uint32_t*)&pData;
-    HAL_DMA_Start_IT(hsc->hdmarx, (uint32_t)&hsc->Instance->RDR, *(uint32_t*)tmp, Size);
-    
     /* Process Unlocked */
-    __HAL_UNLOCK(hsc);
-    
-    /* Enable the SMARTCARD Parity Error Interrupt */
-    SET_BIT(hsc->Instance->CR1, USART_CR1_PEIE);
+    __HAL_UNLOCK(hsmartcard);
 
-    /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-    SET_BIT(hsc->Instance->CR3, USART_CR3_EIE);
+    /* Enable the UART Parity Error Interrupt */
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
 
-    /* Enable the DMA transfer for the receiver request by setting the DMAR bit 
-    in the SMARTCARD associated USART CR3 register */
-    SET_BIT(hsc->Instance->CR3, USART_CR3_DMAR);
+    /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
+    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+
+    /* Enable the DMA transfer for the receiver request by setting the DMAR bit
+       in the SMARTCARD associated USART CR3 register */
+    SET_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
 
     return HAL_OK;
   }
@@ -678,183 +837,761 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_
     return HAL_BUSY;
   }
 }
-    
-/**
-  * @brief SMARTCARD interrupt requests handling.
-  * @param hsc: SMARTCARD handle
-  * @retval None
-  */
-void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsc)
-{
-  uint32_t isrflags   = READ_REG(hsc->Instance->ISR);
-  uint32_t cr1its     = READ_REG(hsc->Instance->CR1);
-  uint32_t cr3its     = READ_REG(hsc->Instance->CR3);
-  uint32_t dmarequest = 0x00U;
-  uint32_t errorflags = 0x00U;
 
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
-  if(errorflags == RESET)
+/**
+  * @brief  Abort ongoing transfers (blocking mode).
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable SMARTCARD Interrupts (Tx and Rx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_SMARTCARD_Abort(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Disable RTOIE, EOBIE, TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
+  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+
+  /* Disable the SMARTCARD DMA Tx request if enabled */
+  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
   {
-    /* SMARTCARD in mode Receiver -------------------------------------------------*/
-    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the SMARTCARD DMA Tx channel : use blocking DMA Abort API (no callback) */
+    if(hsmartcard->hdmatx != NULL)
     {
-      SMARTCARD_Receive_IT(hsc);
-      return;
+      /* Set the SMARTCARD DMA Abort callback to Null. 
+         No call back execution at end of DMA abort procedure */
+      hsmartcard->hdmatx->XferAbortCallback = NULL;
+
+      HAL_DMA_Abort(hsmartcard->hdmatx);
     }
   }
 
-  /* If some errors occur */
-  if((errorflags != RESET) && ((cr3its & (USART_CR3_EIE | USART_CR1_PEIE)) != RESET))
+  /* Disable the SMARTCARD DMA Rx request if enabled */
+  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
   {
-    /* SMARTCARD parity error interrupt occurred ---------------------------*/
-    if(((isrflags & SMARTCARD_FLAG_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
-    { 
-      hsc->ErrorCode |= HAL_SMARTCARD_ERROR_PE;
-    }
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
 
-    /* SMARTCARD frame error interrupt occurred ----------------------------*/
-    if(((isrflags & SMARTCARD_FLAG_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    { 
-      hsc->ErrorCode |= HAL_SMARTCARD_ERROR_FE;
-    }
-
-    /* SMARTCARD noise error interrupt occurred ----------------------------*/
-    if(((isrflags & SMARTCARD_FLAG_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    { 
-      hsc->ErrorCode |= HAL_SMARTCARD_ERROR_NE;
-    }
-
-    /* SMARTCARD Over-Run interrupt occurred -------------------------------*/
-    if(((isrflags & SMARTCARD_FLAG_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
-    { 
-      hsc->ErrorCode |= HAL_SMARTCARD_ERROR_ORE;
-    }
-    /* Call the Error call Back in case of Errors */
-    if(hsc->ErrorCode != HAL_SMARTCARD_ERROR_NONE)
+    /* Abort the SMARTCARD DMA Rx channel : use blocking DMA Abort API (no callback) */
+    if(hsmartcard->hdmarx != NULL)
     {
-      /* SMARTCARD in mode Receiver -----------------------------------------------*/
+      /* Set the SMARTCARD DMA Abort callback to Null. 
+         No call back execution at end of DMA abort procedure */
+      hsmartcard->hdmarx->XferAbortCallback = NULL;
+
+      HAL_DMA_Abort(hsmartcard->hdmarx);
+    }
+  }
+
+  /* Reset Tx and Rx transfer counters */
+  hsmartcard->TxXferCount = 0; 
+  hsmartcard->RxXferCount = 0; 
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
+
+  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
+  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
+  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+  /* Reset Handle ErrorCode to No Error */
+  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing Transmit transfer (blocking mode).
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable SMARTCARD Interrupts (Tx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Disable TXEIE and TCIE interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
+
+  /* Check if a receive process is ongoing or not. If not disable ERR IT */
+  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
+  {
+    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+  }
+
+  /* Disable the SMARTCARD DMA Tx request if enabled */
+  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
+  {
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the SMARTCARD DMA Tx channel : use blocking DMA Abort API (no callback) */
+    if(hsmartcard->hdmatx != NULL)
+    {
+      /* Set the SMARTCARD DMA Abort callback to Null. 
+         No call back execution at end of DMA abort procedure */
+      hsmartcard->hdmatx->XferAbortCallback = NULL;
+
+      HAL_DMA_Abort(hsmartcard->hdmatx);
+    }
+  }
+
+  /* Reset Tx transfer counter */
+  hsmartcard->TxXferCount = 0; 
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
+
+  /* Restore hsmartcard->gState to Ready */
+  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing Receive transfer (blocking mode).
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable SMARTCARD Interrupts (Rx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Disable RTOIE, EOBIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
+
+  /* Check if a Transmit process is ongoing or not. If not disable ERR IT */
+  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
+  {
+    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+  }
+
+  /* Disable the SMARTCARD DMA Rx request if enabled */
+  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
+  {
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
+
+    /* Abort the SMARTCARD DMA Rx channel : use blocking DMA Abort API (no callback) */
+    if(hsmartcard->hdmarx != NULL)
+    {
+      /* Set the SMARTCARD DMA Abort callback to Null. 
+         No call back execution at end of DMA abort procedure */
+      hsmartcard->hdmarx->XferAbortCallback = NULL;
+
+      HAL_DMA_Abort(hsmartcard->hdmarx);
+    }
+  }
+
+  /* Reset Rx transfer counter */
+  hsmartcard->RxXferCount = 0; 
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
+
+  /* Restore hsmartcard->RxState to Ready */
+  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing transfers (Interrupt mode).
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @note   This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable SMARTCARD Interrupts (Tx and Rx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  *           - At abort completion, call user abort complete callback
+  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
+  *         considered as completed only when user abort complete callback is executed (not when exiting function).
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_SMARTCARD_Abort_IT(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  uint32_t abortcplt = 1;
+  
+  /* Disable RTOIE, EOBIE, TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
+  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+
+  /* If DMA Tx and/or DMA Rx Handles are associated to SMARTCARD Handle, DMA Abort complete callbacks should be initialised
+     before any call to DMA Abort functions */
+  /* DMA Tx Handle is valid */
+  if(hsmartcard->hdmatx != NULL)
+  {
+    /* Set DMA Abort Complete callback if SMARTCARD DMA Tx request if enabled.
+       Otherwise, set it to NULL */
+    if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
+    {
+      hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMATxAbortCallback;
+    }
+    else
+    {
+      hsmartcard->hdmatx->XferAbortCallback = NULL;
+    }
+  }
+  /* DMA Rx Handle is valid */
+  if(hsmartcard->hdmarx != NULL)
+  {
+    /* Set DMA Abort Complete callback if SMARTCARD DMA Rx request if enabled.
+       Otherwise, set it to NULL */
+    if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
+    {
+      hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMARxAbortCallback;
+    }
+    else
+    {
+      hsmartcard->hdmarx->XferAbortCallback = NULL;
+    }
+  }
+  
+  /* Disable the SMARTCARD DMA Tx request if enabled */
+  if(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
+  {
+    /* Disable DMA Tx at UART level */
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the SMARTCARD DMA Tx channel : use non blocking DMA Abort API (callback) */
+    if(hsmartcard->hdmatx != NULL)
+    {
+      /* SMARTCARD Tx DMA Abort callback has already been initialised : 
+         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
+
+      /* Abort DMA TX */
+      if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
+      {
+        hsmartcard->hdmatx->XferAbortCallback = NULL;
+      }
+      else
+      {
+        abortcplt = 0;
+      }
+    }
+  }
+
+  /* Disable the SMARTCARD DMA Rx request if enabled */
+  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
+  {
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
+
+    /* Abort the SMARTCARD DMA Rx channel : use non blocking DMA Abort API (callback) */
+    if(hsmartcard->hdmarx != NULL)
+    {
+      /* SMARTCARD Rx DMA Abort callback has already been initialised : 
+         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
+
+      /* Abort DMA RX */
+      if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
+      {
+        hsmartcard->hdmarx->XferAbortCallback = NULL;
+        abortcplt = 1;
+      }
+      else
+      {
+        abortcplt = 0;
+      }
+    }
+  }
+
+  /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
+  if (abortcplt == 1)
+  {
+    /* Reset Tx and Rx transfer counters */
+    hsmartcard->TxXferCount = 0; 
+    hsmartcard->RxXferCount = 0;
+
+    /* Reset errorCode */
+    hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+
+    /* Clear the Error flags in the ICR register */
+    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
+
+    /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
+    hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
+    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+    /* As no DMA to be aborted, call directly user Abort complete callback */
+    HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing Transmit transfer (Interrupt mode).
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @note   This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable SMARTCARD Interrupts (Tx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  *           - At abort completion, call user abort complete callback
+  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
+  *         considered as completed only when user abort complete callback is executed (not when exiting function).
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Disable TXEIE and TCIE interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
+
+  /* Check if a receive process is ongoing or not. If not disable ERR IT */
+  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
+  {
+    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+  }
+
+  /* Disable the SMARTCARD DMA Tx request if enabled */
+  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
+  {
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
+
+    /* Abort the SMARTCARD DMA Tx channel : use non blocking DMA Abort API (callback) */
+    if(hsmartcard->hdmatx != NULL)
+    {
+      /* Set the SMARTCARD DMA Abort callback : 
+         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
+      hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMATxOnlyAbortCallback;
+
+      /* Abort DMA TX */
+      if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
+      {
+        /* Call Directly hsmartcard->hdmatx->XferAbortCallback function in case of error */
+        hsmartcard->hdmatx->XferAbortCallback(hsmartcard->hdmatx);
+      }
+    }
+    else
+    {
+      /* Reset Tx transfer counter */
+      hsmartcard->TxXferCount = 0; 
+
+      /* Restore hsmartcard->gState to Ready */
+      hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
+
+      /* As no DMA to be aborted, call directly user Abort complete callback */
+      HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
+    }
+  }
+  else
+  {
+    /* Reset Tx transfer counter */
+    hsmartcard->TxXferCount = 0; 
+
+    /* Clear the Error flags in the ICR register */
+    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
+
+    /* Restore hsmartcard->gState to Ready */
+    hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
+
+    /* As no DMA to be aborted, call directly user Abort complete callback */
+    HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Abort ongoing Receive transfer (Interrupt mode).
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @note   This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 
+  *         This procedure performs following operations :
+  *           - Disable SMARTCARD Interrupts (Rx)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  *           - At abort completion, call user abort complete callback
+  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
+  *         considered as completed only when user abort complete callback is executed (not when exiting function).
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive_IT(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Disable RTOIE, EOBIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE | USART_CR1_EOBIE));
+
+  /* Check if a Transmit process is ongoing or not. If not disable ERR IT */
+  if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
+  {
+    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+  }
+
+  /* Disable the SMARTCARD DMA Rx request if enabled */
+  if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
+  {
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
+
+    /* Abort the SMARTCARD DMA Rx channel : use non blocking DMA Abort API (callback) */
+    if(hsmartcard->hdmarx != NULL)
+    {
+      /* Set the SMARTCARD DMA Abort callback : 
+         will lead to call HAL_SMARTCARD_AbortCpltCallback() at end of DMA abort procedure */
+      hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMARxOnlyAbortCallback;
+
+      /* Abort DMA RX */
+      if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
+      {
+        /* Call Directly hsmartcard->hdmarx->XferAbortCallback function in case of error */
+        hsmartcard->hdmarx->XferAbortCallback(hsmartcard->hdmarx);
+      }
+    }
+    else
+    {
+      /* Reset Rx transfer counter */
+      hsmartcard->RxXferCount = 0; 
+
+      /* Clear the Error flags in the ICR register */
+      __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
+
+      /* Restore hsmartcard->RxState to Ready */
+      hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+      /* As no DMA to be aborted, call directly user Abort complete callback */
+      HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
+    }
+  }
+  else
+  {
+    /* Reset Rx transfer counter */
+    hsmartcard->RxXferCount = 0; 
+
+    /* Clear the Error flags in the ICR register */
+    __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
+
+    /* Restore hsmartcard->RxState to Ready */
+    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+    /* As no DMA to be aborted, call directly user Abort complete callback */
+    HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief Handle SMARTCARD interrupt requests.
+  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  uint32_t isrflags   = READ_REG(hsmartcard->Instance->ISR);
+  uint32_t cr1its     = READ_REG(hsmartcard->Instance->CR1);
+  uint32_t cr3its;
+  uint32_t errorflags;
+
+  /* If no error occurs */
+  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
+  if (errorflags == RESET)
+  {
+    /* SMARTCARD in mode Receiver ---------------------------------------------------*/
+    if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
+    {
+      SMARTCARD_Receive_IT(hsmartcard);
+      /* Clear RXNE interrupt flag done by reading RDR in SMARTCARD_Receive_IT() */
+      return;
+    }
+  }  
+
+  /* If some errors occur */
+  cr3its = READ_REG(hsmartcard->Instance->CR3);
+  if(   (errorflags != RESET) 
+     && (    ((cr3its & USART_CR3_EIE) != RESET)
+          || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != RESET)) )
+  {
+    /* SMARTCARD parity error interrupt occurred -------------------------------------*/
+    if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
+    {
+      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_PEF);
+
+      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_PE;
+    }
+
+    /* SMARTCARD frame error interrupt occurred --------------------------------------*/
+    if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
+    {
+      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_FEF);
+
+      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_FE;
+    }
+
+    /* SMARTCARD noise error interrupt occurred --------------------------------------*/
+    if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
+    {
+      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_NEF);
+
+      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_NE;
+    }
+
+    /* SMARTCARD Over-Run interrupt occurred -----------------------------------------*/
+    if(((isrflags & USART_ISR_ORE) != RESET) &&
+       (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET)))
+    {
+      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_OREF);
+
+      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_ORE;
+    }
+
+    /* SMARTCARD receiver timeout interrupt occurred -----------------------------------------*/
+    if(((isrflags & USART_ISR_RTOF) != RESET) && ((cr1its & USART_CR1_RTOIE) != RESET))
+    {
+      __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_RTOF);
+
+      hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_RTO;
+    }
+
+    /* Call SMARTCARD Error Call back function if need be --------------------------*/
+    if(hsmartcard->ErrorCode != HAL_SMARTCARD_ERROR_NONE)
+    {
+      /* SMARTCARD in mode Receiver ---------------------------------------------------*/
       if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
       {
-        SMARTCARD_Receive_IT(hsc);
+        SMARTCARD_Receive_IT(hsmartcard);
       }
 
-      /* If Overrun error occurs, or if any error occurs in DMA mode reception,
-         consider error as blocking */
-      dmarequest = HAL_IS_BIT_SET(hsc->Instance->CR3, USART_CR3_DMAR);
-      if(((hsc->ErrorCode & HAL_SMARTCARD_ERROR_ORE) != RESET) || dmarequest)
-      {
+      /* If Error is to be considered as blocking :
+          - Receiver Timeout error in Reception
+          - Overrun error in Reception
+          - any error occurs in DMA mode reception
+      */
+      if (   ((hsmartcard->ErrorCode & (HAL_SMARTCARD_ERROR_RTO | HAL_SMARTCARD_ERROR_ORE)) != RESET)
+          || (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR)))
+      {  
         /* Blocking error : transfer is aborted
-          Set the SMARTCARD state ready to be able to start again the process,
-          Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-        SMARTCARD_EndRxTransfer(hsc);
+           Set the SMARTCARD state ready to be able to start again the process,
+           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
+        SMARTCARD_EndRxTransfer(hsmartcard);
+
         /* Disable the SMARTCARD DMA Rx request if enabled */
-        if (HAL_IS_BIT_SET(hsc->Instance->CR3, USART_CR3_DMAR))
+        if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR))
         {
-          CLEAR_BIT(hsc->Instance->CR3, USART_CR3_DMAR);
+          CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
 
           /* Abort the SMARTCARD DMA Rx channel */
-          if(hsc->hdmarx != NULL)
+          if(hsmartcard->hdmarx != NULL)
           {
             /* Set the SMARTCARD DMA Abort callback : 
-              will lead to call HAL_SMARTCARD_ErrorCallback() at end of DMA abort procedure */
-            hsc->hdmarx->XferAbortCallback = SMARTCARD_DMAAbortOnError;
+               will lead to call HAL_SMARTCARD_ErrorCallback() at end of DMA abort procedure */
+            hsmartcard->hdmarx->XferAbortCallback = SMARTCARD_DMAAbortOnError;
 
-           if(HAL_DMA_Abort_IT(hsc->hdmarx) != HAL_OK)
+            /* Abort DMA RX */
+            if(HAL_DMA_Abort_IT(hsmartcard->hdmarx) != HAL_OK)
             {
-              /* Call Directly XferAbortCallback function in case of error */
-              hsc->hdmarx->XferAbortCallback(hsc->hdmarx);
+              /* Call Directly hsmartcard->hdmarx->XferAbortCallback function in case of error */
+              hsmartcard->hdmarx->XferAbortCallback(hsmartcard->hdmarx);
             }
           }
           else
           {
             /* Call user error callback */
-            HAL_SMARTCARD_ErrorCallback(hsc);
+            HAL_SMARTCARD_ErrorCallback(hsmartcard);
           }
         }
         else
         {
           /* Call user error callback */
-          HAL_SMARTCARD_ErrorCallback(hsc);
+          HAL_SMARTCARD_ErrorCallback(hsmartcard);
+        }
+      }
+      /* other error type to be considered as blocking :
+          - Frame error in Transmission
+      */
+      else if ((hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX) && ((hsmartcard->ErrorCode & HAL_SMARTCARD_ERROR_FE) != RESET))
+      {
+        /* Blocking error : transfer is aborted
+           Set the SMARTCARD state ready to be able to start again the process,
+           Disable Tx Interrupts, and disable Tx DMA request, if ongoing */
+        SMARTCARD_EndTxTransfer(hsmartcard);
+
+        /* Disable the SMARTCARD DMA Tx request if enabled */
+        if (HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT))
+        {
+          CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
+
+          /* Abort the SMARTCARD DMA Tx channel */
+          if(hsmartcard->hdmatx != NULL)
+          {
+            /* Set the SMARTCARD DMA Abort callback : 
+               will lead to call HAL_SMARTCARD_ErrorCallback() at end of DMA abort procedure */
+            hsmartcard->hdmatx->XferAbortCallback = SMARTCARD_DMAAbortOnError;
+
+            /* Abort DMA TX */
+            if(HAL_DMA_Abort_IT(hsmartcard->hdmatx) != HAL_OK)
+            {
+              /* Call Directly hsmartcard->hdmatx->XferAbortCallback function in case of error */
+              hsmartcard->hdmatx->XferAbortCallback(hsmartcard->hdmatx);
+            }
+          }
+          else
+          {
+            /* Call user error callback */
+            HAL_SMARTCARD_ErrorCallback(hsmartcard);
+          }
+        }
+        else
+        {
+          /* Call user error callback */
+          HAL_SMARTCARD_ErrorCallback(hsmartcard);
         }
       }
       else
       {
-        /* Call user error callback */
-        HAL_SMARTCARD_ErrorCallback(hsc);
-        hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+        /* Non Blocking error : transfer could go on. 
+           Error is notified to user through user error callback */
+        HAL_SMARTCARD_ErrorCallback(hsmartcard);
+        hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
       }
     }
     return;
+
   } /* End if some error occurs */
-  
-  /* SMARTCARD in mode Transmitter -------------------------------------------*/
-  if(((isrflags & SMARTCARD_FLAG_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
+
+  /* SMARTCARD in mode Receiver, end of block interruption ------------------------*/
+  if(((isrflags & USART_ISR_EOBF) != RESET) && ((cr1its & USART_CR1_EOBIE) != RESET))
   {
-    SMARTCARD_Transmit_IT(hsc);
+    hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+    __HAL_UNLOCK(hsmartcard);
+    HAL_SMARTCARD_RxCpltCallback(hsmartcard);
+    /* Clear EOBF interrupt after HAL_SMARTCARD_RxCpltCallback() call for the End of Block information
+     * to be available during HAL_SMARTCARD_RxCpltCallback() processing */
+    __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_EOBF);
     return;
   }
-  
+
+  /* SMARTCARD in mode Transmitter ------------------------------------------------*/
+  if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
+  {
+    SMARTCARD_Transmit_IT(hsmartcard);
+    return;
+  }
+
   /* SMARTCARD in mode Transmitter (transmission end) ------------------------*/
-  if(((isrflags & SMARTCARD_FLAG_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
+  if((__HAL_SMARTCARD_GET_IT(hsmartcard, hsmartcard->AdvancedInit.TxCompletionIndication) != RESET) &&(__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, hsmartcard->AdvancedInit.TxCompletionIndication) != RESET))
   {
-    /* Disable the SMARTCARD Transmit Complete Interrupt */   
-    CLEAR_BIT(hsc->Instance->CR1, USART_CR1_TCIE);
-
-    /* Disable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-    CLEAR_BIT(hsc->Instance->CR3, USART_CR3_EIE);
-
-    /* Tx process is ended, restore hsmartcard->gState to Ready */
-    hsc->gState = HAL_SMARTCARD_STATE_READY;
-
-    HAL_SMARTCARD_TxCpltCallback(hsc);
-    
+    SMARTCARD_EndTransmit_IT(hsmartcard);
     return;
   }
 }
 
 /**
-  * @brief Tx Transfer completed callbacks
-  * @param hsc: SMARTCARD handle
+  * @brief  Tx Transfer completed callback.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
   * @retval None
   */
- __weak void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsc)
+__weak void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard)
 {
   /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsc);
- 
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_TxCpltCallback could be implemented in the user file
-   */ 
-}
+  UNUSED(hsmartcard);
 
-/**
-  * @brief Rx Transfer completed callbacks
-  * @param hsc: SMARTCARD handle
-  * @retval None
-  */
-__weak void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsc)
-{
-  /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsc);
- 
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_TxCpltCallback could be implemented in the user file
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SMARTCARD_TxCpltCallback can be implemented in the user file.
    */
 }
 
 /**
-  * @brief SMARTCARD error callbacks
-  * @param hsc: SMARTCARD handle
+  * @brief  Rx Transfer completed callback.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
   * @retval None
   */
- __weak void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsc)
+__weak void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard)
 {
   /* Prevent unused argument(s) compilation warning */
-  UNUSED(hsc);
- 
-  /* NOTE : This function Should not be modified, when the callback is needed,
-            the HAL_SMARTCARD_ErrorCallback could be implemented in the user file
+  UNUSED(hsmartcard);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SMARTCARD_RxCpltCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  SMARTCARD error callback.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+__weak void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hsmartcard);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SMARTCARD_ErrorCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  SMARTCARD Abort Complete callback.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+__weak void HAL_SMARTCARD_AbortCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hsmartcard);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SMARTCARD_AbortCpltCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  SMARTCARD Abort Complete callback.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+__weak void HAL_SMARTCARD_AbortTransmitCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hsmartcard);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SMARTCARD_AbortTransmitCpltCallback can be implemented in the user file.
+   */
+}
+
+/**
+  * @brief  SMARTCARD Abort Receive Complete callback.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+__weak void HAL_SMARTCARD_AbortReceiveCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hsmartcard);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SMARTCARD_AbortReceiveCpltCallback can be implemented in the user file.
    */
 }
 
@@ -862,47 +1599,50 @@ __weak void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsc)
   * @}
   */
 
-/** @defgroup SMARTCARD_Exported_Functions_Group3 Peripheral State functions 
-  *  @brief   SMARTCARD State functions 
+/** @defgroup SMARTCARD_Exported_Functions_Group4 Peripheral State and Errors functions
+  *  @brief   SMARTCARD State and Errors functions
   *
-@verbatim   
- ===============================================================================
-                ##### Peripheral State and Errors functions #####
- ===============================================================================
-    [..]
-    This subsection provides a set of functions allowing to initialize the SMARTCARD.
-     (+) HAL_SMARTCARD_GetState() API is helpful to check in run-time the state of the SMARTCARD peripheral 
-     (+) SMARTCARD_SetConfig() API configures the SMARTCARD peripheral  
-     (+) SMARTCARD_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization 
+@verbatim
+  ==============================================================================
+                  ##### Peripheral State and Errors functions #####
+  ==============================================================================
+  [..]
+    This subsection provides a set of functions allowing to return the State of SmartCard
+    handle and also return Peripheral Errors occurred during communication process
+     (+) HAL_SMARTCARD_GetState() API can be helpful to check in run-time the state
+         of the SMARTCARD peripheral.
+     (+) HAL_SMARTCARD_GetError() checks in run-time errors that could occur during
+         communication.
 
 @endverbatim
   * @{
   */
 
-
 /**
-  * @brief return the SMARTCARD state
-  * @param hsc: SMARTCARD handle
-  * @retval HAL state
+  * @brief  Return the SMARTCARD handle state.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval SMARTCARD handle state
   */
-HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsc)
+HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsmartcard)
 {
-  uint32_t temp1= 0x00U, temp2 = 0x00U;
-  temp1 = hsc->gState;
-  temp2 = hsc->RxState;
-  
+  /* Return SMARTCARD handle state */
+  uint32_t temp1= 0x00, temp2 = 0x00;
+  temp1 = hsmartcard->gState;
+  temp2 = hsmartcard->RxState;
+
   return (HAL_SMARTCARD_StateTypeDef)(temp1 | temp2);
 }
 
 /**
-  * @brief  Return the SMARTCARD error code
-  * @param  hsc : pointer to a SMARTCARD_HandleTypeDef structure that contains
-  *              the configuration information for the specified SMARTCARD.
-  * @retval SMARTCARD Error Code
-  */
-uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsc)
+  * @brief  Return the SMARTCARD handle error code.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval SMARTCARD handle Error Code
+*/
+uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsmartcard)
 {
-  return hsc->ErrorCode;
+  return hsmartcard->ErrorCode;
 }
 
 /**
@@ -910,73 +1650,542 @@ uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsc)
   */
 
 /**
-  * @brief Send an amount of data in non blocking mode 
-  * @param hsc: SMARTCARD handle.
-  *         Function called under interruption only, once
-  *         interruptions have been enabled by HAL_SMARTCARD_Transmit_IT()      
-  * @retval HAL status
+  * @}
   */
-static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc)
+
+/** @defgroup SMARTCARD_Private_Functions SMARTCARD Private Functions
+  * @{
+  */
+
+/**
+  * @brief Configure the SMARTCARD associated USART peripheral.
+  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard)
 {
-  if(hsc->gState == HAL_SMARTCARD_STATE_BUSY_TX)
+  uint32_t tmpreg                          = 0x00000000;
+  SMARTCARD_ClockSourceTypeDef clocksource = SMARTCARD_CLOCKSOURCE_UNDEFINED;
+  HAL_StatusTypeDef ret                    = HAL_OK;
+
+  /* Check the parameters */
+  assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance));
+  assert_param(IS_SMARTCARD_BAUDRATE(hsmartcard->Init.BaudRate));
+  assert_param(IS_SMARTCARD_WORD_LENGTH(hsmartcard->Init.WordLength));
+  assert_param(IS_SMARTCARD_STOPBITS(hsmartcard->Init.StopBits));
+  assert_param(IS_SMARTCARD_PARITY(hsmartcard->Init.Parity));
+  assert_param(IS_SMARTCARD_MODE(hsmartcard->Init.Mode));
+  assert_param(IS_SMARTCARD_POLARITY(hsmartcard->Init.CLKPolarity));
+  assert_param(IS_SMARTCARD_PHASE(hsmartcard->Init.CLKPhase));
+  assert_param(IS_SMARTCARD_LASTBIT(hsmartcard->Init.CLKLastBit));
+  assert_param(IS_SMARTCARD_ONE_BIT_SAMPLE(hsmartcard->Init.OneBitSampling));
+  assert_param(IS_SMARTCARD_NACK(hsmartcard->Init.NACKEnable));
+  assert_param(IS_SMARTCARD_TIMEOUT(hsmartcard->Init.TimeOutEnable));
+  assert_param(IS_SMARTCARD_AUTORETRY_COUNT(hsmartcard->Init.AutoRetryCount));
+
+  /*-------------------------- USART CR1 Configuration -----------------------*/
+  /* In SmartCard mode, M and PCE are forced to 1 (8 bits + parity).
+   * Oversampling is forced to 16 (OVER8 = 0).
+   * Configure the Parity and Mode:
+   *  set PS bit according to hsmartcard->Init.Parity value
+   *  set TE and RE bits according to hsmartcard->Init.Mode value */
+  tmpreg = (uint32_t) hsmartcard->Init.Parity | hsmartcard->Init.Mode;
+  tmpreg |= (uint32_t) hsmartcard->Init.WordLength;
+  MODIFY_REG(hsmartcard->Instance->CR1, USART_CR1_FIELDS, tmpreg);
+
+  /*-------------------------- USART CR2 Configuration -----------------------*/
+  tmpreg = hsmartcard->Init.StopBits;
+  /* Synchronous mode is activated by default */
+  tmpreg |= (uint32_t) USART_CR2_CLKEN | hsmartcard->Init.CLKPolarity;
+  tmpreg |= (uint32_t) hsmartcard->Init.CLKPhase | hsmartcard->Init.CLKLastBit;
+  tmpreg |= (uint32_t) hsmartcard->Init.TimeOutEnable;
+  MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_FIELDS, tmpreg);
+
+  /*-------------------------- USART CR3 Configuration -----------------------*/
+  /* Configure
+   * - one-bit sampling method versus three samples' majority rule
+   *   according to hsmartcard->Init.OneBitSampling
+   * - NACK transmission in case of parity error according
+   *   to hsmartcard->Init.NACKEnable
+   * - autoretry counter according to hsmartcard->Init.AutoRetryCount     */
+  tmpreg =  (uint32_t) hsmartcard->Init.OneBitSampling | hsmartcard->Init.NACKEnable;
+  tmpreg |= ((uint32_t)hsmartcard->Init.AutoRetryCount << SMARTCARD_CR3_SCARCNT_LSB_POS);
+  MODIFY_REG(hsmartcard->Instance-> CR3,USART_CR3_FIELDS, tmpreg);
+
+  /*-------------------------- USART GTPR Configuration ----------------------*/
+  tmpreg = (hsmartcard->Init.Prescaler | ((uint32_t)hsmartcard->Init.GuardTime << SMARTCARD_GTPR_GT_LSB_POS));
+  MODIFY_REG(hsmartcard->Instance->GTPR, (USART_GTPR_GT|USART_GTPR_PSC), tmpreg);
+
+  /*-------------------------- USART RTOR Configuration ----------------------*/
+  tmpreg =   ((uint32_t)hsmartcard->Init.BlockLength << SMARTCARD_RTOR_BLEN_LSB_POS);
+  if (hsmartcard->Init.TimeOutEnable == SMARTCARD_TIMEOUT_ENABLE)
   {
-    if(hsc->TxXferCount == 0)
-    {
-      /* Disable the SMARTCARD Transmit Complete Interrupt */
-      CLEAR_BIT(hsc->Instance->CR1, USART_CR1_TXEIE);
-      
-      /* Disable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(hsc->Instance->CR3, USART_CR3_EIE);
-      
-      /* Tx process is ended, restore hsmartcard->gState to Ready */
-      hsc->gState = HAL_SMARTCARD_STATE_READY;
-    }
-    
-    HAL_SMARTCARD_TxCpltCallback(hsc);
-    
-    return HAL_OK;
+    assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue));
+    tmpreg |=  (uint32_t) hsmartcard->Init.TimeOutValue;
   }
-  else
-  {    
-    hsc->Instance->TDR = (*hsc->pTxBuffPtr++ & (uint8_t)0xFFU);
-    hsc->TxXferCount--;
-    
-    return HAL_OK;
+  MODIFY_REG(hsmartcard->Instance->RTOR, (USART_RTOR_RTO|USART_RTOR_BLEN), tmpreg);
+
+  /*-------------------------- USART BRR Configuration -----------------------*/
+  SMARTCARD_GETCLOCKSOURCE(hsmartcard, clocksource);
+  switch (clocksource)
+  {
+    case SMARTCARD_CLOCKSOURCE_PCLK1:
+      hsmartcard->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hsmartcard->Init.BaudRate/2)) / hsmartcard->Init.BaudRate);
+      break;
+    case SMARTCARD_CLOCKSOURCE_PCLK2:
+      hsmartcard->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK2Freq() + (hsmartcard->Init.BaudRate/2)) / hsmartcard->Init.BaudRate);
+      break;
+    case SMARTCARD_CLOCKSOURCE_HSI:
+      hsmartcard->Instance->BRR = (uint16_t)((HSI_VALUE + (hsmartcard->Init.BaudRate/2)) / hsmartcard->Init.BaudRate);
+      break;
+    case SMARTCARD_CLOCKSOURCE_SYSCLK:
+      hsmartcard->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hsmartcard->Init.BaudRate/2)) / hsmartcard->Init.BaudRate);
+      break;
+    case SMARTCARD_CLOCKSOURCE_LSE:
+      hsmartcard->Instance->BRR = (uint16_t)((LSE_VALUE + (hsmartcard->Init.BaudRate/2)) / hsmartcard->Init.BaudRate);
+      break;
+    case SMARTCARD_CLOCKSOURCE_UNDEFINED:
+    default:
+      ret = HAL_ERROR;
+      break;
   }
+
+  return ret;
+}
+
+
+/**
+  * @brief Configure the SMARTCARD associated USART peripheral advanced features.
+  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Check whether the set of advanced features to configure is properly set */
+  assert_param(IS_SMARTCARD_ADVFEATURE_INIT(hsmartcard->AdvancedInit.AdvFeatureInit));
+
+  /* if required, configure TX pin active level inversion */
+  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_TXINVERT_INIT))
+  {
+    assert_param(IS_SMARTCARD_ADVFEATURE_TXINV(hsmartcard->AdvancedInit.TxPinLevelInvert));
+    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_TXINV, hsmartcard->AdvancedInit.TxPinLevelInvert);
+  }
+
+  /* if required, configure RX pin active level inversion */
+  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXINVERT_INIT))
+  {
+    assert_param(IS_SMARTCARD_ADVFEATURE_RXINV(hsmartcard->AdvancedInit.RxPinLevelInvert));
+    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_RXINV, hsmartcard->AdvancedInit.RxPinLevelInvert);
+  }
+
+  /* if required, configure data inversion */
+  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DATAINVERT_INIT))
+  {
+    assert_param(IS_SMARTCARD_ADVFEATURE_DATAINV(hsmartcard->AdvancedInit.DataInvert));
+    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_DATAINV, hsmartcard->AdvancedInit.DataInvert);
+  }
+
+  /* if required, configure RX/TX pins swap */
+  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_SWAP_INIT))
+  {
+    assert_param(IS_SMARTCARD_ADVFEATURE_SWAP(hsmartcard->AdvancedInit.Swap));
+    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_SWAP, hsmartcard->AdvancedInit.Swap);
+  }
+
+  /* if required, configure RX overrun detection disabling */
+  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT))
+  {
+    assert_param(IS_SMARTCARD_OVERRUN(hsmartcard->AdvancedInit.OverrunDisable));
+    MODIFY_REG(hsmartcard->Instance->CR3, USART_CR3_OVRDIS, hsmartcard->AdvancedInit.OverrunDisable);
+  }
+
+  /* if required, configure DMA disabling on reception error */
+  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT))
+  {
+    assert_param(IS_SMARTCARD_ADVFEATURE_DMAONRXERROR(hsmartcard->AdvancedInit.DMADisableonRxError));
+    MODIFY_REG(hsmartcard->Instance->CR3, USART_CR3_DDRE, hsmartcard->AdvancedInit.DMADisableonRxError);
+  }
+
+  /* if required, configure MSB first on communication line */
+  if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_MSBFIRST_INIT))
+  {
+    assert_param(IS_SMARTCARD_ADVFEATURE_MSBFIRST(hsmartcard->AdvancedInit.MSBFirst));
+    MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_MSBFIRST, hsmartcard->AdvancedInit.MSBFirst);
+  }
+
 }
 
 /**
-  * @brief Receive an amount of data in non blocking mode 
-  * @param hsc: SMARTCARD handle.
-  *         Function called under interruption only, once
-  *         interruptions have been enabled by HAL_SMARTCARD_Receive_IT()      
+  * @brief Check the SMARTCARD Idle State.
+  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
   * @retval HAL status
   */
-static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc)
+static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmartcard)
 {
-  /* Check that a Rx process is ongoing */
-  if(hsc->RxState == HAL_SMARTCARD_STATE_BUSY_RX) 
+  uint32_t tickstart = 0;
+
+  /* Initialize the SMARTCARD ErrorCode */
+  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+
+  /* Init tickstart for timeout managment*/
+  tickstart = HAL_GetTick();
+
+  /* Check if the Transmitter is enabled */
+  if((hsmartcard->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
   {
-    *hsc->pRxBuffPtr++ = (uint8_t)(hsc->Instance->RDR & (uint8_t)0xFFU);
-    
-    if(--hsc->RxXferCount == 0)
+    /* Wait until TEACK flag is set */
+    if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, USART_ISR_TEACK, RESET, tickstart, SMARTCARD_TEACK_REACK_TIMEOUT) != HAL_OK)
     {
-      CLEAR_BIT(hsc->Instance->CR1, USART_CR1_RXNEIE);
-      
-      /* Disable the SMARTCARD Parity Error Interrupt */
-      CLEAR_BIT(hsc->Instance->CR1, USART_CR1_PEIE);
-      
-      /* Disable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
-      CLEAR_BIT(hsc->Instance->CR3, USART_CR3_EIE);
-      
-      hsc->RxState = HAL_SMARTCARD_STATE_READY;
-      
-      HAL_SMARTCARD_RxCpltCallback(hsc);
-      
+      /* Timeout occurred */
+      return HAL_TIMEOUT;
+    }
+  }
+  /* Check if the Receiver is enabled */
+  if((hsmartcard->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
+  {
+    /* Wait until REACK flag is set */
+    if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, USART_ISR_REACK, RESET, tickstart, SMARTCARD_TEACK_REACK_TIMEOUT) != HAL_OK)
+    {
+      /* Timeout occurred */
+      return HAL_TIMEOUT;
+    }
+  }
+
+  /* Initialize the SMARTCARD states */
+  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
+  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+  /* Process Unlocked */
+  __HAL_UNLOCK(hsmartcard);
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Handle SMARTCARD Communication Timeout.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
+  * @param  Flag Specifies the SMARTCARD flag to check.
+  * @param  Status The new Flag status (SET or RESET).
+  * @param  Tickstart Tick start value
+  * @param  Timeout Timeout duration.
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
+{
+  /* Wait until flag is set */
+  while((__HAL_SMARTCARD_GET_FLAG(hsmartcard, Flag) ? SET : RESET) == Status)
+  {
+    /* Check for the Timeout */
+    if(Timeout != HAL_MAX_DELAY)
+    {
+      if((Timeout == 0) || ((HAL_GetTick()-Tickstart) > Timeout))
+      {
+        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
+        CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
+        CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+
+        hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
+        hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+        /* Process Unlocked */
+        __HAL_UNLOCK(hsmartcard);
+        return HAL_TIMEOUT;
+      }
+    }
+  }
+  return HAL_OK;
+}
+
+
+/**
+  * @brief  End ongoing Tx transfer on SMARTCARD peripheral (following error detection or Transmit completion).
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *               the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+static void SMARTCARD_EndTxTransfer(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Disable TXEIE, TCIE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
+  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+
+  /* At end of Tx process, restore hsmartcard->gState to Ready */
+  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
+}
+
+
+/**
+  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *               the configuration information for the specified SMARTCARD module.
+  * @retval None
+  */
+static void SMARTCARD_EndRxTransfer(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
+  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+
+  /* At end of Rx process, restore hsmartcard->RxState to Ready */
+  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+}
+
+
+/**
+  * @brief  DMA SMARTCARD transmit process complete callback.
+  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
+  *              the configuration information for the specified DMA module.
+  * @retval None
+  */
+static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma)
+{
+  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
+  hsmartcard->TxXferCount = 0;
+
+  /* Disable the DMA transfer for transmit request by resetting the DMAT bit
+  in the SMARTCARD associated USART CR3 register */
+  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT);
+
+  /* Enable the SMARTCARD Transmit Complete Interrupt */
+  __HAL_SMARTCARD_ENABLE_IT(hsmartcard, hsmartcard->AdvancedInit.TxCompletionIndication);
+}
+
+/**
+  * @brief  DMA SMARTCARD receive process complete callback.
+  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
+  *              the configuration information for the specified DMA module.
+  * @retval None
+  */
+static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
+{
+  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
+  hsmartcard->RxXferCount = 0;
+
+  /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
+  CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
+  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
+
+  /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
+     in the SMARTCARD associated USART CR3 register */
+  CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR);
+
+  /* At end of Rx process, restore hsmartcard->RxState to Ready */
+  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+  HAL_SMARTCARD_RxCpltCallback(hsmartcard);
+}
+
+/**
+  * @brief  DMA SMARTCARD communication error callback.
+  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
+  *              the configuration information for the specified DMA module.
+  * @retval None
+  */
+static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma)
+{
+  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
+
+  /* Stop SMARTCARD DMA Tx request if ongoing */
+  if (  (hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX)
+      &&(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAT)) )
+  {
+    hsmartcard->TxXferCount = 0;
+    SMARTCARD_EndTxTransfer(hsmartcard);
+  }
+
+  /* Stop SMARTCARD DMA Rx request if ongoing */
+  if (  (hsmartcard->RxState == HAL_SMARTCARD_STATE_BUSY_RX)
+      &&(HAL_IS_BIT_SET(hsmartcard->Instance->CR3, USART_CR3_DMAR)) )
+  {
+    hsmartcard->RxXferCount = 0;
+    SMARTCARD_EndRxTransfer(hsmartcard);
+  }
+
+  hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_DMA;
+  HAL_SMARTCARD_ErrorCallback(hsmartcard);
+}
+
+/**
+  * @brief  DMA SMARTCARD communication abort callback, when initiated by HAL services on Error
+  *         (To be called at end of DMA Abort procedure following error occurrence).
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void SMARTCARD_DMAAbortOnError(DMA_HandleTypeDef *hdma)
+{
+  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
+  hsmartcard->RxXferCount = 0;
+  hsmartcard->TxXferCount = 0;
+
+  HAL_SMARTCARD_ErrorCallback(hsmartcard);
+}
+
+/**
+  * @brief  DMA SMARTCARD Tx communication abort callback, when initiated by user
+  *         (To be called at end of DMA Tx Abort procedure following user abort request).
+  * @note   When this callback is executed, User Abort complete call back is called only if no
+  *         Abort still ongoing for Rx DMA Handle.
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void SMARTCARD_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef* )(hdma->Parent);
+  
+  hsmartcard->hdmatx->XferAbortCallback = NULL;
+
+  /* Check if an Abort process is still ongoing */
+  if(hsmartcard->hdmarx != NULL)
+  {
+    if(hsmartcard->hdmarx->XferAbortCallback != NULL)
+    {
+      return;
+    }
+  }
+  
+  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
+  hsmartcard->TxXferCount = 0;
+  hsmartcard->RxXferCount = 0;
+
+  /* Reset errorCode */
+  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
+
+  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
+  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
+  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
+}
+
+
+/**
+  * @brief  DMA SMARTCARD Rx communication abort callback, when initiated by user
+  *         (To be called at end of DMA Rx Abort procedure following user abort request).
+  * @note   When this callback is executed, User Abort complete call back is called only if no
+  *         Abort still ongoing for Tx DMA Handle.
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void SMARTCARD_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef* )(hdma->Parent);
+  
+  hsmartcard->hdmarx->XferAbortCallback = NULL;
+
+  /* Check if an Abort process is still ongoing */
+  if(hsmartcard->hdmatx != NULL)
+  {
+    if(hsmartcard->hdmatx->XferAbortCallback != NULL)
+    {
+      return;
+    }
+  }
+  
+  /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
+  hsmartcard->TxXferCount = 0;
+  hsmartcard->RxXferCount = 0;
+
+  /* Reset errorCode */
+  hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
+
+  /* Restore hsmartcard->gState and hsmartcard->RxState to Ready */
+  hsmartcard->gState  = HAL_SMARTCARD_STATE_READY;
+  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_SMARTCARD_AbortCpltCallback(hsmartcard);
+}
+
+
+/**
+  * @brief  DMA SMARTCARD Tx communication abort callback, when initiated by user by a call to
+  *         HAL_SMARTCARD_AbortTransmit_IT API (Abort only Tx transfer)
+  *         (This callback is executed at end of DMA Tx Abort procedure following user abort request,
+  *         and leads to user Tx Abort Complete callback execution).
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void SMARTCARD_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  SMARTCARD_HandleTypeDef* hsmartcard = (SMARTCARD_HandleTypeDef*)(hdma->Parent);
+
+  hsmartcard->TxXferCount = 0;
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_FEF);
+
+  /* Restore hsmartcard->gState to Ready */
+  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_SMARTCARD_AbortTransmitCpltCallback(hsmartcard);
+}
+
+/**
+  * @brief  DMA SMARTCARD Rx communication abort callback, when initiated by user by a call to
+  *         HAL_SMARTCARD_AbortReceive_IT API (Abort only Rx transfer)
+  *         (This callback is executed at end of DMA Rx Abort procedure following user abort request,
+  *         and leads to user Rx Abort Complete callback execution).
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void SMARTCARD_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  SMARTCARD_HandleTypeDef* hsmartcard = ( SMARTCARD_HandleTypeDef* )(hdma->Parent);
+
+  hsmartcard->RxXferCount = 0;
+
+  /* Clear the Error flags in the ICR register */
+  __HAL_SMARTCARD_CLEAR_FLAG(hsmartcard, SMARTCARD_CLEAR_OREF | SMARTCARD_CLEAR_NEF | SMARTCARD_CLEAR_PEF | SMARTCARD_CLEAR_FEF | SMARTCARD_CLEAR_RTOF | SMARTCARD_CLEAR_EOBF);
+
+  /* Restore hsmartcard->RxState to Ready */
+  hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_SMARTCARD_AbortReceiveCpltCallback(hsmartcard);
+}
+
+/**
+  * @brief Send an amount of data in non-blocking mode.
+  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                the configuration information for the specified SMARTCARD module.
+  *         Function called under interruption only, once
+  *         interruptions have been enabled by HAL_SMARTCARD_Transmit_IT()
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
+{
+  /* Check that a Tx process is ongoing */
+  if (hsmartcard->gState == HAL_SMARTCARD_STATE_BUSY_TX)
+  {
+    if(hsmartcard->TxXferCount == 0)
+    {
+      /* Disable the SMARTCARD Transmit Data Register Empty Interrupt */
+      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_TXEIE);
+
+      /* Enable the SMARTCARD Transmit Complete Interrupt */
+      __HAL_SMARTCARD_ENABLE_IT(hsmartcard, hsmartcard->AdvancedInit.TxCompletionIndication);
+
+      return HAL_OK;
+    }
+    else
+    {
+      hsmartcard->Instance->TDR = (*hsmartcard->pTxBuffPtr++ & (uint8_t)0xFF);
+      hsmartcard->TxXferCount--;
+
       return HAL_OK;
     }
-    
-    return HAL_OK;
   }
   else
   {
@@ -985,362 +2194,86 @@ static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc)
 }
 
 /**
-  * @brief Configure the SMARTCARD associated USART peripheral 
-  * @param hsc: SMARTCARD handle
-  * @retval None
-  */
-static void SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsc)
-{
-  uint32_t tmpreg      = 0x00000000U;
-  uint32_t clocksource = 0x00000000U;
-  
-  /* Check the parameters */ 
-  assert_param(IS_SMARTCARD_INSTANCE(hsc->Instance));
-  assert_param(IS_SMARTCARD_BAUDRATE(hsc->Init.BaudRate)); 
-  assert_param(IS_SMARTCARD_WORD_LENGTH(hsc->Init.WordLength));  
-  assert_param(IS_SMARTCARD_STOPBITS(hsc->Init.StopBits));   
-  assert_param(IS_SMARTCARD_PARITY(hsc->Init.Parity));
-  assert_param(IS_SMARTCARD_MODE(hsc->Init.Mode));
-  assert_param(IS_SMARTCARD_POLARITY(hsc->Init.CLKPolarity));
-  assert_param(IS_SMARTCARD_PHASE(hsc->Init.CLKPhase));
-  assert_param(IS_SMARTCARD_LASTBIT(hsc->Init.CLKLastBit));    
-  assert_param(IS_SMARTCARD_ONE_BIT_SAMPLE(hsc->Init.OneBitSampling));
-  assert_param(IS_SMARTCARD_NACK(hsc->Init.NACKState));
-  assert_param(IS_SMARTCARD_TIMEOUT(hsc->Init.TimeOutEnable));
-  assert_param(IS_SMARTCARD_AUTORETRY_COUNT(hsc->Init.AutoRetryCount)); 
-
-  /*-------------------------- USART CR1 Configuration -----------------------*/
-  /* In SmartCard mode, M and PCE are forced to 1 (8 bits + parity).
-   * Oversampling is forced to 16 (OVER8 = 0).
-   * Configure the Parity and Mode: 
-   *  set PS bit according to hsc->Init.Parity value
-   *  set TE and RE bits according to hsc->Init.Mode value */
-  tmpreg = (uint32_t) hsc->Init.Parity | hsc->Init.Mode;
-  /* in case of TX-only mode, if NACK is enabled, the USART must be able to monitor 
-     the bidirectional line to detect a NACK signal in case of parity error. 
-     Therefore, the receiver block must be enabled as well (RE bit must be set). */
-  if((hsc->Init.Mode == SMARTCARD_MODE_TX) && (hsc->Init.NACKState == SMARTCARD_NACK_ENABLE))
-  {
-    tmpreg |= USART_CR1_RE;   
-  }
-  tmpreg |= (uint32_t) hsc->Init.WordLength;
-  MODIFY_REG(hsc->Instance->CR1, USART_CR1_FIELDS, tmpreg);
-
-  /*-------------------------- USART CR2 Configuration -----------------------*/
-  /* Stop bits are forced to 1.5 (STOP = 11) */
-  tmpreg = hsc->Init.StopBits;
-  /* Synchronous mode is activated by default */
-  tmpreg |= (uint32_t) USART_CR2_CLKEN | hsc->Init.CLKPolarity; 
-  tmpreg |= (uint32_t) hsc->Init.CLKPhase | hsc->Init.CLKLastBit;
-  tmpreg |= (uint32_t) hsc->Init.TimeOutEnable;
-  MODIFY_REG(hsc->Instance->CR2, USART_CR2_FIELDS, tmpreg); 
-    
-  /*-------------------------- USART CR3 Configuration -----------------------*/
-  /* Configure 
-   * - one-bit sampling method versus three samples' majority rule 
-   *   according to hsc->Init.OneBitSampling 
-   * - NACK transmission in case of parity error according 
-   *   to hsc->Init.NACKEnable   
-   * - autoretry counter according to hsc->Init.AutoRetryCount     */
-  tmpreg =  (uint32_t) hsc->Init.OneBitSampling | hsc->Init.NACKState;
-  tmpreg |= (uint32_t) (hsc->Init.AutoRetryCount << SMARTCARD_CR3_SCARCNT_LSB_POS);
-  MODIFY_REG(hsc->Instance-> CR3,USART_CR3_FIELDS, tmpreg);
-  
-  /*-------------------------- USART GTPR Configuration ----------------------*/
-  tmpreg = (uint32_t) (hsc->Init.Prescaler | (hsc->Init.GuardTime << SMARTCARD_GTPR_GT_LSB_POS));
-  MODIFY_REG(hsc->Instance->GTPR, (uint32_t)(USART_GTPR_GT|USART_GTPR_PSC), tmpreg); 
-  
-  /*-------------------------- USART RTOR Configuration ----------------------*/ 
-  tmpreg =   (uint32_t) (hsc->Init.BlockLength << SMARTCARD_RTOR_BLEN_LSB_POS);
-  if(hsc->Init.TimeOutEnable == SMARTCARD_TIMEOUT_ENABLE)
-  {
-    assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsc->Init.TimeOutValue));
-    tmpreg |=  (uint32_t) hsc->Init.TimeOutValue;
-  }
-  MODIFY_REG(hsc->Instance->RTOR, (USART_RTOR_RTO|USART_RTOR_BLEN), tmpreg);
-  
-  /*-------------------------- USART BRR Configuration -----------------------*/
-  SMARTCARD_GETCLOCKSOURCE(hsc, clocksource);
-  switch (clocksource)
-  {
-  case SMARTCARD_CLOCKSOURCE_PCLK1: 
-    hsc->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hsc->Init.BaudRate/2))/ hsc->Init.BaudRate);
-    break;
-  case SMARTCARD_CLOCKSOURCE_PCLK2: 
-    hsc->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK2Freq() + (hsc->Init.BaudRate/2))/ hsc->Init.BaudRate);
-    break;
-  case SMARTCARD_CLOCKSOURCE_HSI: 
-    hsc->Instance->BRR = (uint16_t)((HSI_VALUE + (hsc->Init.BaudRate/2))/ hsc->Init.BaudRate); 
-    break; 
-  case SMARTCARD_CLOCKSOURCE_SYSCLK:  
-    hsc->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hsc->Init.BaudRate/2))/ hsc->Init.BaudRate);
-    break;  
-  case SMARTCARD_CLOCKSOURCE_LSE:                
-    hsc->Instance->BRR = (uint16_t)((LSE_VALUE + (hsc->Init.BaudRate/2))/ hsc->Init.BaudRate); 
-    break;
-  default:
-    break;
-  } 
-}
-
-/**
-  * @brief Check the SMARTCARD Idle State
-  * @param hsc: SMARTCARD handle
+  * @brief  Wrap up transmission in non-blocking mode.
+  * @param  hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                    the configuration information for the specified SMARTCARD module.
   * @retval HAL status
   */
-static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsc)
+static HAL_StatusTypeDef SMARTCARD_EndTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard)
 {
-  uint32_t tickstart = 0U;
-  
-  /* Initialize the SMARTCARD ErrorCode */
-  hsc->ErrorCode = HAL_SMARTCARD_ERROR_NONE;
-  
-  /* Init tickstart for timeout managment*/
-  tickstart = HAL_GetTick();
+  /* Disable the SMARTCARD Transmit Complete Interrupt */
+  __HAL_SMARTCARD_DISABLE_IT(hsmartcard, hsmartcard->AdvancedInit.TxCompletionIndication);
 
-  /* Check if the Transmitter is enabled */
-  if((hsc->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
+  /* Check if a receive process is ongoing or not. If not disable ERR IT */
+  if(hsmartcard->RxState == HAL_SMARTCARD_STATE_READY)
   {
-    /* Wait until TEACK flag is set */
-    if(SMARTCARD_WaitOnFlagUntilTimeout(hsc, USART_ISR_TEACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)  
-    { 
-      return HAL_TIMEOUT;
-    } 
+    /* Disable the SMARTCARD Error Interrupt: (Frame error) */
+    CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
   }
-  /* Check if the Receiver is enabled */
-  if((hsc->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
+
+  /* Re-enable Rx at end of transmission if initial mode is Rx/Tx */
+  if(hsmartcard->Init.Mode == SMARTCARD_MODE_TX_RX)
   {
-    /* Wait until REACK flag is set */
-    if(SMARTCARD_WaitOnFlagUntilTimeout(hsc, USART_ISR_REACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)  
-    { 
-      return HAL_TIMEOUT;
-    }
+    /* Disable the Peripheral first to update modes */
+    CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_RE);
+    /* Enable the Peripheral */
+    SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE);
   }
   
-  /* Process Unlocked */
-  __HAL_UNLOCK(hsc);
-        
-  /* Initialize the SMARTCARD state*/
-  hsc->gState= HAL_SMARTCARD_STATE_READY;
-  hsc->RxState= HAL_SMARTCARD_STATE_READY;
-  
+  /* Tx process is ended, restore hsmartcard->gState to Ready */
+  hsmartcard->gState = HAL_SMARTCARD_STATE_READY;
+
+  HAL_SMARTCARD_TxCpltCallback(hsmartcard);
+
   return HAL_OK;
 }
 
 /**
-  * @brief Configure the SMARTCARD associated USART peripheral advanced features 
-  * @param hsc: SMARTCARD handle  
-  * @retval None
-  */
-static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsc)
-{  
-  /* Check whether the set of advanced features to configure is properly set */ 
-  assert_param(IS_SMARTCARD_ADVFEATURE_INIT(hsc->AdvancedInit.AdvFeatureInit));
-  
-  /* if required, configure TX pin active level inversion */
-  if(HAL_IS_BIT_SET(hsc->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_TXINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_TXINV(hsc->AdvancedInit.TxPinLevelInvert));
-    MODIFY_REG(hsc->Instance->CR2, USART_CR2_TXINV, hsc->AdvancedInit.TxPinLevelInvert);
-  }
-  
-  /* if required, configure RX pin active level inversion */
-  if(HAL_IS_BIT_SET(hsc->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_RXINV(hsc->AdvancedInit.RxPinLevelInvert));
-    MODIFY_REG(hsc->Instance->CR2, USART_CR2_RXINV, hsc->AdvancedInit.RxPinLevelInvert);
-  }
-  
-  /* if required, configure data inversion */
-  if(HAL_IS_BIT_SET(hsc->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DATAINVERT_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_DATAINV(hsc->AdvancedInit.DataInvert));
-    MODIFY_REG(hsc->Instance->CR2, USART_CR2_DATAINV, hsc->AdvancedInit.DataInvert);
-  }
-  
-  /* if required, configure RX/TX pins swap */
-  if(HAL_IS_BIT_SET(hsc->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_SWAP_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_SWAP(hsc->AdvancedInit.Swap));
-    MODIFY_REG(hsc->Instance->CR2, USART_CR2_SWAP, hsc->AdvancedInit.Swap);
-  }
-  
-  /* if required, configure RX overrun detection disabling */
-  if(HAL_IS_BIT_SET(hsc->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT))
-  {
-    assert_param(IS_SMARTCARD_OVERRUN(hsc->AdvancedInit.OverrunDisable));  
-    MODIFY_REG(hsc->Instance->CR3, USART_CR3_OVRDIS, hsc->AdvancedInit.OverrunDisable);
-  }
-  
-  /* if required, configure DMA disabling on reception error */
-  if(HAL_IS_BIT_SET(hsc->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_DMAONRXERROR(hsc->AdvancedInit.DMADisableonRxError));   
-    MODIFY_REG(hsc->Instance->CR3, USART_CR3_DDRE, hsc->AdvancedInit.DMADisableonRxError);
-  }
-  
-  /* if required, configure MSB first on communication line */  
-  if(HAL_IS_BIT_SET(hsc->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_MSBFIRST_INIT))
-  {
-    assert_param(IS_SMARTCARD_ADVFEATURE_MSBFIRST(hsc->AdvancedInit.MSBFirst));   
-    MODIFY_REG(hsc->Instance->CR2, USART_CR2_MSBFIRST, hsc->AdvancedInit.MSBFirst);
-  }
-}
-  
-/**
-  * @brief  This function handles SMARTCARD Communication Timeout.
-  * @param  hsc SMARTCARD handle
-  * @param  Flag specifies the SMARTCARD flag to check.
-  * @param  Status The new Flag status (SET or RESET).
-  * @param  Tickstart Tick start value
-  * @param  Timeout Timeout duration
+  * @brief Receive an amount of data in non-blocking mode.
+  * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains
+  *                the configuration information for the specified SMARTCARD module.
+  *         Function called under interruption only, once
+  *         interruptions have been enabled by HAL_SMARTCARD_Receive_IT().
   * @retval HAL status
   */
-static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsc, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
+static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard)
 {
-  /* Wait until flag is set */
-  while((__HAL_SMARTCARD_GET_FLAG(hsc, Flag) ? SET : RESET) == Status)
+  /* Check that a Rx process is ongoing */
+  if (hsmartcard->RxState == HAL_SMARTCARD_STATE_BUSY_RX)
   {
-    /* Check for the Timeout */
-    if(Timeout != HAL_MAX_DELAY)
+    *hsmartcard->pRxBuffPtr++ = (uint8_t)(hsmartcard->Instance->RDR & (uint8_t)0xFF);
+
+    if(--hsmartcard->RxXferCount == 0)
     {
-      if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
+      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RXNEIE);
+
+      /* Check if a transmit process is ongoing or not. If not disable ERR IT */
+      if(hsmartcard->gState == HAL_SMARTCARD_STATE_READY)
       {
-        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
-        CLEAR_BIT(hsc->Instance->CR1, USART_CR1_TXEIE);
-        CLEAR_BIT(hsc->Instance->CR1, USART_CR1_RXNEIE);
-        __HAL_SMARTCARD_DISABLE_IT(hsc, SMARTCARD_IT_PE);
-        __HAL_SMARTCARD_DISABLE_IT(hsc, SMARTCARD_IT_ERR);
-        CLEAR_BIT(hsc->Instance->CR1, USART_CR1_PEIE);
-        CLEAR_BIT(hsc->Instance->CR3, USART_CR3_EIE);
-        
-        hsc->gState= HAL_SMARTCARD_STATE_READY;
-        hsc->RxState= HAL_SMARTCARD_STATE_READY;
-        
-        /* Process Unlocked */
-        __HAL_UNLOCK(hsc);
-        
-        return HAL_TIMEOUT;
+        /* Disable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */
+        CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_EIE);
       }
+
+      /* Disable the SMARTCARD Parity Error Interrupt */
+      CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_PEIE);
+
+      hsmartcard->RxState = HAL_SMARTCARD_STATE_READY;
+
+      HAL_SMARTCARD_RxCpltCallback(hsmartcard);
+
+      return HAL_OK;
     }
+
+    return HAL_OK;
   }
-  return HAL_OK;
-}
-
-/*
-  * @brief  End ongoing Tx transfer on SMARTCARD peripheral (following error detection or Transmit completion).
-  * @param  hsc: SMARTCARD handle.
-  * @retval None
-  */
-static void SMARTCARD_EndTxTransfer(SMARTCARD_HandleTypeDef *hsc)
-{
-  /* Disable TXEIE and TCIE interrupts */
-  CLEAR_BIT(hsc->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
-  
-  /* At end of Tx process, restore hsc->gState to Ready */
-  hsc->gState = HAL_SMARTCARD_STATE_READY;
-}
-
-
-/**
-  * @brief  End ongoing Rx transfer on SMARTCARD peripheral (following error detection or Reception completion).
-  * @param  hsc: SMARTCARD handle.
-  * @retval None
-  */
-static void SMARTCARD_EndRxTransfer(SMARTCARD_HandleTypeDef *hsc)
-{
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsc->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hsc->Instance->CR3, USART_CR3_EIE);
-  
-  /* At end of Rx process, restore hsc->RxState to Ready */
-  hsc->RxState = HAL_SMARTCARD_STATE_READY;
-}
-
-/**
-  * @brief DMA SMARTCARD transmit process complete callback 
-  * @param hdma: DMA handle
-  * @retval None
-  */
-static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma)     
-{ 
-  SMARTCARD_HandleTypeDef* hsc = ( SMARTCARD_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  hsc->TxXferCount = 0;
-  
-  /* Disable the DMA transfer for transmit request by setting the DMAT bit
-  in the USART CR3 register */
-  CLEAR_BIT(hsc->Instance->CR3, USART_CR3_DMAT);
-  
-  /* Enable the SMARTCARD Transmit Complete Interrupt */   
-  SET_BIT(hsc->Instance->CR1, USART_CR1_TCIE);
-}
-
-/**
-  * @brief DMA SMARTCARD receive process complete callback 
-  * @param hdma: DMA handle
-  * @retval None
-  */
-static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma)  
-{
-  SMARTCARD_HandleTypeDef* hsc = ( SMARTCARD_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  hsc->RxXferCount = 0;
-  
-  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
-  CLEAR_BIT(hsc->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
-  CLEAR_BIT(hsc->Instance->CR3, USART_CR3_EIE);
-  
-  /* Disable the DMA transfer for the receiver request by setting the DMAR bit 
-     in the SMARTCARD associated USART CR3 register */
-  CLEAR_BIT(hsc->Instance->CR3, USART_CR3_DMAR);
-  
-  /* At end of Rx process, restore hsc->RxState to Ready */
-  hsc->RxState = HAL_SMARTCARD_STATE_READY;
-  
-  HAL_SMARTCARD_RxCpltCallback(hsc);
-}
-
-/**
-  * @brief DMA SMARTCARD communication error callback 
-  * @param hdma: DMA handle
-  * @retval None
-  */
-static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsc = ( SMARTCARD_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  hsc->RxXferCount = 0U;
-  hsc->TxXferCount = 0U;
-  hsc->ErrorCode = HAL_SMARTCARD_ERROR_DMA;
-  
-  /* Stop SMARTCARD DMA Tx request if ongoing */
-  if (  (hsc->gState == HAL_SMARTCARD_STATE_BUSY_TX)
-      &&(HAL_IS_BIT_SET(hsc->Instance->CR3, USART_CR3_DMAT)) )
+  else
   {
-    SMARTCARD_EndTxTransfer(hsc);
-  }
-  
-  /* Stop SMARTCARD DMA Rx request if ongoing */
-  if (  (hsc->RxState == HAL_SMARTCARD_STATE_BUSY_RX)
-      &&(HAL_IS_BIT_SET(hsc->Instance->CR3, USART_CR3_DMAR)) )
-  {
-    SMARTCARD_EndRxTransfer(hsc);
-  }
-  
-  HAL_SMARTCARD_ErrorCallback(hsc);
-}
+    /* Clear RXNE interrupt flag */
+    __HAL_SMARTCARD_SEND_REQ(hsmartcard, SMARTCARD_RXDATA_FLUSH_REQUEST);
 
-/**
-  * @brief DMA SMARTCARD communication abort callback, when call by HAL services on Error
-  *        (To be called at end of DMA Abort procedure following error occurrence).
-  * @param hdma: DMA handle.
-  * @retval None
-  */
-static void SMARTCARD_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
-  SMARTCARD_HandleTypeDef* hsc = ( SMARTCARD_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
-  hsc->RxXferCount = 0U;
-  hsc->TxXferCount = 0U;
-
-  HAL_SMARTCARD_ErrorCallback(hsc);
+    return HAL_BUSY;
+  }
 }
 
 /**
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard.h
index 0b404a209a..24eb03b2b6 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_smartcard.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SMARTCARD HAL module.
   ******************************************************************************
   * @attention
@@ -54,25 +54,25 @@
   * @{
   */
 
-/* Exported types ------------------------------------------------------------*/ 
+/* Exported types ------------------------------------------------------------*/
 /** @defgroup SMARTCARD_Exported_Types SMARTCARD Exported Types
   * @{
   */
 
-/** 
+/**
   * @brief SMARTCARD Init Structure definition
   */
 typedef struct
 {
   uint32_t BaudRate;                  /*!< Configures the SmartCard communication baud rate.
                                            The baud rate register is computed using the following formula:
-                                              Baud Rate Register = ((PCLKx) / ((hsc->Init.BaudRate))) */
-                                           
+                                              Baud Rate Register = ((PCLKx) / ((hsmartcard->Init.BaudRate))) */
+
   uint32_t WordLength;                /*!< Specifies the number of data bits transmitted or received in a frame.
                                            This parameter @ref SMARTCARD_Word_Length can only be set to 9 (8 data + 1 parity bits). */
 
-  uint32_t StopBits;                  /*!< Specifies the number of stop bits @ref SMARTCARD_Stop_Bits. 
-                                           Only 1.5 stop bits are authorized in SmartCard mode. */
+  uint32_t StopBits;                  /*!< Specifies the number of stop bits.
+                                           This parameter can be a value of @ref SMARTCARD_Stop_Bits. */
 
   uint32_t Parity;                    /*!< Specifies the parity mode.
                                            This parameter can be a value of @ref SMARTCARD_Parity
@@ -101,9 +101,9 @@ typedef struct
   
   uint32_t  GuardTime;                 /*!< Specifies the SmartCard Guard Time */
   
-  uint32_t NACKState;                  /*!< Specifies whether the SmartCard NACK transmission is enabled
-                                            in case of parity error.
-                                            This parameter can be a value of @ref SMARTCARD_NACK_State */ 
+  uint16_t NACKEnable;                /*!< Specifies whether the SmartCard NACK transmission is enabled
+                                           in case of parity error.
+                                           This parameter can be a value of @ref SMARTCARD_NACK_State */
                                            
   uint32_t TimeOutEnable;              /*!< Specifies whether the receiver timeout is enabled. 
                                             This parameter can be a value of @ref SMARTCARD_Timeout_Enable*/
@@ -122,7 +122,43 @@ typedef struct
 
 }SMARTCARD_InitTypeDef;
 
-/** 
+/**
+  * @brief  SMARTCARD advanced features initalization structure definition
+  */
+typedef struct
+{
+  uint32_t AdvFeatureInit;            /*!< Specifies which advanced SMARTCARD features is initialized. Several
+                                           advanced features may be initialized at the same time. This parameter
+                                           can be a value of @ref SMARTCARDEx_Advanced_Features_Initialization_Type */
+
+  uint32_t TxPinLevelInvert;          /*!< Specifies whether the TX pin active level is inverted.
+                                           This parameter can be a value of @ref SMARTCARD_Tx_Inv  */
+
+  uint32_t RxPinLevelInvert;          /*!< Specifies whether the RX pin active level is inverted.
+                                           This parameter can be a value of @ref SMARTCARD_Rx_Inv  */
+
+  uint32_t DataInvert;                /*!< Specifies whether data are inverted (positive/direct logic
+                                           vs negative/inverted logic).
+                                           This parameter can be a value of @ref SMARTCARD_Data_Inv */
+
+  uint32_t Swap;                      /*!< Specifies whether TX and RX pins are swapped.
+                                           This parameter can be a value of @ref SMARTCARD_Rx_Tx_Swap */
+
+  uint32_t OverrunDisable;            /*!< Specifies whether the reception overrun detection is disabled.
+                                           This parameter can be a value of @ref SMARTCARD_Overrun_Disable */
+
+  uint32_t DMADisableonRxError;       /*!< Specifies whether the DMA is disabled in case of reception error.
+                                           This parameter can be a value of @ref SMARTCARD_DMA_Disable_on_Rx_Error */
+
+  uint32_t MSBFirst;                  /*!< Specifies whether MSB is sent first on UART line.
+                                           This parameter can be a value of @ref SMARTCARD_MSB_First */
+                                           
+  uint16_t TxCompletionIndication;     /*!< Specifies which transmission completion indication is used: before (when 
+                                            relevant flag is available) or once guard time period has elapsed.
+                                           This parameter can be a value of @ref SMARTCARDEx_Transmission_Completion_Indication. */                                            
+}SMARTCARD_AdvFeatureInitTypeDef;
+
+/**
   * @brief HAL SMARTCARD State structures definition
   * @note  HAL SMARTCARD State value is a combination of 2 different substates: gState and RxState.
   *        - gState contains SMARTCARD state information related to global Handle management 
@@ -161,60 +197,27 @@ typedef struct
   *          b0     (not used)
   *             x  : Should be set to 0.
   */
-typedef struct
-{
-  uint32_t AdvFeatureInit;            /*!< Specifies which advanced SMARTCARD features is initialized. Several
-                                           advanced features may be initialized at the same time. This parameter 
-                                           can be a value of @ref SMARTCARD_Advanced_Features_Initialization_Type */
-
-  uint32_t TxPinLevelInvert;          /*!< Specifies whether the TX pin active level is inverted.
-                                           This parameter can be a value of @ref SMARTCARD_Tx_Inv  */
-
-  uint32_t RxPinLevelInvert;          /*!< Specifies whether the RX pin active level is inverted.
-                                           This parameter can be a value of @ref SMARTCARD_Rx_Inv  */
-
-  uint32_t DataInvert;                /*!< Specifies whether data are inverted (positive/direct logic
-                                           vs negative/inverted logic).
-                                           This parameter can be a value of @ref SMARTCARD_Data_Inv */
-
-  uint32_t Swap;                      /*!< Specifies whether TX and RX pins are swapped.   
-                                           This parameter can be a value of @ref SMARTCARD_Rx_Tx_Swap */
-
-  uint32_t OverrunDisable;            /*!< Specifies whether the reception overrun detection is disabled.   
-                                           This parameter can be a value of @ref SMARTCARD_Overrun_Disable */
-
-  uint32_t DMADisableonRxError;       /*!< Specifies whether the DMA is disabled in case of reception error.     
-                                           This parameter can be a value of @ref SMARTCARD_DMA_Disable_on_Rx_Error */
-
-  uint32_t MSBFirst;                  /*!< Specifies whether MSB is sent first on UART line.      
-                                           This parameter can be a value of @ref SMARTCARD_MSB_First */
-}SMARTCARD_AdvFeatureInitTypeDef;
-
-/** 
-  * @brief HAL State structures definition  
-  */ 
 typedef enum
 {
-  HAL_SMARTCARD_STATE_RESET             = 0x00U,    /*!< Peripheral is not yet Initialized
+  HAL_SMARTCARD_STATE_RESET             = 0x00U,   /*!< Peripheral is not initialized
                                                         Value is allowed for gState and RxState */
-  HAL_SMARTCARD_STATE_READY             = 0x20U,    /*!< Peripheral Initialized and ready for use
+  HAL_SMARTCARD_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use
                                                         Value is allowed for gState and RxState */
-  HAL_SMARTCARD_STATE_BUSY              = 0x24U,    /*!< an internal process is ongoing
+  HAL_SMARTCARD_STATE_BUSY              = 0x24U,   /*!< an internal process is ongoing 
                                                         Value is allowed for gState only */
-  HAL_SMARTCARD_STATE_BUSY_TX           = 0x21U,    /*!< Data Transmission process is ongoing
+  HAL_SMARTCARD_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing
                                                         Value is allowed for gState only */
-  HAL_SMARTCARD_STATE_BUSY_RX           = 0x22U,    /*!< Data Reception process is ongoing
+  HAL_SMARTCARD_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing
                                                         Value is allowed for RxState only */
-  HAL_SMARTCARD_STATE_BUSY_TX_RX        = 0x23U,    /*!< Data Transmission and Reception process is ongoing 
+  HAL_SMARTCARD_STATE_BUSY_TX_RX        = 0x23U,   /*!< Data Transmission and Reception process is ongoing
                                                         Not to be used for neither gState nor RxState.
                                                         Value is result of combination (Or) between gState and RxState values */
-  HAL_SMARTCARD_STATE_TIMEOUT           = 0xA0U,    /*!< Timeout state
+  HAL_SMARTCARD_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state
                                                         Value is allowed for gState only */
-  HAL_SMARTCARD_STATE_ERROR             = 0xE0U     /*!< Error
+  HAL_SMARTCARD_STATE_ERROR             = 0xE0U    /*!< Error
                                                         Value is allowed for gState only */
 }HAL_SMARTCARD_StateTypeDef;
 
-
 /**
   * @brief  SMARTCARD clock sources definition
   */
@@ -224,44 +227,45 @@ typedef enum
   SMARTCARD_CLOCKSOURCE_PCLK2      = 0x01U,    /*!< PCLK2 clock source  */
   SMARTCARD_CLOCKSOURCE_HSI        = 0x02U,    /*!< HSI clock source    */
   SMARTCARD_CLOCKSOURCE_SYSCLK     = 0x04U,    /*!< SYSCLK clock source */
-  SMARTCARD_CLOCKSOURCE_LSE        = 0x08U     /*!< LSE clock source    */
+  SMARTCARD_CLOCKSOURCE_LSE        = 0x08U,    /*!< LSE clock source    */
+  SMARTCARD_CLOCKSOURCE_UNDEFINED = 0x10  /*!< undefined clock source */
 }SMARTCARD_ClockSourceTypeDef;
 
-/** 
+/**
   * @brief  SMARTCARD handle Structure definition
   */
 typedef struct
 {
-  USART_TypeDef                       *Instance;        /* USART registers base address                          */
+  USART_TypeDef                   *Instance;        /*!< USART registers base address                          */
 
-  SMARTCARD_InitTypeDef               Init;             /* SmartCard communication parameters                    */
+  SMARTCARD_InitTypeDef           Init;             /*!< SmartCard communication parameters                    */
 
-  SMARTCARD_AdvFeatureInitTypeDef     AdvancedInit;     /* SmartCard advanced features initialization parameters */
+  SMARTCARD_AdvFeatureInitTypeDef AdvancedInit;     /*!< SmartCard advanced features initialization parameters */
 
-  uint8_t                             *pTxBuffPtr;      /* Pointer to SmartCard Tx transfer Buffer            */
+  uint8_t                         *pTxBuffPtr;      /*!< Pointer to SmartCard Tx transfer Buffer               */
 
-  uint16_t                            TxXferSize;       /* SmartCard Tx Transfer size                         */
+  uint16_t                        TxXferSize;       /*!< SmartCard Tx Transfer size                            */
 
-  uint16_t                            TxXferCount;      /* SmartCard Tx Transfer Counter                      */
+  __IO uint16_t                   TxXferCount;      /*!< SmartCard Tx Transfer Counter                         */
 
-  uint8_t                             *pRxBuffPtr;      /* Pointer to SmartCard Rx transfer Buffer        */
+  uint8_t                         *pRxBuffPtr;      /*!< Pointer to SmartCard Rx transfer Buffer               */
 
-  uint16_t                            RxXferSize;       /* SmartCard Rx Transfer size                     */
+  uint16_t                        RxXferSize;       /*!< SmartCard Rx Transfer size                            */
 
-  uint16_t                            RxXferCount;      /* SmartCard Rx Transfer Counter                  */
+  __IO uint16_t                   RxXferCount;      /*!< SmartCard Rx Transfer Counter                         */
 
-  DMA_HandleTypeDef                   *hdmatx;          /* SmartCard Tx DMA Handle parameters             */
+  DMA_HandleTypeDef               *hdmatx;          /*!< SmartCard Tx DMA Handle parameters                    */
 
-  DMA_HandleTypeDef                   *hdmarx;          /* SmartCard Rx DMA Handle parameters             */
+  DMA_HandleTypeDef               *hdmarx;          /*!< SmartCard Rx DMA Handle parameters                    */
 
-  HAL_LockTypeDef                     Lock;             /* Locking object                                 */
+  HAL_LockTypeDef                 Lock;             /*!< Locking object                                        */
 
-  __IO HAL_SMARTCARD_StateTypeDef    gState;      /*!< UART state information related to global Handle management 
-                                                  and also related to Tx operations.
-                                                  This parameter can be a value of @ref HAL_UART_StateTypeDef */
+  __IO HAL_SMARTCARD_StateTypeDef    gState;        /*!< SmartCard state information related to global Handle management 
+                                                         and also related to Tx operations.
+                                                         This parameter can be a value of @ref HAL_SMARTCARD_StateTypeDef */
 
-  __IO HAL_SMARTCARD_StateTypeDef    RxState;     /*!< UART state information related to Rx operations.
-                                                  This parameter can be a value of @ref HAL_UART_StateTypeDef */
+  __IO HAL_SMARTCARD_StateTypeDef    RxState;       /*!< SmartCard state information related to Rx operations.
+                                                         This parameter can be a value of @ref HAL_SMARTCARD_StateTypeDef */
 
   __IO uint32_t                       ErrorCode;        /* SmartCard Error code                           */
 
@@ -619,6 +623,56 @@ typedef struct
   */
 #define __HAL_SMARTCARD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
 
+/** @brief  Clear the specified SMARTCARD pending flag.
+  * @param  __HANDLE__: specifies the SMARTCARD Handle.
+  * @param  __FLAG__: specifies the flag to check.
+  *          This parameter can be any combination of the following values:
+  *            @arg @ref SMARTCARD_CLEAR_PEF    Parity error clear flag
+  *            @arg @ref SMARTCARD_CLEAR_FEF    Framing error clear flag
+  *            @arg @ref SMARTCARD_CLEAR_NEF    Noise detected clear flag
+  *            @arg @ref SMARTCARD_CLEAR_OREF   OverRun error clear flag
+  *            @arg @ref SMARTCARD_CLEAR_IDLEF  Idle line detected clear flag
+  *            @arg @ref SMARTCARD_CLEAR_TCF    Transmission complete clear flag
+  @if STM32L443xx
+  *            @arg @ref SMARTCARD_CLEAR_TCBGTF Transmission complete before guard time clear flag (when flag available)    
+  @endif
+  *            @arg @ref SMARTCARD_CLEAR_RTOF   Receiver timeout clear flag
+  *            @arg @ref SMARTCARD_CLEAR_EOBF   End of block clear flag
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
+
+/** @brief  Clear the SMARTCARD PE pending flag.
+  * @param  __HANDLE__: specifies the SMARTCARD Handle.
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_PEFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_PEF)
+
+
+/** @brief  Clear the SMARTCARD FE pending flag.
+  * @param  __HANDLE__: specifies the SMARTCARD Handle.
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_FEFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_FEF)
+
+/** @brief  Clear the SMARTCARD NE pending flag.
+  * @param  __HANDLE__: specifies the SMARTCARD Handle.
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_NEFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_NEF)
+
+/** @brief  Clear the SMARTCARD ORE pending flag.
+  * @param  __HANDLE__: specifies the SMARTCARD Handle.
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_OREFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_OREF)
+
+/** @brief  Clear the SMARTCARD IDLE pending flag.
+  * @param  __HANDLE__: specifies the SMARTCARD Handle.
+  * @retval None
+  */
+#define __HAL_SMARTCARD_CLEAR_IDLEFLAG(__HANDLE__)   __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_IDLEF)
+
 /** @brief  Enables the specified SmartCard interrupt.
   * @param  __HANDLE__: specifies the SMARTCARD Handle.
   *         The Handle Instance which can be USART1 or USART2.
@@ -773,16 +827,28 @@ void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsc);
   * @{
   */
 /* IO operation functions *******************************************************/
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_t *pData, uint16_t Size);
-void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsc);
-void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsc);
-void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsc);
-void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsc);
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size);
+HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size);
+/* Transfer Abort functions */
+HAL_StatusTypeDef HAL_SMARTCARD_Abort(SMARTCARD_HandleTypeDef *hsmartcard);
+HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit(SMARTCARD_HandleTypeDef *hsmartcard);
+HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive(SMARTCARD_HandleTypeDef *hsmartcard);
+HAL_StatusTypeDef HAL_SMARTCARD_Abort_IT(SMARTCARD_HandleTypeDef *hsmartcard);
+HAL_StatusTypeDef HAL_SMARTCARD_AbortTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard);
+HAL_StatusTypeDef HAL_SMARTCARD_AbortReceive_IT(SMARTCARD_HandleTypeDef *hsmartcard);
+
+void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsmartcard);
+void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard);
+void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard);
+void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsmartcard);
+void HAL_SMARTCARD_AbortCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard);
+void HAL_SMARTCARD_AbortTransmitCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard);
+void HAL_SMARTCARD_AbortReceiveCpltCallback (SMARTCARD_HandleTypeDef *hsmartcard);
+
 /**
   * @}
   */
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard_ex.c
index 2f66763ced..d519493666 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_smartcard_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   SMARTCARD HAL module driver.
   *
   *          This file provides extended firmware functions to manage the following 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard_ex.h
index 139502ab19..719771a895 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_smartcard_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_smartcard_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SMARTCARD HAL module.
   ******************************************************************************
   * @attention
@@ -56,6 +56,83 @@
 
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
+   
+/** @addtogroup SMARTCARDEx_Exported_Constants  SMARTCARD Extended Exported Constants
+  * @{
+  */
+  
+/** @defgroup SMARTCARDEx_Transmission_Completion_Indication SMARTCARD Transmission Completion Indication
+  * @{
+  */
+#if defined(USART_TCBGT_SUPPORT)
+#define SMARTCARD_TCBGT      SMARTCARD_IT_TCBGT /*!< SMARTCARD transmission complete before guard time */
+#endif /* USART_TCBGT_SUPPORT */  
+#define SMARTCARD_TC         SMARTCARD_IT_TC    /*!< SMARTCARD transmission complete (flag raised when guard time has elapsed) */
+/**
+  * @}
+  */    
+  
+/** @defgroup SMARTCARDEx_Advanced_Features_Initialization_Type SMARTCARD advanced feature initialization type
+  * @{
+  */
+#if defined(USART_TCBGT_SUPPORT)
+#define SMARTCARD_ADVFEATURE_TXCOMPLETION            ((uint32_t)0x00000100)    /*!< TX completion indication before of after guard time */
+#endif /* USART_TCBGT_SUPPORT */   
+/**
+  * @}
+  */
+
+
+  
+  
+/** @defgroup SMARTCARDEx_Flags SMARTCARD Flags
+  *        Elements values convention: 0xXXXX
+  *           - 0xXXXX  : Flag mask in the ISR register
+  * @{
+  */
+#if defined(USART_TCBGT_SUPPORT)
+#define SMARTCARD_FLAG_TCBGT          USART_ISR_TCBGT      /*!< SMARTCARD transmission complete before guard time completion */
+#endif /* USART_TCBGT_SUPPORT */
+/**
+  * @}
+  */
+  
+/** @defgroup SMARTCARDEx_Interrupt_definition SMARTCARD Interrupts Definition
+  *        Elements values convention: 000ZZZZZ0XXYYYYYb
+  *           - YYYYY  : Interrupt source position in the XX register (5 bits)
+  *           - XX  : Interrupt source register (2 bits)
+  *                 - 01: CR1 register
+  *                 - 10: CR2 register
+  *                 - 11: CR3 register
+  *           - ZZZZZ  : Flag position in the ISR register(5 bits)
+  * @{
+  */
+
+#if defined(USART_TCBGT_SUPPORT)
+#define SMARTCARD_IT_TCBGT                  ((uint16_t)0x1978)        /*!< SMARTCARD transmission complete before guard time completion interruption */
+#endif /* USART_TCBGT_SUPPORT */ 
+/**
+  * @}
+  */
+  
+/** @defgroup SMARTCARDEx_IT_CLEAR_Flags SMARTCARD Interruption Clear Flags
+  * @{
+  */
+#define SMARTCARD_CLEAR_PEF                 USART_ICR_PECF    /*!< SMARTCARD parity error clear flag          */
+#define SMARTCARD_CLEAR_FEF                 USART_ICR_FECF    /*!< SMARTCARD framing error clear flag         */
+#define SMARTCARD_CLEAR_NEF                 USART_ICR_NCF     /*!< SMARTCARD noise detected clear flag        */
+#define SMARTCARD_CLEAR_OREF                USART_ICR_ORECF   /*!< SMARTCARD overrun error clear flag         */
+#define SMARTCARD_CLEAR_IDLEF               USART_ICR_IDLECF  /*!< SMARTCARD idle line detected clear flag    */
+#define SMARTCARD_CLEAR_TCF                 USART_ICR_TCCF    /*!< SMARTCARD transmission complete clear flag */
+#if defined(USART_TCBGT_SUPPORT)
+#define SMARTCARD_CLEAR_TCBGTF              USART_ICR_TCBGTCF /*!< SMARTCARD transmission complete before guard time completion clear flag */
+#endif /* USART_TCBGT_SUPPORT */ 
+#define SMARTCARD_CLEAR_RTOF                USART_ICR_RTOCF   /*!< SMARTCARD receiver time out clear flag     */
+#define SMARTCARD_CLEAR_EOBF                USART_ICR_EOBCF   /*!< SMARTCARD end of block clear flag          */
+/**
+  * @}
+  */
+
 /* Exported macro ------------------------------------------------------------*/
    
 /** @brief  Reports the SMARTCARD clock source.
@@ -147,6 +224,62 @@
     }                                                              \
     } while(0)
 
+/** @brief  Set the Transmission Completion flag
+  * @param  __HANDLE__: specifies the SMARTCARD Handle.
+  * @note  If TCBGT (Transmission Complete Before Guard Time) flag is not available or if 
+  *        AdvancedInit.TxCompletionIndication is not already filled, the latter is forced 
+  *        to SMARTCARD_TC (transmission completion indication when guard time has elapsed).     
+  * @retval None
+  */
+#if defined(USART_TCBGT_SUPPORT)
+#define SMARTCARD_TRANSMISSION_COMPLETION_SETTING(__HANDLE__)                                                \
+  do {                                                                                                       \
+    if (HAL_IS_BIT_CLR((__HANDLE__)->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_TXCOMPLETION))        \
+    {                                                                                                        \
+     (__HANDLE__)->AdvancedInit.TxCompletionIndication = SMARTCARD_TC;                                       \
+    }                                                                                                        \
+    else                                                                                                     \
+    {                                                                                                        \
+      assert_param(IS_SMARTCARD_TRANSMISSION_COMPLETION((__HANDLE__)->AdvancedInit.TxCompletionIndication)); \
+    }                                                                                                        \
+  } while(0)
+#else
+#define SMARTCARD_TRANSMISSION_COMPLETION_SETTING(__HANDLE__)         \
+  do {                                                                \
+    (__HANDLE__)->AdvancedInit.TxCompletionIndication = SMARTCARD_TC; \
+  } while(0)  
+#endif 
+
+/** @brief  Return the transmission completion flag.
+  * @param  __HANDLE__: specifies the SMARTCARD Handle.
+  * @note  Based on AdvancedInit.TxCompletionIndication setting, return TC or TCBGT flag.
+  *        When TCBGT flag (Transmission Complete Before Guard Time) is not available, TC flag is
+  *        reported.       
+  * @retval Transmission completion flag
+  */
+#if defined(USART_TCBGT_SUPPORT)
+#define SMARTCARD_TRANSMISSION_COMPLETION_FLAG(__HANDLE__) \
+  (((__HANDLE__)->AdvancedInit.TxCompletionIndication == SMARTCARD_TC) ? (SMARTCARD_FLAG_TC) :  (SMARTCARD_FLAG_TCBGT))
+#else
+#define SMARTCARD_TRANSMISSION_COMPLETION_FLAG(__HANDLE__)    (SMARTCARD_FLAG_TC)
+#endif
+  
+/**
+  * @brief Ensure that SMARTCARD frame transmission completion used flag is valid.
+  * @param __TXCOMPLETE__: SMARTCARD frame transmission completion used flag. 
+  * @retval SET (__TXCOMPLETE__ is valid) or RESET (__TXCOMPLETE__ is invalid)
+  */ 
+#if defined(USART_TCBGT_SUPPORT)
+#define IS_SMARTCARD_TRANSMISSION_COMPLETION(__TXCOMPLETE__) (((__TXCOMPLETE__) == SMARTCARD_TCBGT) ||\
+                                                              ((__TXCOMPLETE__) == SMARTCARD_TC))
+#else
+#define IS_SMARTCARD_TRANSMISSION_COMPLETION(__TXCOMPLETE__) ((__TXCOMPLETE__) == SMARTCARD_TC)
+#endif
+
+/**
+  * @}
+  */ 
+
 /* Exported functions --------------------------------------------------------*/
 /* Initialization and de-initialization functions  ****************************/
 /* IO operation functions *****************************************************/
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spdifrx.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spdifrx.c
index b4e3bb7593..7bb0d9cc53 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spdifrx.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spdifrx.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_spdifrx.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   This file provides firmware functions to manage the following 
   *          functionalities of the SPDIFRX audio interface:
   *           + Initialization and Configuration
@@ -133,6 +133,7 @@
 */
 
 #ifdef HAL_SPDIFRX_MODULE_ENABLED
+#if defined (SPDIFRX)
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
@@ -1244,7 +1245,7 @@ static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *h
 /**
 * @}
 */
-
+#endif /* SPDIFRX */
 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
 /**
   * @}
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spdifrx.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spdifrx.h
index 8d612a4aaf..687166d88e 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spdifrx.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spdifrx.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_spdifrx.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SPDIFRX HAL module.
   ******************************************************************************
   * @attention
@@ -43,6 +43,8 @@
  extern "C" {
 #endif
 
+#if defined (SPDIFRX)
+
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f7xx_hal_def.h"  
 
@@ -545,6 +547,8 @@ uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif);
 /**
   * @}
   */
+
+#endif /* SPDIFRX */
     
 #ifdef __cplusplus
 }
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.c
index f8852c5bed..664a6b4edd 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_spi.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   SPI HAL module driver.
   *          This file provides firmware functions to manage the following
   *          functionalities of the Serial Peripheral Interface (SPI) peripheral:
@@ -31,12 +31,12 @@
               (+++) Configure the SPIx interrupt priority
               (+++) Enable the NVIC SPI IRQ handle
           (##) DMA Configuration if you need to use DMA process
-              (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
+              (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Stream/Channel
               (+++) Enable the DMAx clock
               (+++) Configure the DMA handle parameters
-              (+++) Configure the DMA Tx or Rx channel
+              (+++) Configure the DMA Tx or Rx Stream/Channel
               (+++) Associate the initialized hdma_tx handle to the hspi DMA Tx or Rx handle
-              (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx channel
+              (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel
 
       (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
           management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
@@ -52,6 +52,66 @@
       (#) The CRC feature is not managed when the DMA circular mode is enabled
       (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
           the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
+     [..]
+       Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
+       the following table resume the max SPI frequency reached with data size 8bits/16bits,
+       according to frequency used on APBx Peripheral Clock (fPCLK) used by the SPI instance :
+
+       DataSize = SPI_DATASIZE_8BIT:
+       +----------------------------------------------------------------------------------------------+
+       |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
+       | Process | Tranfert mode  |---------------------|----------------------|----------------------|
+       |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
+       |==============================================================================================|
+       |    T    |     Polling    | Fpclk/4  | Fpclk/8  |    NA     |    NA    |    NA     |   NA     |
+       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
+       |    /    |     Interrupt  | Fpclk/4  | Fpclk/16 |    NA     |    NA    |    NA     |   NA     |
+       |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
+       |    X    |       DMA      | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
+       |=========|================|==========|==========|===========|==========|===========|==========|
+       |         |     Polling    | Fpclk/4  | Fpclk/8  | Fpclk/16  | Fpclk/8  | Fpclk/8   | Fpclk/8  |
+       |         |----------------|----------|----------|-----------|----------|-----------|----------|
+       |    R    |     Interrupt  | Fpclk/8  | Fpclk/16 | Fpclk/8   | Fpclk/8  | Fpclk/8   | Fpclk/4  |
+       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
+       |         |       DMA      | Fpclk/4  | Fpclk/2  | Fpclk/2   | Fpclk/16 | Fpclk/2   | Fpclk/16 |
+       |=========|================|==========|==========|===========|==========|===========|==========|
+       |         |     Polling    | Fpclk/8  | Fpclk/2  |     NA    |    NA    | Fpclk/8   | Fpclk/8  |
+       |         |----------------|----------|----------|-----------|----------|-----------|----------|
+       |    T    |     Interrupt  | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/16  | Fpclk/8  |
+       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
+       |         |       DMA      | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/8   | Fpclk/16 |
+       +----------------------------------------------------------------------------------------------+
+
+       DataSize = SPI_DATASIZE_16BIT:
+       +----------------------------------------------------------------------------------------------+
+       |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
+       | Process | Tranfert mode  |---------------------|----------------------|----------------------|
+       |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
+       |==============================================================================================|
+       |    T    |     Polling    | Fpclk/4  | Fpclk/8  |    NA     |    NA    |    NA     |   NA     |
+       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
+       |    /    |     Interrupt  | Fpclk/4  | Fpclk/16 |    NA     |    NA    |    NA     |   NA     |
+       |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
+       |    X    |       DMA      | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
+       |=========|================|==========|==========|===========|==========|===========|==========|
+       |         |     Polling    | Fpclk/4  | Fpclk/8  | Fpclk/16  | Fpclk/8  | Fpclk/8   | Fpclk/8  |
+       |         |----------------|----------|----------|-----------|----------|-----------|----------|
+       |    R    |     Interrupt  | Fpclk/8  | Fpclk/16 | Fpclk/8   | Fpclk/8  | Fpclk/8   | Fpclk/4  |
+       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
+       |         |       DMA      | Fpclk/4  | Fpclk/2  | Fpclk/2   | Fpclk/16 | Fpclk/2   | Fpclk/16 |
+       |=========|================|==========|==========|===========|==========|===========|==========|
+       |         |     Polling    | Fpclk/8  | Fpclk/2  |     NA    |    NA    | Fpclk/8   | Fpclk/8  |
+       |         |----------------|----------|----------|-----------|----------|-----------|----------|
+       |    T    |     Interrupt  | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/16  | Fpclk/8  |
+       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
+       |         |       DMA      | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/8   | Fpclk/16 |
+       +----------------------------------------------------------------------------------------------+
+       @note The max SPI frequency depend on SPI data size (4bits, 5bits,..., 8bits,...15bits, 16bits),
+             SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
+       @note
+            (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
+            (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
+            (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
 
   @endverbatim
   ******************************************************************************
@@ -102,7 +162,7 @@
 /** @defgroup SPI_Private_Constants SPI Private Constants
   * @{
   */
-#define SPI_DEFAULT_TIMEOUT 50
+#define SPI_DEFAULT_TIMEOUT 100U
 /**
   * @}
   */
@@ -121,33 +181,38 @@ static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
 static void SPI_DMAError(DMA_HandleTypeDef *hdma);
 static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma);
-static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout);
-static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout);
+static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
+static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
+static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State,
+                                                       uint32_t Timeout, uint32_t Tickstart);
+static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State,
+                                                       uint32_t Timeout, uint32_t Tickstart);
 static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
 static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
 static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
-#if (USE_SPI_CRC != 0U)
-static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
-static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
-static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
-static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
-#endif
 static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
 static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
 static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
 static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
 static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
+#if (USE_SPI_CRC != 0U)
+static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
+static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
+static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
+static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
+#endif /* USE_SPI_CRC */
+static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi);
+static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi);
 static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
 static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
 static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
-static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout);
-static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout);
+static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
+static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
 /**
   * @}
   */
 
-/* Exported functions ---------------------------------------------------------*/
-
+/* Exported functions --------------------------------------------------------*/
 /** @defgroup SPI_Exported_Functions SPI Exported Functions
   * @{
   */
@@ -199,7 +264,7 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
   uint32_t frxth;
 
   /* Check the SPI handle allocation */
-  if(hspi == NULL)
+  if (hspi == NULL)
   {
     return HAL_ERROR;
   }
@@ -209,36 +274,28 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
   assert_param(IS_SPI_MODE(hspi->Init.Mode));
   assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
   assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
-  assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
-  assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
   assert_param(IS_SPI_NSS(hspi->Init.NSS));
   assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode));
   assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
   assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
   assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
+  if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
+  {
+    assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
+    assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
+  }
 #if (USE_SPI_CRC != 0U)
   assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
     assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength));
   }
-  /* Align the CRC Length on the data size */
-  if( hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE)
-  {
-    /* CRC Length aligned on the data size : value set by default */
-    if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-    {
-      hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT;
-    }
-    else
-    {
-      hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
-    }
-  }
-#endif
+#else
+  hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+#endif /* USE_SPI_CRC */
 
-  if(hspi->State == HAL_SPI_STATE_RESET)
+  if (hspi->State == HAL_SPI_STATE_RESET)
   {
     /* Allocate lock resource and initialize it */
     hspi->Lock = HAL_UNLOCKED;
@@ -253,7 +310,7 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
   __HAL_SPI_DISABLE(hspi);
 
   /* Align by default the rs fifo threshold on the data size */
-  if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
     frxth = SPI_RXFIFO_THRESHOLD_HF;
   }
@@ -263,43 +320,66 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
   }
 
   /* CRC calculation is valid only for 16Bit and 8 Bit */
-  if(( hspi->Init.DataSize != SPI_DATASIZE_16BIT ) && ( hspi->Init.DataSize != SPI_DATASIZE_8BIT ))
+  if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT))
   {
     /* CRC must be disabled */
     hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
   }
 
-  /*---------------------------- SPIx CR1 & CR2 Configuration ------------------------*/
-  /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
-  Communication speed, First bit, CRC calculation state, CRC Length */
-  hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction |
-                         hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
-                         hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit  | hspi->Init.CRCCalculation);
-
-  if( hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
+  /* Align the CRC Length on the data size */
+  if (hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE)
   {
-    hspi->Instance->CR1|= SPI_CR1_CRCL;
+    /* CRC Length aligned on the data size : value set by default */
+    if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+    {
+      hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT;
+    }
+    else
+    {
+      hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
+    }
   }
 
-  /* Configure : NSS management */
-  /* Configure : Rx Fifo Threshold */
-  hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode | hspi->Init.NSSPMode |
-                         hspi->Init.DataSize ) | frxth;
+  /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
+  /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
+  Communication speed, First bit, CRC calculation state */
+  WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction |
+                                  hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
+                                  hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit  | hspi->Init.CRCCalculation));
+#if (USE_SPI_CRC != 0U)
+  /* Configure : CRC Length */
+  if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
+  {
+    hspi->Instance->CR1 |= SPI_CR1_CRCL;
+  }
+#endif /* USE_SPI_CRC */
+
+  /* Configure : NSS management, TI Mode and Rx Fifo Threshold */
+  WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode |
+                                  hspi->Init.NSSPMode | hspi->Init.DataSize) | frxth);
 
 #if (USE_SPI_CRC != 0U)
-  /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
+  /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
   /* Configure : CRC Polynomial */
-  WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
-#endif
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  {
+    WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
+  }
+#endif /* USE_SPI_CRC */
+
+#if defined(SPI_I2SCFGR_I2SMOD)
+  /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
+  CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
+#endif /* SPI_I2SCFGR_I2SMOD */
 
   hspi->ErrorCode = HAL_SPI_ERROR_NONE;
-  hspi->State= HAL_SPI_STATE_READY;
+  hspi->State     = HAL_SPI_STATE_READY;
 
   return HAL_OK;
 }
 
 /**
-  * @brief  DeInitialize the SPI peripheral.
+  * @brief  De-Initialize the SPI peripheral.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @retval HAL status
@@ -307,12 +387,12 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
 {
   /* Check the SPI handle allocation */
-  if(hspi == NULL)
+  if (hspi == NULL)
   {
     return HAL_ERROR;
   }
 
-  /* Check the parameters */
+  /* Check SPI Instance parameter */
   assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
 
   hspi->State = HAL_SPI_STATE_BUSY;
@@ -326,13 +406,14 @@ HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
   hspi->ErrorCode = HAL_SPI_ERROR_NONE;
   hspi->State = HAL_SPI_STATE_RESET;
 
+  /* Release Lock */
   __HAL_UNLOCK(hspi);
 
   return HAL_OK;
 }
 
 /**
-  * @brief SPI MSP Init
+  * @brief  Initialize the SPI MSP.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @retval None
@@ -343,12 +424,12 @@ __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
   UNUSED(hspi);
 
   /* NOTE : This function should not be modified, when the callback is needed,
-  the HAL_SPI_MspInit should be implemented in the user file
-  */
+            the HAL_SPI_MspInit should be implemented in the user file
+   */
 }
 
 /**
-  * @brief SPI MSP DeInit
+  * @brief  De-Initialize the SPI MSP.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @retval None
@@ -385,13 +466,13 @@ __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
             The HAL status of all data processing is returned by the same function
             after finishing transfer.
        (++) No-Blocking mode: The communication is performed using Interrupts
-           or DMA, These APIs return the HAL status.
-           The end of the data processing will be indicated through the
-           dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
-           using DMA mode.
-           The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
-           will be executed respectively at the end of the transmit or Receive process
-           The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
+            or DMA, These APIs return the HAL status.
+            The end of the data processing will be indicated through the
+            dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
+            using DMA mode.
+            The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
+            will be executed respectively at the end of the transmit or Receive process
+            The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
 
     (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
         exist for 1Line (simplex) and 2Lines (full duplex) modes.
@@ -411,21 +492,25 @@ __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
   */
 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
-  uint32_t tickstart = HAL_GetTick();
+  uint32_t tickstart = 0U;
   HAL_StatusTypeDef errorcode = HAL_OK;
 
+  /* Check Direction parameter */
   assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
 
   /* Process Locked */
   __HAL_LOCK(hspi);
 
-  if(hspi->State != HAL_SPI_STATE_READY)
+  /* Init tickstart for timeout management*/
+  tickstart = HAL_GetTick();
+
+  if (hspi->State != HAL_SPI_STATE_READY)
   {
     errorcode = HAL_BUSY;
     goto error;
   }
 
-  if((pData == NULL ) || (Size == 0))
+  if ((pData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
@@ -434,51 +519,55 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
   /* Set the transaction information */
   hspi->State       = HAL_SPI_STATE_BUSY_TX;
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = pData;
+  hspi->pTxBuffPtr  = (uint8_t *)pData;
   hspi->TxXferSize  = Size;
   hspi->TxXferCount = Size;
+
+  /*Init field not used in handle to zero */
   hspi->pRxBuffPtr  = (uint8_t *)NULL;
-  hspi->RxXferSize  = 0;
-  hspi->RxXferCount = 0;
+  hspi->RxXferSize  = 0U;
+  hspi->RxXferCount = 0U;
+  hspi->TxISR       = NULL;
+  hspi->RxISR       = NULL;
 
   /* Configure communication direction : 1Line */
-  if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
+  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
   {
     SPI_1LINE_TX(hspi);
   }
 
 #if (USE_SPI_CRC != 0U)
   /* Reset CRC Calculation */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     SPI_RESET_CRC(hspi);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
   }
 
   /* Transmit data in 16 Bit mode */
-  if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
     /* Transmit data in 16 Bit mode */
-    while (hspi->TxXferCount > 0)
+    while (hspi->TxXferCount > 0U)
     {
       /* Wait until TXE flag is set to send data */
-      if((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE)
+      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
       {
-        hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
-        hspi->pTxBuffPtr += sizeof(uint16_t);
+        hspi->Instance->DR = *((uint16_t *)pData);
+        pData += sizeof(uint16_t);
         hspi->TxXferCount--;
       }
       else
       {
         /* Timeout management */
-        if((Timeout == 0) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >=  Timeout)))
+        if ((Timeout == 0U) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout)))
         {
           errorcode = HAL_TIMEOUT;
           goto error;
@@ -489,28 +578,28 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
   /* Transmit data in 8 Bit mode */
   else
   {
-    while (hspi->TxXferCount > 0)
+    while (hspi->TxXferCount > 0U)
     {
       /* Wait until TXE flag is set to send data */
-      if((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE)
+      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
       {
-        if(hspi->TxXferCount > 1)
+        if (hspi->TxXferCount > 1U)
         {
           /* write on the data register in packing mode */
-          hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
-          hspi->pTxBuffPtr += sizeof(uint16_t);
-          hspi->TxXferCount -= 2;
+          hspi->Instance->DR = *((uint16_t *)pData);
+          pData += sizeof(uint16_t);
+          hspi->TxXferCount -= 2U;
         }
         else
         {
-          *((__IO uint8_t*)&hspi->Instance->DR) = (*hspi->pTxBuffPtr++);
+          *((__IO uint8_t *)&hspi->Instance->DR) = (*pData++);
           hspi->TxXferCount--;
         }
       }
       else
       {
         /* Timeout management */
-        if((Timeout == 0) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >=  Timeout)))
+        if ((Timeout == 0U) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout)))
         {
           errorcode = HAL_TIMEOUT;
           goto error;
@@ -518,28 +607,27 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
       }
     }
   }
-
 #if (USE_SPI_CRC != 0U)
   /* Enable CRC Transmission */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
-     hspi->Instance->CR1|= SPI_CR1_CRCNEXT;
+    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* Check the end of the transaction */
-  if(SPI_EndRxTxTransaction(hspi,Timeout) != HAL_OK)
+  if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
   {
     hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
   }
 
   /* Clear overrun flag in 2 Lines communication mode because received is not read */
-  if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
+  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
   {
     __HAL_SPI_CLEAR_OVRFLAG(hspi);
   }
 
-  if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
+  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
   {
     errorcode = HAL_ERROR;
   }
@@ -563,55 +651,62 @@ error:
 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
 #if (USE_SPI_CRC != 0U)
-  __IO uint16_t tmpreg;
-#endif
-  uint32_t tickstart = HAL_GetTick();
+  __IO uint16_t tmpreg = 0U;
+#endif /* USE_SPI_CRC */
+  uint32_t tickstart = 0U;
   HAL_StatusTypeDef errorcode = HAL_OK;
 
-  if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
+  if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
   {
-    /* the receive process is not supported in 2Lines direction master mode */
-    /* in this case we call the TransmitReceive process                     */
-    /* Process Locked */
-    return HAL_SPI_TransmitReceive(hspi,pData,pData,Size,Timeout);
+    hspi->State = HAL_SPI_STATE_BUSY_RX;
+    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
+    return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
   }
 
   /* Process Locked */
   __HAL_LOCK(hspi);
 
-  if(hspi->State != HAL_SPI_STATE_READY)
+  /* Init tickstart for timeout management*/
+  tickstart = HAL_GetTick();
+
+  if (hspi->State != HAL_SPI_STATE_READY)
   {
     errorcode = HAL_BUSY;
     goto error;
   }
 
-  if((pData == NULL ) || (Size == 0))
+  if ((pData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
   }
 
+  /* Set the transaction information */
   hspi->State       = HAL_SPI_STATE_BUSY_RX;
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pRxBuffPtr  = pData;
+  hspi->pRxBuffPtr  = (uint8_t *)pData;
   hspi->RxXferSize  = Size;
   hspi->RxXferCount = Size;
+
+  /*Init field not used in handle to zero */
   hspi->pTxBuffPtr  = (uint8_t *)NULL;
-  hspi->TxXferSize  = 0;
-  hspi->TxXferCount = 0;
+  hspi->TxXferSize  = 0U;
+  hspi->TxXferCount = 0U;
+  hspi->RxISR       = NULL;
+  hspi->TxISR       = NULL;
 
 #if (USE_SPI_CRC != 0U)
   /* Reset CRC Calculation */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     SPI_RESET_CRC(hspi);
     /* this is done to handle the CRCNEXT before the latest data */
     hspi->RxXferCount--;
   }
-#endif
+#endif /* USE_SPI_CRC */
 
-  /* Set the Rx Fido threshold */
-  if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+  /* Set the Rx Fifo threshold */
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
     /* set fiforxthreshold according the reception data length: 16bit */
     CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
@@ -622,36 +717,37 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
     SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
   }
 
-  /* Configure communication direction 1Line and enabled SPI if needed */
-  if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
+  /* Configure communication direction: 1Line */
+  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
   {
     SPI_1LINE_RX(hspi);
   }
 
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
   }
 
   /* Receive data in 8 Bit mode */
-  if(hspi->Init.DataSize <= SPI_DATASIZE_8BIT)
+  if (hspi->Init.DataSize <= SPI_DATASIZE_8BIT)
   {
     /* Transfer loop */
-    while(hspi->RxXferCount > 0)
+    while (hspi->RxXferCount > 0U)
     {
       /* Check the RXNE flag */
-      if((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE)
+      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
       {
         /* read the received data */
-        (*hspi->pRxBuffPtr++)= *(__IO uint8_t *)&hspi->Instance->DR;
+        (*pData) = *(__IO uint8_t *)&hspi->Instance->DR;
+        pData += sizeof(uint8_t);
         hspi->RxXferCount--;
       }
       else
       {
         /* Timeout management */
-        if((Timeout == 0) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >=  Timeout)))
+        if ((Timeout == 0U) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout)))
         {
           errorcode = HAL_TIMEOUT;
           goto error;
@@ -662,19 +758,19 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
   else
   {
     /* Transfer loop */
-    while(hspi->RxXferCount > 0)
+    while (hspi->RxXferCount > 0U)
     {
       /* Check the RXNE flag */
-      if((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE)
+      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
       {
-        *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-        hspi->pRxBuffPtr += sizeof(uint16_t);
+        *((uint16_t *)pData) = hspi->Instance->DR;
+        pData += sizeof(uint16_t);
         hspi->RxXferCount--;
       }
       else
       {
         /* Timeout management */
-        if((Timeout == 0) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >=  Timeout)))
+        if ((Timeout == 0U) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout)))
         {
           errorcode = HAL_TIMEOUT;
           goto error;
@@ -685,13 +781,13 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
 
 #if (USE_SPI_CRC != 0U)
   /* Handle the CRC Transmission */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     /* freeze the CRC before the latest data */
-    hspi->Instance->CR1|= SPI_CR1_CRCNEXT;
+    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 
     /* Read the latest data */
-    if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
+    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
     {
       /* the latest data has not been received */
       errorcode = HAL_TIMEOUT;
@@ -699,67 +795,70 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1
     }
 
     /* Receive last data in 16 Bit mode */
-    if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+    if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
     {
-      *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
+      *((uint16_t *)pData) = hspi->Instance->DR;
     }
     /* Receive last data in 8 Bit mode */
     else
     {
-      *hspi->pRxBuffPtr = *(__IO uint8_t *)&hspi->Instance->DR;
+      (*pData) = *(__IO uint8_t *)&hspi->Instance->DR;
     }
 
-    /* Wait until TXE flag */
-    if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
+    /* Wait the CRC data */
+    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
     {
-      /* Flag Error*/
-      hspi->ErrorCode = HAL_SPI_ERROR_CRC;
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
       errorcode = HAL_TIMEOUT;
       goto error;
     }
 
-    if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
+    /* Read CRC to Flush DR and RXNE flag */
+    if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
     {
       tmpreg = hspi->Instance->DR;
-      UNUSED(tmpreg); /* To avoid GCC warning */
+      /* To avoid GCC warning */
+      UNUSED(tmpreg);
     }
     else
     {
       tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-      UNUSED(tmpreg); /* To avoid GCC warning */
+      /* To avoid GCC warning */
+      UNUSED(tmpreg);
 
-      if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
+      if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
       {
-        if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
+        if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout, tickstart) != HAL_OK)
         {
           /* Error on the CRC reception */
-          hspi->ErrorCode = HAL_SPI_ERROR_CRC;
+          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
           errorcode = HAL_TIMEOUT;
           goto error;
         }
         tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-        UNUSED(tmpreg); /* To avoid GCC warning */
+        /* To avoid GCC warning */
+        UNUSED(tmpreg);
       }
     }
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* Check the end of the transaction */
-  if(SPI_EndRxTransaction(hspi,Timeout) != HAL_OK)
+  if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK)
   {
     hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
   }
 
 #if (USE_SPI_CRC != 0U)
   /* Check if CRC error occurred */
-  if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
+  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
   {
-    hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
     __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
-  if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
+  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
   {
     errorcode = HAL_ERROR;
   }
@@ -780,53 +879,72 @@ error :
   * @param  Timeout: Timeout duration
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
+HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
+                                          uint32_t Timeout)
 {
+  uint32_t tmp = 0U, tmp1 = 0U;
 #if (USE_SPI_CRC != 0U)
-  __IO uint16_t tmpreg;
-#endif
-  uint32_t tickstart = HAL_GetTick();
+  __IO uint16_t tmpreg = 0U;
+#endif /* USE_SPI_CRC */
+  uint32_t tickstart = 0U;
   /* Variable used to alternate Rx and Tx during transfer */
   uint32_t txallowed = 1U;
-
   HAL_StatusTypeDef errorcode = HAL_OK;
 
+  /* Check Direction parameter */
   assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
 
   /* Process Locked */
   __HAL_LOCK(hspi);
 
-  if(hspi->State != HAL_SPI_STATE_READY)
+  /* Init tickstart for timeout management*/
+  tickstart = HAL_GetTick();
+
+  tmp  = hspi->State;
+  tmp1 = hspi->Init.Mode;
+
+  if (!((tmp == HAL_SPI_STATE_READY) || \
+        ((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
   {
     errorcode = HAL_BUSY;
     goto error;
   }
 
-  if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
+  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
   }
 
-  hspi->State       = HAL_SPI_STATE_BUSY_TX_RX;
+  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
+  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
+  {
+    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
+  }
+
+  /* Set the transaction information */
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pRxBuffPtr  = pRxData;
+  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
   hspi->RxXferCount = Size;
   hspi->RxXferSize  = Size;
-  hspi->pTxBuffPtr  = pTxData;
+  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
   hspi->TxXferCount = Size;
   hspi->TxXferSize  = Size;
 
+  /*Init field not used in handle to zero */
+  hspi->RxISR       = NULL;
+  hspi->TxISR       = NULL;
+
 #if (USE_SPI_CRC != 0U)
   /* Reset CRC Calculation */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     SPI_RESET_CRC(hspi);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* Set the Rx Fifo threshold */
-  if((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount > 1))
+  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount > 1))
   {
     /* set fiforxthreshold according the reception data length: 16bit */
     CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
@@ -838,49 +956,56 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
   }
 
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
   }
 
   /* Transmit and Receive data in 16 Bit mode */
-  if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
-    while ((hspi->TxXferCount > 0 ) || (hspi->RxXferCount > 0))
+    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
+    {
+      hspi->Instance->DR = *((uint16_t *)pTxData);
+      pTxData += sizeof(uint16_t);
+      hspi->TxXferCount--;
+    }
+    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
     {
       /* Check TXE flag */
-      if(txallowed && ((hspi->TxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE)))
+      if (txallowed && (hspi->TxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)))
       {
-        hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
-        hspi->pTxBuffPtr += sizeof(uint16_t);
+        hspi->Instance->DR = *((uint16_t *)pTxData);
+        pTxData += sizeof(uint16_t);
         hspi->TxXferCount--;
         /* Next Data is a reception (Rx). Tx not allowed */
         txallowed = 0U;
 
 #if (USE_SPI_CRC != 0U)
         /* Enable CRC Transmission */
-        if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
+        if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
         {
           /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */
-          if(((hspi->Instance->CR1 & SPI_CR1_MSTR) == 0) && ((hspi->Instance->CR2 & SPI_CR2_NSSP) == SPI_CR2_NSSP))
+          if (((hspi->Instance->CR1 & SPI_CR1_MSTR) == 0U) && ((hspi->Instance->CR2 & SPI_CR2_NSSP) == SPI_CR2_NSSP))
           {
             SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM);
           }
           SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
         }
-#endif
+#endif /* USE_SPI_CRC */
       }
+
       /* Check RXNE flag */
-      if((hspi->RxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE))
+      if ((hspi->RxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)))
       {
-        *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
-        hspi->pRxBuffPtr += sizeof(uint16_t);
+        *((uint16_t *)pRxData) = hspi->Instance->DR;
+        pRxData += sizeof(uint16_t);
         hspi->RxXferCount--;
-        /* Next Data is a reception (Rx). Tx not allowed */
+        /* Next Data is a Transmission (Tx). Tx is allowed */
         txallowed = 1U;
       }
-      if((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >=  Timeout))
+      if ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout))
       {
         errorcode = HAL_TIMEOUT;
         goto error;
@@ -890,48 +1015,54 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
   /* Transmit and Receive data in 8 Bit mode */
   else
   {
-    while((hspi->TxXferCount > 0) || (hspi->RxXferCount > 0))
+    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
+    {
+      *((__IO uint8_t *)&hspi->Instance->DR) = (*pTxData);
+      pTxData += sizeof(uint8_t);
+      hspi->TxXferCount--;
+    }
+    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
     {
       /* check TXE flag */
-      if(txallowed && ((hspi->TxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE)))
+      if (txallowed && (hspi->TxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)))
       {
-        if(hspi->TxXferCount > 1)
+        if (hspi->TxXferCount > 1U)
         {
-          hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
-          hspi->pTxBuffPtr += sizeof(uint16_t);
-          hspi->TxXferCount -= 2;
+          hspi->Instance->DR = *((uint16_t *)pTxData);
+          pTxData += sizeof(uint16_t);
+          hspi->TxXferCount -= 2U;
         }
         else
         {
-          *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
+          *(__IO uint8_t *)&hspi->Instance->DR = (*pTxData++);
           hspi->TxXferCount--;
-          /* Next Data is a reception (Rx). Tx not allowed */
-        txallowed = 0U;
         }
+        /* Next Data is a reception (Rx). Tx not allowed */
+        txallowed = 0U;
 
 #if (USE_SPI_CRC != 0U)
         /* Enable CRC Transmission */
-        if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
+        if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
         {
           /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */
-          if(((hspi->Instance->CR1 & SPI_CR1_MSTR) == 0) && ((hspi->Instance->CR2 & SPI_CR2_NSSP) == SPI_CR2_NSSP))
+          if (((hspi->Instance->CR1 & SPI_CR1_MSTR) == 0U) && ((hspi->Instance->CR2 & SPI_CR2_NSSP) == SPI_CR2_NSSP))
           {
             SET_BIT(hspi->Instance->CR1, SPI_CR1_SSM);
           }
           SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
         }
-#endif
+#endif /* USE_SPI_CRC */
       }
 
       /* Wait until RXNE flag is reset */
-      if((hspi->RxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE))
+      if ((hspi->RxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)))
       {
-        if(hspi->RxXferCount > 1)
+        if (hspi->RxXferCount > 1U)
         {
-          *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
-          hspi->pRxBuffPtr += sizeof(uint16_t);
-          hspi->RxXferCount -= 2;
-          if(hspi->RxXferCount <= 1)
+          *((uint16_t *)pRxData) = hspi->Instance->DR;
+          pRxData += sizeof(uint16_t);
+          hspi->RxXferCount -= 2U;
+          if (hspi->RxXferCount <= 1U)
           {
             /* set fiforxthreshold before to switch on 8 bit data size */
             SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
@@ -939,13 +1070,13 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
         }
         else
         {
-          (*hspi->pRxBuffPtr++) =  *(__IO uint8_t *)&hspi->Instance->DR;
+          (*pRxData++) = *(__IO uint8_t *)&hspi->Instance->DR;
           hspi->RxXferCount--;
-          /* Next Data is a Transmission (Tx). Tx is allowed */
-          txallowed = 1U;
         }
+        /* Next Data is a Transmission (Tx). Tx is allowed */
+        txallowed = 1U;
       }
-      if((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >=  Timeout))
+      if ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick() - tickstart) >=  Timeout))
       {
         errorcode = HAL_TIMEOUT;
         goto error;
@@ -955,60 +1086,63 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD
 
 #if (USE_SPI_CRC != 0U)
   /* Read CRC from DR to close CRC calculation process */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     /* Wait until TXE flag */
-    if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
+    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
     {
       /* Error on the CRC reception */
-      hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
       errorcode = HAL_TIMEOUT;
       goto error;
     }
-
-    if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
+    /* Read CRC */
+    if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
     {
       tmpreg = hspi->Instance->DR;
-      UNUSED(tmpreg); /* To avoid GCC warning */
+      /* To avoid GCC warning */
+      UNUSED(tmpreg);
     }
     else
     {
       tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-      UNUSED(tmpreg); /* To avoid GCC warning */
+      /* To avoid GCC warning */
+      UNUSED(tmpreg);
 
-      if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
+      if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
       {
-        if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
+        if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
         {
           /* Error on the CRC reception */
-          hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
           errorcode = HAL_TIMEOUT;
           goto error;
         }
         tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-        UNUSED(tmpreg); /* To avoid GCC warning */
+        /* To avoid GCC warning */
+        UNUSED(tmpreg);
       }
     }
   }
 
   /* Check if CRC error occurred */
-  if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
+  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
   {
-    hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
     /* Clear CRC Flag */
     __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
 
     errorcode = HAL_ERROR;
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* Check the end of the transaction */
-  if(SPI_EndRxTxTransaction(hspi,Timeout) != HAL_OK)
+  if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
   {
     hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
   }
 
-  if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
+  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
   {
     errorcode = HAL_ERROR;
   }
@@ -1030,36 +1164,40 @@ error :
 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
 {
   HAL_StatusTypeDef errorcode = HAL_OK;
+
+  /* Check Direction parameter */
   assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
 
   /* Process Locked */
   __HAL_LOCK(hspi);
 
-  if((pData == NULL) || (Size == 0))
+  if ((pData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
   }
 
-  if(hspi->State != HAL_SPI_STATE_READY)
+  if (hspi->State != HAL_SPI_STATE_READY)
   {
     errorcode = HAL_BUSY;
     goto error;
   }
 
-  /* prepare the transfer */
+  /* Set the transaction information */
   hspi->State       = HAL_SPI_STATE_BUSY_TX;
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = pData;
+  hspi->pTxBuffPtr  = (uint8_t *)pData;
   hspi->TxXferSize  = Size;
   hspi->TxXferCount = Size;
+
+  /* Init field not used in handle to zero */
   hspi->pRxBuffPtr  = (uint8_t *)NULL;
-  hspi->RxXferSize  = 0;
-  hspi->RxXferCount = 0;
-  hspi->RxISR = NULL;
+  hspi->RxXferSize  = 0U;
+  hspi->RxXferCount = 0U;
+  hspi->RxISR       = NULL;
 
   /* Set the function for IT treatment */
-  if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
     hspi->TxISR = SPI_TxISR_16BIT;
   }
@@ -1069,24 +1207,25 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u
   }
 
   /* Configure communication direction : 1Line */
-  if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
+  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
   {
     SPI_1LINE_TX(hspi);
   }
 
 #if (USE_SPI_CRC != 0U)
   /* Reset CRC Calculation */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     SPI_RESET_CRC(hspi);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* Enable TXE and ERR interrupt */
-  __HAL_SPI_ENABLE_IT(hspi,(SPI_IT_TXE));
+  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
+
 
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
@@ -1109,86 +1248,87 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui
 {
   HAL_StatusTypeDef errorcode = HAL_OK;
 
+  if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
+  {
+    hspi->State = HAL_SPI_STATE_BUSY_RX;
+    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
+    return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
+  }
+
   /* Process Locked */
   __HAL_LOCK(hspi);
 
-  if(hspi->State != HAL_SPI_STATE_READY)
+  if (hspi->State != HAL_SPI_STATE_READY)
   {
     errorcode = HAL_BUSY;
     goto error;
   }
-  if((pData == NULL) || (Size == 0))
+
+  if ((pData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
   }
 
-  /* Configure communication */
+  /* Set the transaction information */
   hspi->State       = HAL_SPI_STATE_BUSY_RX;
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pRxBuffPtr  = pData;
+  hspi->pRxBuffPtr  = (uint8_t *)pData;
   hspi->RxXferSize  = Size;
   hspi->RxXferCount = Size;
+
+  /* Init field not used in handle to zero */
   hspi->pTxBuffPtr  = (uint8_t *)NULL;
-  hspi->TxXferSize  = 0;
-  hspi->TxXferCount = 0;
+  hspi->TxXferSize  = 0U;
+  hspi->TxXferCount = 0U;
+  hspi->TxISR       = NULL;
 
-  if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-    /* the receive process is not supported in 2Lines direction master mode */
-    /* in this we call the TransmitReceive process          */
-    return HAL_SPI_TransmitReceive_IT(hspi,pData,pData,Size);
-  }
-
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    hspi->CRCSize = 1;
-    if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
-    {
-      hspi->CRCSize = 2;
-    }
-  }
-  else
-  {
-    hspi->CRCSize = 0;
-  }
-
-  hspi->TxISR = NULL;
   /* check the data size to adapt Rx threshold and the set the function for IT treatment */
-  if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
-    /* set fiforxthresold according the reception data length: 16 bit */
+    /* set fiforxthreshold according the reception data length: 16 bit */
     CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
     hspi->RxISR = SPI_RxISR_16BIT;
   }
   else
   {
-    /* set fiforxthresold according the reception data length: 8 bit */
+    /* set fiforxthreshold according the reception data length: 8 bit */
     SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
     hspi->RxISR = SPI_RxISR_8BIT;
   }
 
   /* Configure communication direction : 1Line */
-  if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
+  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
   {
     SPI_1LINE_RX(hspi);
   }
 
 #if (USE_SPI_CRC != 0U)
   /* Reset CRC Calculation */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
+    hspi->CRCSize = 1U;
+    if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
+    {
+      hspi->CRCSize = 2U;
+    }
     SPI_RESET_CRC(hspi);
   }
-#endif
+  else
+  {
+    hspi->CRCSize = 0U;
+  }
+#endif /* USE_SPI_CRC */
 
   /* Enable TXE and ERR interrupt */
   __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
 
+  /* Note : The SPI must be enabled after unlocking current process
+            to avoid the risk of SPI interrupt handle execution before current
+            process unlock */
+
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
@@ -1211,77 +1351,84 @@ error :
   */
 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
 {
+  uint32_t tmp = 0U, tmp1 = 0U;
   HAL_StatusTypeDef errorcode = HAL_OK;
+
+  /* Check Direction parameter */
   assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
 
   /* Process locked */
   __HAL_LOCK(hspi);
 
-  if(!((hspi->State == HAL_SPI_STATE_READY) || \
-    ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX))))
+  tmp  = hspi->State;
+  tmp1 = hspi->Init.Mode;
+
+  if (!((tmp == HAL_SPI_STATE_READY) || \
+        ((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
   {
     errorcode = HAL_BUSY;
     goto error;
   }
 
-  if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
+  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
   }
 
-  hspi->CRCSize = 0;
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-  {
-    hspi->CRCSize = 1;
-    if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
-    {
-      hspi->CRCSize = 2;
-    }
-  }
-
-  if(hspi->State != HAL_SPI_STATE_BUSY_RX)
+  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
+  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
   {
     hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
   }
 
+  /* Set the transaction information */
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = pTxData;
+  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
   hspi->TxXferSize  = Size;
   hspi->TxXferCount = Size;
-  hspi->pRxBuffPtr  = pRxData;
+  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
   hspi->RxXferSize  = Size;
   hspi->RxXferCount = Size;
 
   /* Set the function for IT treatment */
-  if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
-    hspi->RxISR = SPI_2linesRxISR_16BIT;
-    hspi->TxISR = SPI_2linesTxISR_16BIT;
+    hspi->RxISR     = SPI_2linesRxISR_16BIT;
+    hspi->TxISR     = SPI_2linesTxISR_16BIT;
   }
   else
   {
-    hspi->RxISR = SPI_2linesRxISR_8BIT;
-    hspi->TxISR = SPI_2linesTxISR_8BIT;
+    hspi->RxISR     = SPI_2linesRxISR_8BIT;
+    hspi->TxISR     = SPI_2linesTxISR_8BIT;
   }
 
 #if (USE_SPI_CRC != 0U)
   /* Reset CRC Calculation */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
+    hspi->CRCSize = 1U;
+    if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
+    {
+      hspi->CRCSize = 2U;
+    }
     SPI_RESET_CRC(hspi);
   }
-#endif
+  else
+  {
+    hspi->CRCSize = 0U;
+  }
+#endif /* USE_SPI_CRC */
 
   /* check if packing mode is enabled and if there is more than 2 data to receive */
-  if((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount >= 2))
+  if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount >= 2U))
   {
-    /* set fiforxthresold according the reception data length: 16 bit */
+    /* set fiforxthreshold according the reception data length: 16 bit */
     CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
   }
   else
   {
-    /* set fiforxthresold according the reception data length: 8 bit */
+    /* set fiforxthreshold according the reception data length: 8 bit */
     SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
   }
 
@@ -1289,7 +1436,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p
   __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
 
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
@@ -1312,45 +1459,52 @@ error :
 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
 {
   HAL_StatusTypeDef errorcode = HAL_OK;
+
+  /* Check Direction parameter */
   assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
 
   /* Process Locked */
   __HAL_LOCK(hspi);
 
-  if(hspi->State != HAL_SPI_STATE_READY)
+  if (hspi->State != HAL_SPI_STATE_READY)
   {
     errorcode = HAL_BUSY;
     goto error;
   }
 
-  if((pData == NULL) || (Size == 0))
+  if ((pData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
   }
 
+  /* Set the transaction information */
   hspi->State       = HAL_SPI_STATE_BUSY_TX;
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pTxBuffPtr  = pData;
+  hspi->pTxBuffPtr  = (uint8_t *)pData;
   hspi->TxXferSize  = Size;
   hspi->TxXferCount = Size;
+
+  /* Init field not used in handle to zero */
   hspi->pRxBuffPtr  = (uint8_t *)NULL;
-  hspi->RxXferSize  = 0;
-  hspi->RxXferCount = 0;
+  hspi->TxISR       = NULL;
+  hspi->RxISR       = NULL;
+  hspi->RxXferSize  = 0U;
+  hspi->RxXferCount = 0U;
 
   /* Configure communication direction : 1Line */
-  if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
+  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
   {
     SPI_1LINE_TX(hspi);
   }
 
 #if (USE_SPI_CRC != 0U)
   /* Reset CRC Calculation */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     SPI_RESET_CRC(hspi);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* Set the SPI TxDMA Half transfer complete callback */
   hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
@@ -1361,40 +1515,39 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
   /* Set the DMA error callback */
   hspi->hdmatx->XferErrorCallback = SPI_DMAError;
 
-  /* Set the DMA abort callback */
-  hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
+  /* Set the DMA AbortCpltCallback */
+  hspi->hdmatx->XferAbortCallback = NULL;
 
   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
   /* packing mode is enabled only if the DMA setting is HALWORD */
-  if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
+  if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
   {
     /* Check the even/odd of the data size + crc if enabled */
-    if((hspi->TxXferCount & 0x1) == 0)
+    if ((hspi->TxXferCount & 0x1U) == 0U)
     {
       CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-      hspi->TxXferCount = (hspi->TxXferCount >> 1);
+      hspi->TxXferCount = (hspi->TxXferCount >> 1U);
     }
     else
     {
       SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-      hspi->TxXferCount = (hspi->TxXferCount >> 1) + 1;
+      hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U;
     }
   }
 
-  /* Enable SPI Error interrupts, EIE: MODF, OVR, FE, FRE, CEC(depends on family) */
-  SET_BIT(hspi->Instance->CR2, (SPI_CR2_ERRIE));
-  SET_BIT(hspi->Instance->SR, (SPI_SR_FRE | SPI_SR_OVR | SPI_SR_MODF | SPI_SR_CRCERR));
-
-  /* Enable the Tx DMA channel */
+  /* Enable the Tx DMA Stream/Channel */
   HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
 
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
   }
 
+  /* Enable the SPI Error Interrupt Bit */
+  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
+
   /* Enable Tx DMA Request */
   SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 
@@ -1409,7 +1562,7 @@ error :
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @param  pData: pointer to data buffer
-  * @note  When the CRC feature is enabled the pData Length must be Size + 1.
+  * @note   When the CRC feature is enabled the pData Length must be Size + 1.
   * @param  Size: amount of data to be sent
   * @retval HAL status
   */
@@ -1417,55 +1570,57 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
 {
   HAL_StatusTypeDef errorcode = HAL_OK;
 
+  if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
+  {
+    hspi->State = HAL_SPI_STATE_BUSY_RX;
+    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
+    return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
+  }
+
   /* Process Locked */
   __HAL_LOCK(hspi);
 
-  if(hspi->State != HAL_SPI_STATE_READY)
+  if (hspi->State != HAL_SPI_STATE_READY)
   {
     errorcode = HAL_BUSY;
     goto error;
   }
 
-  if((pData == NULL) || (Size == 0))
+  if ((pData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
   }
 
+  /* Set the transaction information */
   hspi->State       = HAL_SPI_STATE_BUSY_RX;
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
-  hspi->pRxBuffPtr  = pData;
+  hspi->pRxBuffPtr  = (uint8_t *)pData;
   hspi->RxXferSize  = Size;
   hspi->RxXferCount = Size;
-  hspi->pTxBuffPtr  = (uint8_t *)NULL;
-  hspi->TxXferSize  = 0;
-  hspi->TxXferCount = 0;
 
-  if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
-  {
-    /* Process Unlocked */
-    __HAL_UNLOCK(hspi);
-    /* the receive process is not supported in 2Lines direction master mode */
-    /* in this case we call the TransmitReceive process                     */
-    return HAL_SPI_TransmitReceive_DMA(hspi,pData,pData,Size);
-  }
+  /*Init field not used in handle to zero */
+  hspi->RxISR       = NULL;
+  hspi->TxISR       = NULL;
+  hspi->TxXferSize  = 0U;
+  hspi->TxXferCount = 0U;
 
   /* Configure communication direction : 1Line */
-  if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
+  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
   {
     SPI_1LINE_RX(hspi);
   }
 
 #if (USE_SPI_CRC != 0U)
   /* Reset CRC Calculation */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     SPI_RESET_CRC(hspi);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* packing mode management is enabled by the DMA settings */
-  if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
+  if ((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
   {
     /* Restriction the DMA data received is not allowed in this mode */
     errorcode = HAL_ERROR;
@@ -1473,7 +1628,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
   }
 
   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-  if( hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
     /* set fiforxthreshold according the reception data length: 16bit */
     CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
@@ -1493,26 +1648,25 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
   /* Set the DMA error callback */
   hspi->hdmarx->XferErrorCallback = SPI_DMAError;
 
-  /* Set the DMA abort callback */
-  hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
+  /* Set the DMA AbortCpltCallback */
+  hspi->hdmarx->XferAbortCallback = NULL;
 
-  /* Enable SPI Error interrupts, EIE: MODF, OVR, FE, FRE, CEC(depends on family) */
-  SET_BIT(hspi->Instance->CR2, (SPI_CR2_ERRIE));
-  SET_BIT(hspi->Instance->SR, (SPI_SR_FRE | SPI_SR_OVR | SPI_SR_MODF | SPI_SR_CRCERR));
-
-  /* Enable Rx DMA Request */
-  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
-
-  /* Enable the Rx DMA channel */
+  /* Enable the Rx DMA Stream/Channel  */
   HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
 
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
   }
 
+  /* Enable the SPI Error Interrupt Bit */
+  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
+
+  /* Enable Rx DMA Request */
+  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
+
 error:
   /* Process Unlocked */
   __HAL_UNLOCK(hspi);
@@ -1525,37 +1679,44 @@ error:
   *               the configuration information for SPI module.
   * @param  pTxData: pointer to transmission data buffer
   * @param  pRxData: pointer to reception data buffer
-  * @note  When the CRC feature is enabled the pRxData Length must be Size + 1
+  * @note   When the CRC feature is enabled the pRxData Length must be Size + 1
   * @param  Size: amount of data to be sent
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
+                                              uint16_t Size)
 {
+  uint32_t tmp = 0U, tmp1 = 0U;
   HAL_StatusTypeDef errorcode = HAL_OK;
+
+  /* Check Direction parameter */
   assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
 
   /* Process locked */
   __HAL_LOCK(hspi);
 
-  if(!((hspi->State == HAL_SPI_STATE_READY) ||
-      ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX))))
+  tmp  = hspi->State;
+  tmp1 = hspi->Init.Mode;
+  if (!((tmp == HAL_SPI_STATE_READY) ||
+        ((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
   {
     errorcode = HAL_BUSY;
     goto error;
   }
 
-  if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
+  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
   {
     errorcode = HAL_ERROR;
     goto error;
   }
 
-  /* check if the transmit Receive function is not called by a receive master */
-  if(hspi->State != HAL_SPI_STATE_BUSY_RX)
+  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
+  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
   {
     hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
   }
 
+  /* Set the transaction information */
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
   hspi->pTxBuffPtr  = (uint8_t *)pTxData;
   hspi->TxXferSize  = Size;
@@ -1564,111 +1725,108 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
   hspi->RxXferSize  = Size;
   hspi->RxXferCount = Size;
 
+  /* Init field not used in handle to zero */
+  hspi->RxISR       = NULL;
+  hspi->TxISR       = NULL;
+
 #if (USE_SPI_CRC != 0U)
-  /* Reset CRC Calculation + increase the rxsize */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  /* Reset CRC Calculation */
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     SPI_RESET_CRC(hspi);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
   /* Reset the threshold bit */
   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX | SPI_CR2_LDMARX);
 
   /* the packing mode management is enabled by the DMA settings according the spi data size */
-  if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
   {
     /* set fiforxthreshold according the reception data length: 16bit */
     CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
   }
   else
   {
-    /* set fiforxthresold according the reception data length: 8bit */
+    /* set fiforxthreshold according the reception data length: 8bit */
     SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
 
-    if(hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
+    if (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
     {
-      if((hspi->TxXferSize & 0x1) == 0x0)
+      if ((hspi->TxXferSize & 0x1U) == 0x0U)
       {
         CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-        hspi->TxXferCount = hspi->TxXferCount >> 1;
+        hspi->TxXferCount = hspi->TxXferCount >> 1U;
       }
       else
       {
         SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-        hspi->TxXferCount = (hspi->TxXferCount >> 1) + 1;
+        hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U;
       }
     }
 
-    if(hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
+    if (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
     {
-      /* set fiforxthresold according the reception data length: 16bit */
+      /* set fiforxthreshold according the reception data length: 16bit */
       CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
 
-      if((hspi->RxXferCount & 0x1) == 0x0 )
+      if ((hspi->RxXferCount & 0x1U) == 0x0U)
       {
         CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-        hspi->RxXferCount = hspi->RxXferCount >> 1;
+        hspi->RxXferCount = hspi->RxXferCount >> 1U;
       }
       else
       {
         SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-        hspi->RxXferCount = (hspi->RxXferCount >> 1) + 1;
+        hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U;
       }
     }
   }
 
-  /* Set the SPI Rx DMA transfer complete callback if the transfer request is a
-     reception request (RXNE) */
-  if(hspi->State == HAL_SPI_STATE_BUSY_RX)
+  /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
+  if (hspi->State == HAL_SPI_STATE_BUSY_RX)
   {
     /* Set the SPI Rx DMA Half transfer complete callback */
     hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
-    hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
+    hspi->hdmarx->XferCpltCallback     = SPI_DMAReceiveCplt;
   }
   else
   {
-    /* Set the SPI Rx DMA Half transfer complete callback */
+    /* Set the SPI Tx/Rx DMA Half transfer complete callback */
     hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
-    hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
+    hspi->hdmarx->XferCpltCallback     = SPI_DMATransmitReceiveCplt;
   }
 
   /* Set the DMA error callback */
   hspi->hdmarx->XferErrorCallback = SPI_DMAError;
 
-  /* Set the DMA abort callback */
-  hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
+  /* Set the DMA AbortCpltCallback */
+  hspi->hdmarx->XferAbortCallback = NULL;
 
-  /* Enable SPI Error interrupts, EIE: MODF, OVR, FE, FRE, CEC(depends on family) */
-  SET_BIT(hspi->Instance->CR2, (SPI_CR2_ERRIE));
-  SET_BIT(hspi->Instance->SR, (SPI_SR_FRE | SPI_SR_OVR | SPI_SR_MODF | SPI_SR_CRCERR));
+  /* Enable the Rx DMA Stream/Channel  */
+  HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
 
   /* Enable Rx DMA Request */
   SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 
-  /* Enable the Rx DMA channel */
-  HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t) hspi->pRxBuffPtr, hspi->RxXferCount);
-
   /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
   is performed in DMA reception complete callback  */
   hspi->hdmatx->XferHalfCpltCallback = NULL;
-  hspi->hdmatx->XferCpltCallback = NULL;
+  hspi->hdmatx->XferCpltCallback     = NULL;
+  hspi->hdmatx->XferErrorCallback    = NULL;
+  hspi->hdmatx->XferAbortCallback    = NULL;
 
-  /* Set the DMA error callback */
-  hspi->hdmatx->XferErrorCallback = SPI_DMAError;
-
-  /* Set the DMA abort callback */
-  hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
-
-  /* Enable the Tx DMA channel */
+  /* Enable the Tx DMA Stream/Channel  */
   HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
 
   /* Check if the SPI is already enabled */
-  if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
   {
     /* Enable SPI peripheral */
     __HAL_SPI_ENABLE(hspi);
   }
+  /* Enable the SPI Error Interrupt Bit */
+  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
 
   /* Enable Tx DMA Request */
   SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
@@ -1680,7 +1838,308 @@ error :
 }
 
 /**
-  * @brief Pause the DMA Transfer.
+  * @brief  Abort ongoing transfer (blocking mode).
+  * @param  hspi SPI handle.
+  * @note   This procedure could be used for aborting any ongoing transfer (Tx and Rx),
+  *         started in Interrupt or DMA mode.
+  *         This procedure performs following operations :
+  *           - Disable SPI Interrupts (depending of transfer direction)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi)
+{
+  HAL_StatusTypeDef errorcode;
+
+  /* Initialized local variable  */
+  errorcode = HAL_OK;
+
+  /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
+  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
+  {
+    hspi->TxISR = SPI_AbortTx_ISR;
+    while (hspi->State != HAL_SPI_STATE_ABORT);
+  }
+
+  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
+  {
+    hspi->RxISR = SPI_AbortRx_ISR;
+    while (hspi->State != HAL_SPI_STATE_ABORT);
+  }
+
+  /* Clear ERRIE interrupts in case of DMA Mode */
+  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
+
+  /* Disable the SPI DMA Tx or SPI DMA Rx request if enabled */
+  if ((HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)))
+  {
+    /* Abort the SPI DMA Tx Stream/Channel : use blocking DMA Abort API (no callback) */
+    if (hspi->hdmatx != NULL)
+    {
+      /* Set the SPI DMA Abort callback :
+      will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
+      hspi->hdmatx->XferAbortCallback = NULL;
+
+      /* Abort DMA Tx Handle linked to SPI Peripheral */
+      if (HAL_DMA_Abort(hspi->hdmatx) != HAL_OK)
+      {
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+
+      /* Disable Tx DMA Request */
+      CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN));
+
+      if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+      {
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+
+      /* Disable SPI Peripheral */
+      __HAL_SPI_DISABLE(hspi);
+
+      /* Empty the FRLVL fifo */
+      if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+      {
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+    }
+    /* Abort the SPI DMA Rx Stream/Channel : use blocking DMA Abort API (no callback) */
+    if (hspi->hdmarx != NULL)
+    {
+      /* Set the SPI DMA Abort callback :
+      will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
+      hspi->hdmarx->XferAbortCallback = NULL;
+
+      /* Abort DMA Rx Handle linked to SPI Peripheral */
+      if (HAL_DMA_Abort(hspi->hdmarx) != HAL_OK)
+      {
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+
+      /* Disable peripheral */
+      __HAL_SPI_DISABLE(hspi);
+
+      /* Control the BSY flag */
+      if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+      {
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+
+      /* Empty the FRLVL fifo */
+      if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+      {
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+
+      /* Disable Rx DMA Request */
+      CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN));
+    }
+  }
+  /* Reset Tx and Rx transfer counters */
+  hspi->RxXferCount = 0U;
+  hspi->TxXferCount = 0U;
+
+  /* Check error during Abort procedure */
+  if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
+  {
+    /* return HAL_Error in case of error during Abort procedure */
+    errorcode = HAL_ERROR;
+  }
+  else
+  {
+    /* Reset errorCode */
+    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
+  }
+
+  /* Clear the Error flags in the SR register */
+  __HAL_SPI_CLEAR_OVRFLAG(hspi);
+  __HAL_SPI_CLEAR_FREFLAG(hspi);
+
+  /* Restore hspi->state to ready */
+  hspi->State = HAL_SPI_STATE_READY;
+
+  return errorcode;
+}
+
+/**
+  * @brief  Abort ongoing transfer (Interrupt mode).
+  * @param  hspi SPI handle.
+  * @note   This procedure could be used for aborting any ongoing transfer (Tx and Rx),
+  *         started in Interrupt or DMA mode.
+  *         This procedure performs following operations :
+  *           - Disable SPI Interrupts (depending of transfer direction)
+  *           - Disable the DMA transfer in the peripheral register (if enabled)
+  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
+  *           - Set handle State to READY
+  *           - At abort completion, call user abort complete callback
+  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
+  *         considered as completed only when user abort complete callback is executed (not when exiting function).
+  * @retval HAL status
+*/
+HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
+{
+  HAL_StatusTypeDef errorcode;
+  uint32_t abortcplt ;
+
+  /* Initialized local variable  */
+  errorcode = HAL_OK;
+  abortcplt = 1U;
+
+  /* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */
+  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
+  {
+    hspi->TxISR = SPI_AbortTx_ISR;
+    while (hspi->State != HAL_SPI_STATE_ABORT);
+  }
+
+  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
+  {
+    hspi->RxISR = SPI_AbortRx_ISR;
+    while (hspi->State != HAL_SPI_STATE_ABORT);
+  }
+
+  /* Clear ERRIE interrupts in case of DMA Mode */
+  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
+
+  /* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks should be initialised
+     before any call to DMA Abort functions */
+  /* DMA Tx Handle is valid */
+  if (hspi->hdmatx != NULL)
+  {
+    /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
+       Otherwise, set it to NULL */
+    if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
+    {
+      hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback;
+    }
+    else
+    {
+      hspi->hdmatx->XferAbortCallback = NULL;
+    }
+  }
+  /* DMA Rx Handle is valid */
+  if (hspi->hdmarx != NULL)
+  {
+    /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
+       Otherwise, set it to NULL */
+    if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
+    {
+      hspi->hdmarx->XferAbortCallback = SPI_DMARxAbortCallback;
+    }
+    else
+    {
+      hspi->hdmarx->XferAbortCallback = NULL;
+    }
+  }
+
+  /* Disable the SPI DMA Tx or the SPI Rx request if enabled */
+  if ((HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) && (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)))
+  {
+    /* Abort the SPI DMA Tx Stream/Channel */
+    if (hspi->hdmatx != NULL)
+    {
+      /* Abort DMA Tx Handle linked to SPI Peripheral */
+      if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
+      {
+        hspi->hdmatx->XferAbortCallback = NULL;
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+      else
+      {
+        abortcplt = 0U;
+      }
+    }
+    /* Abort the SPI DMA Rx Stream/Channel */
+    if (hspi->hdmarx != NULL)
+    {
+      /* Abort DMA Rx Handle linked to SPI Peripheral */
+      if (HAL_DMA_Abort_IT(hspi->hdmarx) !=  HAL_OK)
+      {
+        hspi->hdmarx->XferAbortCallback = NULL;
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+        abortcplt = 1U;
+      }
+      else
+      {
+        abortcplt = 0U;
+      }
+    }
+  }
+
+  /* Disable the SPI DMA Tx or the SPI Rx request if enabled */
+  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
+  {
+    /* Abort the SPI DMA Tx Stream/Channel */
+    if (hspi->hdmatx != NULL)
+    {
+      /* Abort DMA Tx Handle linked to SPI Peripheral */
+      if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
+      {
+        hspi->hdmatx->XferAbortCallback = NULL;
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+      else
+      {
+        abortcplt = 0U;
+      }
+    }
+  }
+  /* Disable the SPI DMA Tx or the SPI Rx request if enabled */
+  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
+  {
+    /* Abort the SPI DMA Rx Stream/Channel */
+    if (hspi->hdmarx != NULL)
+    {
+      /* Abort DMA Rx Handle linked to SPI Peripheral */
+      if (HAL_DMA_Abort_IT(hspi->hdmarx) !=  HAL_OK)
+      {
+        hspi->hdmarx->XferAbortCallback = NULL;
+        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+      }
+      else
+      {
+        abortcplt = 0U;
+      }
+    }
+  }
+
+  if (abortcplt == 1U)
+  {
+    /* Reset Tx and Rx transfer counters */
+    hspi->RxXferCount = 0U;
+    hspi->TxXferCount = 0U;
+
+    /* Check error during Abort procedure */
+    if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
+    {
+      /* return HAL_Error in case of error during Abort procedure */
+      errorcode = HAL_ERROR;
+    }
+    else
+    {
+      /* Reset errorCode */
+      hspi->ErrorCode = HAL_SPI_ERROR_NONE;
+    }
+
+    /* Clear the Error flags in the SR register */
+    __HAL_SPI_CLEAR_OVRFLAG(hspi);
+    __HAL_SPI_CLEAR_FREFLAG(hspi);
+
+    /* Restore hspi->State to Ready */
+    hspi->State = HAL_SPI_STATE_READY;
+
+    /* As no DMA to be aborted, call directly user Abort complete callback */
+    HAL_SPI_AbortCpltCallback(hspi);
+  }
+
+  return errorcode;
+}
+
+/**
+  * @brief  Pause the DMA Transfer.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for the specified SPI module.
   * @retval HAL status
@@ -1700,7 +2159,7 @@ HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
 }
 
 /**
-  * @brief Resumes the DMA Transfer.
+  * @brief  Resume the DMA Transfer.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for the specified SPI module.
   * @retval HAL status
@@ -1720,7 +2179,7 @@ HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
 }
 
 /**
-  * @brief Stops the DMA Transfer.
+  * @brief Stop the DMA Transfer.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for the specified SPI module.
   * @retval HAL status
@@ -1728,18 +2187,18 @@ HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
 {
   /* The Lock is not implemented on this API to allow the user application
-  to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
-  when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
-  and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
-  */
+     to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
+     when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
+     and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
+     */
 
-  /* Abort the SPI DMA tx Stream */
-  if(hspi->hdmatx != NULL)
+  /* Abort the SPI DMA tx Stream/Channel  */
+  if (hspi->hdmatx != NULL)
   {
     HAL_DMA_Abort(hspi->hdmatx);
   }
-  /* Abort the SPI DMA rx Stream */
-  if(hspi->hdmarx != NULL)
+  /* Abort the SPI DMA rx Stream/Channel  */
+  if (hspi->hdmarx != NULL)
   {
     HAL_DMA_Abort(hspi->hdmarx);
   }
@@ -1751,7 +2210,7 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
 }
 
 /**
-  * @brief  This function handles SPI interrupt request.
+  * @brief  Handle SPI interrupt request.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for the specified SPI module.
   * @retval None
@@ -1762,96 +2221,78 @@ void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
   uint32_t itflag   = hspi->Instance->SR;
 
   /* SPI in mode Receiver ----------------------------------------------------*/
-  if(((itflag & SPI_FLAG_OVR) == RESET) &&
-     ((itflag & SPI_FLAG_RXNE) != RESET) && ((itsource & SPI_IT_RXNE) != RESET))
+  if (((itflag & SPI_FLAG_OVR) == RESET) &&
+      ((itflag & SPI_FLAG_RXNE) != RESET) && ((itsource & SPI_IT_RXNE) != RESET))
   {
     hspi->RxISR(hspi);
     return;
   }
 
-  /* SPI in mode Transmitter ---------------------------------------------------*/
-  if(((itflag & SPI_FLAG_TXE) != RESET) && ((itsource & SPI_IT_TXE) != RESET))
+  /* SPI in mode Transmitter -------------------------------------------------*/
+  if (((itflag & SPI_FLAG_TXE) != RESET) && ((itsource & SPI_IT_TXE) != RESET))
   {
     hspi->TxISR(hspi);
     return;
   }
 
-  /* SPI in Error Treatment ---------------------------------------------------*/
-  if((itflag & (SPI_FLAG_MODF | SPI_FLAG_OVR | SPI_FLAG_FRE)) != RESET)
+  /* SPI in Error Treatment --------------------------------------------------*/
+  if (((itflag & (SPI_FLAG_MODF | SPI_FLAG_OVR | SPI_FLAG_FRE)) != RESET) && ((itsource & SPI_IT_ERR) != RESET))
   {
-    /* SPI Overrun error interrupt occurred -------------------------------------*/
-    if((itflag & SPI_FLAG_OVR) != RESET)
+    /* SPI Overrun error interrupt occurred ----------------------------------*/
+    if ((itflag & SPI_FLAG_OVR) != RESET)
     {
-      if(hspi->State != HAL_SPI_STATE_BUSY_TX)
+      if (hspi->State != HAL_SPI_STATE_BUSY_TX)
       {
-        hspi->ErrorCode |= HAL_SPI_ERROR_OVR;
+        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
         __HAL_SPI_CLEAR_OVRFLAG(hspi);
       }
       else
       {
+        __HAL_SPI_CLEAR_OVRFLAG(hspi);
         return;
       }
     }
 
-    /* SPI Mode Fault error interrupt occurred -------------------------------------*/
-    if((itflag & SPI_FLAG_MODF) != RESET)
+    /* SPI Mode Fault error interrupt occurred -------------------------------*/
+    if ((itflag & SPI_FLAG_MODF) != RESET)
     {
-      hspi->ErrorCode |= HAL_SPI_ERROR_MODF;
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
       __HAL_SPI_CLEAR_MODFFLAG(hspi);
     }
 
-    /* SPI Frame error interrupt occurred ----------------------------------------*/
-    if((itflag & SPI_FLAG_FRE) != RESET)
+    /* SPI Frame error interrupt occurred ------------------------------------*/
+    if ((itflag & SPI_FLAG_FRE) != RESET)
     {
-      hspi->ErrorCode |= HAL_SPI_ERROR_FRE;
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
       __HAL_SPI_CLEAR_FREFLAG(hspi);
     }
 
-    if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
+    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
     {
-      /* All SPI errors are treated as Blocking errors : transfer is aborted.
-      Set the SPI state to ready so as to be able to restart the process,
-      Disable Rx/Tx Interrupts, and disable DMA Rx/Tx requests, if ongoing */
+      /* Disable all interrupts */
+      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
 
-      /* Disable TXE, RXNE, MODF, OVR, FRE, and CRCERR (Master mode fault, Overrun error, TI frame format error, CRC protocol error) interrupts */
-      CLEAR_BIT(hspi->Instance->CR1, (SPI_CR2_RXNEIE | SPI_CR2_TXEIE | SPI_CR2_ERRIE));
-      CLEAR_BIT(hspi->Instance->SR, (SPI_SR_FRE | SPI_SR_OVR | SPI_SR_MODF | SPI_SR_CRCERR));
-
-      /* Restore SPI State to Ready */
       hspi->State = HAL_SPI_STATE_READY;
-
       /* Disable the SPI DMA requests if enabled */
-      if ((HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))||(HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)))
+      if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN)))
       {
         CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
 
         /* Abort the SPI DMA Rx channel */
-        if(hspi->hdmarx != NULL)
+        if (hspi->hdmarx != NULL)
         {
           /* Set the SPI DMA Abort callback :
           will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
           hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
-
-          /* Abort DMA RX */
-          if(HAL_DMA_Abort_IT(hspi->hdmarx) != HAL_OK)
-          {
-            /* Call Directly hspi->hdmarx->XferAbortCallback function in case of error */
-            hspi->hdmarx->XferAbortCallback(hspi->hdmarx);
-          }
+          HAL_DMA_Abort_IT(hspi->hdmarx);
         }
         /* Abort the SPI DMA Tx channel */
-        if(hspi->hdmatx != NULL)
+        if (hspi->hdmatx != NULL)
         {
           /* Set the SPI DMA Abort callback :
           will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
           hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
-
-          /* Abort DMA TX */
-          if(HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
-          {
-            /* Call Directly hspi->hdmatx->XferAbortCallback function in case of error */
-            hspi->hdmatx->XferAbortCallback(hspi->hdmatx);
-          }
+          HAL_DMA_Abort_IT(hspi->hdmatx);
         }
       }
       else
@@ -1860,6 +2301,7 @@ void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
         HAL_SPI_ErrorCallback(hspi);
       }
     }
+    return;
   }
 }
 
@@ -1875,8 +2317,8 @@ __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
   UNUSED(hspi);
 
   /* NOTE : This function should not be modified, when the callback is needed,
-  the HAL_SPI_TxCpltCallback should be implemented in the user file
-  */
+            the HAL_SPI_TxCpltCallback should be implemented in the user file
+   */
 }
 
 /**
@@ -1891,8 +2333,8 @@ __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
   UNUSED(hspi);
 
   /* NOTE : This function should not be modified, when the callback is needed,
-  the HAL_SPI_RxCpltCallback should be implemented in the user file
-  */
+            the HAL_SPI_RxCpltCallback should be implemented in the user file
+   */
 }
 
 /**
@@ -1907,8 +2349,8 @@ __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
   UNUSED(hspi);
 
   /* NOTE : This function should not be modified, when the callback is needed,
-  the HAL_SPI_TxRxCpltCallback should be implemented in the user file
-  */
+            the HAL_SPI_TxRxCpltCallback should be implemented in the user file
+   */
 }
 
 /**
@@ -1923,8 +2365,8 @@ __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
   UNUSED(hspi);
 
   /* NOTE : This function should not be modified, when the callback is needed,
-  the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
-  */
+            the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
+   */
 }
 
 /**
@@ -1939,8 +2381,8 @@ __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
   UNUSED(hspi);
 
   /* NOTE : This function should not be modified, when the callback is needed,
-  the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
-  */
+            the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
+   */
 }
 
 /**
@@ -1955,8 +2397,8 @@ __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
   UNUSED(hspi);
 
   /* NOTE : This function should not be modified, when the callback is needed,
-  the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
-  */
+            the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
+   */
 }
 
 /**
@@ -1971,11 +2413,26 @@ __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
   UNUSED(hspi);
 
   /* NOTE : This function should not be modified, when the callback is needed,
-  the HAL_SPI_ErrorCallback should be implemented in the user file
-  */
+            the HAL_SPI_ErrorCallback should be implemented in the user file
+   */
   /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
-  and user can use HAL_SPI_GetError() API to check the latest error occurred
+            and user can use HAL_SPI_GetError() API to check the latest error occurred
+   */
+}
+
+/**
+  * @brief  SPI Abort Complete callback.
+  * @param  hspi SPI handle.
+  * @retval None
   */
+__weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(hspi);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_SPI_AbortCpltCallback can be implemented in the user file.
+   */
 }
 
 /**
@@ -1983,7 +2440,7 @@ __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
   */
 
 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
-  *  @brief   SPI control functions
+  * @brief   SPI control functions
   *
 @verbatim
  ===============================================================================
@@ -2017,6 +2474,7 @@ HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
   */
 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
 {
+  /* Return SPI ErrorCode */
   return hspi->ErrorCode;
 }
 
@@ -2024,13 +2482,12 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
   * @}
   */
 
-
 /**
   * @}
   */
 
 /** @addtogroup SPI_Private_Functions
- *  @brief   Private functions
+  * @brief   Private functions
   * @{
   */
 
@@ -2042,30 +2499,37 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
   */
 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
+  uint32_t tickstart = 0U;
+
+  /* Init tickstart for timeout managment*/
+  tickstart = HAL_GetTick();
 
   /* DMA Normal Mode */
-  if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
+  if ((hdma->Instance->CR & DMA_SxCR_CIRC) != DMA_SxCR_CIRC)
   {
+    /* Disable ERR interrupt */
+    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
+
     /* Disable Tx DMA Request */
     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 
     /* Check the end of the transaction */
-    if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT) != HAL_OK)
+    if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
     {
-      hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
     }
 
     /* Clear overrun flag in 2 Lines communication mode because received data is not read */
-    if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
+    if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
     {
       __HAL_SPI_CLEAR_OVRFLAG(hspi);
     }
 
-    hspi->TxXferCount = 0;
+    hspi->TxXferCount = 0U;
     hspi->State = HAL_SPI_STATE_READY;
 
-    if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
+    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
     {
       HAL_SPI_ErrorCallback(hspi);
       return;
@@ -2082,69 +2546,81 @@ static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
   */
 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
+  uint32_t tickstart = 0U;
+#if (USE_SPI_CRC != 0U)
+  __IO uint16_t tmpreg = 0U;
+#endif /* USE_SPI_CRC */
 
-  /* DMA Normal mode */
-  if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
+  /* Init tickstart for timeout management*/
+  tickstart = HAL_GetTick();
+
+  /* DMA Normal Mode */
+  if ((hdma->Instance->CR & DMA_SxCR_CIRC) != DMA_SxCR_CIRC)
   {
+    /* Disable ERR interrupt */
+    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
 
 #if (USE_SPI_CRC != 0U)
-    __IO uint16_t tmpreg;
     /* CRC handling */
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
-      /* Wait until TXE flag */
-      if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
+      /* Wait until RXNE flag */
+      if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
       {
         /* Error on the CRC reception */
-        hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
       }
-      if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
+      /* Read CRC */
+      if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
       {
         tmpreg = hspi->Instance->DR;
-        UNUSED(tmpreg); /* To avoid GCC warning */
+        /* To avoid GCC warning */
+        UNUSED(tmpreg);
       }
       else
       {
         tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-        UNUSED(tmpreg); /* To avoid GCC warning */
+        /* To avoid GCC warning */
+        UNUSED(tmpreg);
 
-        if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
+        if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
         {
-          if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
+          if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
           {
             /* Error on the CRC reception */
-            hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+            SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
           }
           tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-          UNUSED(tmpreg); /* To avoid GCC warning */
+          /* To avoid GCC warning */
+          UNUSED(tmpreg);
         }
       }
     }
-#endif
+#endif /* USE_SPI_CRC */
 
     /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
     CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
 
     /* Check the end of the transaction */
-    if(SPI_EndRxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
+    if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
     {
-      hspi->ErrorCode|= HAL_SPI_ERROR_FLAG;
+      hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
     }
 
-    hspi->RxXferCount = 0;
+    hspi->RxXferCount = 0U;
     hspi->State = HAL_SPI_STATE_READY;
 
 #if (USE_SPI_CRC != 0U)
     /* Check if CRC error occurred */
-    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
+    if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
     {
-      hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
       __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
     }
-#endif
+#endif /* USE_SPI_CRC */
 
-    if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
+    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
     {
       HAL_SPI_ErrorCallback(hspi);
       return;
@@ -2154,141 +2630,287 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
 }
 
 /**
-  * @brief DMA SPI transmit receive process complete callback.
-  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
+  * @brief  DMA SPI transmit receive process complete callback.
+  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA module.
   * @retval None
   */
 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
+  uint32_t tickstart = 0U;
 #if (USE_SPI_CRC != 0U)
-  __IO uint16_t tmpreg;
-  /* CRC handling */
-  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  __IO int16_t tmpreg = 0U;
+#endif /* USE_SPI_CRC */
+  /* Init tickstart for timeout management*/
+  tickstart = HAL_GetTick();
+
+  /* DMA Normal Mode */
+  if ((hdma->Instance->CR & DMA_SxCR_CIRC) != DMA_SxCR_CIRC)
   {
-    if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_8BIT))
-    {
-      if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_QUARTER_FULL, SPI_DEFAULT_TIMEOUT) != HAL_OK)
-      {
-        /* Error on the CRC reception */
-        hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
-      }
-      tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
-      UNUSED(tmpreg); /* To avoid GCC warning */
-    }
-    else
-    {
-      if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TIMEOUT) != HAL_OK)
-      {
-        /* Error on the CRC reception */
-        hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
-      }
-      tmpreg = hspi->Instance->DR;
-      UNUSED(tmpreg); /* To avoid GCC warning */
-    }
-  }
-#endif
-
-  /* Check the end of the transaction */
-  if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT) != HAL_OK)
-  {
-    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
-  }
-
-  /* Disable Rx/Tx DMA Request */
-  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
-
-  hspi->TxXferCount = 0;
-  hspi->RxXferCount = 0;
-  hspi->State = HAL_SPI_STATE_READY;
+    /* Disable ERR interrupt */
+    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
 
 #if (USE_SPI_CRC != 0U)
-  /* Check if CRC error occurred */
-  if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
-  {
-    hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
-    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
-  }
-#endif
+    /* CRC handling */
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    {
+      if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_8BIT))
+      {
+        if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_QUARTER_FULL, SPI_DEFAULT_TIMEOUT,
+                                          tickstart) != HAL_OK)
+        {
+          /* Error on the CRC reception */
+          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
+        }
+        /* Read CRC to Flush DR and RXNE flag */
+        tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
+        /* To avoid GCC warning */
+        UNUSED(tmpreg);
+      }
+      else
+      {
+        if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
+        {
+          /* Error on the CRC reception */
+          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
+        }
+        /* Read CRC to Flush DR and RXNE flag */
+        tmpreg = hspi->Instance->DR;
+        /* To avoid GCC warning */
+        UNUSED(tmpreg);
+      }
+    }
+#endif /* USE_SPI_CRC */
 
-  if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
-  {
-    HAL_SPI_ErrorCallback(hspi);
-    return;
+    /* Check the end of the transaction */
+    if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
+    {
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
+    }
+
+    /* Disable Rx/Tx DMA Request */
+    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
+
+    hspi->TxXferCount = 0U;
+    hspi->RxXferCount = 0U;
+    hspi->State = HAL_SPI_STATE_READY;
+
+#if (USE_SPI_CRC != 0U)
+    /* Check if CRC error occurred */
+    if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
+    {
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
+      __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
+    }
+#endif /* USE_SPI_CRC */
+
+    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
+    {
+      HAL_SPI_ErrorCallback(hspi);
+      return;
+    }
   }
   HAL_SPI_TxRxCpltCallback(hspi);
 }
 
 /**
-  * @brief DMA SPI half transmit process complete callback.
-  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
+  * @brief  DMA SPI half transmit process complete callback.
+  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA module.
   * @retval None
   */
 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
+
   HAL_SPI_TxHalfCpltCallback(hspi);
 }
 
 /**
-  * @brief DMA SPI half receive process complete callback.
+  * @brief  DMA SPI half receive process complete callback
   * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA module.
   * @retval None
   */
 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
+
   HAL_SPI_RxHalfCpltCallback(hspi);
 }
 
 /**
-  * @brief DMA SPI half transmit receive process complete callback.
-  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
+  * @brief  DMA SPI half transmit receive process complete callback.
+  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA module.
   * @retval None
   */
 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
+
   HAL_SPI_TxRxHalfCpltCallback(hspi);
 }
 
 /**
-  * @brief DMA SPI communication error callback.
-  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
+  * @brief  DMA SPI communication error callback.
+  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA module.
   * @retval None
   */
 static void SPI_DMAError(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
 
   /* Stop the disable DMA transfer on SPI side */
   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
 
-  hspi->ErrorCode|= HAL_SPI_ERROR_DMA;
+  SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
   hspi->State = HAL_SPI_STATE_READY;
   HAL_SPI_ErrorCallback(hspi);
 }
 
 /**
-  * @brief DMA SPI communication abort callback
-  *        (To be called at end of DMA Abort procedure).
-  * @param hdma: DMA handle.
+  * @brief  DMA SPI communication abort callback, when initiated by HAL services on Error
+  *         (To be called at end of DMA Abort procedure following error occurrence).
+  * @param  hdma DMA handle.
   * @retval None
   */
 static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
   hspi->RxXferCount = 0U;
   hspi->TxXferCount = 0U;
 
   HAL_SPI_ErrorCallback(hspi);
 }
 
+/**
+  * @brief  DMA SPI Tx communication abort callback, when initiated by user
+  *         (To be called at end of DMA Tx Abort procedure following user abort request).
+  * @note   When this callback is executed, User Abort complete call back is called only if no
+  *         Abort still ongoing for Rx DMA Handle.
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
+
+  hspi->hdmatx->XferAbortCallback = NULL;
+
+  /* Disable Tx DMA Request */
+  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
+
+  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+  {
+    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+  }
+
+  /* Disable SPI Peripheral */
+  __HAL_SPI_DISABLE(hspi);
+
+  /* Empty the FRLVL fifo */
+  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+  {
+    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+  }
+
+  /* Check if an Abort process is still ongoing */
+  if (hspi->hdmarx != NULL)
+  {
+    if (hspi->hdmarx->XferAbortCallback != NULL)
+    {
+      return;
+    }
+  }
+
+  /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */
+  hspi->RxXferCount = 0U;
+  hspi->TxXferCount = 0U;
+
+  /* Check no error during Abort procedure */
+  if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT)
+  {
+    /* Reset errorCode */
+    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
+  }
+
+  /* Clear the Error flags in the SR register */
+  __HAL_SPI_CLEAR_OVRFLAG(hspi);
+  __HAL_SPI_CLEAR_FREFLAG(hspi);
+
+  /* Restore hspi->State to Ready */
+  hspi->State  = HAL_SPI_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_SPI_AbortCpltCallback(hspi);
+}
+
+/**
+  * @brief  DMA SPI Rx communication abort callback, when initiated by user
+  *         (To be called at end of DMA Rx Abort procedure following user abort request).
+  * @note   When this callback is executed, User Abort complete call back is called only if no
+  *         Abort still ongoing for Tx DMA Handle.
+  * @param  hdma DMA handle.
+  * @retval None
+  */
+static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
+{
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
+
+  /* Disable SPI Peripheral */
+  __HAL_SPI_DISABLE(hspi);
+
+  hspi->hdmarx->XferAbortCallback = NULL;
+
+  /* Disable Rx DMA Request */
+  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
+
+  /* Control the BSY flag */
+  if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+  {
+    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+  }
+
+  /* Empty the FRLVL fifo */
+  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+  {
+    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+  }
+
+  /* Check if an Abort process is still ongoing */
+  if (hspi->hdmatx != NULL)
+  {
+    if (hspi->hdmatx->XferAbortCallback != NULL)
+    {
+      return;
+    }
+  }
+
+  /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */
+  hspi->RxXferCount = 0U;
+  hspi->TxXferCount = 0U;
+
+  /* Check no error during Abort procedure */
+  if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT)
+  {
+    /* Reset errorCode */
+    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
+  }
+
+  /* Clear the Error flags in the SR register */
+  __HAL_SPI_CLEAR_OVRFLAG(hspi);
+  __HAL_SPI_CLEAR_FREFLAG(hspi);
+
+  /* Restore hspi->State to Ready */
+  hspi->State  = HAL_SPI_STATE_READY;
+
+  /* Call user Abort complete callback */
+  HAL_SPI_AbortCpltCallback(hspi);
+}
+
 /**
   * @brief  Rx 8-bit handler for Transmit and Receive in Interrupt mode.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
@@ -2298,12 +2920,12 @@ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
 static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
 {
   /* Receive data in packing mode */
-  if(hspi->RxXferCount > 1)
+  if (hspi->RxXferCount > 1U)
   {
-    *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
+    *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
     hspi->pRxBuffPtr += sizeof(uint16_t);
-    hspi->RxXferCount -= 2;
-    if(hspi->RxXferCount == 1)
+    hspi->RxXferCount -= 2U;
+    if (hspi->RxXferCount == 1U)
     {
       /* set fiforxthreshold according the reception data length: 8bit */
       SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
@@ -2317,21 +2939,21 @@ static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
   }
 
   /* check end of the reception */
-  if(hspi->RxXferCount == 0)
+  if (hspi->RxXferCount == 0U)
   {
 #if (USE_SPI_CRC != 0U)
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
       SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
       hspi->RxISR =  SPI_2linesRxISR_8BITCRC;
       return;
     }
-#endif
+#endif /* USE_SPI_CRC */
 
-    /* Disable RXNE interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
+    /* Disable RXNE  and ERR interrupt */
+    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
 
-    if(hspi->TxXferCount == 0)
+    if (hspi->TxXferCount == 0U)
     {
       SPI_CloseRxTx_ISR(hspi);
     }
@@ -2347,24 +2969,29 @@ static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
   */
 static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
 {
-  __IO uint8_t tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
-  UNUSED(tmpreg); /* To avoid GCC warning */
+  __IO uint8_t tmpreg = 0U;
+
+  /* Read data register to flush CRC */
+  tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
+
+  /* To avoid GCC warning */
+  UNUSED(tmpreg);
 
   hspi->CRCSize--;
 
   /* check end of the reception */
-  if(hspi->CRCSize == 0)
+  if (hspi->CRCSize == 0U)
   {
-    /* Disable RXNE interrupt */
-    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
+    /* Disable RXNE and ERR interrupt */
+    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
 
-    if(hspi->TxXferCount == 0)
+    if (hspi->TxXferCount == 0U)
     {
       SPI_CloseRxTx_ISR(hspi);
     }
   }
 }
-#endif
+#endif /* USE_SPI_CRC */
 
 /**
   * @brief  Tx 8-bit handler for Transmit and Receive in Interrupt mode.
@@ -2375,11 +3002,11 @@ static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
 static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
 {
   /* Transmit data in packing Bit mode */
-  if(hspi->TxXferCount >= 2)
+  if (hspi->TxXferCount >= 2U)
   {
     hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
     hspi->pTxBuffPtr += sizeof(uint16_t);
-    hspi->TxXferCount -= 2;
+    hspi->TxXferCount -= 2U;
   }
   /* Transmit data in 8 Bit mode */
   else
@@ -2389,19 +3016,23 @@ static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
   }
 
   /* check the end of the transmission */
-  if(hspi->TxXferCount == 0)
+  if (hspi->TxXferCount == 0U)
   {
 #if (USE_SPI_CRC != 0U)
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
-      hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
+      /* Set CRC Next Bit to send CRC */
+      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
+      /* Disable TXE interrupt */
+      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
+      return;
     }
-#endif
+#endif /* USE_SPI_CRC */
 
     /* Disable TXE interrupt */
     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
 
-    if(hspi->RxXferCount == 0)
+    if (hspi->RxXferCount == 0U)
     {
       SPI_CloseRxTx_ISR(hspi);
     }
@@ -2417,24 +3048,24 @@ static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
 static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
 {
   /* Receive data in 16 Bit mode */
-  *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
+  *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
   hspi->pRxBuffPtr += sizeof(uint16_t);
   hspi->RxXferCount--;
 
-  if(hspi->RxXferCount == 0)
+  if (hspi->RxXferCount == 0U)
   {
 #if (USE_SPI_CRC != 0U)
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
       hspi->RxISR =  SPI_2linesRxISR_16BITCRC;
       return;
     }
-#endif
+#endif /* USE_SPI_CRC */
 
     /* Disable RXNE interrupt */
     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
 
-    if(hspi->TxXferCount == 0)
+    if (hspi->TxXferCount == 0U)
     {
       SPI_CloseRxTx_ISR(hspi);
     }
@@ -2451,15 +3082,20 @@ static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
 static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
 {
   /* Receive data in 16 Bit mode */
-  __IO uint16_t tmpreg = hspi->Instance->DR;
-  UNUSED(tmpreg); /* To avoid GCC warning */
+  __IO uint16_t tmpreg = 0U;
+
+  /* Read data register to flush CRC */
+  tmpreg = hspi->Instance->DR;
+
+  /* To avoid GCC warning */
+  UNUSED(tmpreg);
 
   /* Disable RXNE interrupt */
   __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
 
   SPI_CloseRxTx_ISR(hspi);
 }
-#endif
+#endif /* USE_SPI_CRC */
 
 /**
   * @brief  Tx 16-bit handler for Transmit and Receive in Interrupt mode.
@@ -2475,19 +3111,23 @@ static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
   hspi->TxXferCount--;
 
   /* Enable CRC Transmission */
-  if(hspi->TxXferCount == 0)
+  if (hspi->TxXferCount == 0U)
   {
 #if (USE_SPI_CRC != 0U)
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
-      hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
+      /* Set CRC Next Bit to send CRC */
+      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
+      /* Disable TXE interrupt */
+      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
+      return;
     }
-#endif
+#endif /* USE_SPI_CRC */
 
     /* Disable TXE interrupt */
     __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
 
-    if(hspi->RxXferCount == 0)
+    if (hspi->RxXferCount == 0U)
     {
       SPI_CloseRxTx_ISR(hspi);
     }
@@ -2503,19 +3143,22 @@ static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
   */
 static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
 {
-  __IO uint8_t tmpreg;
-  tmpreg = *((__IO uint8_t*)&hspi->Instance->DR);
+  __IO uint8_t tmpreg = 0U;
 
-  UNUSED(tmpreg); /* To avoid GCC warning */
+  /* Read data register to flush CRC */
+  tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
+
+  /* To avoid GCC warning */
+  UNUSED(tmpreg);
 
   hspi->CRCSize--;
 
-  if(hspi->CRCSize == 0)
+  if (hspi->CRCSize == 0U)
   {
     SPI_CloseRx_ISR(hspi);
   }
 }
-#endif
+#endif /* USE_SPI_CRC */
 
 /**
   * @brief  Manage the receive 8-bit in Interrupt context.
@@ -2530,21 +3173,21 @@ static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
 
 #if (USE_SPI_CRC != 0U)
   /* Enable CRC Transmission */
-  if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
+  if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
   {
-    hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
+    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
   }
-#endif
+#endif /* USE_SPI_CRC */
 
-  if(hspi->RxXferCount == 0)
+  if (hspi->RxXferCount == 0U)
   {
 #if (USE_SPI_CRC != 0U)
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
       hspi->RxISR =  SPI_RxISR_8BITCRC;
       return;
     }
-#endif
+#endif /* USE_SPI_CRC */
     SPI_CloseRx_ISR(hspi);
   }
 }
@@ -2558,17 +3201,20 @@ static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
   */
 static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
 {
-  __IO uint16_t tmpreg;
+  __IO uint16_t tmpreg = 0U;
 
+  /* Read data register to flush CRC */
   tmpreg = hspi->Instance->DR;
-  UNUSED(tmpreg); /* To avoid GCC warning */
+
+  /* To avoid GCC warning */
+  UNUSED(tmpreg);
 
   /* Disable RXNE and ERR interrupt */
   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
 
   SPI_CloseRx_ISR(hspi);
 }
-#endif
+#endif /* USE_SPI_CRC */
 
 /**
   * @brief  Manage the 16-bit receive in Interrupt context.
@@ -2581,22 +3227,24 @@ static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
   *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
   hspi->pRxBuffPtr += sizeof(uint16_t);
   hspi->RxXferCount--;
+
 #if (USE_SPI_CRC != 0U)
   /* Enable CRC Transmission */
-  if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
+  if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
   {
-    hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
+    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
   }
-#endif
-  if(hspi->RxXferCount == 0)
+#endif /* USE_SPI_CRC */
+
+  if (hspi->RxXferCount == 0U)
   {
 #if (USE_SPI_CRC != 0U)
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
       hspi->RxISR = SPI_RxISR_16BITCRC;
       return;
     }
-#endif
+#endif /* USE_SPI_CRC */
     SPI_CloseRx_ISR(hspi);
   }
 }
@@ -2612,15 +3260,15 @@ static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
   *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
   hspi->TxXferCount--;
 
-  if(hspi->TxXferCount == 0)
+  if (hspi->TxXferCount == 0U)
   {
 #if (USE_SPI_CRC != 0U)
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
       /* Enable CRC Transmission */
-      hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
+      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
     }
-#endif
+#endif /* USE_SPI_CRC */
     SPI_CloseTx_ISR(hspi);
   }
 }
@@ -2638,37 +3286,37 @@ static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
   hspi->pTxBuffPtr += sizeof(uint16_t);
   hspi->TxXferCount--;
 
-  if(hspi->TxXferCount == 0)
+  if (hspi->TxXferCount == 0U)
   {
 #if (USE_SPI_CRC != 0U)
-    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
     {
       /* Enable CRC Transmission */
-      hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
+      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
     }
-#endif
+#endif /* USE_SPI_CRC */
     SPI_CloseTx_ISR(hspi);
   }
 }
 
 /**
   * @brief Handle SPI Communication Timeout.
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param Flag : SPI flag to check
-  * @param State : flag state to check
-  * @param Timeout : Timeout duration
+  * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
+  *              the configuration information for SPI module.
+  * @param Flag: SPI flag to check
+  * @param State: flag state to check
+  * @param Timeout: Timeout duration
+  * @param Tickstart: tick start value
   * @retval HAL status
   */
-static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout)
+static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State,
+                                                       uint32_t Timeout, uint32_t Tickstart)
 {
-  uint32_t tickstart = HAL_GetTick();
-
-  while((hspi->Instance->SR & Flag) != State)
+  while ((hspi->Instance->SR & Flag) != State)
   {
-    if(Timeout != HAL_MAX_DELAY)
+    if (Timeout != HAL_MAX_DELAY)
     {
-      if((Timeout == 0) || ((HAL_GetTick()-tickstart) >= Timeout))
+      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) >= Timeout))
       {
         /* Disable the SPI and reset the CRC: the CRC value should be cleared
         on both master and slave sides in order to resynchronize the master
@@ -2677,71 +3325,15 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi,
         /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
         __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
 
-        if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
+        if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
+                                                     || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
         {
           /* Disable SPI peripheral */
           __HAL_SPI_DISABLE(hspi);
         }
 
         /* Reset CRC Calculation */
-        if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
-        {
-          SPI_RESET_CRC(hspi);
-        }
-
-        hspi->State= HAL_SPI_STATE_READY;
-
-        /* Process Unlocked */
-        __HAL_UNLOCK(hspi);
-
-        return HAL_TIMEOUT;
-      }
-    }
-  }
-  return HAL_OK;
-}
-
-/**
-  * @brief Handle SPI FIFO Communication Timeout.
-  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
-  *               the configuration information for SPI module.
-  * @param Fifo : Fifo to check
-  * @param State : Fifo state to check
-  * @param Timeout : Timeout duration
-  * @retval HAL status
-  */
-static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout)
-{
-  __IO uint8_t tmpreg;
-  uint32_t tickstart = HAL_GetTick();
-
-  while((hspi->Instance->SR & Fifo) != State)
-  {
-    if((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
-    {
-      tmpreg = *((__IO uint8_t*)&hspi->Instance->DR);
-      UNUSED(tmpreg); /* To avoid GCC warning */
-    }
-
-    if(Timeout != HAL_MAX_DELAY)
-    {
-      if((Timeout == 0) || ((HAL_GetTick()-tickstart) >= Timeout))
-      {
-        /* Disable the SPI and reset the CRC: the CRC value should be cleared
-        on both master and slave sides in order to resynchronize the master
-        and slave for their respective CRC calculation */
-
-        /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
-        __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
-
-        if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
-        {
-          /* Disable SPI peripheral */
-          __HAL_SPI_DISABLE(hspi);
-        }
-
-        /* Reset CRC Calculation */
-        if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+        if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
         {
           SPI_RESET_CRC(hspi);
         }
@@ -2755,37 +3347,102 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi,
       }
     }
   }
+
   return HAL_OK;
 }
 
 /**
-  * @brief Handle the check of the RX transaction complete.
+  * @brief Handle SPI FIFO Communication Timeout.
+  * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
+  *              the configuration information for SPI module.
+  * @param Fifo: Fifo to check
+  * @param State: Fifo state to check
+  * @param Timeout: Timeout duration
+  * @param Tickstart: tick start value
+  * @retval HAL status
+  */
+static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State,
+                                                       uint32_t Timeout, uint32_t Tickstart)
+{
+  __IO uint8_t tmpreg;
+
+  while ((hspi->Instance->SR & Fifo) != State)
+  {
+    if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
+    {
+      tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
+      /* To avoid GCC warning */
+      UNUSED(tmpreg);
+    }
+
+    if (Timeout != HAL_MAX_DELAY)
+    {
+      if ((Timeout == 0) || ((HAL_GetTick() - Tickstart) >= Timeout))
+      {
+        /* Disable the SPI and reset the CRC: the CRC value should be cleared
+           on both master and slave sides in order to resynchronize the master
+           and slave for their respective CRC calculation */
+
+        /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
+        __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
+
+        if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
+                                                     || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
+        {
+          /* Disable SPI peripheral */
+          __HAL_SPI_DISABLE(hspi);
+        }
+
+        /* Reset CRC Calculation */
+        if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+        {
+          SPI_RESET_CRC(hspi);
+        }
+
+        hspi->State = HAL_SPI_STATE_READY;
+
+        /* Process Unlocked */
+        __HAL_UNLOCK(hspi);
+
+        return HAL_TIMEOUT;
+      }
+    }
+  }
+
+  return HAL_OK;
+}
+
+/**
+  * @brief  Handle the check of the RX transaction complete.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
-  * @param Timeout : Timeout duration
-  * @retval None
+  * @param  Timeout: Timeout duration
+  * @param  Tickstart: tick start value
+  * @retval None.
   */
-static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi,  uint32_t Timeout)
+static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi,  uint32_t Timeout, uint32_t Tickstart)
 {
-  if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
+  if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
+                                               || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
   {
     /* Disable SPI peripheral */
     __HAL_SPI_DISABLE(hspi);
   }
 
   /* Control the BSY flag */
-  if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout) != HAL_OK)
+  if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
   {
-    hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
     return HAL_TIMEOUT;
   }
 
-  if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
+  if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
+                                               || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
   {
     /* Empty the FRLVL fifo */
-    if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout) != HAL_OK)
+    if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
     {
-      hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
+      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
       return HAL_TIMEOUT;
     }
   }
@@ -2795,62 +3452,69 @@ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi,  uint32_t
 /**
   * @brief Handle the check of the RXTX or TX transaction complete.
   * @param hspi: SPI handle
-  * @param Timeout : Timeout duration
+  * @param Timeout: Timeout duration
+  * @param Tickstart: tick start value
   */
-static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout)
+static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
 {
-  /* Procedure to check the transaction complete */
-  if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout) != HAL_OK)
+  /* Control if the TX fifo is empty */
+  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
   {
-    hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
-    return HAL_TIMEOUT;
-  }
-  if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout) != HAL_OK)
-  {
-    hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
     return HAL_TIMEOUT;
   }
   /* Control the BSY flag */
-  if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout) != HAL_OK)
+  if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
   {
-    hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
+    return HAL_TIMEOUT;
+  }
+  /* Control if the RX fifo is empty */
+  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
+  {
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
     return HAL_TIMEOUT;
   }
   return HAL_OK;
 }
 
 /**
-  * @brief Handle the end of the RXTX transaction.
+  * @brief  Handle the end of the RXTX transaction.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @retval None
   */
 static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
 {
+  uint32_t tickstart = 0U;
+
+  /* Init tickstart for timeout managment*/
+  tickstart = HAL_GetTick();
+
   /* Disable ERR interrupt */
   __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
 
   /* Check the end of the transaction */
-  if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
+  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
   {
-    hspi->ErrorCode|= HAL_SPI_ERROR_FLAG;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
   }
 
 #if (USE_SPI_CRC != 0U)
   /* Check if CRC error occurred */
-  if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
+  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
   {
     hspi->State = HAL_SPI_STATE_READY;
-    hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
     __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
     HAL_SPI_ErrorCallback(hspi);
   }
   else
   {
-#endif
-    if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
+#endif /* USE_SPI_CRC */
+    if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
     {
-      if(hspi->State == HAL_SPI_STATE_BUSY_RX)
+      if (hspi->State == HAL_SPI_STATE_BUSY_RX)
       {
         hspi->State = HAL_SPI_STATE_READY;
         HAL_SPI_RxCpltCallback(hspi);
@@ -2868,11 +3532,11 @@ static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
     }
 #if (USE_SPI_CRC != 0U)
   }
-#endif
+#endif /* USE_SPI_CRC */
 }
 
 /**
-  * @brief Handle the end of the RX transaction.
+  * @brief  Handle the end of the RX transaction.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @retval None
@@ -2883,23 +3547,24 @@ static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
 
   /* Check the end of the transaction */
-  if(SPI_EndRxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
+  if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
   {
-    hspi->ErrorCode|= HAL_SPI_ERROR_FLAG;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
   }
   hspi->State = HAL_SPI_STATE_READY;
+
 #if (USE_SPI_CRC != 0U)
   /* Check if CRC error occurred */
-  if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
+  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
   {
-    hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
     __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
     HAL_SPI_ErrorCallback(hspi);
   }
   else
   {
-#endif
-    if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
+#endif /* USE_SPI_CRC */
+    if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
     {
       HAL_SPI_RxCpltCallback(hspi);
     }
@@ -2909,34 +3574,39 @@ static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
     }
 #if (USE_SPI_CRC != 0U)
   }
-#endif
+#endif /* USE_SPI_CRC */
 }
 
 /**
-  * @brief Handle the end of the TX transaction.
+  * @brief  Handle the end of the TX transaction.
   * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @retval None
   */
 static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
 {
+  uint32_t tickstart = 0U;
+
+  /* Init tickstart for timeout management*/
+  tickstart = HAL_GetTick();
+
   /* Disable TXE and ERR interrupt */
   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
 
   /* Check the end of the transaction */
-  if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
+  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
   {
-    hspi->ErrorCode|= HAL_SPI_ERROR_FLAG;
+    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
   }
 
   /* Clear overrun flag in 2 Lines communication mode because received is not read */
-  if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
+  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
   {
     __HAL_SPI_CLEAR_OVRFLAG(hspi);
   }
 
   hspi->State = HAL_SPI_STATE_READY;
-  if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
+  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
   {
     HAL_SPI_ErrorCallback(hspi);
   }
@@ -2946,6 +3616,67 @@ static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
   }
 }
 
+/**
+  * @brief  Handle abort a Rx transaction.
+  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
+  *               the configuration information for SPI module.
+  * @retval None
+  */
+static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi)
+{
+  /* Disable SPI Peripheral */
+  __HAL_SPI_DISABLE(hspi);
+
+  /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
+  CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE));
+
+  while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE));
+
+  /* Control the BSY flag */
+  if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+  {
+    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+  }
+
+  /* Empty the FRLVL fifo */
+  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+  {
+    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+  }
+
+  hspi->State = HAL_SPI_STATE_ABORT;
+}
+
+/**
+  * @brief  Handle abort a Tx or Rx/Tx transaction.
+  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
+  *               the configuration information for SPI module.
+  * @retval None
+  */
+static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi)
+{
+  /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
+  CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE));
+
+  while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE));
+
+  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+  {
+    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+  }
+
+  /* Disable SPI Peripheral */
+  __HAL_SPI_DISABLE(hspi);
+
+  /* Empty the FRLVL fifo */
+  if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
+  {
+    hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
+  }
+
+  hspi->State = HAL_SPI_STATE_ABORT;
+}
+
 /**
   * @}
   */
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.h
index c47e8a5b8d..7696bf7963 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_spi.h
@@ -1,9 +1,9 @@
- /**
+/**
   ******************************************************************************
   * @file    stm32f7xx_hal_spi.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SPI HAL module.
   ******************************************************************************
   * @attention
@@ -32,7 +32,7 @@
   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
-  ******************************************************************************  
+  ******************************************************************************
   */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
@@ -40,7 +40,7 @@
 #define __STM32F7xx_HAL_SPI_H
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -64,48 +64,48 @@
   */
 typedef struct
 {
-  uint32_t Mode;                /*!< Specifies the SPI operating mode.
+    uint32_t Mode;                /*!< Specifies the SPI operating mode.
                                      This parameter can be a value of @ref SPI_Mode */
 
-  uint32_t Direction;           /*!< Specifies the SPI bidirectional mode state.
+    uint32_t Direction;           /*!< Specifies the SPI bidirectional mode state.
                                      This parameter can be a value of @ref SPI_Direction */
 
-  uint32_t DataSize;            /*!< Specifies the SPI data size.
+    uint32_t DataSize;            /*!< Specifies the SPI data size.
                                      This parameter can be a value of @ref SPI_Data_Size */
 
-  uint32_t CLKPolarity;         /*!< Specifies the serial clock steady state.
+    uint32_t CLKPolarity;         /*!< Specifies the serial clock steady state.
                                      This parameter can be a value of @ref SPI_Clock_Polarity */
 
-  uint32_t CLKPhase;            /*!< Specifies the clock active edge for the bit capture.
+    uint32_t CLKPhase;            /*!< Specifies the clock active edge for the bit capture.
                                      This parameter can be a value of @ref SPI_Clock_Phase */
 
-  uint32_t NSS;                 /*!< Specifies whether the NSS signal is managed by
+    uint32_t NSS;                 /*!< Specifies whether the NSS signal is managed by
                                      hardware (NSS pin) or by software using the SSI bit.
                                      This parameter can be a value of @ref SPI_Slave_Select_management */
 
-  uint32_t BaudRatePrescaler;   /*!< Specifies the Baud Rate prescaler value which will be
+    uint32_t BaudRatePrescaler;   /*!< Specifies the Baud Rate prescaler value which will be
                                      used to configure the transmit and receive SCK clock.
                                      This parameter can be a value of @ref SPI_BaudRate_Prescaler
                                      @note The communication clock is derived from the master
                                      clock. The slave clock does not need to be set. */
 
-  uint32_t FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
+    uint32_t FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
                                      This parameter can be a value of @ref SPI_MSB_LSB_transmission */
 
-  uint32_t TIMode;              /*!< Specifies if the TI mode is enabled or not .
+    uint32_t TIMode;              /*!< Specifies if the TI mode is enabled or not.
                                      This parameter can be a value of @ref SPI_TI_mode */
 
-  uint32_t CRCCalculation;      /*!< Specifies if the CRC calculation is enabled or not.
+    uint32_t CRCCalculation;      /*!< Specifies if the CRC calculation is enabled or not.
                                      This parameter can be a value of @ref SPI_CRC_Calculation */
 
-  uint32_t CRCPolynomial;       /*!< Specifies the polynomial used for the CRC calculation.
-                                     This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
+    uint32_t CRCPolynomial;       /*!< Specifies the polynomial used for the CRC calculation.
+                                     This parameter must be an odd number between Min_Data = 0 and Max_Data = 65535 */
 
-  uint32_t CRCLength;           /*!< Specifies the CRC Length used for the CRC calculation.
+    uint32_t CRCLength;           /*!< Specifies the CRC Length used for the CRC calculation.
                                      CRC Length is only used with Data8 and Data16, not other data size
                                      This parameter can be a value of @ref SPI_CRC_length */
 
-  uint32_t NSSPMode;            /*!< Specifies whether the NSSP signal is enabled or not .
+    uint32_t NSSPMode;            /*!< Specifies whether the NSSP signal is enabled or not .
                                      This parameter can be a value of @ref SPI_NSSP_Mode
                                      This mode is activated by the NSSP bit in the SPIx_CR2 register and
                                      it takes effect only if the SPI interface is configured as Motorola SPI
@@ -114,57 +114,58 @@ typedef struct
 } SPI_InitTypeDef;
 
 /**
-  * @brief  HAL State structures definition
+  * @brief  HAL SPI State structure definition
   */
 typedef enum
 {
-  HAL_SPI_STATE_RESET      = 0x00U,    /*!< Peripheral not Initialized                         */
-  HAL_SPI_STATE_READY      = 0x01U,    /*!< Peripheral Initialized and ready for use           */
-  HAL_SPI_STATE_BUSY       = 0x02U,    /*!< an internal process is ongoing                     */
-  HAL_SPI_STATE_BUSY_TX    = 0x03U,    /*!< Data Transmission process is ongoing               */
-  HAL_SPI_STATE_BUSY_RX    = 0x04U,    /*!< Data Reception process is ongoing                  */
-  HAL_SPI_STATE_BUSY_TX_RX = 0x05U,    /*!< Data Transmission and Reception process is ongoing*/
-  HAL_SPI_STATE_ERROR      = 0x06U     /*!< SPI error state                                   */
-}HAL_SPI_StateTypeDef;
+    HAL_SPI_STATE_RESET      = 0x00U,    /*!< Peripheral not Initialized                         */
+    HAL_SPI_STATE_READY      = 0x01U,    /*!< Peripheral Initialized and ready for use           */
+    HAL_SPI_STATE_BUSY       = 0x02U,    /*!< an internal process is ongoing                     */
+    HAL_SPI_STATE_BUSY_TX    = 0x03U,    /*!< Data Transmission process is ongoing               */
+    HAL_SPI_STATE_BUSY_RX    = 0x04U,    /*!< Data Reception process is ongoing                  */
+    HAL_SPI_STATE_BUSY_TX_RX = 0x05U,    /*!< Data Transmission and Reception process is ongoing */
+    HAL_SPI_STATE_ERROR      = 0x06U,    /*!< SPI error state                                    */
+    HAL_SPI_STATE_ABORT      = 0x07U     /*!< SPI abort is ongoing                               */
+} HAL_SPI_StateTypeDef;
 
 /**
   * @brief  SPI handle Structure definition
   */
 typedef struct __SPI_HandleTypeDef
 {
-  SPI_TypeDef             *Instance;      /* SPI registers base address     */
+    SPI_TypeDef                *Instance;      /*!< SPI registers base address               */
 
-  SPI_InitTypeDef         Init;           /* SPI communication parameters   */
+    SPI_InitTypeDef            Init;           /*!< SPI communication parameters             */
 
-  uint8_t                 *pTxBuffPtr;    /* Pointer to SPI Tx transfer Buffer */
+    uint8_t                    *pTxBuffPtr;    /*!< Pointer to SPI Tx transfer Buffer        */
 
-  uint16_t                TxXferSize;     /* SPI Tx Transfer size */
+    uint16_t                   TxXferSize;     /*!< SPI Tx Transfer size                     */
 
-  uint16_t                TxXferCount;    /* SPI Tx Transfer Counter */
+    __IO uint16_t              TxXferCount;    /*!< SPI Tx Transfer Counter                  */
 
-  uint8_t                 *pRxBuffPtr;    /* Pointer to SPI Rx transfer Buffer */
+    uint8_t                    *pRxBuffPtr;    /*!< Pointer to SPI Rx transfer Buffer        */
 
-  uint16_t                RxXferSize;     /* SPI Rx Transfer size */
+    uint16_t                   RxXferSize;     /*!< SPI Rx Transfer size                     */
 
-  uint16_t                RxXferCount;    /* SPI Rx Transfer Counter */
+    __IO uint16_t              RxXferCount;    /*!< SPI Rx Transfer Counter                  */
 
-  uint32_t                CRCSize;        /* SPI CRC size used for the transfer */
+    uint32_t                   CRCSize;        /*!< SPI CRC size used for the transfer       */
 
-  void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler   */
+    void (*RxISR)(struct __SPI_HandleTypeDef *hspi);                       /*!< function pointer on Rx ISR */
 
-  void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler   */
+    void (*TxISR)(struct __SPI_HandleTypeDef *hspi);                       /*!< function pointer on Tx ISR */
 
-  DMA_HandleTypeDef       *hdmatx;        /* SPI Tx DMA Handle parameters   */
+    DMA_HandleTypeDef          *hdmatx;        /*!< SPI Tx DMA Handle parameters             */
 
-  DMA_HandleTypeDef       *hdmarx;        /* SPI Rx DMA Handle parameters   */
+    DMA_HandleTypeDef          *hdmarx;        /*!< SPI Rx DMA Handle parameters             */
 
-  HAL_LockTypeDef         Lock;           /* Locking object                 */
+    HAL_LockTypeDef            Lock;           /*!< Locking object                           */
 
-  __IO HAL_SPI_StateTypeDef    State;          /* SPI communication state        */
+    __IO HAL_SPI_StateTypeDef  State;          /*!< SPI communication state                  */
 
-  __IO uint32_t                ErrorCode;      /* SPI Error code                 */
+    __IO uint32_t              ErrorCode;      /*!< SPI Error code                           */
 
-}SPI_HandleTypeDef;
+} SPI_HandleTypeDef;
 
 /**
   * @}
@@ -179,19 +180,18 @@ typedef struct __SPI_HandleTypeDef
 /** @defgroup SPI_Error_Code SPI Error Code
   * @{
   */
-#define HAL_SPI_ERROR_NONE   ((uint32_t)0x00000000U)  /*!< No error                          */
-#define HAL_SPI_ERROR_MODF   ((uint32_t)0x00000001U)  /*!< MODF error                        */
-#define HAL_SPI_ERROR_CRC    ((uint32_t)0x00000002U)  /*!< CRC error                         */
-#define HAL_SPI_ERROR_OVR    ((uint32_t)0x00000004U)  /*!< OVR error                         */
-#define HAL_SPI_ERROR_FRE    ((uint32_t)0x00000008U)  /*!< FRE error                         */
-#define HAL_SPI_ERROR_DMA    ((uint32_t)0x00000010U)  /*!< DMA transfer error                */
-#define HAL_SPI_ERROR_FLAG   ((uint32_t)0x00000020U)  /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
-#define HAL_SPI_ERROR_UNKNOW ((uint32_t)0x00000040U)  /*!< Unknow Error error                */
+#define HAL_SPI_ERROR_NONE              ((uint32_t)0x00000000U)   /*!< No error                               */
+#define HAL_SPI_ERROR_MODF              ((uint32_t)0x00000001U)   /*!< MODF error                             */
+#define HAL_SPI_ERROR_CRC               ((uint32_t)0x00000002U)   /*!< CRC error                              */
+#define HAL_SPI_ERROR_OVR               ((uint32_t)0x00000004U)   /*!< OVR error                              */
+#define HAL_SPI_ERROR_FRE               ((uint32_t)0x00000008U)   /*!< FRE error                              */
+#define HAL_SPI_ERROR_DMA               ((uint32_t)0x00000010U)   /*!< DMA transfer error                     */
+#define HAL_SPI_ERROR_FLAG              ((uint32_t)0x00000020U)   /*!< Error on RXNE/TXE/BSY/FTLVL/FRLVL Flag */
+#define HAL_SPI_ERROR_ABORT             ((uint32_t)0x00000040U)   /*!< Error during SPI Abort procedure       */
 /**
   * @}
   */
 
-
 /** @defgroup SPI_Mode SPI Mode
   * @{
   */
@@ -214,19 +214,19 @@ typedef struct __SPI_HandleTypeDef
 /** @defgroup SPI_Data_Size SPI Data Size
   * @{
   */
-#define SPI_DATASIZE_4BIT               ((uint32_t)0x0300U)
-#define SPI_DATASIZE_5BIT               ((uint32_t)0x0400U)
-#define SPI_DATASIZE_6BIT               ((uint32_t)0x0500U)
-#define SPI_DATASIZE_7BIT               ((uint32_t)0x0600U)
-#define SPI_DATASIZE_8BIT               ((uint32_t)0x0700U)
-#define SPI_DATASIZE_9BIT               ((uint32_t)0x0800U)
-#define SPI_DATASIZE_10BIT              ((uint32_t)0x0900U)
-#define SPI_DATASIZE_11BIT              ((uint32_t)0x0A00U)
-#define SPI_DATASIZE_12BIT              ((uint32_t)0x0B00U)
-#define SPI_DATASIZE_13BIT              ((uint32_t)0x0C00U)
-#define SPI_DATASIZE_14BIT              ((uint32_t)0x0D00U)
-#define SPI_DATASIZE_15BIT              ((uint32_t)0x0E00U)
-#define SPI_DATASIZE_16BIT              ((uint32_t)0x0F00U)
+#define SPI_DATASIZE_4BIT               ((uint32_t)0x00000300U)
+#define SPI_DATASIZE_5BIT               ((uint32_t)0x00000400U)
+#define SPI_DATASIZE_6BIT               ((uint32_t)0x00000500U)
+#define SPI_DATASIZE_7BIT               ((uint32_t)0x00000600U)
+#define SPI_DATASIZE_8BIT               ((uint32_t)0x00000700U)
+#define SPI_DATASIZE_9BIT               ((uint32_t)0x00000800U)
+#define SPI_DATASIZE_10BIT              ((uint32_t)0x00000900U)
+#define SPI_DATASIZE_11BIT              ((uint32_t)0x00000A00U)
+#define SPI_DATASIZE_12BIT              ((uint32_t)0x00000B00U)
+#define SPI_DATASIZE_13BIT              ((uint32_t)0x00000C00U)
+#define SPI_DATASIZE_14BIT              ((uint32_t)0x00000D00U)
+#define SPI_DATASIZE_15BIT              ((uint32_t)0x00000E00U)
+#define SPI_DATASIZE_16BIT              ((uint32_t)0x00000F00U)
 /**
   * @}
   */
@@ -249,7 +249,7 @@ typedef struct __SPI_HandleTypeDef
   * @}
   */
 
-/** @defgroup SPI_Slave_Select_management SPI Slave Select management
+/** @defgroup SPI_Slave_Select_management SPI Slave Select Management
   * @{
   */
 #define SPI_NSS_SOFT                    SPI_CR1_SSM
@@ -283,7 +283,7 @@ typedef struct __SPI_HandleTypeDef
   * @}
   */
 
-/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
+/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
   * @{
   */
 #define SPI_FIRSTBIT_MSB                ((uint32_t)0x00000000U)
@@ -292,7 +292,7 @@ typedef struct __SPI_HandleTypeDef
   * @}
   */
 
-/** @defgroup SPI_TI_mode SPI TI mode
+/** @defgroup SPI_TI_mode SPI TI Mode
   * @{
   */
 #define SPI_TIMODE_DISABLE              ((uint32_t)0x00000000U)
@@ -340,10 +340,7 @@ typedef struct __SPI_HandleTypeDef
   * @}
   */
 
-/** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
-  * @brief SPI Interrupt definition
-  *        Elements values convention: 0xXXXXXXXX
-  *           - XXXXXXXX  : Interrupt control mask
+/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
   * @{
   */
 #define SPI_IT_TXE                      SPI_CR2_TXEIE
@@ -353,23 +350,18 @@ typedef struct __SPI_HandleTypeDef
   * @}
   */
 
-
-/** @defgroup SPI_Flag_definition SPI Flag definition
-  * @brief Flag definition
-  *        Elements values convention: 0xXXXXYYYY
-  *           - XXXX  : Flag register Index
-  *           - YYYY  : Flag mask
+/** @defgroup SPI_Flags_definition SPI Flags Definition
   * @{
   */
-#define SPI_FLAG_RXNE                   SPI_SR_RXNE   /* SPI status flag: Rx buffer not empty flag */
-#define SPI_FLAG_TXE                    SPI_SR_TXE    /* SPI status flag: Tx buffer empty flag */
-#define SPI_FLAG_BSY                    SPI_SR_BSY    /* SPI status flag: Busy flag */
-#define SPI_FLAG_CRCERR                 SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
-#define SPI_FLAG_MODF                   SPI_SR_MODF   /* SPI Error flag: Mode fault flag */
-#define SPI_FLAG_OVR                    SPI_SR_OVR    /* SPI Error flag: Overrun flag */
+#define SPI_FLAG_RXNE                   SPI_SR_RXNE   /* SPI status flag: Rx buffer not empty flag       */
+#define SPI_FLAG_TXE                    SPI_SR_TXE    /* SPI status flag: Tx buffer empty flag           */
+#define SPI_FLAG_BSY                    SPI_SR_BSY    /* SPI status flag: Busy flag                      */
+#define SPI_FLAG_CRCERR                 SPI_SR_CRCERR /* SPI Error flag: CRC error flag                  */
+#define SPI_FLAG_MODF                   SPI_SR_MODF   /* SPI Error flag: Mode fault flag                 */
+#define SPI_FLAG_OVR                    SPI_SR_OVR    /* SPI Error flag: Overrun flag                    */
 #define SPI_FLAG_FRE                    SPI_SR_FRE    /* SPI Error flag: TI mode frame format error flag */
-#define SPI_FLAG_FTLVL                  SPI_SR_FTLVL  /* SPI fifo transmission level */
-#define SPI_FLAG_FRLVL                  SPI_SR_FRLVL  /* SPI fifo reception level */
+#define SPI_FLAG_FTLVL                  SPI_SR_FTLVL  /* SPI fifo transmission level                     */
+#define SPI_FLAG_FRLVL                  SPI_SR_FRLVL  /* SPI fifo reception level                        */
 /**
   * @}
   */
@@ -377,10 +369,10 @@ typedef struct __SPI_HandleTypeDef
 /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
   * @{
   */
-#define SPI_FTLVL_EMPTY           ((uint32_t)0x0000U)
-#define SPI_FTLVL_QUARTER_FULL    ((uint32_t)0x0800U)
-#define SPI_FTLVL_HALF_FULL       ((uint32_t)0x1000U)
-#define SPI_FTLVL_FULL            ((uint32_t)0x1800U)
+#define SPI_FTLVL_EMPTY           ((uint32_t)0x00000000U)
+#define SPI_FTLVL_QUARTER_FULL    ((uint32_t)0x00000800U)
+#define SPI_FTLVL_HALF_FULL       ((uint32_t)0x00001000U)
+#define SPI_FTLVL_FULL            ((uint32_t)0x00001800U)
 
 /**
   * @}
@@ -389,34 +381,31 @@ typedef struct __SPI_HandleTypeDef
 /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
   * @{
   */
-#define SPI_FRLVL_EMPTY           ((uint32_t)0x0000U)
-#define SPI_FRLVL_QUARTER_FULL    ((uint32_t)0x0200U)
-#define SPI_FRLVL_HALF_FULL       ((uint32_t)0x0400U)
-#define SPI_FRLVL_FULL            ((uint32_t)0x0600U)
+#define SPI_FRLVL_EMPTY           ((uint32_t)0x00000000U)
+#define SPI_FRLVL_QUARTER_FULL    ((uint32_t)0x00000200U)
+#define SPI_FRLVL_HALF_FULL       ((uint32_t)0x00000400U)
+#define SPI_FRLVL_FULL            ((uint32_t)0x00000600U)
 /**
   * @}
   */
 
-/**
-  * @}
-  */
-
-/* Exported macros ------------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
 /** @defgroup SPI_Exported_Macros SPI Exported Macros
   * @{
   */
 
-/** @brief  Reset SPI handle state
-  * @param  __HANDLE__: SPI handle.
+/** @brief  Reset SPI handle state.
+  * @param  __HANDLE__: specifies the SPI Handle.
+  *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
   * @retval None
   */
 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
 
-/** @brief  Enables or disables the specified SPI interrupts.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Enable or disable the specified SPI interrupts.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
-  * @param  __INTERRUPT__ : specifies the interrupt source to enable or disable.
-  *        This parameter can be one of the following values:
+  * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
+  *         This parameter can be one of the following values:
   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
   *            @arg SPI_IT_ERR: Error interrupt enable
@@ -425,10 +414,10 @@ typedef struct __SPI_HandleTypeDef
 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__)  ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
 
-/** @brief  Checks if the specified SPI interrupt source is enabled or disabled.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Check whether the specified SPI interrupt source is enabled or not.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
-  * @param  __INTERRUPT__ : specifies the SPI interrupt source to check.
+  * @param  __INTERRUPT__: specifies the SPI interrupt source to check.
   *          This parameter can be one of the following values:
   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
@@ -437,11 +426,11 @@ typedef struct __SPI_HandleTypeDef
   */
 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 
-/** @brief  Checks whether the specified SPI flag is set or not.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Check whether the specified SPI flag is set or not.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
-  * @param  __FLAG__ : specifies the flag to check.
-  *        This parameter can be one of the following values:
+  * @param  __FLAG__: specifies the flag to check.
+  *         This parameter can be one of the following values:
   *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
   *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
   *            @arg SPI_FLAG_CRCERR: CRC error flag
@@ -455,63 +444,60 @@ typedef struct __SPI_HandleTypeDef
   */
 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 
-/** @brief  Clears the SPI CRCERR pending flag.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Clear the SPI CRCERR pending flag.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
   * @retval None
   */
 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
 
-/** @brief  Clears the SPI MODF pending flag.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Clear the SPI MODF pending flag.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
-  *
   * @retval None
   */
-#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)        \
-   do{                                              \
-     __IO uint32_t tmpreg;                          \
-     tmpreg = (__HANDLE__)->Instance->SR;           \
-     (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
-     UNUSED(tmpreg);                                \
-   } while(0)
+#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)       \
+  do{                                              \
+    __IO uint32_t tmpreg_modf = 0x00U;             \
+    tmpreg_modf = (__HANDLE__)->Instance->SR;      \
+    (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
+    UNUSED(tmpreg_modf);                           \
+  } while(0)
 
-/** @brief  Clears the SPI OVR pending flag.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Clear the SPI OVR pending flag.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
-  *
   * @retval None
   */
-#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)         \
-   do{                                              \
-     __IO uint32_t tmpreg;                          \
-     tmpreg = (__HANDLE__)->Instance->DR;           \
-     tmpreg = (__HANDLE__)->Instance->SR;           \
-     UNUSED(tmpreg);                                \
-   } while(0)
+#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)        \
+  do{                                              \
+    __IO uint32_t tmpreg_ovr = 0x00U;              \
+    tmpreg_ovr = (__HANDLE__)->Instance->DR;       \
+    tmpreg_ovr = (__HANDLE__)->Instance->SR;       \
+    UNUSED(tmpreg_ovr);                            \
+  } while(0)
 
-/** @brief  Clears the SPI FRE pending flag.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Clear the SPI FRE pending flag.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
-  *
   * @retval None
   */
-#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__)         \
-   do{                                              \
-     __IO uint32_t tmpreg;                          \
-     tmpreg = (__HANDLE__)->Instance->SR;           \
-     UNUSED(tmpreg);                                \
-   } while(0)
+#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__)        \
+  do{                                              \
+  __IO uint32_t tmpreg_fre = 0x00U;                \
+  tmpreg_fre = (__HANDLE__)->Instance->SR;         \
+  UNUSED(tmpreg_fre);                              \
+  }while(0)
 
-/** @brief  Enables the SPI.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Enable the SPI peripheral.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
   * @retval None
   */
 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |=  SPI_CR1_SPE)
 
-/** @brief  Disables the SPI.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Disable the SPI peripheral.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
   * @retval None
   */
@@ -521,27 +507,27 @@ typedef struct __SPI_HandleTypeDef
   * @}
   */
 
-/* Private macros --------------------------------------------------------*/
-/** @defgroup SPI_Private_Macros   SPI Private Macros
+/* Private macros ------------------------------------------------------------*/
+/** @defgroup SPI_Private_Macros SPI Private Macros
   * @{
   */
 
-/** @brief  Sets the SPI transmit-only mode.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Set the SPI transmit-only mode.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
   * @retval None
   */
 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
 
-/** @brief  Sets the SPI receive-only mode.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Set the SPI receive-only mode.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
   * @retval None
   */
 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
 
-/** @brief  Resets the CRC calculation of the SPI.
-  * @param  __HANDLE__ : specifies the SPI Handle.
+/** @brief  Reset the CRC calculation of the SPI.
+  * @param  __HANDLE__: specifies the SPI Handle.
   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
   * @retval None
   */
@@ -551,14 +537,14 @@ typedef struct __SPI_HandleTypeDef
 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
                            ((MODE) == SPI_MODE_MASTER))
 
-#define IS_SPI_DIRECTION(MODE)   (((MODE) == SPI_DIRECTION_2LINES) || \
-                                  ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
+#define IS_SPI_DIRECTION(MODE)   (((MODE) == SPI_DIRECTION_2LINES)        || \
+                                  ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
                                   ((MODE) == SPI_DIRECTION_1LINE))
 
 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
 
-#define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
-                                                 ((MODE) == SPI_DIRECTION_1LINE))
+#define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
+                                                ((MODE) == SPI_DIRECTION_1LINE))
 
 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
                                    ((DATASIZE) == SPI_DATASIZE_15BIT) || \
@@ -580,19 +566,19 @@ typedef struct __SPI_HandleTypeDef
 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
                            ((CPHA) == SPI_PHASE_2EDGE))
 
-#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
+#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT)       || \
                          ((NSS) == SPI_NSS_HARD_INPUT) || \
                          ((NSS) == SPI_NSS_HARD_OUTPUT))
 
 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
                            ((NSSP) == SPI_NSS_PULSE_DISABLE))
 
-#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
-                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
-                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
-                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
-                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
-                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
+#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2)   || \
+                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_4)   || \
+                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_8)   || \
+                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_16)  || \
+                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_32)  || \
+                                              ((PRESCALER) == SPI_BAUDRATEPRESCALER_64)  || \
                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
                                               ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
 
@@ -609,25 +595,23 @@ typedef struct __SPI_HandleTypeDef
                                    ((LENGTH) == SPI_CRC_LENGTH_8BIT)  ||   \
                                    ((LENGTH) == SPI_CRC_LENGTH_16BIT))
 
-#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF) && (((POLYNOMIAL)&0x1) != 0))
-
+#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFFU) && (((POLYNOMIAL)&0x1U) != 0))
 
 /**
   * @}
   */
 
 /* Exported functions --------------------------------------------------------*/
-/** @addtogroup SPI_Exported_Functions SPI Exported Functions
+/** @addtogroup SPI_Exported_Functions
   * @{
   */
 
 /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
   * @{
   */
-
-/* Initialization and de-initialization functions  ****************************/
+/* Initialization/de-initialization functions  ********************************/
 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
-HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
+HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi);
 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
 /**
@@ -637,20 +621,25 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
 /** @addtogroup SPI_Exported_Functions_Group2 IO operation functions
   * @{
   */
-
-/* IO operation functions *****************************************************/
+/* I/O operation functions  ***************************************************/
 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
+HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
+        uint32_t Timeout);
 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
+        uint16_t Size);
 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
-HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
+HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
+        uint16_t Size);
 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
+/* Transfer Abort functions */
+HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
+HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
 
 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
@@ -660,6 +649,7 @@ void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
+void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
 /**
   * @}
   */
@@ -693,4 +683,7 @@ uint32_t             HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
 
 #endif /* __STM32F7xx_HAL_SPI_H */
 
+/**
+  * @}
+  */
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sram.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sram.c
index 1e516d8f63..39c61de799 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sram.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sram.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sram.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   SRAM HAL module driver.
   *          This file provides a generic firmware to drive SRAM memories  
   *          mounted as external device.
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sram.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sram.h
index 0e65ce0a0c..349e182e1f 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sram.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sram.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_sram.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SRAM HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.c
index 4776fb4e34..e65e9e0c9e 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_tim.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   TIM HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Timer (TIM) peripheral:
@@ -58,10 +58,10 @@
            (++) Encoder mode output : HAL_TIM_Encoder_MspInit()
            
      (#) Initialize the TIM low level resources :
-        (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); 
+        (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); 
         (##) TIM pins configuration
             (+++) Enable the clock for the TIM GPIOs using the following function:
-                 __GPIOx_CLK_ENABLE();   
+                 __HAL_RCC_GPIOx_CLK_ENABLE();   
             (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();  
 
      (#) The external Clock can be configured, if needed (the default clock is the 
@@ -1162,7 +1162,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
   * @brief  Starts the PWM signal generation in interrupt mode.
   * @param  htim: pointer to a TIM_HandleTypeDef structure that contains
   *                the configuration information for TIM module.
-  * @param  Channel: TIM Channel to be disabled.
+  * @param  Channel: TIM Channel to be enabled.
   *          This parameter can be one of the following values:
   *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
   *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.h
index 6439926ecd..00abc539f8 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_tim.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of TIM HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.c
index bdd080b87b..7e53246d8f 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_tim_ex.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   TIM HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Timer extension peripheral:
@@ -42,10 +42,10 @@
            (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit()
            
      (#) Initialize the TIM low level resources :
-        (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); 
+        (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); 
         (##) TIM pins configuration
             (+++) Enable the clock for the TIM GPIOs using the following function:
-                 __GPIOx_CLK_ENABLE();   
+                  __HAL_RCC_GPIOx_CLK_ENABLE();   
             (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();  
 
      (#) The external Clock can be configured, if needed (the default clock is the 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.h
index 23da38fea5..aa9a61defa 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_tim_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of TIM HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart.c
index c34a078046..481ee8dfd5 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_uart.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   UART HAL module driver.
   *          This file provides firmware functions to manage the following
   *          functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
@@ -922,14 +922,11 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData,
     /* Process Unlocked */
     __HAL_UNLOCK(huart);
 
-    /* Enable the UART Parity Error Interrupt */
-    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
-
     /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
     SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 
-    /* Enable the UART Data Register not empty Interrupt */
-    SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE);
+    /* Enable the UART Parity Error and Data Register not empty Interrupts */
+    SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
 
     return HAL_OK;
   }
@@ -1212,7 +1209,9 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
   }
 
   /* If some errors occur */
-  if((errorflags != RESET) && ((cr3its & (USART_CR3_EIE | USART_CR1_PEIE)) != RESET))
+  if(   (errorflags != RESET)
+     && (   ((cr3its & USART_CR3_EIE) != RESET)
+         || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
   {
 
     /* UART parity error interrupt occurred -------------------------------------*/
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart.h
index 766d50b029..66eb4f38c2 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_uart.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of UART HAL module.
   ******************************************************************************
   * @attention
@@ -230,13 +230,13 @@ typedef struct
 
   uint16_t                 TxXferSize;       /*!< UART Tx Transfer size              */
 
-  uint16_t                 TxXferCount;      /*!< UART Tx Transfer Counter           */
+  __IO uint16_t            TxXferCount;      /*!< UART Tx Transfer Counter           */
 
   uint8_t                  *pRxBuffPtr;      /*!< Pointer to UART Rx transfer Buffer */
 
   uint16_t                 RxXferSize;       /*!< UART Rx Transfer size              */
 
-  uint16_t                 RxXferCount;      /*!< UART Rx Transfer Counter           */
+  __IO uint16_t            RxXferCount;      /*!< UART Rx Transfer Counter           */
 
   uint16_t                 Mask;             /*!< UART Rx RDR register mask          */
 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart_ex.h
index efc542fdf1..ba1e1172f4 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_uart_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_uart_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of UART HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart.c
index e710069682..cafd241277 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart.c
@@ -2,10 +2,10 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_usart.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   USART HAL module driver.
-  *          This file provides firmware functions to manage the following 
+  *          This file provides firmware functions to manage the following
   *          functionalities of the Universal Synchronous/Asynchronous Receiver Transmitter
   *          Peripheral (USART).
   *           + Initialization and de-initialization functions
@@ -29,19 +29,19 @@
                 HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
             (+++) Configure the USARTx interrupt priority.
             (+++) Enable the NVIC USART IRQ handle.
-            (+++) The specific USART interrupts (Transmission complete interrupt, 
+            (+++) The specific USART interrupts (Transmission complete interrupt,
                   RXNE interrupt and Error Interrupts) will be managed using the macros
                   __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process.
           (##) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA()
                HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
             (+++) Declare a DMA handle structure for the Tx/Rx stream.
             (+++) Enable the DMAx interface clock.
-            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.                
+            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
             (+++) Configure the DMA Tx/Rx Stream.
             (+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle.
             (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx Stream.
 
-      (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware 
+      (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
           flow control and Mode(Receiver/Transmitter) in the husart Init structure.
 
       (#) Initialize the USART registers by calling the HAL_USART_Init() API:
@@ -221,7 +221,7 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
   /* In Synchronous mode, the following bits must be kept cleared:
   - LINEN bit in the USART_CR2 register
   - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/
-  CLEAR_BIT(husart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
+  CLEAR_BIT(husart->Instance->CR2, USART_CR2_LINEN);
   CLEAR_BIT(husart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 
   /* Enable the Peripheral */
@@ -274,7 +274,7 @@ HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(husart);
- 
+
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_USART_MspInit can be implemented in the user file
    */
@@ -289,7 +289,7 @@ HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(husart);
- 
+
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_USART_MspDeInit can be implemented in the user file
    */
@@ -299,8 +299,8 @@ HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
   * @}
   */
 
-/** @defgroup USART_Exported_Functions_Group2 IO operation functions 
-  *  @brief   USART Transmit and Receive functions 
+/** @defgroup USART_Exported_Functions_Group2 IO operation functions
+  *  @brief   USART Transmit and Receive functions
   *
 @verbatim
  ===============================================================================
@@ -381,7 +381,7 @@ HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxDa
 
     husart->ErrorCode = HAL_USART_ERROR_NONE;
     husart->State = HAL_USART_STATE_BUSY_TX;
-    
+
     /* Init tickstart for timeout managment*/
     tickstart = HAL_GetTick();
 
@@ -452,7 +452,7 @@ HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxDat
 
     husart->ErrorCode = HAL_USART_ERROR_NONE;
     husart->State = HAL_USART_STATE_BUSY_RX;
-	
+
 	/* Init tickstart for timeout managment*/
     tickstart = HAL_GetTick();
 
@@ -535,7 +535,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t
 
     husart->ErrorCode = HAL_USART_ERROR_NONE;
     husart->State = HAL_USART_STATE_BUSY_RX;
-	
+
 	/* Init tickstart for timeout managment*/
     tickstart = HAL_GetTick();
 
@@ -675,15 +675,12 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx
     husart->ErrorCode = HAL_USART_ERROR_NONE;
     husart->State = HAL_USART_STATE_BUSY_RX;
 
-    /* Enable the USART Parity Error Interrupt */
-    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
+    /* Enable the USART Parity Error and Data Register not empty Interrupts */
+    SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
 
     /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
     SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
 
-    /* Enable the USART Data Register not empty Interrupt */
-    SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
-
     /* Process Unlocked */
     __HAL_UNLOCK(husart);
 
@@ -801,14 +798,14 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *p
     /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
     SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
     SET_BIT(husart->Instance->ISR, (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE | USART_ISR_ORE));
-  
+
     /* Enable the USART transmit DMA channel */
     tmp = (uint32_t*)&pTxData;
     HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
 
     /* Clear the TC flag in the SR register by writing 0 to it */
     __HAL_USART_CLEAR_IT(husart, USART_FLAG_TC);
-    
+
     /* Process Unlocked */
     __HAL_UNLOCK(husart);
 
@@ -864,15 +861,15 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR
 
     /* Set the USART DMA Rx transfer error callback */
     husart->hdmarx->XferErrorCallback = USART_DMAError;
-    
+
     /* Set the DMA abort callback */
     husart->hdmatx->XferAbortCallback = NULL;
-	
+
 	/* Set the USART Tx DMA transfer complete callback as NULL because the communication closing
     is performed in DMA reception complete callback  */
     husart->hdmatx->XferHalfCpltCallback = NULL;
     husart->hdmatx->XferCpltCallback = NULL;
-    
+
     /* Set the DMA error callback */
     husart->hdmatx->XferErrorCallback = USART_DMAError;
 
@@ -888,13 +885,13 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR
        to generate in the non-blocking mode the clock to the slave device,
        this mode isn't a simplex receive mode but a full-duplex receive mode */
     HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size);
-    
+
     /* Process Unlocked */
     __HAL_UNLOCK(husart);
-    
+
     /* Enable the USART Parity Error Interrupt */
     SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-    
+
     /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
     SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
 
@@ -916,7 +913,7 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR
 }
 
 /**
-  * @brief Full-Duplex Transmit Receive an amount of data in non blocking mode 
+  * @brief Full-Duplex Transmit Receive an amount of data in non blocking mode
   * @param husart: USART handle
   * @param pTxData: pointer to TX data buffer
   * @param pRxData: pointer to RX data buffer
@@ -977,13 +974,13 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin
 
     /* Clear the TC flag in the SR register by writing 0 to it */
     __HAL_USART_CLEAR_IT(husart, USART_FLAG_TC);
-    
+
     /* Process Unlocked */
     __HAL_UNLOCK(husart);
-    
+
     /* Enable the USART Parity Error Interrupt */
     SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-    
+
     /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
     SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
 
@@ -1059,7 +1056,7 @@ HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
   {
     /* Clear the Overrun flag before resuming the Rx transfer*/
     __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF);
-    
+
     /* Reenable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
     SET_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
     SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
@@ -1094,9 +1091,9 @@ HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
 {
   /* The Lock is not implemented on this API to allow the user application
      to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback() /
-     HAL_USART_TxHalfCpltCallback / HAL_USART_RxHalfCpltCallback: 
-     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete  
-     interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of 
+     HAL_USART_TxHalfCpltCallback / HAL_USART_RxHalfCpltCallback:
+     indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
+     interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
      the stream and the corresponding call back is executed. */
 
   /* Stop USART DMA Tx request if ongoing */
@@ -1104,33 +1101,33 @@ HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
       (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT)))
   {
     USART_EndTxTransfer(husart);
-    
+
     /* Abort the USART DMA Tx channel */
     if(husart->hdmatx != NULL)
     {
       HAL_DMA_Abort(husart->hdmatx);
     }
-    
+
     /* Disable the USART Tx DMA request */
     CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
   }
-  
+
   /* Stop USART DMA Rx request if ongoing */
   if ((husart->State == HAL_USART_STATE_BUSY_RX) &&
       (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)))
   {
     USART_EndRxTransfer(husart);
-    
+
     /* Abort the USART DMA Rx channel */
     if(husart->hdmarx != NULL)
     {
       HAL_DMA_Abort(husart->hdmarx);
     }
-    
+
     /* Disable the USART Rx DMA request */
     CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
   }
-  
+
   return HAL_OK;
 }
 
@@ -1145,7 +1142,7 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
   uint32_t cr1its   = READ_REG(husart->Instance->CR1);
   uint32_t cr3its   = READ_REG(husart->Instance->CR3);
   uint32_t errorflags;
-  
+
   /* If no error occurs */
   errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
   if (errorflags == RESET)
@@ -1163,39 +1160,41 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
       }
     }
   }
-  
+
   /* If some errors occur */
-  if((errorflags != RESET) && ((cr3its & (USART_CR3_EIE | USART_CR1_PEIE)) != RESET))
+  if(   (errorflags != RESET)
+     && (   ((cr3its & USART_CR3_EIE) != RESET)
+         || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) )
   {
-    
+
     /* USART parity error interrupt occurred ------------------------------------*/
     if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
     {
       __HAL_USART_CLEAR_IT(husart, USART_CLEAR_PEF);
       husart->ErrorCode |= HAL_USART_ERROR_PE;
     }
-    
+
     /* USART frame error interrupt occurred -------------------------------------*/
     if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
     {
       __HAL_USART_CLEAR_IT(husart, USART_CLEAR_FEF);
       husart->ErrorCode |= HAL_USART_ERROR_FE;
     }
-    
+
     /* USART noise error interrupt occurred -------------------------------------*/
     if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
     {
       __HAL_USART_CLEAR_IT(husart, USART_CLEAR_NEF);
       husart->ErrorCode |= HAL_USART_ERROR_NE;
     }
-    
+
     /* USART Over-Run interrupt occurred ----------------------------------------*/
     if(((isrflags & USART_ISR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
     {
       __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF);
       husart->ErrorCode |= HAL_USART_ERROR_ORE;
     }
-    
+
     /* Call USART Error Call back function if need be --------------------------*/
     if(husart->ErrorCode != HAL_USART_ERROR_NONE)
     {
@@ -1204,29 +1203,29 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
       {
         USART_Receive_IT(husart);
       }
-      
+
       /* If Overrun error occurs, or if any error occurs in DMA mode reception,
       consider error as blocking */
       if (((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) ||
           (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)))
-      {  
+      {
         /* Blocking error : transfer is aborted
         Set the USART state ready to be able to start again the process,
         Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
         USART_EndRxTransfer(husart);
-        
+
         /* Disable the USART DMA Rx request if enabled */
         if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
         {
           CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
-          
+
           /* Abort the USART DMA Rx channel */
           if(husart->hdmarx != NULL)
-          {            
-            /* Set the USART DMA Abort callback : 
+          {
+            /* Set the USART DMA Abort callback :
             will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
             husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError;
-            
+
             /* Abort DMA RX */
             if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
             {
@@ -1248,16 +1247,16 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
       }
       else
       {
-        /* Non Blocking error : transfer could go on. 
+        /* Non Blocking error : transfer could go on.
         Error is notified to user through user error callback */
         HAL_USART_ErrorCallback(husart);
         husart->ErrorCode = HAL_USART_ERROR_NONE;
       }
     }
     return;
-    
+
   } /* End if some error occurs */
-  
+
   /* USART in mode Transmitter -----------------------------------------------*/
   if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
   {
@@ -1271,7 +1270,7 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
     }
     return;
   }
-  
+
   /* USART in mode Transmitter (transmission end) -----------------------------*/
   if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
   {
@@ -1289,10 +1288,10 @@ __weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(husart);
- 
+
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_USART_TxCpltCallback can be implemented in the user file
-   */ 
+   */
 }
 
 /**
@@ -1304,7 +1303,7 @@ __weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(husart);
- 
+
   /* NOTE: This function should not be modified, when the callback is needed,
            the HAL_USART_TxHalfCpltCallback can be implemented in the user file
    */
@@ -1319,7 +1318,7 @@ __weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(husart);
- 
+
   /* NOTE: This function should not be modified, when the callback is needed,
            the HAL_USART_RxCpltCallback can be implemented in the user file
    */
@@ -1334,7 +1333,7 @@ __weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(husart);
- 
+
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_USART_RxHalfCpltCallback can be implemented in the user file
    */
@@ -1349,7 +1348,7 @@ __weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(husart);
- 
+
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_USART_TxRxCpltCallback can be implemented in the user file
    */
@@ -1364,31 +1363,31 @@ __weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(husart);
- 
+
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_USART_ErrorCallback can be implemented in the user file
-   */ 
+   */
 }
 
 /**
   * @}
   */
 
-/** @defgroup USART_Exported_Functions_Group3 Peripheral State and Errors functions 
-  *  @brief   USART State and Errors functions 
+/** @defgroup USART_Exported_Functions_Group3 Peripheral State and Errors functions
+  *  @brief   USART State and Errors functions
   *
-@verbatim   
+@verbatim
   ==============================================================================
                   ##### Peripheral State and Errors functions #####
-  ==============================================================================  
+  ==============================================================================
   [..]
-    This subsection provides a set of functions allowing to return the State of 
+    This subsection provides a set of functions allowing to return the State of
     USART communication
     process, return Peripheral Errors occurred during communication process
-     (+) HAL_USART_GetState() API can be helpful to check in run-time the state 
+     (+) HAL_USART_GetState() API can be helpful to check in run-time the state
          of the USART peripheral.
-     (+) HAL_USART_GetError() check in run-time errors that could be occurred during 
-         communication. 
+     (+) HAL_USART_GetError() check in run-time errors that could be occurred during
+         communication.
 @endverbatim
   * @{
   */
@@ -1417,7 +1416,7 @@ uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
 /**
   * @}
   */
-  
+
 
 /**
   * @brief  Simplex Send an amount of data in non-blocking mode.
@@ -1454,7 +1453,7 @@ static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
       }
       else
       {
-        husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFF);       
+        husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFF);
       }
 
       husart->TxXferCount--;
@@ -1545,7 +1544,7 @@ static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
 /**
   * @brief  Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
   *         Function called under interruption only, once
-  *         interruptions have been enabled by HAL_USART_TransmitReceive_IT()     
+  *         interruptions have been enabled by HAL_USART_TransmitReceive_IT()
   * @param  husart: USART handle
   * @retval HAL status
   */
@@ -1633,7 +1632,7 @@ static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
   * @param  Timeout Timeout duration
   * @retval HAL status
   */
-static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)  
+static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
 {
   /* Wait until flag is set */
   while((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
@@ -1645,21 +1644,21 @@ static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husar
       {
         /* Disable the USART Transmit Complete Interrupt */
         CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
-        
+
         /* Disable the USART RXNE Interrupt */
         CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
-        
+
         /* Disable the USART Parity Error Interrupt */
         CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
-        
+
         /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
         CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
-        
+
         husart->State= HAL_USART_STATE_READY;
-        
+
         /* Process Unlocked */
         __HAL_UNLOCK(husart);
-        
+
         return HAL_TIMEOUT;
       }
     }
@@ -1679,7 +1678,7 @@ static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
 
   /* DMA Normal mode */
   if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
-  { 
+  {
     husart->TxXferCount = 0U;
 
     if(husart->State == HAL_USART_STATE_BUSY_TX)
@@ -1726,9 +1725,9 @@ static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
 
   /* DMA Normal mode */
   if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
-  { 
+  {
     husart->RxXferCount = 0U;
-    
+
     /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
     CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
     CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
@@ -1789,21 +1788,21 @@ static void USART_DMAError(DMA_HandleTypeDef *hdma)
 
   husart->RxXferCount = 0U;
   husart->TxXferCount = 0U;
-  
+
   /* Stop USART DMA Tx request if ongoing */
   if((husart->State == HAL_USART_STATE_BUSY_TX)
      &&(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT)))
   {
     USART_EndTxTransfer(husart);
   }
-  
+
   /* Stop USART DMA Rx request if ongoing */
   if((husart->State == HAL_USART_STATE_BUSY_RX)
      &&(HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)))
   {
     USART_EndRxTransfer(husart);
   }
-  
+
   husart->ErrorCode |= HAL_USART_ERROR_DMA;
   husart->State= HAL_USART_STATE_READY;
 
@@ -1821,7 +1820,7 @@ static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
   USART_HandleTypeDef* husart = (USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
   husart->RxXferCount = 0U;
   husart->TxXferCount = 0U;
-  
+
   HAL_USART_ErrorCallback(husart);
 }
 
@@ -1834,7 +1833,7 @@ static void USART_EndTxTransfer(USART_HandleTypeDef *husart)
 {
   /* At end of Tx process, restore husart->State to Ready */
   husart->State = HAL_USART_STATE_READY;
-  
+
   /* Disable TXEIE and TCIE interrupts */
   CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
 }
@@ -1848,14 +1847,14 @@ static void USART_EndRxTransfer(USART_HandleTypeDef *husart)
 {
   /* At end of Rx process, restore husart->RxState to Ready */
   husart->State = HAL_USART_STATE_READY;
-  
+
   /* Disable RXNE, PE and ERR interrupts */
   CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
   CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
 }
 
 /**
-  * @brief Configure the USART peripheral 
+  * @brief Configure the USART peripheral
   * @param husart: USART handle
   * @retval None
   */
@@ -1866,36 +1865,36 @@ static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
   HAL_StatusTypeDef ret                = HAL_OK;
   uint16_t brrtemp                     = 0x0000U;
   uint16_t usartdiv                    = 0x0000U;
-  
+
   /* Check the parameters */
   assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
   assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
   assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
-  assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));  
+  assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
   assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
   assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
   assert_param(IS_USART_PARITY(husart->Init.Parity));
   assert_param(IS_USART_MODE(husart->Init.Mode));
-  assert_param(IS_USART_OVERSAMPLING(husart->Init.OverSampling));   
+  assert_param(IS_USART_OVERSAMPLING(husart->Init.OverSampling));
 
 
   /*-------------------------- USART CR1 Configuration -----------------------*/
-   /* Clear M, PCE, PS, TE and RE bits and configure       
-   *  the USART Word Length, Parity, Mode and OverSampling: 
-   *  set the M bits according to husart->Init.WordLength value 
+   /* Clear M, PCE, PS, TE and RE bits and configure
+   *  the USART Word Length, Parity, Mode and OverSampling:
+   *  set the M bits according to husart->Init.WordLength value
    *  set PCE and PS bits according to husart->Init.Parity value
    *  set TE and RE bits according to husart->Init.Mode value
    *  force OVER8 to 1 to allow to reach the maximum speed (Fclock/8) */
   tmpreg = (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8;
   MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
-  
+
   /*---------------------------- USART CR2 Configuration ---------------------*/
   /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits:
    * set CPOL bit according to husart->Init.CLKPolarity value
    * set CPHA bit according to husart->Init.CLKPhase value
    * set LBCL bit according to husart->Init.CLKLastBit value
    * set STOP[13:12] bits according to husart->Init.StopBits value */
-  tmpreg = (uint32_t)(USART_CLOCK_ENABLE); 
+  tmpreg = (uint32_t)(USART_CLOCK_ENABLE);
   tmpreg |= ((uint32_t)husart->Init.CLKPolarity | (uint32_t)husart->Init.CLKPhase);
   tmpreg |= ((uint32_t)husart->Init.CLKLastBit | (uint32_t)husart->Init.StopBits);
   MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg);
@@ -1927,13 +1926,13 @@ static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
     default:
       ret = HAL_ERROR;
       break;
-  } 
-  
+  }
+
   brrtemp = usartdiv & 0xFFF0U;
   brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
   husart->Instance->BRR = brrtemp;
-  
-  return ret; 
+
+  return ret;
 }
 
 /**
@@ -1944,41 +1943,41 @@ static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart)
 static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart)
 {
   uint32_t tickstart = 0U;
-	
+
    /* Initialize the USART ErrorCode */
   husart->ErrorCode = HAL_USART_ERROR_NONE;
-  
+
   /* Init tickstart for timeout managment*/
   tickstart = HAL_GetTick();
-  
+
   /* Check if the Transmitter is enabled */
   if((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
   {
     /* Wait until TEACK flag is set */
-    if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)  
-    { 
-      husart->State= HAL_USART_STATE_TIMEOUT;      
+    if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)
+    {
+      husart->State= HAL_USART_STATE_TIMEOUT;
       return HAL_TIMEOUT;
-    } 
+    }
   }
   /* Check if the Receiver is enabled */
   if((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
   {
     /* Wait until REACK flag is set */
-    if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)  
-    { 
-      husart->State= HAL_USART_STATE_TIMEOUT;       
+    if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)
+    {
+      husart->State= HAL_USART_STATE_TIMEOUT;
       return HAL_TIMEOUT;
     }
   }
-  
+
   /* Initialize the USART state*/
   husart->State= HAL_USART_STATE_READY;
-  
+
   /* Process Unlocked */
   __HAL_UNLOCK(husart);
-  
-  return HAL_OK;  
+
+  return HAL_OK;
 }
 
 /**
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart.h
index 09e5567eb4..fb23f132fa 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_usart.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of USART HAL module.
   ******************************************************************************
   * @attention
@@ -141,13 +141,13 @@ typedef struct
 
   uint16_t                      TxXferSize;       /*!< USART Tx Transfer size              */
 
-  uint16_t                      TxXferCount;      /*!< USART Tx Transfer Counter           */
+  __IO uint16_t                 TxXferCount;      /*!< USART Tx Transfer Counter           */
 
   uint8_t                       *pRxBuffPtr;      /*!< Pointer to USART Rx transfer Buffer */
 
   uint16_t                      RxXferSize;       /*!< USART Rx Transfer size              */
 
-  uint16_t                      RxXferCount;      /*!< USART Rx Transfer Counter           */
+  __IO uint16_t                 RxXferCount;      /*!< USART Rx Transfer Counter           */
 
   uint16_t                      Mask;             /*!< USART Rx RDR register mask          */
 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart_ex.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart_ex.h
index ac9a38c9aa..4a80f8893b 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart_ex.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_usart_ex.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_usart_ex.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of USART HAL Extension module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_wwdg.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_wwdg.c
index 970d86ac6f..25bc8e451a 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_wwdg.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_wwdg.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_wwdg.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   WWDG HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Window Watchdog (WWDG) peripheral:
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_wwdg.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_wwdg.h
index 92254cd6ca..e4628b8f39 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_wwdg.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_wwdg.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_wwdg.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of WWDG HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_fmc.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_fmc.c
index b37978b61c..553408fcc8 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_fmc.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_fmc.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_ll_fmc.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   FMC Low Layer HAL module driver.
   *    
   *          This file provides firmware functions to manage the following 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_fmc.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_fmc.h
index 717c4f7b51..cf64d2aa9b 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_fmc.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_fmc.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_ll_fmc.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of FMC HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_sdmmc.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_sdmmc.c
index 37f92c5aeb..944f2e7c74 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_sdmmc.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_sdmmc.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_ll_sdmmc.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   SDMMC Low Layer HAL module driver.
   *    
   *          This file provides firmware functions to manage the following 
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_sdmmc.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_sdmmc.h
index 0e4a4b8a07..01c7f673c7 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_sdmmc.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_sdmmc.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_ll_sdmmc.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of SDMMC HAL module.
   ******************************************************************************
   * @attention
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.c
index b8593ef562..e1ca138546 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.c
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_ll_usb.c
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   USB Low Layer HAL module driver.
   *    
   *          This file provides firmware functions to manage the following 
@@ -703,6 +703,9 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD
     
     }
     
+    /* EP enable, IN data in FIFO */
+    USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
+    
     if (dma == 1)
     {
       USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
@@ -710,14 +713,11 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD
     else
     {
       /* Enable the Tx FIFO Empty Interrupt for this EP */
-      if (ep->xfer_len > 0)
+      if (ep->xfer_len > 0U)
       {
-        atomic_set_u32(&USBx_DEVICE->DIEPEMPMSK,  1 << (ep->num));
+        USBx_DEVICE->DIEPEMPMSK |= 1 << (ep->num);
       }
-    }
-    
-    /* EP enable, IN data in FIFO */
-    USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);   
+    }  
   }
   else /* OUT endpoint */
   {
@@ -1227,9 +1227,10 @@ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
   __IO uint32_t hprt0;
   
   hprt0 = USBx_HPRT0;
+  hprt0 |= USB_OTG_HPRT_PENA ;
   
-  hprt0 &= ~(USB_OTG_HPRT_PENA    | USB_OTG_HPRT_PCDET |\
-    USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
+  hprt0 &= ~(USB_OTG_HPRT_PCDET | USB_OTG_HPRT_PENCHNG |\
+             USB_OTG_HPRT_POCCHNG );
   
   USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);  
   HAL_Delay (10);                                /* See Note #1 */
@@ -1250,8 +1251,10 @@ HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
   __IO uint32_t hprt0;
 
   hprt0 = USBx_HPRT0;
-  hprt0 &= ~(USB_OTG_HPRT_PENA    | USB_OTG_HPRT_PCDET |\
-                         USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
+  hprt0 |= USB_OTG_HPRT_PENA ;
+  
+  hprt0 &= ~(USB_OTG_HPRT_PCDET | USB_OTG_HPRT_PENCHNG |\
+             USB_OTG_HPRT_POCCHNG );
   
   if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 ))
   {
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.h
index 51947f3203..7e24022f40 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.h
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_usb.h
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f7xx_ll_usb.h
   * @author  MCD Application Team
-  * @version V1.1.0
-  * @date    22-April-2016
+  * @version V1.1.2
+  * @date    23-September-2016 
   * @brief   Header file of USB Core HAL module.
   ******************************************************************************
   * @attention