mirror of https://github.com/ARMmbed/mbed-os.git
commit
e009d9f7be
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@ -655,6 +655,10 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
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hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
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}
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if (hspi->Init.Direction == SPI_DIRECTION_1LINE) {
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__HAL_SPI_DISABLE(hspi);
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}
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/* Clear overrun flag in 2 Lines communication mode because received is not read */
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if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
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{
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@ -63,6 +63,9 @@
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# define DEBUG_PRINTF(...) {}
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#endif
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/* Consider 10ms as the default timeout for sending/receving 1 byte */
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#define TIMEOUT_1_BYTE 10
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void init_spi(spi_t *obj)
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{
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struct spi_s *spiobj = SPI_S(obj);
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@ -75,7 +78,14 @@ void init_spi(spi_t *obj)
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error("Cannot initialize SPI");
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}
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__HAL_SPI_ENABLE(handle);
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/* In case of standard 4 wires SPI,PI can be kept enabled all time
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* and SCK will only be generated during the write operations. But in case
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* of 3 wires, it should be only enabled during rd/wr unitary operations,
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* which is handled inside STM32 HAL layer.
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*/
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if (handle->Init.Direction == SPI_DIRECTION_2LINES) {
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__HAL_SPI_ENABLE(handle);
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}
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}
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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@ -156,7 +166,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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handle->Instance = SPI_INST(obj);
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handle->Init.Mode = SPI_MODE_MASTER;
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handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
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handle->Init.Direction = SPI_DIRECTION_2LINES;
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if (miso != NC) {
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handle->Init.Direction = SPI_DIRECTION_2LINES;
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} else {
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handle->Init.Direction = SPI_DIRECTION_1LINE;
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}
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handle->Init.CLKPhase = SPI_PHASE_1EDGE;
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handle->Init.CLKPolarity = SPI_POLARITY_LOW;
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handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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@ -353,6 +369,10 @@ int spi_master_write(spi_t *obj, int value)
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struct spi_s *spiobj = SPI_S(obj);
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SPI_HandleTypeDef *handle = &(spiobj->handle);
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if (handle->Init.Direction == SPI_DIRECTION_1LINE) {
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return HAL_SPI_Transmit(handle, (uint8_t*)&value, 1, TIMEOUT_1_BYTE);
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}
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#if defined(LL_SPI_RX_FIFO_TH_HALF)
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/* Configure the default data size */
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if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
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@ -390,13 +410,31 @@ int spi_master_write(spi_t *obj, int value)
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int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
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char *rx_buffer, int rx_length, char write_fill)
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{
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struct spi_s *spiobj = SPI_S(obj);
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SPI_HandleTypeDef *handle = &(spiobj->handle);
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int total = (tx_length > rx_length) ? tx_length : rx_length;
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for (int i = 0; i < total; i++) {
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char out = (i < tx_length) ? tx_buffer[i] : write_fill;
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char in = spi_master_write(obj, out);
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if (i < rx_length) {
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rx_buffer[i] = in;
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int i = 0;
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if (handle->Init.Direction == SPI_DIRECTION_2LINES) {
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for (i = 0; i < total; i++) {
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char out = (i < tx_length) ? tx_buffer[i] : write_fill;
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char in = spi_master_write(obj, out);
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if (i < rx_length) {
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rx_buffer[i] = in;
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}
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}
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} else {
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/* In case of 1 WIRE only, first handle TX, then Rx */
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if (tx_length != 0) {
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if (HAL_OK != HAL_SPI_Transmit(handle, (uint8_t*)tx_buffer, tx_length, tx_length*TIMEOUT_1_BYTE)) {
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/* report an error */
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total = 0;
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}
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}
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if (rx_length != 0) {
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if (HAL_OK != HAL_SPI_Receive(handle, (uint8_t*)rx_buffer, rx_length, rx_length*TIMEOUT_1_BYTE)) {
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/* report an error */
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total = 0;
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}
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}
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}
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@ -410,17 +448,13 @@ int spi_slave_receive(spi_t *obj)
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int spi_slave_read(spi_t *obj)
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{
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SPI_TypeDef *spi = SPI_INST(obj);
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struct spi_s *spiobj = SPI_S(obj);
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SPI_HandleTypeDef *handle = &(spiobj->handle);
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while (!ssp_readable(obj));
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if (handle->Init.DataSize == SPI_DATASIZE_8BIT) {
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// Force 8-bit access to the data register
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uint8_t *p_spi_dr = 0;
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p_spi_dr = (uint8_t *) & (spi->DR);
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return (int)(*p_spi_dr);
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if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
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return LL_SPI_ReceiveData16(SPI_INST(obj));
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} else {
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return (int)spi->DR;
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return LL_SPI_ReceiveData8(SPI_INST(obj));
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}
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}
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