Merge pull request #4975 from LMESTM/STM32_SPI3W

Stm32 spi 3 wires mode support
pull/4968/head
Jimmy Brisson 2017-09-05 11:16:53 -05:00 committed by GitHub
commit e009d9f7be
2 changed files with 53 additions and 15 deletions

View File

@ -655,6 +655,10 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint
hspi->ErrorCode = HAL_SPI_ERROR_FLAG; hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
} }
if (hspi->Init.Direction == SPI_DIRECTION_1LINE) {
__HAL_SPI_DISABLE(hspi);
}
/* Clear overrun flag in 2 Lines communication mode because received is not read */ /* Clear overrun flag in 2 Lines communication mode because received is not read */
if (hspi->Init.Direction == SPI_DIRECTION_2LINES) if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
{ {

View File

@ -63,6 +63,9 @@
# define DEBUG_PRINTF(...) {} # define DEBUG_PRINTF(...) {}
#endif #endif
/* Consider 10ms as the default timeout for sending/receving 1 byte */
#define TIMEOUT_1_BYTE 10
void init_spi(spi_t *obj) void init_spi(spi_t *obj)
{ {
struct spi_s *spiobj = SPI_S(obj); struct spi_s *spiobj = SPI_S(obj);
@ -75,7 +78,14 @@ void init_spi(spi_t *obj)
error("Cannot initialize SPI"); error("Cannot initialize SPI");
} }
__HAL_SPI_ENABLE(handle); /* In case of standard 4 wires SPI,PI can be kept enabled all time
* and SCK will only be generated during the write operations. But in case
* of 3 wires, it should be only enabled during rd/wr unitary operations,
* which is handled inside STM32 HAL layer.
*/
if (handle->Init.Direction == SPI_DIRECTION_2LINES) {
__HAL_SPI_ENABLE(handle);
}
} }
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
@ -156,7 +166,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
handle->Instance = SPI_INST(obj); handle->Instance = SPI_INST(obj);
handle->Init.Mode = SPI_MODE_MASTER; handle->Init.Mode = SPI_MODE_MASTER;
handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256; handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
handle->Init.Direction = SPI_DIRECTION_2LINES;
if (miso != NC) {
handle->Init.Direction = SPI_DIRECTION_2LINES;
} else {
handle->Init.Direction = SPI_DIRECTION_1LINE;
}
handle->Init.CLKPhase = SPI_PHASE_1EDGE; handle->Init.CLKPhase = SPI_PHASE_1EDGE;
handle->Init.CLKPolarity = SPI_POLARITY_LOW; handle->Init.CLKPolarity = SPI_POLARITY_LOW;
handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
@ -353,6 +369,10 @@ int spi_master_write(spi_t *obj, int value)
struct spi_s *spiobj = SPI_S(obj); struct spi_s *spiobj = SPI_S(obj);
SPI_HandleTypeDef *handle = &(spiobj->handle); SPI_HandleTypeDef *handle = &(spiobj->handle);
if (handle->Init.Direction == SPI_DIRECTION_1LINE) {
return HAL_SPI_Transmit(handle, (uint8_t*)&value, 1, TIMEOUT_1_BYTE);
}
#if defined(LL_SPI_RX_FIFO_TH_HALF) #if defined(LL_SPI_RX_FIFO_TH_HALF)
/* Configure the default data size */ /* Configure the default data size */
if (handle->Init.DataSize == SPI_DATASIZE_16BIT) { if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
@ -390,13 +410,31 @@ int spi_master_write(spi_t *obj, int value)
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
char *rx_buffer, int rx_length, char write_fill) char *rx_buffer, int rx_length, char write_fill)
{ {
struct spi_s *spiobj = SPI_S(obj);
SPI_HandleTypeDef *handle = &(spiobj->handle);
int total = (tx_length > rx_length) ? tx_length : rx_length; int total = (tx_length > rx_length) ? tx_length : rx_length;
int i = 0;
for (int i = 0; i < total; i++) { if (handle->Init.Direction == SPI_DIRECTION_2LINES) {
char out = (i < tx_length) ? tx_buffer[i] : write_fill; for (i = 0; i < total; i++) {
char in = spi_master_write(obj, out); char out = (i < tx_length) ? tx_buffer[i] : write_fill;
if (i < rx_length) { char in = spi_master_write(obj, out);
rx_buffer[i] = in; if (i < rx_length) {
rx_buffer[i] = in;
}
}
} else {
/* In case of 1 WIRE only, first handle TX, then Rx */
if (tx_length != 0) {
if (HAL_OK != HAL_SPI_Transmit(handle, (uint8_t*)tx_buffer, tx_length, tx_length*TIMEOUT_1_BYTE)) {
/* report an error */
total = 0;
}
}
if (rx_length != 0) {
if (HAL_OK != HAL_SPI_Receive(handle, (uint8_t*)rx_buffer, rx_length, rx_length*TIMEOUT_1_BYTE)) {
/* report an error */
total = 0;
}
} }
} }
@ -410,17 +448,13 @@ int spi_slave_receive(spi_t *obj)
int spi_slave_read(spi_t *obj) int spi_slave_read(spi_t *obj)
{ {
SPI_TypeDef *spi = SPI_INST(obj);
struct spi_s *spiobj = SPI_S(obj); struct spi_s *spiobj = SPI_S(obj);
SPI_HandleTypeDef *handle = &(spiobj->handle); SPI_HandleTypeDef *handle = &(spiobj->handle);
while (!ssp_readable(obj)); while (!ssp_readable(obj));
if (handle->Init.DataSize == SPI_DATASIZE_8BIT) { if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
// Force 8-bit access to the data register return LL_SPI_ReceiveData16(SPI_INST(obj));
uint8_t *p_spi_dr = 0;
p_spi_dr = (uint8_t *) & (spi->DR);
return (int)(*p_spi_dr);
} else { } else {
return (int)spi->DR; return LL_SPI_ReceiveData8(SPI_INST(obj));
} }
} }