diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/cmsis_nvic.c b/targets/TARGET_NUVOTON/TARGET_M480/device/cmsis_nvic.c deleted file mode 100644 index c93e38dee2..0000000000 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/cmsis_nvic.c +++ /dev/null @@ -1,39 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2015-2016 Nuvoton - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "cmsis_nvic.h" - -void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) -{ - uint32_t *vectors = (uint32_t *) SCB->VTOR; - uint32_t i; - - /* Copy and switch to dynamic vectors if the first time called */ - if (SCB->VTOR != NVIC_RAM_VECTOR_ADDRESS) { - uint32_t *old_vectors = (uint32_t *) NVIC_FLASH_VECTOR_ADDRESS; - vectors = (uint32_t *) NVIC_RAM_VECTOR_ADDRESS; - for (i = 0; i < NVIC_NUM_VECTORS; i++) { - vectors[i] = old_vectors[i]; - } - SCB->VTOR = (uint32_t) NVIC_RAM_VECTOR_ADDRESS; - } - vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector; -} - -uint32_t __NVIC_GetVector(IRQn_Type IRQn) -{ - uint32_t *vectors = (uint32_t *) SCB->VTOR; - return vectors[IRQn + NVIC_USER_IRQ_OFFSET]; -} diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/cmsis_nvic.h b/targets/TARGET_NUVOTON/TARGET_M480/device/cmsis_nvic.h index bc314dada6..adcbd1153b 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/cmsis_nvic.h +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/cmsis_nvic.h @@ -32,43 +32,4 @@ # define NVIC_RAM_VECTOR_ADDRESS ((uint32_t) &__start_vector_table__) #endif - -#if defined(__CC_ARM) - extern uint32_t Load$$LR$$LR_IROM1$$Base[]; - #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base) -#elif defined(__ICCARM__) - #pragma section=".intvec" - #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec")) -#elif defined(__GNUC__) - extern uint32_t __vector_table; - #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)&__vector_table) -#else - #error "Flash vector address not set for this toolchain" -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -/** Set the ISR for IRQn - * - * Sets an Interrupt Service Routine vector for IRQn; if the feature is available, the vector table is relocated to SRAM - * the first time this function is called - * @param[in] IRQn The Interrupt Request number for which a vector will be registered - * @param[in] vector The ISR vector to register for IRQn - */ -void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector); - -/** Get the ISR registered for IRQn - * - * Reads the Interrupt Service Routine currently registered for IRQn - * @param[in] IRQn The Interrupt Request number the vector of which will be read - * @return Returns the ISR registered for IRQn - */ -uint32_t __NVIC_GetVector(IRQn_Type IRQn); - -#ifdef __cplusplus -} -#endif - #endif