From 5340c00965733770049fabe856f2cb77473742c5 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 16:40:29 +0200 Subject: [PATCH 01/16] STM32 gen PeriphPin script update for USB --- tools/targets/STM32_gen_PeripheralPins.py | 104 ++++++++++++++++++++-- 1 file changed, 95 insertions(+), 9 deletions(-) diff --git a/tools/targets/STM32_gen_PeripheralPins.py b/tools/targets/STM32_gen_PeripheralPins.py index fbaaaed7db..be8c43ceeb 100644 --- a/tools/targets/STM32_gen_PeripheralPins.py +++ b/tools/targets/STM32_gen_PeripheralPins.py @@ -1,7 +1,7 @@ """ * mbed Microcontroller Library -* Copyright (c) 2006-2018 ARM Limited -* Copyright (c) 2019 STMicroelectronics +* Copyright (c) 2006-2019 ARM Limited +* Copyright (c) 2006-2019 STMicroelectronics * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -27,7 +27,7 @@ import textwrap from xml.dom.minidom import parse, Node from argparse import RawTextHelpFormatter -GENPINMAP_VERSION = "1.7" +GENPINMAP_VERSION = "1.8" ADD_DEVICE_IF = 0 ADD_QSPI_FEATURE = 1 @@ -57,7 +57,9 @@ quadspidata2_list = [] #'PIN','name','QUADSPIDATA2' quadspidata3_list = [] #'PIN','name','QUADSPIDATA3' quadspisclk_list = [] #'PIN','name','QUADSPISCLK' quadspissel_list = [] #'PIN','name','QUADSPISSEL' -usb_list = [] #'PIN','name','USB' +usb_list = [] # 'PIN','name','USB' +usb_otgfs_list = [] # 'PIN','name','USB' +usb_otghs_list = [] # 'PIN','name','USB' osc_list = [] #'PIN','name','OSC' sys_list = [] #'PIN','name','SYS' @@ -332,7 +334,12 @@ def store_qspi(pin, name, signal): # function to store USB pins def store_usb(pin, name, signal): - usb_list.append([pin, name, signal]) + if "OTG" not in signal: + usb_list.append([pin, name, signal]) + elif signal.startswith("USB_OTG_FS"): + usb_otgfs_list.append([pin, name, signal]) + elif signal.startswith("USB_OTG_HS"): + usb_otghs_list.append([pin, name, signal]) # function to store OSC pins @@ -518,7 +525,15 @@ def print_all_lists(): print_qspi(quadspisclk_list) if print_list_header("", "QSPI_SSEL", quadspissel_list, "QSPI"): print_qspi(quadspissel_list) + if print_list_header("USBDEVICE", "USB_FS", usb_list, "USBDEVICE"): + print_usb(usb_list) + if print_list_header("USBDEVICE", "USB_FS", usb_otgfs_list, "USBDEVICE"): + print_usb(usb_otgfs_list) + if print_list_header("USBDEVICE", "USB_HS", usb_otghs_list, "USBDEVICE"): + print_usb(usb_otghs_list) print_h_file(usb_list, "USB") + print_h_file(usb_otgfs_list, "USB FS") + print_h_file(usb_otghs_list, "USB HS") print_h_file(eth_list, "ETHERNET") print_h_file(osc_list, "OSCILLATOR") print_h_file(sys_list, "DEBUG") @@ -873,8 +888,80 @@ def print_qspi(l): if ADD_DEVICE_IF: out_c_file.write( "#endif\n" ) +def print_usb(lst): + use_hs_in_fs = False + nb_loop = 1 + inst = "USB_FS" + if lst is usb_otgfs_list: + inst = "USB_FS" + elif lst is usb_otghs_list: + inst = "USB_HS" + nb_loop = 2 + + for nb in range(nb_loop): + for p in lst: + result = get_gpio_af_num(p[1], p[2]) + + CommentedLine = " " + + if p[1] in PinLabel.keys(): + if "STDIO_UART" in PinLabel[p[1]]: + CommentedLine = "//" + if "RCC_OSC" in PinLabel[p[1]]: + CommentedLine = "//" + + if "_SOF" in p[2] or "_NOE" in p[2]: + CommentedLine = "//" + + if lst is usb_otghs_list: + if nb == 0: + if "ULPI" in p[2]: + continue + elif not use_hs_in_fs: + out_c_file.write("#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS)\n") + use_hs_in_fs = True + else: + if "ULPI" not in p[2]: + continue + elif use_hs_in_fs: + out_c_file.write("#else /* MBED_CONF_TARGET_USB_SPEED */\n") + use_hs_in_fs = False + + s1 = "%-16s" % (CommentedLine + " {" + p[0] + ',') + + # 2nd element is the USB_XXXX signal + if not p[2].startswith("USB_D") and "VBUS" not in p[2]: + if "ID" not in p[2]: + s1 += inst + ", STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, " + else: + # ID pin: AF_PP + PULLUP + s1 += inst + ", STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, " + else: + # USB_DM/DP and VBUS: INPUT + NOPULL + s1 += inst + ", STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, " + if result == "NOTFOUND": + s1 += "0)}," + else: + r = result.split(" ") + for af in r: + s1 += af + ")}," + s1 += " // " + p[2] + if p[1] in PinLabel.keys(): + s1 += ' // Connected to ' + PinLabel[p[1]] + s1 += "\n" + out_c_file.write(s1) + if lst: + if lst is usb_otghs_list: + out_c_file.write("#endif /* MBED_CONF_TARGET_USB_SPEED */\n") + out_c_file.write(""" {NC, NC, 0} +}; +""") + if ADD_DEVICE_IF: + out_c_file.write( "#endif\n" ) + def print_h_file(l, comment): + l.sort(key=natural_sortkey2) if len(l) > 0: s = ("\n /**** %s pins ****/\n" % comment) out_h_file.write(s) @@ -934,16 +1021,15 @@ def sort_my_lists(): spisclk_list.sort(key=natural_sortkey) cantd_list.sort(key=natural_sortkey) canrd_list.sort(key=natural_sortkey) - eth_list.sort(key=natural_sortkey2) quadspidata0_list.sort(key=natural_sortkey) quadspidata1_list.sort(key=natural_sortkey) quadspidata2_list.sort(key=natural_sortkey) quadspidata3_list.sort(key=natural_sortkey) quadspisclk_list.sort(key=natural_sortkey) quadspissel_list.sort(key=natural_sortkey) - usb_list.sort(key=natural_sortkey2) - osc_list.sort(key=natural_sortkey2) - sys_list.sort(key=natural_sortkey2) + usb_list.sort(key=natural_sortkey) + usb_otgfs_list.sort(key=natural_sortkey) + usb_otghs_list.sort(key=natural_sortkey) def clean_all_lists(): del io_list[:] From 5afd9ebb6039fe2a8984ee46b677f819055cbd53 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:12:50 +0200 Subject: [PATCH 02/16] STM32 PeripheralPins.h update with USB --- targets/TARGET_STM/PeripheralPins.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/targets/TARGET_STM/PeripheralPins.h b/targets/TARGET_STM/PeripheralPins.h index 315d98214e..f764c945ea 100644 --- a/targets/TARGET_STM/PeripheralPins.h +++ b/targets/TARGET_STM/PeripheralPins.h @@ -34,6 +34,8 @@ #include "pinmap.h" #include "PeripheralNames.h" +#define GPIO_AF_NONE 0 + //*** ADC *** #if DEVICE_ANALOGIN extern const PinMap PinMap_ADC[]; @@ -89,4 +91,16 @@ extern const PinMap PinMap_QSPI_SCLK[]; extern const PinMap PinMap_QSPI_SSEL[]; #endif +#if DEVICE_USBDEVICE + +#define USE_USB_NO_OTG 0 +#define USE_USB_OTG_FS 1 +#define USE_USB_OTG_HS 2 +#define USE_USB_HS_IN_FS 3 + +extern const PinMap PinMap_USB_HS[]; +extern const PinMap PinMap_USB_FS[]; + +#endif /* DEVICE_USBDEVICE */ + #endif From 66dea7b5daa1ff2084f0235b494f65b3f19fa633 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:13:51 +0200 Subject: [PATCH 03/16] STM32F0 USB pins addition --- .../TARGET_NUCLEO_F042K6/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_F042K6/PeripheralPins.c | 11 +++++++++++ .../TARGET_NUCLEO_F070RB/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_F070RB/PeripheralPins.c | 9 +++++++++ .../TARGET_NUCLEO_F072RB/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_F072RB/PeripheralPins.c | 9 +++++++++ 6 files changed, 41 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/PeripheralNames.h index 833a776e82..e2cb46d18f 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/PeripheralNames.h @@ -69,6 +69,10 @@ typedef enum { CAN_1 = (int)CAN_BASE } CANName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/PeripheralPins.c index 1de719bb80..ba678e2951 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/PeripheralPins.c @@ -195,3 +195,14 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_CAN)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_4, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE // Connected to SWDIO +// {PA_15, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_USB)}, // USB_NOE // Connected to STDIO_UART_RX + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/PeripheralNames.h index 962c75091a..0af35fe602 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/PeripheralNames.h @@ -67,6 +67,10 @@ typedef enum { PWM_17 = (int)TIM17_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/PeripheralPins.c index 20a44703f7..7423ed0916 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/PeripheralPins.c @@ -218,3 +218,12 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE // Connected to TMS + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/PeripheralNames.h index 22fa729231..d149b5dabb 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/PeripheralNames.h @@ -76,6 +76,10 @@ typedef enum { CAN_1 = (int)CAN_BASE } CANName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/PeripheralPins.c index 1b6ac6414d..b427d5f273 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/PeripheralPins.c @@ -250,3 +250,12 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_CAN)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE // Connected to TMS + {NC, NC, 0} +}; From 6e3dc7b173ab2e5166f1042877ce3b7018fa4fc7 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:14:01 +0200 Subject: [PATCH 04/16] STM32F1 USB pins addition --- .../TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralNames.h | 4 ++++ .../TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c | 8 ++++++++ 2 files changed, 12 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralNames.h index 6bfba03fcb..41bd944483 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralNames.h @@ -68,6 +68,10 @@ typedef enum { CAN_1 = (int)CAN1_BASE } CANName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c index 8cb87daa45..da2ca9ddcd 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c @@ -207,3 +207,11 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 10)}, // Remap CAN_TX to PB_9 {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)}, // USB_DP + {NC, NC, 0} +}; From 9b3cdd09721846bef2d3b9520e81851f7e89b57c Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:14:14 +0200 Subject: [PATCH 05/16] STM32F2 USB pins addition --- .../TARGET_NUCLEO_F207ZG/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_F207ZG/PeripheralPins.c | 37 +++++++++++++++++++ .../TARGET_NUCLEO_F207ZG/PinNames.h | 4 +- 3 files changed, 45 insertions(+), 1 deletion(-) diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PeripheralNames.h index c051e74672..98b1221824 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PeripheralNames.h @@ -88,6 +88,11 @@ typedef enum { CAN_2 = (int)CAN2_BASE } CANName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PeripheralPins.c index 17e141d52e..ef1c20e06e 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PeripheralPins.c @@ -335,3 +335,40 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_VBUS // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PinNames.h index 697dd02bc1..c092f74184 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/PinNames.h @@ -272,12 +272,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, From 6986daac61c1817b5aa45d80bbd43f37ec31de4c Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:14:38 +0200 Subject: [PATCH 06/16] STM32F3 USB pins addition --- .../TARGET_NUCLEO_F302R8/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_F302R8/PeripheralPins.c | 8 ++++++++ .../TARGET_DISCO_F303VC/PeripheralNames.h | 4 ++++ .../TARGET_DISCO_F303VC/PeripheralPins.c | 8 ++++++++ .../TARGET_NUCLEO_F303RE/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_F303RE/PeripheralPins.c | 8 ++++++++ .../TARGET_NUCLEO_F303ZE/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_F303ZE/PeripheralPins.c | 8 ++++++++ 8 files changed, 48 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PeripheralNames.h index bd9f9d5891..b688f48696 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PeripheralNames.h @@ -74,6 +74,10 @@ typedef enum { CAN_1 = (int)CAN_BASE } CANName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PeripheralPins.c index 768ad1720d..2560a7fe85 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PeripheralPins.c @@ -250,3 +250,11 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralNames.h index 963306fe61..dd9d53d308 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralNames.h @@ -82,6 +82,10 @@ typedef enum { CAN_1 = (int)CAN_BASE } CANName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralPins.c index 0820388dde..526e36606b 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PeripheralPins.c @@ -372,3 +372,11 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_CAN)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF14_USB)}, // USB_DM // Connected to DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF14_USB)}, // USB_DP // Connected to DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PeripheralNames.h index b38aafe473..58f7521208 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PeripheralNames.h @@ -85,6 +85,10 @@ typedef enum { CAN_1 = (int)CAN_BASE } CANName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PeripheralPins.c index 1c5c5714a2..e2acd728fb 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303RE/PeripheralPins.c @@ -319,3 +319,11 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303ZE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303ZE/PeripheralNames.h index b38aafe473..58f7521208 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303ZE/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303ZE/PeripheralNames.h @@ -85,6 +85,10 @@ typedef enum { CAN_1 = (int)CAN_BASE } CANName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303ZE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303ZE/PeripheralPins.c index 9119c419a4..bdad3e171b 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303ZE/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/TARGET_NUCLEO_F303ZE/PeripheralPins.c @@ -415,3 +415,11 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_CAN)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP // Connected to USB_DP + {NC, NC, 0} +}; From 6f0932033be3d5ae9d02f0361e33ec91c10dc8e0 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:16:05 +0200 Subject: [PATCH 07/16] STM32F4 USB pins addition --- .../TARGET_DISCO_F401VC/PeripheralNames.h | 4 ++ .../TARGET_DISCO_F401VC/PeripheralPins.c | 11 ++++++ .../TARGET_DISCO_F401VC/PinNames.h | 2 +- .../TARGET_NUCLEO_F401RE/PeripheralNames.h | 4 ++ .../TARGET_NUCLEO_F401RE/PeripheralPins.c | 11 ++++++ .../TARGET_NUCLEO_F401RE/PinNames.h | 2 +- .../TARGET_STEVAL_3DP001V1/PeripheralNames.h | 4 ++ .../TARGET_STEVAL_3DP001V1/PeripheralPins.c | 11 ++++++ .../TARGET_STEVAL_3DP001V1/PinNames.h | 27 +++++++++++-- .../TARGET_DISCO_F407VG/PeripheralNames.h | 5 +++ .../TARGET_DISCO_F407VG/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_DISCO_F407VG/PinNames.h | 4 +- .../PeripheralNames.h | 5 +++ .../PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_OLIMEX_STM32E407_F407ZG/PinNames.h | 4 +- .../TARGET_NUCLEO_F411RE/PeripheralNames.h | 4 ++ .../TARGET_NUCLEO_F411RE/PeripheralPins.c | 11 ++++++ .../TARGET_NUCLEO_F411RE/PinNames.h | 2 +- .../TARGET_NUCLEO_F412ZG/PeripheralNames.h | 4 ++ .../TARGET_NUCLEO_F412ZG/PeripheralPins.c | 11 ++++++ .../TARGET_NUCLEO_F412ZG/PinNames.h | 2 +- .../TARGET_DISCO_F413ZH/PeripheralNames.h | 4 ++ .../TARGET_DISCO_F413ZH/PeripheralPins.c | 11 ++++++ .../TARGET_DISCO_F413ZH/PinNames.h | 2 +- .../TARGET_NUCLEO_F413ZH/PeripheralNames.h | 4 ++ .../TARGET_NUCLEO_F413ZH/PeripheralPins.c | 11 ++++++ .../TARGET_NUCLEO_F413ZH/PinNames.h | 2 +- .../TARGET_DISCO_F429ZI/PeripheralNames.h | 5 +++ .../TARGET_DISCO_F429ZI/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_DISCO_F429ZI/PinNames.h | 4 +- .../TARGET_NUCLEO_F429ZI/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_F429ZI/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_NUCLEO_F429ZI/PinNames.h | 4 +- .../TARGET_NUCLEO_F439ZI/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_F439ZI/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_NUCLEO_F439ZI/PinNames.h | 4 +- .../TARGET_NUCLEO_F446RE/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_F446RE/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_NUCLEO_F446RE/PinNames.h | 4 +- .../TARGET_NUCLEO_F446ZE/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_F446ZE/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_NUCLEO_F446ZE/PinNames.h | 4 +- .../TARGET_DISCO_F469NI/PeripheralNames.h | 5 +++ .../TARGET_DISCO_F469NI/PeripheralPins.c | 39 +++++++++++++++++++ .../TARGET_DISCO_F469NI/PinNames.h | 12 +++--- 45 files changed, 500 insertions(+), 22 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PeripheralNames.h index 4f4273261e..e58ded373e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PeripheralNames.h @@ -71,6 +71,10 @@ typedef enum { PWM_11 = (int)TIM11_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PeripheralPins.c index 1fc1feec5f..dc93f6a5c6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PeripheralPins.c @@ -245,3 +245,14 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PE_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to VBUS_FS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to OTG_FS_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PinNames.h index fb4e70c35b..b3aab3b486 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/PinNames.h @@ -184,7 +184,7 @@ typedef enum { SPI_CS = PB_6, PWM_OUT = PB_3, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralNames.h index 4f4273261e..e58ded373e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralNames.h @@ -71,6 +71,10 @@ typedef enum { PWM_11 = (int)TIM11_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralPins.c index e4dd1c4356..8df8851050 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PeripheralPins.c @@ -226,3 +226,14 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PinNames.h index 454ad2d685..3094ceb95d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_NUCLEO_F401RE/PinNames.h @@ -175,7 +175,7 @@ typedef enum { SPI_CS = PB_6, PWM_OUT = PB_3, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PeripheralNames.h index 4f4273261e..e58ded373e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PeripheralNames.h @@ -71,6 +71,10 @@ typedef enum { PWM_11 = (int)TIM11_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PeripheralPins.c index 35d1ceee3b..3b8de6d4f3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PeripheralPins.c @@ -253,3 +253,14 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PE_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PinNames.h index 1d57df7c29..c8502f70a6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/TARGET_STEVAL_3DP001V1/PinNames.h @@ -180,12 +180,31 @@ typedef enum { SPI_CS = PB_6, PWM_OUT = PB_3, - //USB pins - USB_OTG_FS_SOF = PA_8, - USB_OTG_FS_VBUS = PA_9, - USB_OTG_FS_ID = PA_10, + /**** USB OTG FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + + /**** OSCILLATOR pins ****/ + RCC_OSC32_IN = PC_14, + RCC_OSC32_OUT = PC_15, + RCC_OSC_IN = PH_0, + RCC_OSC_OUT = PH_1, + + /**** DEBUG pins ****/ + SYS_JTCK_SWCLK = PA_14, + SYS_JTDI = PA_15, + SYS_JTDO_SWO = PB_3, + SYS_JTMS_SWDIO = PA_13, + SYS_JTRST = PB_4, + SYS_TRACECLK = PE_2, + SYS_TRACED0 = PE_3, + SYS_TRACED1 = PE_4, + SYS_TRACED2 = PE_5, + SYS_TRACED3 = PE_6, + SYS_WKUP = PA_0, // Not connected NC = (int)0xFFFFFFFF diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PeripheralNames.h index c471863eb7..c6aba58973 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PeripheralNames.h @@ -89,6 +89,11 @@ typedef enum { CAN_2 = (int)CAN2_BASE } CANName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PeripheralPins.c index 3d1b29242f..ef2f851591 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PeripheralPins.c @@ -315,3 +315,40 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to VBUS_FS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to OTG_FS_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF // Connected to I2S3_WS [CS43L22_LRCK] + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK // Connected to SPI1_SCK [LIS302DL_SCL/SPC] + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 // Connected to CLK_IN [MP45DT02_CLK] + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP // Connected to OTG_FS_PowerSwitchOn + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT // Connected to PDM_OUT [MP45DT02_DOUT] +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PinNames.h index 4a96e2e438..904fa61d30 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_DISCO_F407VG/PinNames.h @@ -287,12 +287,14 @@ typedef enum { SPI_CS = PB_6, PWM_OUT = PB_3, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PeripheralNames.h index c471863eb7..c6aba58973 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PeripheralNames.h @@ -89,6 +89,11 @@ typedef enum { CAN_2 = (int)CAN2_BASE } CANName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PeripheralPins.c index 3e4fa6f0d6..3b0c461fd8 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PeripheralPins.c @@ -340,3 +340,40 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PinNames.h index 241bb52adf..f6f36d714d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_OLIMEX_STM32E407_F407ZG/PinNames.h @@ -299,12 +299,14 @@ typedef enum { USB_OTG_HS_VBUSON = PA_8, USB_OTG_HS_FAULT = PF_11, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PeripheralNames.h index c251b7a311..757b0341d1 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PeripheralNames.h @@ -72,6 +72,10 @@ typedef enum { PWM_11 = (int)TIM11_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PeripheralPins.c index 1220004141..ada37f1db6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PeripheralPins.c @@ -233,3 +233,14 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PB_12_ALT0, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI4)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PinNames.h index 5d1a4080f6..7a2f6b168c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/PinNames.h @@ -184,7 +184,7 @@ typedef enum { SPI_CS = PB_6, PWM_OUT = PB_3, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralNames.h index be92b7c66e..acf3d8371e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralNames.h @@ -73,6 +73,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralPins.c index 3896b31389..a83364130b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralPins.c @@ -390,3 +390,14 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to USB_PowerSwitchOn [STMPS2151STR_EN] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h index 9bdac54021..62affa09b8 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PinNames.h @@ -274,7 +274,7 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralNames.h index 931fc4fd15..38fdae78b3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralNames.h @@ -84,6 +84,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralPins.c index cd9424ddf0..2865f72508 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralPins.c @@ -442,3 +442,14 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to QSPI_BK1_NCS [N25Q128A13EF840F_S] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to DFSDM1_CKOUT + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_VBUS // Connected to USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_OTG_FS_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PinNames.h index 527a97b083..4e7db3b117 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PinNames.h @@ -270,7 +270,7 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralNames.h index 931fc4fd15..38fdae78b3 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralNames.h @@ -84,6 +84,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralPins.c index d89c414b68..976f00fa1a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralPins.c @@ -442,3 +442,14 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to USB_PowerSwitchOn [STMPS2151STR_EN] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h index 1fba180f55..d9a20a0396 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PinNames.h @@ -273,7 +273,7 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PeripheralNames.h index 361fe5e0e1..ea97eb569b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PeripheralNames.h @@ -93,6 +93,11 @@ typedef enum { CAN_2 = (int)CAN2_BASE } CANName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PeripheralPins.c index 4d687131ed..df5dada49a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PeripheralPins.c @@ -360,3 +360,40 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to D3 {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to I2C3_SCL [ACP/RF_SCL] +// {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to STDIO_UART_TX +// {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to STDIO_UART_RX + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to R4 + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to R5 + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF // Connected to VSYNC + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID // Connected to OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to VBUS_HS + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to OTG_HS_DM + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP // Connected to OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 // Connected to B5 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to R3 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 // Connected to R6 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 // Connected to SDCKE1 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 // Connected to G4 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 // Connected to G5 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 // Connected to OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to VBUS_HS + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP // Connected to SDNWE + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR // Connected to CSX [LCD-RGB_CSX] + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PinNames.h index fdc35049d5..aa46b566f9 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_DISCO_F429ZI/PinNames.h @@ -248,12 +248,14 @@ typedef enum { SPI_SCK = PA_5, SPI_CS = PB_6, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralNames.h index 6b0f3f1b47..b29be0faa0 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralNames.h @@ -93,6 +93,11 @@ typedef enum { CAN_2 = (int)CAN2_BASE } CANName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralPins.c index 5a6a8d2481..5e27aaaa0d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PeripheralPins.c @@ -360,3 +360,40 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PinNames.h index ad1011aebe..7568cac5db 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/PinNames.h @@ -275,12 +275,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PeripheralNames.h index 6b0f3f1b47..b29be0faa0 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PeripheralNames.h @@ -93,6 +93,11 @@ typedef enum { CAN_2 = (int)CAN2_BASE } CANName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PeripheralPins.c index 5a6a8d2481..5e27aaaa0d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PeripheralPins.c @@ -360,3 +360,40 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = { {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PinNames.h index ad1011aebe..7568cac5db 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PinNames.h @@ -275,12 +275,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralNames.h index 113a0044f6..e4912a3f75 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralNames.h @@ -94,6 +94,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralPins.c index 3fa61695dd..c931ee8cbc 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralPins.c @@ -340,3 +340,40 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ +// {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 // Connected to STDIO_UART_RX + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK // Connected to LD2 [Green Led] + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PinNames.h index dcbf64a0e9..634f32951c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PinNames.h @@ -207,12 +207,14 @@ typedef enum { SPI_CS = PB_6, PWM_OUT = PB_3, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PeripheralNames.h index 113a0044f6..e4912a3f75 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PeripheralNames.h @@ -94,6 +94,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PeripheralPins.c index 53c07d0d24..3a1fc36542 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PeripheralPins.c @@ -421,3 +421,40 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to USB_PowerSwitchOn [STMPS2151STR_EN] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h index eb1d885320..f659ade60e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/PinNames.h @@ -277,12 +277,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PeripheralNames.h index e27a32f45e..3b5da4a379 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PeripheralNames.h @@ -97,6 +97,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PeripheralPins.c index 92184868da..0623acf081 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PeripheralPins.c @@ -429,3 +429,42 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { // {PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_NCS // Connected to STDIO_UART_TX {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to VBUS_FS1 + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_FS1_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_FS1_N + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_FS1_P + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 // Connected to LCD_BL_CTRL [STLD40DPUR_EN] + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to EXT_RESET + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 +// {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 // Connected to STDIO_UART_TX +// {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 // Connected to STDIO_UART_RX + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP // Connected to SDNWE [MT48LC4M32B2B5-6A_WE] + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT + {PH_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT // Connected to I2C2_SCL [CS43L22_SCL] + {PI_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h index 5e31257cb8..493176bef4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h @@ -323,12 +323,14 @@ typedef enum { SPI_CS = PH_6, PWM_OUT = PA_1, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, @@ -342,10 +344,10 @@ typedef enum { USB_OTG_HS_ULPI_D5 = PB_12, USB_OTG_HS_ULPI_D6 = PB_13, USB_OTG_HS_ULPI_D7 = PB_5, - USB_OTG_HS_ULPI_DIR = PI_11, - USB_OTG_HS_ULPI_DIR_ALT0 = PC_2, - USB_OTG_HS_ULPI_NXT = PH_4, - USB_OTG_HS_ULPI_NXT_ALT0 = PC_3, + USB_OTG_HS_ULPI_DIR = PC_2, + USB_OTG_HS_ULPI_DIR_ALT0 = PI_11, + USB_OTG_HS_ULPI_NXT = PC_3, + USB_OTG_HS_ULPI_NXT_ALT0 = PH_4, USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_VBUS = PB_13, From 905f81851a0fc40a912de827b9c7585e8d4648b3 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:16:32 +0200 Subject: [PATCH 08/16] STM32F7 USB pins addition --- .../TARGET_DISCO_F746NG/PeripheralNames.h | 5 +++ .../TARGET_DISCO_F746NG/PeripheralPins.c | 39 +++++++++++++++++++ .../TARGET_DISCO_F746NG/PinNames.h | 12 +++--- .../TARGET_NUCLEO_F746ZG/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_F746ZG/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_NUCLEO_F746ZG/PinNames.h | 4 +- .../TARGET_NUCLEO_F756ZG/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_F756ZG/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_NUCLEO_F756ZG/PinNames.h | 4 +- .../TARGET_NUCLEO_F767ZI/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_F767ZI/PeripheralPins.c | 37 ++++++++++++++++++ .../TARGET_NUCLEO_F767ZI/PinNames.h | 4 +- .../TARGET_DISCO_F769NI/PeripheralNames.h | 5 +++ .../TARGET_DISCO_F769NI/PeripheralPins.c | 39 +++++++++++++++++++ .../TARGET_DISCO_F769NI/PinNames.h | 12 +++--- 15 files changed, 237 insertions(+), 13 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PeripheralNames.h index 5e57295116..1bff4f41a4 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PeripheralNames.h @@ -98,6 +98,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PeripheralPins.c index 8ae0d2ea36..db7877b2db 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PeripheralPins.c @@ -445,3 +445,42 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to QSPI_NCS [N25Q128A13EF840E_S] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to ARDUINO PWM/D10 +// {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to STDIO_UART_TX + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to OTG_FS_N + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to OTG_FS_P + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF // Connected to DCMI_HSYNC + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID // Connected to ULPI_D5 [USB3320C-EZK_D5] + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to ULPI_D6 [USB3320C-EZK_D6] + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to ARDUINO MISO/D12 + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP // Connected to ARDUINO MOSI/PWM/D11 +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 // Connected to ULPI_D0 [USB3320C-EZK_D0] + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK // Connected to ULPI_CLK [USB3320C-EZK_CLKOUT] + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to ULPI_D1 [USB3320C-EZK_D1] + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 // Connected to ULPI_D2 [USB3320C-EZK_D2] + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 // Connected to ULPI_D7 [USB3320C-EZK_D7] + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 // Connected to ULPI_D3 [USB3320C-EZK_D3] + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 // Connected to ULPI_D4 [USB3320C-EZK_D4] + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 // Connected to ULPI_D5 [USB3320C-EZK_D5] + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to ULPI_D6 [USB3320C-EZK_D6] + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP // Connected to ULPI_STP [USB3320C-EZK_STP] + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR // Connected to ULPI_DIR [USB3320C-EZK_DIR] + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT // Connected to FMC_SDCKE0 [MT48LC4M32B2B5-6A_CKE] + {PH_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT // Connected to ULPI_NXT [USB3320C-EZK_NXT] + {PI_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h index 2da6cafdf6..1b8e135eba 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_DISCO_F746NG/PinNames.h @@ -332,12 +332,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, @@ -351,10 +353,10 @@ typedef enum { USB_OTG_HS_ULPI_D5 = PB_12, USB_OTG_HS_ULPI_D6 = PB_13, USB_OTG_HS_ULPI_D7 = PB_5, - USB_OTG_HS_ULPI_DIR = PI_11, - USB_OTG_HS_ULPI_DIR_ALT0 = PC_2, - USB_OTG_HS_ULPI_NXT = PH_4, - USB_OTG_HS_ULPI_NXT_ALT0 = PC_3, + USB_OTG_HS_ULPI_DIR = PC_2, + USB_OTG_HS_ULPI_DIR_ALT0 = PI_11, + USB_OTG_HS_ULPI_NXT = PC_3, + USB_OTG_HS_ULPI_NXT_ALT0 = PH_4, USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_VBUS = PB_13, diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PeripheralNames.h index 13d4f57968..a0d9428986 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PeripheralNames.h @@ -98,6 +98,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PeripheralPins.c index 73cfd892f6..f93f655eeb 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PeripheralPins.c @@ -417,3 +417,40 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to LD1 [Green] + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h index 74f94f7894..7b140036ce 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/TARGET_NUCLEO_F746ZG/PinNames.h @@ -275,12 +275,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PeripheralNames.h index 13d4f57968..a0d9428986 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PeripheralNames.h @@ -98,6 +98,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PeripheralPins.c index 73cfd892f6..f93f655eeb 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PeripheralPins.c @@ -417,3 +417,40 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to LD1 [Green] + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h index 74f94f7894..7b140036ce 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/TARGET_NUCLEO_F756ZG/PinNames.h @@ -275,12 +275,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PeripheralNames.h index 59bc76b8dc..9be43cbaab 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PeripheralNames.h @@ -99,6 +99,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PeripheralPins.c index 571d737441..0056fc4f4c 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PeripheralPins.c @@ -459,3 +459,40 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h index 89e4a8596f..dcd455a965 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_NUCLEO_F767ZI/PinNames.h @@ -280,12 +280,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PeripheralNames.h index 59bc76b8dc..9be43cbaab 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PeripheralNames.h @@ -99,6 +99,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PeripheralPins.c index 1725f380bd..5aa415896f 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PeripheralPins.c @@ -491,3 +491,42 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to ULPI_D3 [USB3320C-EZK_D3] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF +// {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to STDIO_UART_TX +// {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to STDIO_UART_RX + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to SPI2_NSS + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to ARD_D13/SCK + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF // Connected to ARD_A1 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID // Connected to ULPI_D5 [USB3320C-EZK_D5] + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to ULPI_D6 [USB3320C-EZK_D6] + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM // Connected to ARDUINO MISO/D12 + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP // Connected to ARDUINO MOSI/PWM/D11 +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0 // Connected to ULPI_D0 [USB3320C-EZK_D0] + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK // Connected to ULPI_CLK [USB3320C-EZK_CLKOUT] + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to ULPI_D1 [USB3320C-EZK_D1] + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2 // Connected to ULPI_D2 [USB3320C-EZK_D2] + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7 // Connected to ULPI_D7 [USB3320C-EZK_D7] + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3 // Connected to ULPI_D3 [USB3320C-EZK_D3] + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4 // Connected to ULPI_D4 [USB3320C-EZK_D4] + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5 // Connected to ULPI_D5 [USB3320C-EZK_D5] + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to ULPI_D6 [USB3320C-EZK_D6] + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP // Connected to ULPI_STP [USB3320C-EZK_STP] + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR // Connected to ARD_A2 + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT + {PH_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT // Connected to ULPI_NXT [USB3320C-EZK_NXT] + {PI_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR // Connected to ULPI_DIR [USB3320C-EZK_DIR] +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PinNames.h index b8196989b0..ff217959cf 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/TARGET_DISCO_F769NI/PinNames.h @@ -339,12 +339,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, @@ -358,10 +360,10 @@ typedef enum { USB_OTG_HS_ULPI_D5 = PB_12, USB_OTG_HS_ULPI_D6 = PB_13, USB_OTG_HS_ULPI_D7 = PB_5, - USB_OTG_HS_ULPI_DIR = PI_11, - USB_OTG_HS_ULPI_DIR_ALT0 = PC_2, - USB_OTG_HS_ULPI_NXT = PH_4, - USB_OTG_HS_ULPI_NXT_ALT0 = PC_3, + USB_OTG_HS_ULPI_DIR = PC_2, + USB_OTG_HS_ULPI_DIR_ALT0 = PI_11, + USB_OTG_HS_ULPI_NXT = PC_3, + USB_OTG_HS_ULPI_NXT_ALT0 = PH_4, USB_OTG_HS_ULPI_STP = PC_0, USB_OTG_HS_VBUS = PB_13, From 40739d3b8f8bc35ec7bfb62ce7b21ead7bb7817e Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:16:51 +0200 Subject: [PATCH 09/16] STM32H7 USB pins addition --- .../TARGET_STM32H7/PeripheralNames.h | 5 +++ .../TARGET_NUCLEO_H743ZI/PeripheralPins.c | 37 +++++++++++++++++++ .../TARGET_NUCLEO_H743ZI/PinNames.h | 4 +- .../TARGET_NUCLEO_H743ZI2/PeripheralPins.c | 37 +++++++++++++++++++ .../TARGET_NUCLEO_H743ZI2/PinNames.h | 4 +- 5 files changed, 85 insertions(+), 2 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32H7/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32H7/PeripheralNames.h index b3205c21d2..daf75a6e47 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32H7/PeripheralNames.h @@ -100,6 +100,11 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, + USB_HS = (int)USB_OTG_HS_PERIPH_BASE +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PeripheralPins.c index 9c4e85b2c1..93c06b1718 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PeripheralPins.c @@ -481,3 +481,40 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to USB_PowerSwitchOn [STMPS2151STR_EN] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_SOF // Connected to USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_DM // Connected to USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_DP // Connected to USB_OTG_FS_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to ETH_TXD1 + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red Led] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to LD1 [Green Led] + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to ETH_TXD1 + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PinNames.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PinNames.h index 3a1a588045..cf73740bdd 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PinNames.h @@ -294,12 +294,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/PeripheralPins.c index c20808fa90..66e19ef9d4 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/PeripheralPins.c @@ -481,3 +481,40 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to USB_PowerSwitchOn [STMPS2151STR_EN] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_SOF // Connected to USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_DM // Connected to USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_DP // Connected to USB_OTG_FS_DP + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_HS[] = { +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS) +// {PA_4, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_SOF + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_ID + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to ETH_TXD1 + {PB_14, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_DM // Connected to LD3 [Red Led] + {PB_15, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_DP +#else /* MBED_CONF_TARGET_USB_SPEED */ + {PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D0 + {PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_CK + {PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to LD1 [Green Led] + {PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D2 + {PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D7 + {PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D3 + {PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D4 + {PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D5 + {PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to ETH_TXD1 + {PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_STP + {PC_2, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_DIR + {PC_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_NXT +#endif /* MBED_CONF_TARGET_USB_SPEED */ + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/PinNames.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/PinNames.h index bf1610c718..a3a9ff50e3 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/PinNames.h @@ -294,12 +294,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ USB_OTG_HS_DM = PB_14, USB_OTG_HS_DP = PB_15, USB_OTG_HS_ID = PB_12, From a54fdf7585cb39941175d7dfa3c4381daf824c6a Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:17:19 +0200 Subject: [PATCH 10/16] STM32L0 USB pins addition --- .../TARGET_NUCLEO_L073RZ/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_L073RZ/PeripheralPins.c | 10 ++++++++++ .../TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PinNames.h | 4 ++-- .../TARGET_DISCO_L053C8/PeripheralNames.h | 4 ++++ .../TARGET_DISCO_L053C8/PeripheralPins.c | 9 +++++++++ .../TARGET_NUCLEO_L053R8/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_L053R8/PeripheralPins.c | 10 ++++++++++ .../TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PinNames.h | 4 ++-- .../TARGET_DISCO_L072CZ_LRWAN1/PeripheralNames.h | 4 ++++ .../TARGET_DISCO_L072CZ_LRWAN1/PeripheralPins.c | 9 +++++++++ 10 files changed, 58 insertions(+), 4 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PeripheralNames.h index 4ad52a9a1a..c0f1780aee 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PeripheralNames.h @@ -71,6 +71,10 @@ typedef enum { PWM_22 = (int)TIM22_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PeripheralPins.c index aed8b19cce..47e5f1b8a8 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PeripheralPins.c @@ -246,3 +246,13 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE // Connected to TMS +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PinNames.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PinNames.h index 23f98d939e..57add93818 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/PinNames.h @@ -183,8 +183,8 @@ typedef enum { /**** USB pins ****/ USB_DM = PA_11, USB_DP = PA_12, - USB_NOE = PC_9, - USB_NOE_ALT0 = PA_13, + USB_NOE = PA_13, + USB_NOE_ALT0 = PC_9, /**** OSCILLATOR pins ****/ RCC_OSC32_IN = PC_14, diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_DISCO_L053C8/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_DISCO_L053C8/PeripheralNames.h index 9f88fb14ac..c1a9eb4fc6 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_DISCO_L053C8/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_DISCO_L053C8/PeripheralNames.h @@ -67,6 +67,10 @@ typedef enum { PWM_22 = (int)TIM22_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_DISCO_L053C8/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_DISCO_L053C8/PeripheralPins.c index 1a3a48f30a..2786197314 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_DISCO_L053C8/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_DISCO_L053C8/PeripheralPins.c @@ -192,3 +192,12 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)}, // Connected to NFC_NSS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM // Connected to USB1_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP // Connected to USB1_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE // Connected to SWDIO + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PeripheralNames.h index 9f88fb14ac..c1a9eb4fc6 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PeripheralNames.h @@ -67,6 +67,10 @@ typedef enum { PWM_22 = (int)TIM22_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PeripheralPins.c index 4704edb300..d2e4fb66fb 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PeripheralPins.c @@ -207,3 +207,13 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE // Connected to TMS +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PinNames.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PinNames.h index 7aab48fd39..f66a8ba285 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/TARGET_NUCLEO_L053R8/PinNames.h @@ -159,8 +159,8 @@ typedef enum { /**** USB pins ****/ USB_DM = PA_11, USB_DP = PA_12, - USB_NOE = PC_9, - USB_NOE_ALT0 = PA_13, + USB_NOE = PA_13, + USB_NOE_ALT0 = PC_9, /**** OSCILLATOR pins ****/ RCC_OSC32_IN = PC_14, diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/TARGET_DISCO_L072CZ_LRWAN1/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/TARGET_DISCO_L072CZ_LRWAN1/PeripheralNames.h index 90e36c1bee..7be1b50516 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/TARGET_DISCO_L072CZ_LRWAN1/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/TARGET_DISCO_L072CZ_LRWAN1/PeripheralNames.h @@ -71,6 +71,10 @@ typedef enum { PWM_22 = (int)TIM22_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/TARGET_DISCO_L072CZ_LRWAN1/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/TARGET_DISCO_L072CZ_LRWAN1/PeripheralPins.c index 91be89aa14..c62e09b4d2 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/TARGET_DISCO_L072CZ_LRWAN1/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/TARGET_DISCO_L072CZ_LRWAN1/PeripheralPins.c @@ -225,3 +225,12 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF0_SPI2)}, // Connected to SPI2_NSS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP // Connected to RESERVED_RADIO +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE + {NC, NC, 0} +}; From 2c03f3a61ee31d6be8b23fc1a43be7bb284025ac Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:17:37 +0200 Subject: [PATCH 11/16] STM32L1 USB pins addition --- .../TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralNames.h | 4 ++++ .../TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralPins.c | 8 ++++++++ 2 files changed, 12 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralNames.h index 2f7d42f3df..42ac09c245 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralNames.h @@ -74,6 +74,10 @@ typedef enum { PWM_11 = (int)TIM11_BASE } PWMName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralPins.c index a477297879..dda1cdddea 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralPins.c @@ -228,3 +228,11 @@ MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {NC, NC, 0} +}; From 03dd8d3e22584045dbefb3285ff9ad4e3382234f Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:18:43 +0200 Subject: [PATCH 12/16] STM32L4 USB pins addition --- .../TARGET_NUCLEO_L432KC/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_L432KC/PeripheralPins.c | 9 +++++++++ .../TARGET_NUCLEO_L433RC_P/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_L433RC_P/PeripheralPins.c | 10 ++++++++++ .../TARGET_NUCLEO_L433RC_P/PinNames.h | 4 ++-- .../TARGET_DISCO_L475VG_IOT01A/PeripheralNames.h | 4 ++++ .../TARGET_DISCO_L475VG_IOT01A/PeripheralPins.c | 13 +++++++++++++ .../TARGET_DISCO_L475VG_IOT01A/PinNames.h | 6 +++--- .../TARGET_DISCO_L476VG/PeripheralNames.h | 4 ++++ .../TARGET_DISCO_L476VG/PeripheralPins.c | 13 +++++++++++++ .../TARGET_DISCO_L476VG/PinNames.h | 6 +++--- .../TARGET_NUCLEO_L476RG/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_L476RG/PeripheralPins.c | 13 +++++++++++++ .../TARGET_NUCLEO_L476RG/PinNames.h | 6 +++--- .../TARGET_NUCLEO_L486RG/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_L486RG/PeripheralPins.c | 13 +++++++++++++ .../TARGET_NUCLEO_L486RG/PinNames.h | 6 +++--- .../TARGET_DISCO_L496AG/PeripheralNames.h | 4 ++++ .../TARGET_DISCO_L496AG/PeripheralPins.c | 14 ++++++++++++++ .../TARGET_DISCO_L496AG/PinNames.h | 6 +++--- .../TARGET_NUCLEO_L496ZG/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_L496ZG/PeripheralPins.c | 14 ++++++++++++++ .../TARGET_NUCLEO_L496ZG/PinNames.h | 6 +++--- .../TARGET_NUCLEO_L4R5ZI/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_L4R5ZI/PeripheralPins.c | 14 ++++++++++++++ .../TARGET_NUCLEO_L4R5ZI/PinNames.h | 6 +++--- .../TARGET_DISCO_L4R9I/PeripheralNames.h | 4 ++++ .../TARGET_DISCO_L4R9I/PeripheralPins.c | 14 ++++++++++++++ .../TARGET_DISCO_L4R9I/PinNames.h | 6 +++--- 29 files changed, 193 insertions(+), 26 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralNames.h index 101eb69200..6c9faa044f 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralNames.h @@ -76,6 +76,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralPins.c index 6dcf550789..ff975ca73f 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/PeripheralPins.c @@ -236,3 +236,12 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { // {PA_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to STDIO_UART_TX {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_FS)}, // USB_NOE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralNames.h index d9533df67a..7a6fc107bb 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralNames.h @@ -81,6 +81,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralPins.c index 76e803d36f..ba040914a0 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PeripheralPins.c @@ -293,3 +293,13 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB_FS)}, // USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_FS)}, // USB_NOE +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB_FS)}, // USB_NOE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h index 9cc9fcf3de..dfc5f1f2cb 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/PinNames.h @@ -216,8 +216,8 @@ typedef enum { /**** USB pins ****/ USB_DM = PA_11, USB_DP = PA_12, - USB_NOE = PC_9, - USB_NOE_ALT0 = PA_13, + USB_NOE = PA_13, + USB_NOE_ALT0 = PC_9, /**** OSCILLATOR pins ****/ RCC_OSC32_IN = PC_14, diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralNames.h index 99aaecf012..d1d9b09184 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralNames.h @@ -88,6 +88,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralPins.c index dbb37a29b5..5ceadc4ad1 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PeripheralPins.c @@ -378,3 +378,16 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS // Connected to QUADSPI_NCS [MX25R6435F_SCLK] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to SPBTLE_RF_RST + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_OTG_FS_VBUS [STMPS2141STR_OUT] + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_OTG_FS_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE // Connected to LED3_WIFI_ LED4_BLE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h index 721cfbc2d1..672402024c 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/PinNames.h @@ -241,12 +241,12 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, - USB_OTG_FS_NOE = PC_9, - USB_OTG_FS_NOE_ALT0 = PA_13, + USB_OTG_FS_NOE = PA_13, + USB_OTG_FS_NOE_ALT0 = PC_9, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralNames.h index 96b734a7fc..5dd8fa7b53 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralNames.h @@ -88,6 +88,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE, } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralPins.c index b30d556188..6be2ba6b46 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PeripheralPins.c @@ -378,3 +378,16 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS // Connected to QSPI_CS [N25Q128A13EF840E_S\#] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to COM0 [GH08172T_COM0] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to COM1 [GH08172T_COM1] + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to COM2 [GH08172T_COM2] + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to OTG_FS_DM [EMIF02-USB03F2_D-out] + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to OTG_FS_DP [EMIF02-USB03F2_D+out] +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE // Connected to OTG_FS_PowerSwitchOn [STMPS2141STR_EN] + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h index aac6e58d1a..7cc5e64283 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/PinNames.h @@ -225,12 +225,12 @@ typedef enum { SPI_CS = PA_4, PWM_OUT = PB_3, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, - USB_OTG_FS_NOE = PC_9, - USB_OTG_FS_NOE_ALT0 = PA_13, + USB_OTG_FS_NOE = PA_13, + USB_OTG_FS_NOE_ALT0 = PC_9, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralNames.h index c755ffd3d5..12530f94a3 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralNames.h @@ -88,6 +88,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralPins.c index 3e7d6be5f8..61bc160926 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PeripheralPins.c @@ -337,3 +337,16 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PinNames.h index 8e2bf1d467..78ff94f309 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/PinNames.h @@ -210,12 +210,12 @@ typedef enum { SPI_CS = PB_6, PWM_OUT = PB_3, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, - USB_OTG_FS_NOE = PC_9, - USB_OTG_FS_NOE_ALT0 = PA_13, + USB_OTG_FS_NOE = PA_13, + USB_OTG_FS_NOE_ALT0 = PC_9, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h index c755ffd3d5..12530f94a3 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h @@ -88,6 +88,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralPins.c index 3e7d6be5f8..61bc160926 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralPins.c @@ -337,3 +337,16 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PinNames.h index 8e2bf1d467..78ff94f309 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PinNames.h @@ -210,12 +210,12 @@ typedef enum { SPI_CS = PB_6, PWM_OUT = PB_3, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, - USB_OTG_FS_NOE = PC_9, - USB_OTG_FS_NOE_ALT0 = PA_13, + USB_OTG_FS_NOE = PA_13, + USB_OTG_FS_NOE_ALT0 = PC_9, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_VBUS = PA_9, diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralNames.h index 6e2ccde091..e5ad948fca 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralNames.h @@ -90,6 +90,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralPins.c index 2308722756..04c1d808b1 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PeripheralPins.c @@ -462,3 +462,17 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS // Connected to D8 [D8_IS66WV51216EBLL] {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to DCMI_CLK + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_OTGFS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_OTGFS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_OTGFS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_OTGFS_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE +// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE // Connected to uSD_D1 + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h index 03acad9907..22432e3f36 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/PinNames.h @@ -303,14 +303,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_NOE = PA_13, USB_OTG_FS_NOE_ALT0 = PC_9, - USB_OTG_FS_SOF = PA_14, - USB_OTG_FS_SOF_ALT0 = PA_8, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_SOF_ALT0 = PA_14, USB_OTG_FS_VBUS = PA_9, /**** OSCILLATOR pins ****/ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralNames.h index cdd65b5b8a..3a39137a25 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralNames.h @@ -90,6 +90,10 @@ typedef enum { QSPI_1 = (int)QSPI_R_BASE } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralPins.c index 764da5a1aa..6e97adbd64 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PeripheralPins.c @@ -454,3 +454,17 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE +// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h index e828b5e57e..b8121e454d 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/PinNames.h @@ -279,12 +279,12 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, - USB_OTG_FS_NOE = PC_9, - USB_OTG_FS_NOE_ALT0 = PA_13, + USB_OTG_FS_NOE = PA_13, + USB_OTG_FS_NOE_ALT0 = PC_9, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF_ALT0 = PA_14, USB_OTG_FS_VBUS = PA_9, diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralNames.h index ca8b3a0961..65e8740592 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralNames.h @@ -88,6 +88,10 @@ typedef enum { QSPI_2 = (int)OCTOSPI2_R_BASE } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralPins.c index a174547517..45a93a4efa 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PeripheralPins.c @@ -430,3 +430,17 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PG_12, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF // Connected to USB_SOF [TP1] + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE +// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PinNames.h index 3cf1d1ed3b..7918fb844c 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/PinNames.h @@ -281,12 +281,12 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, - USB_OTG_FS_NOE = PC_9, - USB_OTG_FS_NOE_ALT0 = PA_13, + USB_OTG_FS_NOE = PA_13, + USB_OTG_FS_NOE_ALT0 = PC_9, USB_OTG_FS_SOF = PA_8, USB_OTG_FS_SOF_ALT0 = PA_14, USB_OTG_FS_VBUS = PA_9, diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralNames.h index ca8b3a0961..65e8740592 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralNames.h @@ -88,6 +88,10 @@ typedef enum { QSPI_2 = (int)OCTOSPI2_R_BASE } QSPIName; +typedef enum { + USB_FS = (int)USB_OTG_FS_PERIPH_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralPins.c index a0db3f7922..e55f6cf447 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PeripheralPins.c @@ -446,3 +446,17 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PI_5, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS // Connected to DCMI_VSYNC {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS // Connected to USB_OTGFS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID // Connected to USB_OTGFS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM // Connected to USB_OTGFS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP // Connected to USB_OTG_FS_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE +// {PA_14, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF +// {PC_9, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_NOE // Connected to uSD_D1 + {NC, NC, 0} +}; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PinNames.h index 98dd8da49d..0f26ba5f86 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/PinNames.h @@ -314,14 +314,14 @@ typedef enum { SPI_CS = D10, PWM_OUT = D9, - /**** USB pins ****/ + /**** USB FS pins ****/ USB_OTG_FS_DM = PA_11, USB_OTG_FS_DP = PA_12, USB_OTG_FS_ID = PA_10, USB_OTG_FS_NOE = PA_13, USB_OTG_FS_NOE_ALT0 = PC_9, - USB_OTG_FS_SOF = PA_14, - USB_OTG_FS_SOF_ALT0 = PA_8, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_SOF_ALT0 = PA_14, USB_OTG_FS_VBUS = PA_9, /**** OSCILLATOR pins ****/ From 0e1a04b64a07252212a3e774d00e3da134567ff7 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:19:01 +0200 Subject: [PATCH 13/16] STM32WB USB pins addition --- .../TARGET_NUCLEO_WB55RG/PeripheralNames.h | 4 ++++ .../TARGET_NUCLEO_WB55RG/PeripheralPins.c | 9 +++++++++ 2 files changed, 13 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TARGET_NUCLEO_WB55RG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TARGET_NUCLEO_WB55RG/PeripheralNames.h index 598d86d623..18d86d95fe 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TARGET_NUCLEO_WB55RG/PeripheralNames.h +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TARGET_NUCLEO_WB55RG/PeripheralNames.h @@ -54,6 +54,10 @@ typedef enum { QSPI_1 = (int)QUADSPI_R_BASE } QSPIName; +typedef enum { + USB_FS = (int)USB_BASE, +} USBName; + #ifdef __cplusplus } #endif diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TARGET_NUCLEO_WB55RG/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TARGET_NUCLEO_WB55RG/PeripheralPins.c index 28d511f835..05c64cace9 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TARGET_NUCLEO_WB55RG/PeripheralPins.c +++ b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TARGET_NUCLEO_WB55RG/PeripheralPins.c @@ -251,3 +251,12 @@ MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS {NC, NC, 0} }; + +//*** USBDEVICE *** + +MBED_WEAK const PinMap PinMap_USB_FS[] = { + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB)}, // USB_DM // Connected to USB_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_USB)}, // USB_DP // Connected to USB_DP +// {PA_13, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE // Connected to JTMS + {NC, NC, 0} +}; From 01e798fd6a440d2ffc08dbf14ff2d526390b9e8d Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 6 Sep 2019 17:19:42 +0200 Subject: [PATCH 14/16] STM32 clock configuration depending on USB --- .../TARGET_STM32F413xH/TARGET_DISCO_F413ZH/system_clock.c | 6 ++++-- .../TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/system_clock.c | 6 ++++-- .../TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/system_clock.c | 4 ++++ .../TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/system_clock.c | 4 ++++ .../TARGET_STM32F469xI/TARGET_DISCO_F469NI/system_clock.c | 4 ++++ .../TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c | 7 +++++-- .../TARGET_NUCLEO_H743ZI2/system_clock.c | 7 +++++-- .../TARGET_NUCLEO_L073RZ/device/system_clock.c | 4 ++++ .../TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_clock.c | 7 +++++++ .../TARGET_NUCLEO_L433RC_P/system_clock.c | 7 +++++++ .../TARGET_DISCO_L475VG_IOT01A/system_clock.c | 7 +++++++ .../TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_clock.c | 7 +++++++ .../TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c | 7 +++++++ .../TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c | 7 +++++++ .../TARGET_STM32L496xG/TARGET_DISCO_L496AG/system_clock.c | 6 ++++++ .../TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/system_clock.c | 6 ++++++ .../TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c | 7 +++++++ .../TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c | 7 +++++++ 18 files changed, 102 insertions(+), 8 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/system_clock.c index 259f9afd0b..3d85e811fb 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/system_clock.c @@ -187,6 +187,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE /* Select PLLSAI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.PLLI2S.PLLI2SM = 8; @@ -195,8 +196,8 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) PeriphClkInitStruct.PLLI2S.PLLI2SR = 2; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ; PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC; - HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); @@ -254,6 +255,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE /* Select PLLI2S output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.PLLI2S.PLLI2SM = 16; @@ -262,8 +264,8 @@ uint8_t SetSysClock_PLL_HSI(void) PeriphClkInitStruct.PLLI2S.PLLI2SR = 2; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ; PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC; - HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/system_clock.c index c7f64e5ff2..d57a91fccf 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/system_clock.c @@ -176,14 +176,15 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE /* Select PLLSAI output as USB clock source */ PeriphClkInitStruct.PLLI2S.PLLI2SM = 8; PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4; PeriphClkInitStruct.PLLI2S.PLLI2SN = 192; PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ; - HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); @@ -241,14 +242,15 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE /* Select PLLI2S output as USB clock source */ PeriphClkInitStruct.PLLI2S.PLLI2SM = 16; PeriphClkInitStruct.PLLI2S.PLLI2SN = 192; PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4; PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ; - HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/system_clock.c index ffac286622..8ec02c6686 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/system_clock.c @@ -172,6 +172,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE // Select PLLSAI output as USB clock source PeriphClkInitStruct.PLLSAI.PLLSAIM = 8; PeriphClkInitStruct.PLLSAI.PLLSAIN = 384; @@ -179,6 +180,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; @@ -240,6 +242,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE // Select PLLSAI output as USB clock source PeriphClkInitStruct.PLLSAI.PLLSAIM = 8; PeriphClkInitStruct.PLLSAI.PLLSAIN = 192; @@ -247,6 +250,7 @@ uint8_t SetSysClock_PLL_HSI(void) PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/system_clock.c index fbd2f0e304..4df8d0fce6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/system_clock.c @@ -183,6 +183,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE // Select PLLSAI output as USB clock source PeriphClkInitStruct.PLLSAI.PLLSAIM = 8; PeriphClkInitStruct.PLLSAI.PLLSAIN = 384; @@ -190,6 +191,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); @@ -248,6 +250,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE /* Select PLLSAI output as USB clock source */ PeriphClkInitStruct.PLLSAI.PLLSAIM = 8; PeriphClkInitStruct.PLLSAI.PLLSAIN = 192; @@ -255,6 +258,7 @@ uint8_t SetSysClock_PLL_HSI(void) PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/system_clock.c index b441aa3708..ea0656934b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/system_clock.c @@ -184,12 +184,14 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE // Select PLLSAI output as USB clock source PeriphClkInitStruct.PLLSAI.PLLSAIN = 192; PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4; PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); @@ -248,12 +250,14 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE /* Select PLLSAI output as USB clock source */ PeriphClkInitStruct.PLLSAI.PLLSAIN = 192; PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4; PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c index d3d9922434..0c276b767b 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c @@ -140,13 +140,16 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_USB; - PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; +#if DEVICE_USBDEVICE + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { return 0; // FAIL } + HAL_PWREx_EnableUSBVoltageDetector(); +#endif /* DEVICE_USBDEVICE */ + return 1; // OK } #endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c index c6d77990ac..53e9efa5d0 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c @@ -140,13 +140,16 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_USB; - PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; +#if DEVICE_USBDEVICE + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { return 0; // FAIL } + HAL_PWREx_EnableUSBVoltageDetector(); +#endif /* DEVICE_USBDEVICE */ + return 1; // OK } #endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/system_clock.c index 14cdda5ca5..617760c055 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/system_clock.c @@ -177,11 +177,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ /* Output clock on MCO1 pin(PA8) for debugging purpose */ //if (bypass == 0) @@ -234,11 +236,13 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ /* Output clock on MCO1 pin(PA8) for debugging purpose */ //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_clock.c index 94946fb792..b4e6e820aa 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_clock.c @@ -169,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -181,6 +182,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -242,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -254,6 +257,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -317,10 +321,13 @@ uint8_t SetSysClock_PLL_MSI(void) HAL_RCCEx_EnableMSIPLLMode(); #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */ +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/system_clock.c index 94946fb792..b4e6e820aa 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/system_clock.c @@ -169,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -181,6 +182,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -242,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -254,6 +257,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -317,10 +321,13 @@ uint8_t SetSysClock_PLL_MSI(void) HAL_RCCEx_EnableMSIPLLMode(); #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */ +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/system_clock.c index 7dac0c38b3..bcb449c1db 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/system_clock.c @@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -229,6 +231,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -241,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -304,10 +308,13 @@ uint8_t SetSysClock_PLL_MSI(void) HAL_RCCEx_EnableMSIPLLMode(); #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */ +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_clock.c index 7dac0c38b3..bcb449c1db 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_clock.c @@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -229,6 +231,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -241,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -304,10 +308,13 @@ uint8_t SetSysClock_PLL_MSI(void) HAL_RCCEx_EnableMSIPLLMode(); #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */ +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c index 7dac0c38b3..bcb449c1db 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c @@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -229,6 +231,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -241,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -304,10 +308,13 @@ uint8_t SetSysClock_PLL_MSI(void) HAL_RCCEx_EnableMSIPLLMode(); #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */ +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c index 7dac0c38b3..bcb449c1db 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c @@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -229,6 +231,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -241,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -304,10 +308,13 @@ uint8_t SetSysClock_PLL_MSI(void) HAL_RCCEx_EnableMSIPLLMode(); #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */ +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */ diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/system_clock.c index 736a6e4f42..3dd8ece280 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_DISCO_L496AG/system_clock.c @@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -236,6 +238,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -248,6 +251,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -317,10 +321,12 @@ uint8_t SetSysClock_PLL_MSI(void) HAL_RCCEx_EnableMSIPLLMode(); #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */ +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/system_clock.c index 736a6e4f42..3dd8ece280 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/TARGET_NUCLEO_L496ZG/system_clock.c @@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -236,6 +238,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -248,6 +251,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -317,10 +321,12 @@ uint8_t SetSysClock_PLL_MSI(void) HAL_RCCEx_EnableMSIPLLMode(); #endif /* MBED_CONF_TARGET_LSE_AVAILABLE */ +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c index 858fdc309b..9066453856 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TARGET_NUCLEO_L4R5ZI/system_clock.c @@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -236,6 +238,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -248,6 +251,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -309,10 +313,13 @@ uint8_t SetSysClock_PLL_MSI(void) } /* Enable MSI Auto-calibration through LSE */ HAL_RCCEx_EnableMSIPLLMode(); + +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c index 858fdc309b..9066453856 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TARGET_DISCO_L4R9I/system_clock.c @@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -236,6 +238,7 @@ uint8_t SetSysClock_PLL_HSI(void) return 0; // FAIL } +#if DEVICE_USBDEVICE RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI; @@ -248,6 +251,7 @@ uint8_t SetSysClock_PLL_HSI(void) if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) { return 0; // FAIL } +#endif /* DEVICE_USBDEVICE */ // Disable MSI Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; @@ -309,10 +313,13 @@ uint8_t SetSysClock_PLL_MSI(void) } /* Enable MSI Auto-calibration through LSE */ HAL_RCCEx_EnableMSIPLLMode(); + +#if DEVICE_USBDEVICE /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); +#endif /* DEVICE_USBDEVICE */ // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); From 3950fd0fb27ef108d98957b3559ba7003d22b3eb Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 11 Oct 2019 10:32:48 +0200 Subject: [PATCH 15/16] STM32 targets.json update for USB Removed unsupported MBED2 features: - USB_STM_HAL - USBHOST_OTHER --- targets/targets.json | 65 +++++++++++++++++++------------------------- 1 file changed, 28 insertions(+), 37 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 7cde1f85f0..866117278c 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2393,7 +2393,6 @@ } }, "detect_code": ["0835"], - "macros_add": ["USBHOST_OTHER"], "device_has_add": [ "ANALOGOUT", "CAN", @@ -2536,7 +2535,7 @@ } }, "detect_code": ["0720"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER", "MBED_TICKLESS"], + "macros_add": ["MBED_TICKLESS"], "device_has_add": [ "SERIAL_ASYNCH", "FLASH", @@ -2556,7 +2555,7 @@ "macro_name": "CLOCK_SOURCE" } }, - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER", "HSE_VALUE=25000000"], + "macros_add": ["HSE_VALUE=25000000"], "device_has_add": [ "SERIAL_ASYNCH", "FLASH", @@ -2616,7 +2615,7 @@ "macro_name": "CLOCK_SOURCE" } }, - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER", "MBED_TICKLESS"], + "macros_add": ["MBED_TICKLESS"], "device_has_add": [ "SERIAL_ASYNCH", "FLASH", @@ -2639,7 +2638,6 @@ } }, "detect_code": ["0826"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], "device_has_add": [ "CAN", "SERIAL_ASYNCH", @@ -2764,9 +2762,7 @@ "overrides": { "lpticker_delay_ticks": 4, "tickless-from-us-ticker": true }, "detect_code": ["0743"], "macros_add": [ - "MBED_TICKLESS", - "USB_STM_HAL", - "USBHOST_OTHER" + "MBED_TICKLESS" ], "device_has_add": [ "ANALOGOUT", @@ -2806,9 +2802,7 @@ "overrides": { "lpticker_delay_ticks": 4, "tickless-from-us-ticker": true}, "detect_code": ["0743"], "macros_add": [ - "MBED_TICKLESS", - "USB_STM_HAL", - "USBHOST_OTHER" + "MBED_TICKLESS" ], "device_has_add": [ "ANALOGOUT", @@ -2847,6 +2841,10 @@ "value": "PA_7", "macro_name": "STM32_D11_SPI_ETHERNET_PIN" }, + "usb_speed": { + "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS", + "value": "USE_USB_OTG_FS" + }, "clock_source": { "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", @@ -2863,10 +2861,6 @@ "PSA" ], "components_add": ["FLASHIAP"], - "macros_add": [ - "USB_STM_HAL", - "USBHOST_OTHER" - ], "device_has_add": [ "ANALOGOUT", "CAN", @@ -2937,9 +2931,7 @@ "STM_EMAC" ], "macros_add": [ - "MBEDTLS_CONFIG_HW_SUPPORT", - "USB_STM_HAL", - "USBHOST_OTHER" + "MBEDTLS_CONFIG_HW_SUPPORT" ], "device_has_add": [ "ANALOGOUT", @@ -3007,7 +2999,6 @@ } }, "detect_code": ["0777"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], "device_has_add": [ "ANALOGOUT", "CAN", @@ -3029,10 +3020,13 @@ "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" + }, + "usb_speed": { + "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS", + "value": "USE_USB_OTG_FS" } }, "detect_code": ["0778"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], "device_has_add": [ "ANALOGOUT", "CAN", @@ -3088,8 +3082,7 @@ }, "macros_add": [ "MBED_TICKLESS", - "EXTRA_IDLE_STACK_REQUIRED", - "USBHOST_OTHER" + "EXTRA_IDLE_STACK_REQUIRED" ], "supported_form_factors": ["ARDUINO"], "detect_code": ["0816"], @@ -3141,7 +3134,6 @@ "macros_add": [ "MBED_TICKLESS", "EXTRA_IDLE_STACK_REQUIRED", - "USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT" ], "supported_form_factors": ["ARDUINO"], @@ -3198,8 +3190,7 @@ "supported_form_factors": ["ARDUINO"], "macros_add": [ "MBED_TICKLESS", - "EXTRA_IDLE_STACK_REQUIRED", - "USBHOST_OTHER" + "EXTRA_IDLE_STACK_REQUIRED" ], "detect_code": ["0818"], "device_has_add": [ @@ -3706,7 +3697,6 @@ "STM32L476xx", "MBED_TICKLESS", "EXTRA_IDLE_STACK_REQUIRED", - "USBHOST_OTHER", "MBED_SPLIT_HEAP" ], "device_has_add": [ @@ -4058,9 +4048,12 @@ "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" + }, + "usb_speed": { + "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS", + "value": "USE_USB_OTG_FS" } }, - "macros_add": ["USB_STM_HAL"], "overrides": { "lse_available": 0 }, "device_has_add": ["ANALOGOUT", "TRNG", "FLASH", "MPU"], "release_versions": ["2", "5"], @@ -4117,10 +4110,13 @@ "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI", "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI", "macro_name": "CLOCK_SOURCE" + }, + "usb_speed": { + "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS", + "value": "USE_USB_HS_IN_FS" } }, "overrides": { "lse_available": 0 }, - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], "device_has_add": [ "ANALOGOUT", "CAN", @@ -4153,7 +4149,6 @@ } }, "detect_code": ["0788"], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], "device_has_add": [ "ANALOGOUT", "CAN", @@ -4315,8 +4310,8 @@ "macro_name": "CLOCK_SOURCE" }, "usb_speed": { - "help": "Select the USB speed/connector (0=FullSpeed, 1=HighSpeed)", - "value": "1" + "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS", + "value": "USE_USB_OTG_FS" }, "lpticker_lptim": { "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", @@ -4326,9 +4321,7 @@ "detect_code": ["0815"], "macros_add": [ "MBED_TICKLESS", - "EXTRA_IDLE_STACK_REQUIRED", - "USB_STM_HAL", - "USBHOST_OTHER" + "EXTRA_IDLE_STACK_REQUIRED" ], "device_has_add": [ "ANALOGOUT", @@ -4380,9 +4373,7 @@ "detect_code": ["0817"], "macros_add": [ "MBED_TICKLESS", - "EXTRA_IDLE_STACK_REQUIRED", - "USB_STM_HAL", - "USBHOST_OTHER" + "EXTRA_IDLE_STACK_REQUIRED" ], "device_has_add": [ "ANALOGOUT", From dab09f313836b797eb7886d06b40b631d4a94755 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Mon, 21 Oct 2019 14:51:13 +0200 Subject: [PATCH 16/16] STM32 USB redesign step 1 No more need to explicitly configure each targets. Pins are now defined in the PeripheralPin.c file which is build by a script. --- targets/TARGET_STM/USBEndpoints_STM32.h | 65 ------- targets/TARGET_STM/USBPhyHw.h | 48 +++-- targets/TARGET_STM/USBPhy_STM32.cpp | 240 +++++++++--------------- 3 files changed, 116 insertions(+), 237 deletions(-) delete mode 100644 targets/TARGET_STM/USBEndpoints_STM32.h diff --git a/targets/TARGET_STM/USBEndpoints_STM32.h b/targets/TARGET_STM/USBEndpoints_STM32.h deleted file mode 100644 index a8723b2ae7..0000000000 --- a/targets/TARGET_STM/USBEndpoints_STM32.h +++ /dev/null @@ -1,65 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2018-2018 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#define NUMBER_OF_LOGICAL_ENDPOINTS (4) -#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2) - -/* Define physical endpoint numbers */ - -/* Endpoint No. Type(s) MaxPacket DoubleBuffer */ -/* ---------------- ------------ ---------- --- */ -#define EP0OUT (0x00) /* Control 64 No */ -#define EP0IN (0x80) /* Control 64 No */ -#define EP1OUT (0x01) /* Int/Bulk/Iso 64/64/1023 Yes */ -#define EP1IN (0x81) /* Int/Bulk/Iso 64/64/1023 Yes */ -#define EP2OUT (0x02) /* Int/Bulk/Iso 64/64/1023 Yes */ -#define EP2IN (0x82) /* Int/Bulk/Iso 64/64/1023 Yes */ -#define EP3OUT (0x03) /* Int/Bulk/Iso 64/64/1023 Yes */ -#define EP3IN (0x83) /* Int/Bulk/Iso 64/64/1023 Yes */ - -/* Maximum Packet sizes */ -#define MAX_PACKET_SIZE_SETUP (48) -#define MAX_PACKET_SIZE_EP0 (64) -#define MAX_PACKET_SIZE_EP1 (64) /* Int/Bulk */ -#define MAX_PACKET_SIZE_EP2 (64) /* Int/Bulk */ -#define MAX_PACKET_SIZE_EP3 (200) /* Int/Bulk/iso (44100 stereo 16 bits) */ - -#define MAX_PACKET_SIZE_EP1_ISO (1023) /* Isochronous */ -#define MAX_PACKET_SIZE_EP2_ISO (1023) /* Isochronous */ -#define MAX_PACKET_SIZE_EP3_ISO (1023) /* Isochronous */ - -/* Generic endpoints - intended to be portable accross devices */ -/* and be suitable for simple USB devices. */ - -/* Bulk endpoint */ -#define EPBULK_OUT (EP2OUT) -#define EPBULK_IN (EP2IN) -#define EPBULK_OUT_callback EP2_OUT_callback -#define EPBULK_IN_callback EP2_IN_callback -/* Interrupt endpoint */ -#define EPINT_OUT (EP1OUT) -#define EPINT_IN (EP1IN) -#define EPINT_OUT_callback EP1_OUT_callback -#define EPINT_IN_callback EP1_IN_callback -/* Isochronous endpoint */ -#define EPISO_OUT (EP3OUT) -#define EPISO_IN (EP3IN) -#define EPISO_OUT_callback EP3_OUT_callback -#define EPISO_IN_callback EP3_IN_callback - -#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2) -#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1) -#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3_ISO) diff --git a/targets/TARGET_STM/USBPhyHw.h b/targets/TARGET_STM/USBPhyHw.h index 698ebb2355..53707a73a6 100644 --- a/targets/TARGET_STM/USBPhyHw.h +++ b/targets/TARGET_STM/USBPhyHw.h @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2018-2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited + * Copyright (c) 2018-2019 STMicroelectronics * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,34 +20,41 @@ #include "mbed.h" #include "USBPhy.h" +#include "PeripheralPins.h" -#if defined(TARGET_DISCO_F746NG) -#if (MBED_CONF_TARGET_USB_SPEED == 1) // Defined in json configuration file -#define TARGET_DISCO_F746NG_OTG_HS +#if !defined(MBED_CONF_TARGET_USB_SPEED) + +#if defined (USB) +#define MBED_CONF_TARGET_USB_SPEED USE_USB_NO_OTG +#elif defined(USB_OTG_FS) +#define MBED_CONF_TARGET_USB_SPEED USE_USB_OTG_FS #else -#define TARGET_DISCO_F746NG_OTG_FS -#endif +#define MBED_CONF_TARGET_USB_SPEED USE_USB_OTG_HS #endif -#if defined(TARGET_DISCO_F429ZI) || \ - defined(TARGET_DISCO_F769NI) || \ - defined(TARGET_DISCO_F746NG_OTG_HS) -#define USBHAL_IRQn OTG_HS_IRQn +#endif /* !defined(MBED_CONF_TARGET_USB_SPEED) */ + +#if MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG + +#if defined(TARGET_STM32F3) || defined(TARGET_STM32WB) +#define USBHAL_IRQn USB_HP_IRQn #else +#define USBHAL_IRQn USB_IRQn +#endif + +#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_OTG_FS) #define USBHAL_IRQn OTG_FS_IRQn + +#else +#define USBHAL_IRQn OTG_HS_IRQn + #endif -#include "USBEndpoints_STM32.h" +#define NB_ENDPOINT 16 -#define NB_ENDPOINT 4 // Must be a multiple of 4 bytes - -#define MAXTRANSFER_SIZE 0x200 - -#define FIFO_USB_RAM_SIZE (MAXTRANSFER_SIZE + MAX_PACKET_SIZE_EP0 + MAX_PACKET_SIZE_EP1 + MAX_PACKET_SIZE_EP2 + MAX_PACKET_SIZE_EP3) - -#if (FIFO_USB_RAM_SIZE > 0x500) -#error "FIFO dimensioning incorrect" -#endif +// #define MAXTRANSFER_SIZE 0x200 +#define MAX_PACKET_SIZE_SETUP (48) +#define MAX_PACKET_SIZE_EP0 (64) class USBPhyHw : public USBPhy { public: diff --git a/targets/TARGET_STM/USBPhy_STM32.cpp b/targets/TARGET_STM/USBPhy_STM32.cpp index cf87db41a4..34c86c2d86 100644 --- a/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/targets/TARGET_STM/USBPhy_STM32.cpp @@ -1,5 +1,6 @@ /* mbed Microcontroller Library - * Copyright (c) 2018-2018 ARM Limited + * Copyright (c) 2018-2019 ARM Limited + * Copyright (c) 2018-2019 STMicroelectronics * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,38 +15,28 @@ * limitations under the License. */ -/* This target doesn't support USB */ -#if !defined(DEVICE_USBDEVICE) || !DEVICE_USBDEVICE -#define USBSTM_HAL_UNSUPPORTED -#endif +#if DEVICE_USBDEVICE -/* TARGET NOT STM does not support this HAL */ -#ifndef TARGET_STM -#define USBSTM_HAL_UNSUPPORTED -#endif - -#ifndef USBSTM_HAL_UNSUPPORTED #include "USBPhyHw.h" #include "pinmap.h" /* endpoint conversion macros */ -#define EP_TO_LOG(ep) ((ep) & 0x7F) -#define EP_TO_IDX(ep) (((ep) << 1) | ((ep) & 0x80 ? 1 : 0)) -#define LOG_IN_TO_EP(ep) ((ep) | 0x80) -#define LOG_OUT_TO_EP(ep) ((ep) | 0x00) -#define IDX_TO_EP(ep) (((ep) >> 1)|((ep) & 1) << 7) +#define EP_TO_LOG(ep) ((ep) & 0xF) +#define LOG_IN_TO_EP(log) ((log) | 0x80) +#define LOG_OUT_TO_EP(log) ((log) | 0x00) +#define EP_TO_IDX(ep) ((EP_TO_LOG(ep) << 1) | ((ep) & 0x80 ? 1 : 0)) +#define IDX_TO_EP(idx) (((idx) >> 1)|((idx) & 1) << 7) /* endpoint defines */ #define NUM_ENDPOINTS 4 -#define MAX_PACKET_NON_ISO 64 -#define MAX_PACKET_ISO (256 + 128) // Spec can go up to 1023, only ram for this though -#define ENDPOINT_NON_ISO (USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT) +#define MAX_PACKET_SIZE_NON_ISO 64 +#define MAX_PACKET_SIZE_ISO (256 + 128) // Spec can go up to 1023, only ram for this though static const uint32_t tx_ep_sizes[NUM_ENDPOINTS] = { - MAX_PACKET_NON_ISO, - MAX_PACKET_NON_ISO, - MAX_PACKET_NON_ISO, - MAX_PACKET_ISO + MAX_PACKET_SIZE_NON_ISO, + MAX_PACKET_SIZE_NON_ISO, + MAX_PACKET_SIZE_NON_ISO, + MAX_PACKET_SIZE_ISO }; uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo) @@ -70,12 +61,13 @@ void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) } /* this call at device reception completion on a Out Enpoint */ +/* weak function redefinition */ void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) { USBPhyHw *priv = ((USBPhyHw *)(hpcd->pData)); uint8_t endpoint = LOG_OUT_TO_EP(epnum); priv->epComplete[EP_TO_IDX(endpoint)] = 1; - /* -2 endpoint 0 In out are not in call back list */ + if (epnum) { priv->events->out(endpoint); } else { @@ -84,52 +76,60 @@ void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) } /* this is call at device transmission completion on In endpoint */ +/* weak function redefinition */ void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) { USBPhyHw *priv = ((USBPhyHw *)(hpcd->pData)); uint8_t endpoint = LOG_IN_TO_EP(epnum); priv->epComplete[EP_TO_IDX(endpoint)] = 1; - /* -2 endpoint 0 In out are not in call back list */ + if (epnum) { priv->events->in(endpoint); } else { priv->events->ep0_in(); } } + /* This is call at device set up reception */ +/* weak function redefinition */ void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) { USBPhyHw *priv = ((USBPhyHw *)(hpcd->pData)); priv->events->ep0_setup(); } +/* weak function redefinition */ void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) { USBPhyHw *priv = ((USBPhyHw *)(hpcd->pData)); priv->events->suspend(1); } +/* weak function redefinition */ void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) { USBPhyHw *priv = ((USBPhyHw *)(hpcd->pData)); priv->events->suspend(0); } +/* weak function redefinition */ void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) { // Nothing to do } +/* weak function redefinition */ void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) { // Nothing to do } +/* weak function redefinition */ void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) { USBPhyHw *obj = ((USBPhyHw *)(hpcd->pData)); unsigned int i; - for (i = 0; i < hpcd->Init.dev_endpoints; i++) { + for (i = 0; i < NB_ENDPOINT; i++) { obj->epComplete[2 * i] = 0; HAL_PCD_EP_Close(hpcd, IDX_TO_EP(2 * i)); HAL_PCD_EP_Flush(hpcd, IDX_TO_EP(2 * i)); @@ -138,8 +138,8 @@ void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) HAL_PCD_EP_Flush(hpcd, IDX_TO_EP(2 * i + 1)); } - obj->endpoint_add(EP0IN, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); - obj->endpoint_add(EP0OUT, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + obj->endpoint_add(0x80, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); + obj->endpoint_add(0x00, MAX_PACKET_SIZE_EP0, USB_EP_TYPE_CTRL); obj->events->reset(); } @@ -166,6 +166,8 @@ USBPhyHw::~USBPhyHw() void USBPhyHw::init(USBPhyEvents *events) { + const PinMap *map = NULL; + NVIC_DisableIRQ(USBHAL_IRQn); if (this->events == NULL) { @@ -176,136 +178,68 @@ void USBPhyHw::init(USBPhyEvents *events) memset(epComplete, 0, sizeof(epComplete)); memset(&hpcd.Init, 0, sizeof(hpcd.Init)); -#if defined(TARGET_DISCO_F769NI) || \ - defined(TARGET_DISCO_F746NG_OTG_HS) + hpcd.Init.dev_endpoints = NB_ENDPOINT; + hpcd.Init.ep0_mps = MAX_PACKET_SIZE_EP0; + hpcd.Init.low_power_enable = DISABLE; +#if !defined(TARGET_STM32F2) + hpcd.Init.lpm_enable = DISABLE; + hpcd.Init.battery_charging_enable = DISABLE; +#endif +#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_OTG_HS) hpcd.Instance = USB_OTG_HS; hpcd.Init.phy_itface = PCD_PHY_ULPI; hpcd.Init.Sof_enable = 1; + hpcd.Init.dma_enable = DISABLE; + hpcd.Init.vbus_sensing_enable = ENABLE; + hpcd.Init.use_external_vbus = DISABLE; hpcd.Init.speed = PCD_SPEED_HIGH; -#elif defined(TARGET_DISCO_F429ZI) + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); + __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); + map = PinMap_USB_HS; +#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_OTG_HS) hpcd.Instance = USB_OTG_HS; hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; hpcd.Init.Sof_enable = 1; hpcd.Init.speed = PCD_SPEED_HIGH; -#else +#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_OTG_FS) + hpcd.Instance = USB_OTG_FS; hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; hpcd.Init.Sof_enable = 1; hpcd.Init.speed = PCD_SPEED_FULL; + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + map = PinMap_USB_FS; +#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG) + hpcd.Instance = USB; + hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd.Init.speed = PCD_SPEED_FULL; + + __HAL_RCC_USB_CLK_ENABLE(); + map = PinMap_USB_FS; #endif - hpcd.Init.dev_endpoints = NB_ENDPOINT; - hpcd.Init.ep0_mps = MAX_PACKET_SIZE_EP0; // Pass instance for usage inside call back instance = this; // Configure USB pins and other clocks -#if defined(TARGET_NUCLEO_F207ZG) || \ - defined(TARGET_NUCLEO_F401RE) || \ - defined(TARGET_NUCLEO_F411RE) || \ - defined(TARGET_NUCLEO_F412ZG) || \ - defined(TARGET_NUCLEO_F413ZH) || \ - defined(TARGET_NUCLEO_F429ZI) || \ - defined(TARGET_NUCLEO_F446RE) || \ - defined(TARGET_NUCLEO_F446ZE) || \ - defined(TARGET_NUCLEO_F767ZI) || \ - defined(TARGET_NUCLEO_F746ZG) || \ - defined(TARGET_NUCLEO_F756ZG) || \ - defined(TARGET_DISCO_F407VG) || \ - defined(TARGET_OLIMEX_STM32E407_F407ZG) || \ - defined(TARGET_DISCO_F413ZH) || \ - defined(TARGET_DISCO_F469NI) || \ - defined(TARGET_DISCO_F746NG_OTG_FS) - __HAL_RCC_GPIOA_CLK_ENABLE(); - pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM - pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP -#if defined(TARGET_DISCO_F746NG_OTG_FS) - __HAL_RCC_GPIOJ_CLK_ENABLE(); - pin_function(PJ_12, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS -#else - pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS -#endif - pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID -#if !defined(TARGET_OLIMEX_STME407_F407ZG) - pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // SOF -#endif - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - -#elif defined(TARGET_DISCO_F429ZI) - __HAL_RCC_GPIOB_CLK_ENABLE(); - pin_function(PB_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DM - pin_function(PB_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_OTG_HS_FS)); // DP - pin_function(PB_13, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); // VBUS - __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); - -#elif defined(TARGET_DISCO_L475VG_IOT01A) || \ - defined(TARGET_DISCO_L476VG) - __HAL_RCC_GPIOA_CLK_ENABLE(); - pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM - pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP - __HAL_RCC_GPIOC_CLK_ENABLE(); - pin_function(PC_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS - __HAL_RCC_PWR_CLK_ENABLE(); - HAL_PWREx_EnableVddUSB(); - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - -#elif defined(TARGET_NUCLEO_L496ZG) || \ - defined(TARGET_NUCLEO_L496ZG_P) || \ - defined(TARGET_DISCO_L496AG) || \ - defined(TARGET_DISCO_L4R9I) || \ - defined(TARGET_NUCLEO_L4R5ZI) - __HAL_RCC_GPIOA_CLK_ENABLE(); - pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM - pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP - pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID - pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS - __HAL_RCC_PWR_CLK_ENABLE(); - HAL_PWREx_EnableVddUSB(); - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - -#elif defined(TARGET_DISCO_F769NI) || \ - defined(TARGET_DISCO_F746NG_OTG_HS) - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOH_CLK_ENABLE(); - __HAL_RCC_GPIOI_CLK_ENABLE(); - pin_function(PA_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // CLK - pin_function(PA_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D0 - pin_function(PB_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D1 - pin_function(PB_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D2 - pin_function(PB_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D3 - pin_function(PB_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D4 - pin_function(PB_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D5 - pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D6 - pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D7 - pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // STP - pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT -#if defined(TARGET_DISCO_F769NI) - pin_function(PI_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR -#else - pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR -#endif - __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); - __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); - -#elif defined(TARGET_STEVAL_3DP001V1) - __HAL_RCC_GPIOB_CLK_ENABLE(); - pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM - pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - -#else -#error "USB pins are not configured !" -#endif + while (map->pin != NC) { + pin_function(map->pin, map->function); + map++; + } +#if !defined(TARGET_STM32WB) __HAL_RCC_SYSCFG_CLK_ENABLE(); +#endif + +#if defined(PWR_CR2_USV) + HAL_PWREx_EnableVddUSB(); +#endif // Configure PCD and FIFOs hpcd.pData = (void *)this; hpcd.State = HAL_PCD_STATE_RESET; - HAL_PCD_Init(&hpcd); + MBED_ASSERT(HAL_PCD_Init(&hpcd) == HAL_OK); uint32_t total_bytes = 0; @@ -316,7 +250,7 @@ void USBPhyHw::init(USBPhyEvents *events) * - setup buffer - 10 words as specified by Reference Manual * - global nak out - 1 words as specified by Reference Manual */ - uint32_t fifo_size = (MAX_PACKET_ISO + 4) + (MAX_PACKET_NON_ISO + 4) * 2 + (10 * 4) + (1 * 4); + uint32_t fifo_size = (MAX_PACKET_SIZE_ISO + 4) + (MAX_PACKET_SIZE_NON_ISO + 4) * 2 + (10 * 4) + (1 * 4); HAL_PCDEx_SetRxFiFo(&hpcd, (fifo_size / 4)); total_bytes += fifo_size; @@ -338,7 +272,7 @@ void USBPhyHw::init(USBPhyEvents *events) void USBPhyHw::deinit() { - HAL_PCD_DeInit(&hpcd); + MBED_ASSERT(HAL_PCD_DeInit(&hpcd) == HAL_OK); NVIC_DisableIRQ(USBHAL_IRQn); if (events != NULL) { @@ -354,12 +288,12 @@ bool USBPhyHw::powered() void USBPhyHw::connect() { - HAL_PCD_Start(&hpcd); + MBED_ASSERT(HAL_PCD_Start(&hpcd) == HAL_OK); } void USBPhyHw::disconnect() { - HAL_PCD_Stop(&hpcd); + MBED_ASSERT(HAL_PCD_Stop(&hpcd) == HAL_OK); } void USBPhyHw::configure() @@ -384,7 +318,7 @@ void USBPhyHw::sof_disable() void USBPhyHw::set_address(uint8_t address) { - HAL_PCD_SetAddress(&hpcd, address); + MBED_ASSERT(HAL_PCD_SetAddress(&hpcd, address) == HAL_OK); } void USBPhyHw::remote_wakeup() @@ -397,10 +331,10 @@ const usb_ep_table_t *USBPhyHw::endpoint_table() static const usb_ep_table_t table = { 1280, // 1.25K for endpoint buffers but space is allocated up front { - {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, - {ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, - {ENDPOINT_NON_ISO | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, - {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_CTRL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, // NON ISO + {USB_EP_ATTR_ALLOW_BULK | USB_EP_ATTR_ALLOW_INT | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, // NON ISO + {USB_EP_ATTR_ALLOW_ALL | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, {0 | USB_EP_ATTR_DIR_IN_AND_OUT, 0, 0}, @@ -437,14 +371,14 @@ void USBPhyHw::ep0_setup_read_result(uint8_t *buffer, uint32_t size) void USBPhyHw::ep0_read(uint8_t *data, uint32_t size) { HAL_StatusTypeDef ret; - epComplete[EP_TO_IDX(EP0OUT)] = 2; - ret = HAL_PCD_EP_Receive(&hpcd, EP0OUT, data, size > MAX_PACKET_SIZE_EP0 ? MAX_PACKET_SIZE_EP0 : size); + epComplete[EP_TO_IDX(0x00)] = 2; + ret = HAL_PCD_EP_Receive(&hpcd, 0x00, data, size > MAX_PACKET_SIZE_EP0 ? MAX_PACKET_SIZE_EP0 : size); MBED_ASSERT(ret != HAL_BUSY); } uint32_t USBPhyHw::ep0_read_result() { - epComplete[EP_TO_IDX(EP0OUT)] = 0; + epComplete[EP_TO_IDX(0x00)] = 0; return HAL_PCD_EP_GetRxCount(&hpcd, 0); } @@ -452,13 +386,13 @@ void USBPhyHw::ep0_write(uint8_t *buffer, uint32_t size) { /* check that endpoint maximum size is not exceeding TX fifo */ MBED_ASSERT(hpcd.IN_ep[0].maxpacket >= size); - endpoint_write(EP0IN, buffer, size); + endpoint_write(0x80, buffer, size); } void USBPhyHw::ep0_stall() { - endpoint_stall(EP0IN); - endpoint_stall(EP0OUT); + endpoint_stall(0x80); + endpoint_stall(0x00); } bool USBPhyHw::endpoint_add(usb_ep_t endpoint, uint32_t max_packet, usb_ep_type_t type) @@ -535,10 +469,12 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { -#ifndef TARGET_STM32L4 - HAL_StatusTypeDef ret = HAL_PCD_EP_Abort(&hpcd, endpoint); - MBED_ASSERT(ret == HAL_OK); +#if (TARGET_STM32F4) || (TARGET_STM32F2) + HAL_StatusTypeDef ret = HAL_PCD_EP_Abort(&hpcd, endpoint); // fix me: ST driver should not be modified +#else + HAL_StatusTypeDef ret = HAL_PCD_EP_Close(&hpcd, endpoint); // fix me: implementation not correct #endif + MBED_ASSERT(ret == HAL_OK); } void USBPhyHw::process() @@ -555,4 +491,4 @@ void USBPhyHw::_usbisr(void) instance->events->start_process(); } -#endif +#endif /* DEVICE_USBDEVICE */