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Merge pull request #13600 from rajkan01/fpga_test_shield_refactor 

Refactor COMPONENT_FPGA_CI_TEST_SHIELD directory structure
pull/13545/head
Martin Kojtal 2020-09-17 09:00:49 +01:00 committed by GitHub
parent 4809f517f6 2bc7bb7a52
commit ddaf37c957
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GPG Key ID: 4AEE18F83AFDEB23
18 changed files with 7 additions and 7 deletions
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2
.travis.yml
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@ -282,7 +282,7 @@ matrix:
- | - |
rm -r cmsis/CMSIS_5/CMSIS/RTOS2 cmsis/device/rtos drivers/source/usb connectivity/cellular connectivity/drivers/cellular \ rm -r cmsis/CMSIS_5/CMSIS/RTOS2 cmsis/device/rtos drivers/source/usb connectivity/cellular connectivity/drivers/cellular \
connectivity/libraries/ppp connectivity/netsocket connectivity/nanostack connectivity/lwipstack features/frameworks/greentea-client \ connectivity/libraries/ppp connectivity/netsocket connectivity/nanostack connectivity/lwipstack features/frameworks/greentea-client \
features/frameworks/utest features/frameworks/unity components BUILD features/frameworks/utest features/frameworks/unity BUILD
- python tools/make.py -t GCC_ARM -m NUCLEO_F103RB --source=. --build=BUILD/NUCLEO_F103RB/GCC_ARM -j0 - python tools/make.py -t GCC_ARM -m NUCLEO_F103RB --source=. --build=BUILD/NUCLEO_F103RB/GCC_ARM -j0
# Run profiling tests # Run profiling tests
- make -C ${EVENTS}/tests/unit prof | tee prof - make -C ${EVENTS}/tests/unit prof | tee prof

0
components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/DynamicPinList.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/DynamicPinList.h
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/I2CTester.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/I2CTester.h
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/MbedTester.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/MbedTester.h
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/SPIMasterTester.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/SPIMasterTester.h
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/SPISlaveTester.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/SPISlaveTester.h
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/SPITester.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/SPITester.h
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/UARTTester.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/UARTTester.h
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/fpga_config.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/fpga_config.h
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/test_utils.h → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/include/fpga_ci_test_shield/test_utils.h
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0
components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/DynamicPinList.cpp → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/source/DynamicPinList.cpp
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/I2CTester.cpp → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/source/I2CTester.cpp
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/MbedTester.cpp → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/source/MbedTester.cpp
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components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/SPIMasterTester.cpp → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/source/SPIMasterTester.cpp
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0
components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/SPISlaveTester.cpp → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/source/SPISlaveTester.cpp
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0
components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/SPITester.cpp → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/source/SPITester.cpp
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0
components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/UARTTester.cpp → features/frameworks/COMPONENT_FPGA_CI_TEST_SHIELD/source/UARTTester.cpp
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12
hal/tests/TESTS/mbed_hal_fpga_ci_test_shield/README.md
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@ -5,7 +5,7 @@
![30% center](fpga_test_shield.jpg) ![30% center](fpga_test_shield.jpg)
``` ```
mbed test -n tests*fpga* --app-config tests/configs/fpga.json mbed test -n hal-tests-tests*fpga* --app-config TESTS/configs/fpga.json
``` ```
FPGA_CI_TEST_SHIELD needed macro FPGA_CI_TEST_SHIELD needed macro
@ -23,19 +23,19 @@ Tested from factor is defined by MBED_CONF_TARGET_DEFAULT_FORM_FACTOR
When "default-form-factor" is not set, ARDUINO form factor is used. When "default-form-factor" is not set, ARDUINO form factor is used.
Default ff_arduino_pins is defined in: Default ff_arduino_pins is defined in:
https://github.com/ARMmbed/mbed-os/blob/master/hal/mbed_pinmap_default.cpp#L28-L32 https://github.com/ARMmbed/mbed-os/blob/master/hal/source/mbed_pinmap_default.cpp#L28-L32
Default ff_arduino_names is defined in: Default ff_arduino_names is defined in:
https://github.com/ARMmbed/mbed-os/blob/master/hal/mbed_pinmap_default.cpp#L34-L38 https://github.com/ARMmbed/mbed-os/blob/master/hal/source/mbed_pinmap_default.cpp#L34-L38
Default empty_gpio_pinmap is defined in: Default empty_gpio_pinmap is defined in:
https://github.com/ARMmbed/mbed-os/blob/master/hal/mbed_gpio.c#L89-L114 https://github.com/ARMmbed/mbed-os/blob/master/hal/source/mbed_gpio.c#L89-L114
Some pins are restricted: Some pins are restricted:
https://github.com/ARMmbed/mbed-os/blob/master/hal/mbed_pinmap_default.cpp#L69-L73 https://github.com/ARMmbed/mbed-os/blob/master/hal/source/mbed_pinmap_default.cpp#L69-L73
Some peripherals are restricted: Some peripherals are restricted:
https://github.com/ARMmbed/mbed-os/blob/master/hal/mbed_pinmap_default.cpp#L94-L100 https://github.com/ARMmbed/mbed-os/blob/master/hal/source/mbed_pinmap_default.cpp#L94-L100
## Known issues ## Known issues