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STM32L4 : alignment with STM32Cube_FW_L4_V1.14.0

pull/13741/head
jeromecoutant 2020-10-07 10:29:49 +02:00
parent 3b14c478c1
commit dcc066db59
38 changed files with 342 additions and 376 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/STM32L4xx_HAL_Driver/stm32l4xx_hal_def.h
View File

@ -28,7 +28,7 @@
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx.h"
#include "stm32_hal_legacy.h" /* Aliases file for old names compatibility */
#include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */
#include <stddef.h>
/* Exported types ------------------------------------------------------------*/

2
targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/stm32l4xx_hal_conf.h
View File

@ -277,7 +277,7 @@
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32l4xx_hal_can_legacy.h"
#include "Legacy/stm32l4xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TOOLCHAIN_ARM/startup_stm32l432xx.S
View File

@ -22,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
PRESERVE8
THUMB
@ -32,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -327,6 +327,11 @@ CRS_IRQHandler
ENDP
ALIGN
END
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TOOLCHAIN_ARM/stm32l432xc.sct
View File

@ -25,13 +25,13 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
/* Round up VECTORS_SIZE to 8 bytes */

62
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TOOLCHAIN_GCC_ARM/startup_stm32l432xx.S
View File

@ -7,7 +7,7 @@
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address,
* - Configure the clock system
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
@ -92,20 +92,12 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bx lr
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
@ -404,49 +396,49 @@ g_pfnVectors:
.weak COMP_IRQHandler
.thumb_set COMP_IRQHandler,Default_Handler
.weak LPTIM1_IRQHandler
.thumb_set LPTIM1_IRQHandler,Default_Handler
.weak LPTIM2_IRQHandler
.thumb_set LPTIM2_IRQHandler,Default_Handler
.thumb_set LPTIM2_IRQHandler,Default_Handler
.weak USB_IRQHandler
.thumb_set USB_IRQHandler,Default_Handler
.thumb_set USB_IRQHandler,Default_Handler
.weak DMA2_Channel6_IRQHandler
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
.weak DMA2_Channel7_IRQHandler
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
.weak LPUART1_IRQHandler
.thumb_set LPUART1_IRQHandler,Default_Handler
.thumb_set LPUART1_IRQHandler,Default_Handler
.weak QUADSPI_IRQHandler
.thumb_set QUADSPI_IRQHandler,Default_Handler
.thumb_set QUADSPI_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak SAI1_IRQHandler
.thumb_set SAI1_IRQHandler,Default_Handler
.weak SWPMI1_IRQHandler
.thumb_set SWPMI1_IRQHandler,Default_Handler
.weak TSC_IRQHandler
.thumb_set TSC_IRQHandler,Default_Handler
.weak RNG_IRQHandler
.thumb_set RNG_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
.weak CRS_IRQHandler
.thumb_set CRS_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

2
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TOOLCHAIN_IAR/startup_stm32l432xx.S
View File

@ -1,4 +1,4 @@
;/********************* COPYRIGHT(c) 2017 STMicroelectronics ********************
;********************************************************************************
;* File Name : startup_stm32l432xx.s
;* Author : MCD Application Team
;* Description : STM32L432xx Ultra Low Power Devices vector

2
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TOOLCHAIN_IAR/stm32l432xc.icf
View File

@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
}
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TOOLCHAIN_ARM/startup_stm32l433xx.S
View File

@ -22,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
PRESERVE8
THUMB
@ -32,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -339,6 +339,11 @@ CRS_IRQHandler
ENDP
ALIGN
END
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TOOLCHAIN_ARM/stm32l433xc.sct
View File

@ -25,13 +25,13 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
/* Round up VECTORS_SIZE to 8 bytes */

16
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TOOLCHAIN_GCC_ARM/startup_stm32l433xx.S
View File

@ -7,7 +7,7 @@
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address,
* - Configure the clock system
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
@ -92,20 +92,12 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bx lr
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TOOLCHAIN_ARM/startup_stm32l443xx.S
View File

@ -22,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
PRESERVE8
THUMB
@ -32,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -341,6 +341,11 @@ CRS_IRQHandler
ENDP
ALIGN
END
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

19
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/TOOLCHAIN_GCC_ARM/startup_stm32l443xx.S
View File

@ -7,7 +7,7 @@
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address,
* - Configure the clock system
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
@ -92,21 +92,13 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bx lr
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
@ -458,6 +450,7 @@ g_pfnVectors:
.weak LCD_IRQHandler
.thumb_set LCD_IRQHandler,Default_Handler
.weak AES_IRQHandler
.thumb_set AES_IRQHandler,Default_Handler

11
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/TOOLCHAIN_ARM/startup_stm32l452xx.S
View File

@ -22,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
PRESERVE8
THUMB
@ -32,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -347,6 +347,11 @@ I2C4_ER_IRQHandler
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/TOOLCHAIN_ARM/stm32l452xe.sct
View File

@ -25,13 +25,13 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
/* Round up VECTORS_SIZE to 8 bytes */

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/TOOLCHAIN_GCC_ARM/startup_stm32l452xx.S
View File

@ -92,19 +92,12 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**

59
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TOOLCHAIN_ARM/startup_stm32l471xx.S
View File

@ -1,9 +1,7 @@
;********************** COPYRIGHT(c) 2016 STMicroelectronics ******************
;* File Name : startup_stm32l476xx.s
;*******************************************************************************
;* File Name : startup_stm32l471xx.s
;* Author : MCD Application Team
;* Version : V1.1.1
;* Date : 29-April-2016
;* Description : STM32L476xx Ultra Low Power devices vector table for MDK-ARM toolchain.
;* Description : STM32L471xx Ultra Low Power devices vector table for MDK-ARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
@ -15,30 +13,16 @@
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
;*
;* Redistribution and use in source and binary forms, with or without modification,
;* are permitted provided that the following conditions are met:
;* 1. Redistributions of source code must retain the above copyright notice,
;* this list of conditions and the following disclaimer.
;* 2. Redistributions in binary form must reproduce the above copyright notice,
;* this list of conditions and the following disclaimer in the documentation
;* and/or other materials provided with the distribution.
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
;* may be used to endorse or promote products derived from this software
;* without specific prior written permission.
;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
;* This software component is licensed by ST under BSD 3-Clause license,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
;* opensource.org/licenses/BSD-3-Clause
;*
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
;*******************************************************************************
;
PRESERVE8
THUMB
@ -48,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -135,7 +119,7 @@ __Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD COMP_IRQHandler ; COMP Interrupt
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
DCD OTG_FS_IRQHandler ; USB OTG FS
DCD 0 ; Reserved
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
DCD LPUART1_IRQHandler ; LP UART1 interrupt
@ -146,8 +130,8 @@ __Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
DCD LCD_IRQHandler ; LCD global interrupt
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD RNG_IRQHandler ; RNG global interrupt
DCD FPU_IRQHandler ; FPU
@ -282,7 +266,6 @@ Default_Handler PROC
EXPORT COMP_IRQHandler [WEAK]
EXPORT LPTIM1_IRQHandler [WEAK]
EXPORT LPTIM2_IRQHandler [WEAK]
EXPORT OTG_FS_IRQHandler [WEAK]
EXPORT DMA2_Channel6_IRQHandler [WEAK]
EXPORT DMA2_Channel7_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
@ -293,7 +276,6 @@ Default_Handler PROC
EXPORT SAI2_IRQHandler [WEAK]
EXPORT SWPMI1_IRQHandler [WEAK]
EXPORT TSC_IRQHandler [WEAK]
EXPORT LCD_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT FPU_IRQHandler [WEAK]
@ -364,7 +346,6 @@ DFSDM1_FLT2_IRQHandler
COMP_IRQHandler
LPTIM1_IRQHandler
LPTIM2_IRQHandler
OTG_FS_IRQHandler
DMA2_Channel6_IRQHandler
DMA2_Channel7_IRQHandler
LPUART1_IRQHandler
@ -375,7 +356,6 @@ SAI1_IRQHandler
SAI2_IRQHandler
SWPMI1_IRQHandler
TSC_IRQHandler
LCD_IRQHandler
RNG_IRQHandler
FPU_IRQHandler
@ -384,6 +364,11 @@ FPU_IRQHandler
ENDP
ALIGN
END
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

82
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TOOLCHAIN_ARM/stm32l471xg.sct
View File

@ -1,69 +1,59 @@
#! armcc -E
; Scatter-Loading Description File
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, STMicroelectronics
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice,
; this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
; 3. Neither the name of STMicroelectronics nor the names of its contributors
; may be used to endorse or promote products derived from this software
; without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; SPDX-License-Identifier: BSD-3-Clause
;******************************************************************************
;* @attention
;*
;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved.
;*
;* This software component is licensed by ST under BSD 3-Clause license,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
;* opensource.org/licenses/BSD-3-Clause
;*
;******************************************************************************
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 0x100000
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00018000-Stack_Size { ; RW data 96k L4-SRAM1
.ANY (+RW +ZI)
}
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) { ;
.ANY (+RW +ZI)
}
ARM_LIB_STACK (0x20000000+0x00018000) EMPTY -Stack_Size { ; stack
RW_IRAM2 (MBED_RAM1_START+VECTORS_SIZE) (MBED_RAM1_SIZE-VECTORS_SIZE) { ;
.ANY (+RW +ZI)
}
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
}
}

79
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TOOLCHAIN_GCC_ARM/startup_stm32l471xx.S
View File

@ -1,10 +1,8 @@
/**
******************************************************************************
* @file startup_stm32l476xx.s
* @file startup_stm32l471xx.s
* @author MCD Application Team
* @version V1.1.1
* @date 29-April-2016
* @brief STM32L476xx devices vector table GCC toolchain.
* @brief STM32L471xx devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
@ -17,29 +15,13 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
@ -59,6 +41,10 @@ defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF1E0F85F
/**
@ -92,20 +78,27 @@ LoopCopyDataInit:
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bx lr
.size Reset_Handler, .-Reset_Handler
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
@ -216,7 +209,7 @@ g_pfnVectors:
.word COMP_IRQHandler
.word LPTIM1_IRQHandler
.word LPTIM2_IRQHandler
.word OTG_FS_IRQHandler
.word 0
.word DMA2_Channel6_IRQHandler
.word DMA2_Channel7_IRQHandler
.word LPUART1_IRQHandler
@ -227,8 +220,8 @@ g_pfnVectors:
.word SAI2_IRQHandler
.word SWPMI1_IRQHandler
.word TSC_IRQHandler
.word LCD_IRQHandler
.word 0
.word 0
.word 0
.word RNG_IRQHandler
.word FPU_IRQHandler
@ -469,9 +462,6 @@ g_pfnVectors:
.weak LPTIM2_IRQHandler
.thumb_set LPTIM2_IRQHandler,Default_Handler
.weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
.weak DMA2_Channel6_IRQHandler
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
@ -502,9 +492,6 @@ g_pfnVectors:
.weak TSC_IRQHandler
.thumb_set TSC_IRQHandler,Default_Handler
.weak LCD_IRQHandler
.thumb_set LCD_IRQHandler,Default_Handler
.weak RNG_IRQHandler
.thumb_set RNG_IRQHandler,Default_Handler

39
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TOOLCHAIN_GCC_ARM/stm32l471xg.ld
View File

@ -1,23 +1,45 @@
/* Linker script to configure memory regions. */
/*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
#include "../cmsis_nvic.h"
#if !defined(MBED_APP_START)
#define MBED_APP_START 0x08000000
#define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE 1024k
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
SRAM2 (rwx) : ORIGIN = MBED_RAM1_START + VECTORS_SIZE, LENGTH = MBED_RAM1_SIZE - VECTORS_SIZE
SRAM1 (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
@ -55,6 +77,7 @@ SECTIONS
{
KEEP(*(.isr_vector))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
@ -100,7 +123,7 @@ SECTIONS
{
__StackLimit = .;
*(.stack*);
. += STACK_SIZE - (. - __StackLimit);
. += MBED_CONF_TARGET_BOOT_STACK_SIZE - (. - __StackLimit);
} > SRAM2
/* Set stack top to end of RAM, and stack limit move down by

58
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TOOLCHAIN_IAR/startup_stm32l471xx.S
View File

@ -1,9 +1,7 @@
;/********************* COPYRIGHT(c) 2016 STMicroelectronics ********************
;* File Name : startup_stm32l476xx.s
;********************************************************************************
;* File Name : startup_stm32l471xx.s
;* Author : MCD Application Team
;* Version : V1.1.1
;* Date : 29-April-2016
;* Description : STM32L476xx Ultra Low Power Devices vector
;* Description : STM32L471xx Ultra Low Power Devices vector
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == _iar_program_start,
@ -15,27 +13,13 @@
;* priority is Privileged, and the Stack is set to Main.
;********************************************************************************
;*
;* Redistribution and use in source and binary forms, with or without modification,
;* are permitted provided that the following conditions are met:
;* 1. Redistributions of source code must retain the above copyright notice,
;* this list of conditions and the following disclaimer.
;* 2. Redistributions in binary form must reproduce the above copyright notice,
;* this list of conditions and the following disclaimer in the documentation
;* and/or other materials provided with the distribution.
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
;* may be used to endorse or promote products derived from this software
;* without specific prior written permission.
;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
;* All rights reserved.</center></h2>
;*
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;* This software component is licensed by ST under BSD 3-Clause license,
;* the "License"; You may not use this file except in compliance with the
;* License. You may obtain a copy of the License at:
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
@ -154,7 +138,7 @@ __vector_table
DCD COMP_IRQHandler ; COMP Interrupt
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
DCD OTG_FS_IRQHandler ; USB OTG FS
DCD 0 ; Reserved
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
DCD LPUART1_IRQHandler ; LP UART 1 interrupt
@ -165,8 +149,8 @@ __vector_table
DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt
DCD SWPMI1_IRQHandler ; Serial Wire Interface global interrupt
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
DCD LCD_IRQHandler ; LCD global interrupt
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD RNG_IRQHandler ; RNG global interrupt
DCD FPU_IRQHandler ; FPU
@ -563,11 +547,6 @@ LPTIM1_IRQHandler
LPTIM2_IRQHandler
B LPTIM2_IRQHandler
PUBWEAK OTG_FS_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
OTG_FS_IRQHandler
B OTG_FS_IRQHandler
PUBWEAK DMA2_Channel6_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
DMA2_Channel6_IRQHandler
@ -603,7 +582,7 @@ I2C3_ER_IRQHandler
SAI1_IRQHandler
B SAI1_IRQHandler
PUBWEAK SAI2_IRQHandler
PUBWEAK SAI2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
SAI2_IRQHandler
B SAI2_IRQHandler
@ -613,15 +592,10 @@ SAI2_IRQHandler
SWPMI1_IRQHandler
B SWPMI1_IRQHandler
PUBWEAK TSC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PUBWEAK TSC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TSC_IRQHandler
B TSC_IRQHandler
PUBWEAK LCD_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
LCD_IRQHandler
B LCD_IRQHandler
B TSC_IRQHandler
PUBWEAK RNG_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TOOLCHAIN_ARM/startup_stm32l475xx.S
View File

@ -22,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
PRESERVE8
THUMB
@ -32,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -366,6 +366,11 @@ FPU_IRQHandler
ENDP
ALIGN
END
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TOOLCHAIN_ARM/stm32l475xg.sct
View File

@ -25,13 +25,13 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
/* Round up VECTORS_SIZE to 8 bytes */

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TOOLCHAIN_GCC_ARM/startup_stm32l475xx.S
View File

@ -92,19 +92,12 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TOOLCHAIN_ARM/startup_stm32l476xx.S
View File

@ -22,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
PRESERVE8
THUMB
@ -32,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -368,6 +368,11 @@ FPU_IRQHandler
ENDP
ALIGN
END
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TOOLCHAIN_ARM/stm32l476xg.sct
View File

@ -25,13 +25,13 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
/* Round up VECTORS_SIZE to 8 bytes */

33
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.S
View File

@ -41,6 +41,10 @@ defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF1E0F85F
/**
@ -74,20 +78,27 @@ LoopCopyDataInit:
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bx lr
.size Reset_Handler, .-Reset_Handler
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an

11
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TOOLCHAIN_ARM/startup_stm32l4r5xx.S
View File

@ -22,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
PRESERVE8
THUMB
@ -32,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -395,6 +395,11 @@ DMAMUX1_OVR_IRQHandler
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TOOLCHAIN_ARM/stm32l4r5xi.sct
View File

@ -25,13 +25,13 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
/* Round up VECTORS_SIZE to 8 bytes */

16
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TOOLCHAIN_GCC_ARM/startup_stm32l4r5xx.S
View File

@ -92,16 +92,12 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bx lr
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**

2
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/TOOLCHAIN_IAR/stm32l4r5xi.icf
View File

@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
}
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}

11
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TOOLCHAIN_ARM/startup_stm32l4r9xx.S
View File

@ -22,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;
PRESERVE8
THUMB
@ -32,9 +32,9 @@
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
@ -397,6 +397,11 @@ DMAMUX1_OVR_IRQHandler
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
END
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TOOLCHAIN_ARM/stm32l4r9xi.sct
View File

@ -25,13 +25,13 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
/* Round up VECTORS_SIZE to 8 bytes */

16
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TOOLCHAIN_GCC_ARM/startup_stm32l4r9xx.S
View File

@ -92,16 +92,12 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
//bl __libc_init_array
/* Call the application's entry point.*/
//bl main
// Calling the crt0 'cold-start' entry point. There __libc_init_array is called
// and when existing hardware_init_hook() and software_init_hook() before
// starting main(). software_init_hook() is available and has to be called due
// to initializsation when using rtos.
bl _start
bx lr
bl _start
bx lr
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**

2
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/TOOLCHAIN_IAR/stm32l4r9xi.icf
View File

@ -50,7 +50,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
}
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}

3
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/TOOLCHAIN_ARM/startup_stm32l4s5xx.S
View File

@ -10,6 +10,7 @@
;* calls main()).
;* After Reset the Cortex-M4 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
;*
;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
@ -21,7 +22,7 @@
;* opensource.org/licenses/BSD-3-Clause
;*
;*******************************************************************************
;* <<< Use Configuration Wizard in Context Menu >>>
;
PRESERVE8
THUMB

12
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/TOOLCHAIN_ARM/stm32l4s5xi.sct
View File

@ -25,13 +25,13 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
#if defined(MBED_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#else
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
#endif
/* Round up VECTORS_SIZE to 8 bytes */

2
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/TOOLCHAIN_GCC_ARM/startup_stm32l4s5xx.S
View File

@ -60,7 +60,7 @@ defined in linker script */
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* Set stack pointer */
ldr sp, =_estack /* Atollic update: set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0

2
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/TOOLCHAIN_IAR/stm32l4s5xi.icf
View File

@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
}
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
/* This value is normally defined by the tools
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}