mirror of https://github.com/ARMmbed/mbed-os.git
After checking other parts of the code (trng_api.c and a few other board platforms (NUCLEO_F413ZH, ...)) it appears that even though the reset value defaults correctly it may be good practice to keep the HAL_RCCEx_PeriphCLKConfig statement that selects the HSI48CLK as source for USB/RNG.
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21176e903a
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dc969ba1d9
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@ -121,6 +121,15 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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return 0; // FAIL
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return 0; // FAIL
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}
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}
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#if defined(DEVICE_USBDEVICE)
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// Connect the HSI48 Clock to drive the USB & RNG Clocks @ 48 MHz (CK48 Clock Mux)
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
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if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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#endif
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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@ -175,6 +184,15 @@ uint8_t SetSysClock_PLL_HSI(void)
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return 0; // FAIL
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return 0; // FAIL
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}
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}
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#if defined(DEVICE_USBDEVICE)
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// Connect the HSI48 Clock to drive the USB & RNG Clocks @ 48 MHz (CK48 Clock Mux)
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
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if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct) != HAL_OK) {
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return 0; // FAIL
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}
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#endif
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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