mirror of https://github.com/ARMmbed/mbed-os.git
[K64F] Fix gpio - port addresses, old KSDK code removal, modification in utilities
- warning: utilities are not compatible with KSDK, few tweaks were required - lpuart not generic, does not compile for K64F (removed)pull/476/head
0xc0170
parent
0c78174ad5
commit
db98d70f91
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@ -48,15 +48,15 @@ void gpio_mode(gpio_t *obj, PinMode mode) {
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void gpio_dir(gpio_t *obj, PinDirection direction) {
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MBED_ASSERT(obj->pinName != (PinName)NC);
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uint32_t port = obj->pinName >> GPIO_PORT_SHIFT;
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uint32_t port_addrs[] = PORT_BASE_ADDRS;
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uint32_t gpio_addrs[] = GPIO_BASE_ADDRS;
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uint32_t pin_num = obj->pinName & 0xFF;
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switch (direction) {
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case PIN_INPUT:
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GPIO_HAL_SetPinDir(port_addrs[port], pin_num, kGpioDigitalInput);
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GPIO_HAL_SetPinDir(gpio_addrs[port], pin_num, kGpioDigitalInput);
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break;
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case PIN_OUTPUT:
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GPIO_HAL_SetPinDir(port_addrs[port], pin_num, kGpioDigitalOutput);
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GPIO_HAL_SetPinDir(gpio_addrs[port], pin_num, kGpioDigitalOutput);
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break;
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}
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}
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@ -44,6 +44,7 @@ static void handle_interrupt_in(PortName port, int ch_base) {
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}
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gpio_irq_event event = IRQ_NONE;
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uint32_t gpio_addrs[] = GPIO_BASE_ADDRS;
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switch (BR_PORT_PCRn_IRQC(port, i)) {
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case IRQ_RAISING_EDGE:
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event = IRQ_RISE;
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@ -54,7 +55,7 @@ static void handle_interrupt_in(PortName port, int ch_base) {
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break;
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case IRQ_EITHER_EDGE:
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event = (GPIO_HAL_ReadPinInput(port_addrs[port], i)) ? (IRQ_RISE) : (IRQ_FALL);
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event = (GPIO_HAL_ReadPinInput(gpio_addrs[port], i)) ? (IRQ_RISE) : (IRQ_FALL);
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break;
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}
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if (event != IRQ_NONE) {
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@ -32,18 +32,18 @@ static inline void gpio_write(gpio_t *obj, int value) {
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MBED_ASSERT(obj->pinName != (PinName)NC);
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uint32_t port = obj->pinName >> GPIO_PORT_SHIFT;
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uint32_t pin = obj->pinName & 0xFF;
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uint32_t port_addrs[] = PORT_BASE_ADDRS;
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uint32_t gpio_addrs[] = GPIO_BASE_ADDRS;
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GPIO_HAL_WritePinOutput(port_addrs[port], pin, value);
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GPIO_HAL_WritePinOutput(gpio_addrs[port], pin, value);
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}
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static inline int gpio_read(gpio_t *obj) {
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MBED_ASSERT(obj->pinName != (PinName)NC);
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uint32_t port = obj->pinName >> GPIO_PORT_SHIFT;
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uint32_t pin = obj->pinName & 0xFF;
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uint32_t port_addrs[] = PORT_BASE_ADDRS;
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uint32_t gpio_addrs[] = GPIO_BASE_ADDRS;
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return (int)GPIO_HAL_ReadPinInput(port_addrs[port], pin);
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return (int)GPIO_HAL_ReadPinInput(gpio_addrs[port], pin);
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}
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#ifdef __cplusplus
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@ -33,30 +33,12 @@
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/*******************************************************************************
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* Variables
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******************************************************************************/
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#define ENET_INSTANCE 0U
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/*******************************************************************************
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* Code
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******************************************************************************/
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#if defined (K64F12_SERIES) || defined (K70F12_SERIES) || defined (K63F12_SERIES)
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void ENET_Transmit_IRQHandler(void)
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{
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ENET_DRV_TxIRQHandler(ENET_INSTANCE);
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}
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void ENET_Receive_IRQHandler(void)
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{
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ENET_DRV_RxIRQHandler(ENET_INSTANCE);
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}
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#if FSL_FEATURE_ENET_SUPPORT_PTP
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void ENET_1588_Timer_IRQHandler(void)
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{
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ENET_DRV_TsIRQHandler(ENET_INSTANCE);
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}
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#endif
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#endif
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/* The code was moved to k64f mac file (eth) */
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/*******************************************************************************
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* EOF
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File diff suppressed because it is too large
Load Diff
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@ -1,220 +0,0 @@
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/*
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** ###################################################################
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** Version: rev. 1.0, 2014-05-14
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** Build: b140515
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**
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** Abstract:
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** Chip specific module features.
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**
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** Copyright: 2014 Freescale Semiconductor, Inc.
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** All rights reserved.
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**
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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**
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** o Redistributions of source code must retain the above copyright notice, this list
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** of conditions and the following disclaimer.
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**
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** o Redistributions in binary form must reproduce the above copyright notice, this
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** list of conditions and the following disclaimer in the documentation and/or
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** other materials provided with the distribution.
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**
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** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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** contributors may be used to endorse or promote products derived from this
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** software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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** http: www.freescale.com
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** mail: support@freescale.com
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**
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** Revisions:
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** - rev. 1.0 (2014-05-14)
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** Customer release.
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**
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** ###################################################################
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*/
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#if !defined(__FSL_LPUART_FEATURES_H__)
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#define __FSL_LPUART_FEATURES_H__
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#if defined(CPU_MK22FN128VDC10) || defined(CPU_MK22FN128VLH10) || defined(CPU_MK22FN128VLL10) || defined(CPU_MK22FN128VMP10) || \
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defined(CPU_MK22FN256VDC12) || defined(CPU_MK22FN256VLH12) || defined(CPU_MK22FN256VLL12) || defined(CPU_MK22FN256VMP12) || \
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defined(CPU_MK22FN512VDC12) || defined(CPU_MK22FN512VLH12) || defined(CPU_MK22FN512VLL12) || defined(CPU_MK65FN2M0CAC18) || \
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defined(CPU_MK65FX1M0CAC18) || defined(CPU_MK65FN2M0VMI18) || defined(CPU_MK65FX1M0VMI18) || defined(CPU_MK66FN2M0VLQ18) || \
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defined(CPU_MK66FX1M0VLQ18) || defined(CPU_MK66FN2M0VMD18) || defined(CPU_MK66FX1M0VMD18) || defined(CPU_MKV31F128VLH10) || \
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defined(CPU_MKV31F128VLL10) || defined(CPU_MKV31F256VLH12) || defined(CPU_MKV31F256VLL12) || defined(CPU_MKV31F512VLH12) || \
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defined(CPU_MKV31F512VLL12)
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/* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
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#define FSL_FEATURE_LPUART_HAS_IRQ_EXTENDED_FUNCTIONS (1)
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/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_LOW_POWER_UART_SUPPORT (1)
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/* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
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/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
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#define FSL_FEATURE_LPUART_HAS_FIFO (0)
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/* @brief Hardware flow control (RTS, CTS) is supported. */
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#define FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT (1)
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/* @brief Infrared (modulation) is supported. */
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#define FSL_FEATURE_LPUART_HAS_IR_SUPPORT (1)
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/* @brief 2 bits long stop bit is available. */
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#define FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT (1)
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/* @brief Maximal data width without parity bit. */
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#define FSL_FEATURE_LPUART_HAS_10BIT_DATA_SUPPORT (1)
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/* @brief Baud rate fine adjustment is available. */
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#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (0)
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/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
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/* @brief Baud rate oversampling is available. */
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#define FSL_FEATURE_LPUART_HAS_RX_RESYNC_SUPPORT (1)
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/* @brief Baud rate oversampling is available. */
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#define FSL_FEATURE_LPUART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (1)
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/* @brief Peripheral type. */
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#define FSL_FEATURE_LPUART_IS_SCI (1)
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/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
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#define FSL_FEATURE_LPUART_FIFO_SIZE (0)
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/* @brief Maximal data width without parity bit. */
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#define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_NO_PARITY (10)
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/* @brief Maximal data width with parity bit. */
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#define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_PARITY (9)
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/* @brief Supports two match addresses to filter incoming frames. */
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#define FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
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/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_DMA_ENABLE (1)
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/* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
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#define FSL_FEATURE_LPUART_HAS_DMA_SELECT (0)
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/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_BIT_ORDER_SELECT (1)
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/* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
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#define FSL_FEATURE_LPUART_HAS_SMART_CARD_SUPPORT (0)
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/* @brief Has improved smart card (ISO7816 protocol) support. */
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#define FSL_FEATURE_LPUART_HAS_IMPROVED_SMART_CARD_SUPPORT (0)
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/* @brief Has local operation network (CEA709.1-B protocol) support. */
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#define FSL_FEATURE_LPUART_HAS_LOCAL_OPERATION_NETWORK_SUPPORT (0)
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/* @brief Has 32-bit registers (BAUD, STAT, CTRL, DATA, MATCH, MODIR) instead of 8-bit (BDH, BDL, C1, S1, D, etc.). */
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#define FSL_FEATURE_LPUART_HAS_32BIT_REGISTERS (1)
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#elif defined(CPU_MKL03Z32CAF4) || defined(CPU_MKL03Z8VFG4) || defined(CPU_MKL03Z16VFG4) || defined(CPU_MKL03Z32VFG4) || \
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defined(CPU_MKL03Z8VFK4) || defined(CPU_MKL03Z16VFK4) || defined(CPU_MKL03Z32VFK4)
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/* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
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#define FSL_FEATURE_LPUART_HAS_IRQ_EXTENDED_FUNCTIONS (1)
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/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_LOW_POWER_UART_SUPPORT (1)
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/* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
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/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
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#define FSL_FEATURE_LPUART_HAS_FIFO (0)
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/* @brief Hardware flow control (RTS, CTS) is supported. */
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#define FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT (0)
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/* @brief Infrared (modulation) is supported. */
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#define FSL_FEATURE_LPUART_HAS_IR_SUPPORT (0)
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/* @brief 2 bits long stop bit is available. */
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#define FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT (1)
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/* @brief Maximal data width without parity bit. */
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#define FSL_FEATURE_LPUART_HAS_10BIT_DATA_SUPPORT (1)
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/* @brief Baud rate fine adjustment is available. */
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#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (0)
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/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
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/* @brief Baud rate oversampling is available. */
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#define FSL_FEATURE_LPUART_HAS_RX_RESYNC_SUPPORT (1)
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/* @brief Baud rate oversampling is available. */
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#define FSL_FEATURE_LPUART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (1)
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/* @brief Peripheral type. */
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#define FSL_FEATURE_LPUART_IS_SCI (1)
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/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
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#define FSL_FEATURE_LPUART_FIFO_SIZE (0)
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/* @brief Maximal data width without parity bit. */
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#define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_NO_PARITY (10)
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/* @brief Maximal data width with parity bit. */
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#define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_PARITY (9)
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/* @brief Supports two match addresses to filter incoming frames. */
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#define FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
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/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_DMA_ENABLE (0)
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/* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
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#define FSL_FEATURE_LPUART_HAS_DMA_SELECT (0)
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/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_BIT_ORDER_SELECT (1)
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/* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
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#define FSL_FEATURE_LPUART_HAS_SMART_CARD_SUPPORT (0)
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/* @brief Has improved smart card (ISO7816 protocol) support. */
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#define FSL_FEATURE_LPUART_HAS_IMPROVED_SMART_CARD_SUPPORT (0)
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/* @brief Has local operation network (CEA709.1-B protocol) support. */
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#define FSL_FEATURE_LPUART_HAS_LOCAL_OPERATION_NETWORK_SUPPORT (0)
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/* @brief Has 32-bit registers (BAUD, STAT, CTRL, DATA, MATCH, MODIR) instead of 8-bit (BDH, BDL, C1, S1, D, etc.). */
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#define FSL_FEATURE_LPUART_HAS_32BIT_REGISTERS (1)
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#elif defined(CPU_MKL13Z64VFM4) || defined(CPU_MKL13Z128VFM4) || defined(CPU_MKL13Z256VFM4) || defined(CPU_MKL13Z64VFT4) || \
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defined(CPU_MKL13Z128VFT4) || defined(CPU_MKL13Z256VFT4) || defined(CPU_MKL13Z64VLH4) || defined(CPU_MKL13Z128VLH4) || \
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defined(CPU_MKL13Z256VLH4) || defined(CPU_MKL13Z64VMP4) || defined(CPU_MKL13Z128VMP4) || defined(CPU_MKL13Z256VMP4) || \
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defined(CPU_MKL23Z64VFM4) || defined(CPU_MKL23Z128VFM4) || defined(CPU_MKL23Z256VFM4) || defined(CPU_MKL23Z64VFT4) || \
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defined(CPU_MKL23Z128VFT4) || defined(CPU_MKL23Z256VFT4) || defined(CPU_MKL23Z64VLH4) || defined(CPU_MKL23Z128VLH4) || \
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defined(CPU_MKL23Z256VLH4) || defined(CPU_MKL23Z64VMP4) || defined(CPU_MKL23Z128VMP4) || defined(CPU_MKL23Z256VMP4) || \
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defined(CPU_MKL33Z128VLH4) || defined(CPU_MKL33Z256VLH4) || defined(CPU_MKL33Z128VMP4) || defined(CPU_MKL33Z256VMP4) || \
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defined(CPU_MKL43Z64VLH4) || defined(CPU_MKL43Z128VLH4) || defined(CPU_MKL43Z256VLH4) || defined(CPU_MKL43Z64VMP4) || \
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defined(CPU_MKL43Z128VMP4) || defined(CPU_MKL43Z256VMP4)
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/* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
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#define FSL_FEATURE_LPUART_HAS_IRQ_EXTENDED_FUNCTIONS (1)
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/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_LOW_POWER_UART_SUPPORT (1)
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/* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
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/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
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#define FSL_FEATURE_LPUART_HAS_FIFO (0)
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/* @brief Hardware flow control (RTS, CTS) is supported. */
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#define FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT (0)
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/* @brief Infrared (modulation) is supported. */
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#define FSL_FEATURE_LPUART_HAS_IR_SUPPORT (0)
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/* @brief 2 bits long stop bit is available. */
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#define FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT (1)
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/* @brief Maximal data width without parity bit. */
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#define FSL_FEATURE_LPUART_HAS_10BIT_DATA_SUPPORT (1)
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/* @brief Baud rate fine adjustment is available. */
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#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (0)
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/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
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#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
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/* @brief Baud rate oversampling is available. */
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#define FSL_FEATURE_LPUART_HAS_RX_RESYNC_SUPPORT (1)
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/* @brief Baud rate oversampling is available. */
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#define FSL_FEATURE_LPUART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (1)
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/* @brief Peripheral type. */
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#define FSL_FEATURE_LPUART_IS_SCI (1)
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/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
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#define FSL_FEATURE_LPUART_FIFO_SIZE (0)
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/* @brief Maximal data width without parity bit. */
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#define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_NO_PARITY (10)
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/* @brief Maximal data width with parity bit. */
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#define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_PARITY (9)
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/* @brief Supports two match addresses to filter incoming frames. */
|
||||
#define FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
|
||||
/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
|
||||
#define FSL_FEATURE_LPUART_HAS_DMA_ENABLE (1)
|
||||
/* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
|
||||
#define FSL_FEATURE_LPUART_HAS_DMA_SELECT (0)
|
||||
/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
|
||||
#define FSL_FEATURE_LPUART_HAS_BIT_ORDER_SELECT (1)
|
||||
/* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
|
||||
#define FSL_FEATURE_LPUART_HAS_SMART_CARD_SUPPORT (0)
|
||||
/* @brief Has improved smart card (ISO7816 protocol) support. */
|
||||
#define FSL_FEATURE_LPUART_HAS_IMPROVED_SMART_CARD_SUPPORT (0)
|
||||
/* @brief Has local operation network (CEA709.1-B protocol) support. */
|
||||
#define FSL_FEATURE_LPUART_HAS_LOCAL_OPERATION_NETWORK_SUPPORT (0)
|
||||
/* @brief Has 32-bit registers (BAUD, STAT, CTRL, DATA, MATCH, MODIR) instead of 8-bit (BDH, BDL, C1, S1, D, etc.). */
|
||||
#define FSL_FEATURE_LPUART_HAS_32BIT_REGISTERS (1)
|
||||
#else
|
||||
#error "No valid CPU defined!"
|
||||
#endif
|
||||
|
||||
#endif /* __FSL_LPUART_FEATURES_H__ */
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
|
@ -1,778 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#include "fsl_lpuart_hal.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_Init
|
||||
* Description : Initializes the LPUART controller to known state.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_Init(uint32_t baseAddr)
|
||||
{
|
||||
HW_LPUART_BAUD_WR(baseAddr, 0x0F000004);
|
||||
HW_LPUART_STAT_WR(baseAddr, 0xC01FC000);
|
||||
HW_LPUART_CTRL_WR(baseAddr, 0x00000000);
|
||||
HW_LPUART_MATCH_WR(baseAddr, 0x00000000);
|
||||
HW_LPUART_MODIR_WR(baseAddr, 0x00000000);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SetBaudRate
|
||||
* Description : Configures the LPUART baud rate.
|
||||
* In some LPUART instances the user must disable the transmitter/receiver
|
||||
* before calling this function.
|
||||
* Generally, this may be applied to all LPUARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
lpuart_status_t LPUART_HAL_SetBaudRate(uint32_t baseAddr, uint32_t sourceClockInHz,
|
||||
uint32_t desiredBaudRate)
|
||||
{
|
||||
uint16_t sbr, sbrTemp, i;
|
||||
uint32_t osr, tempDiff, calculatedBaud, baudDiff;
|
||||
|
||||
/* This lpuart instantiation uses a slightly different baud rate calculation */
|
||||
/* The idea is to use the best OSR (over-sampling rate) possible */
|
||||
/* Note, osr is typically hard-set to 16 in other lpuart instantiations */
|
||||
/* First calculate the baud rate using the minimum OSR possible (4) */
|
||||
osr = 4;
|
||||
sbr = (sourceClockInHz/(desiredBaudRate * osr));
|
||||
calculatedBaud = (sourceClockInHz / (osr * sbr));
|
||||
|
||||
if (calculatedBaud > desiredBaudRate)
|
||||
{
|
||||
baudDiff = calculatedBaud - desiredBaudRate;
|
||||
}
|
||||
else
|
||||
{
|
||||
baudDiff = desiredBaudRate - calculatedBaud;
|
||||
}
|
||||
|
||||
/* loop to find the best osr value possible, one that generates minimum baudDiff */
|
||||
/* iterate through the rest of the supported values of osr */
|
||||
for (i = 5; i <= 32; i++)
|
||||
{
|
||||
/* calculate the temporary sbr value */
|
||||
sbrTemp = (sourceClockInHz/(desiredBaudRate * i));
|
||||
/* calculate the baud rate based on the temporary osr and sbr values */
|
||||
calculatedBaud = (sourceClockInHz / (i * sbrTemp));
|
||||
|
||||
if (calculatedBaud > desiredBaudRate)
|
||||
{
|
||||
tempDiff = calculatedBaud - desiredBaudRate;
|
||||
}
|
||||
else
|
||||
{
|
||||
tempDiff = desiredBaudRate - calculatedBaud;
|
||||
}
|
||||
|
||||
if (tempDiff <= baudDiff)
|
||||
{
|
||||
baudDiff = tempDiff;
|
||||
osr = i; /* update and store the best osr value calculated */
|
||||
sbr = sbrTemp; /* update store the best sbr value calculated */
|
||||
}
|
||||
}
|
||||
|
||||
/* next, check to see if actual baud rate is within 3% of desired baud rate */
|
||||
/* based on the best calculate osr value */
|
||||
if (baudDiff < ((desiredBaudRate / 100) * 3))
|
||||
{
|
||||
/* Acceptable baud rate */
|
||||
/* Check if osr is between 4x and 7x oversampling */
|
||||
/* If so, then "BOTHEDGE" sampling must be turned on */
|
||||
if ((osr > 3) && (osr < 8))
|
||||
{
|
||||
BW_LPUART_BAUD_BOTHEDGE(baseAddr, 1);
|
||||
}
|
||||
|
||||
/* program the osr value (bit value is one less than actual value) */
|
||||
BW_LPUART_BAUD_OSR(baseAddr, (osr-1));
|
||||
|
||||
/* write the sbr value to the BAUD registers */
|
||||
BW_LPUART_BAUD_SBR(baseAddr, sbr);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Unacceptable baud rate difference of more than 3% */
|
||||
return kStatus_LPUART_BaudRatePercentDiffExceeded;
|
||||
}
|
||||
|
||||
return kStatus_LPUART_Success;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SetBitCountPerChar
|
||||
* Description : Configures the number of bits per character in the LPUART controller.
|
||||
* In some LPUART instances, the user should disable the transmitter/receiver
|
||||
* before calling this function.
|
||||
* Generally, this may be applied to all LPUARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_SetBitCountPerChar(uint32_t baseAddr, lpuart_bit_count_per_char_t bitCountPerChar)
|
||||
{
|
||||
if(bitCountPerChar == kLpuart10BitsPerChar)
|
||||
{
|
||||
BW_LPUART_BAUD_M10(baseAddr, 1); /* set M10 for 10-bit mode, M bit in C1 is don't care */
|
||||
}
|
||||
else
|
||||
{
|
||||
BW_LPUART_CTRL_M(baseAddr, bitCountPerChar); /* config 8- (M=0) or 9-bits (M=1) */
|
||||
BW_LPUART_BAUD_M10(baseAddr, 0); /* clear M10 to make sure not 10-bit mode */
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SetParityMode
|
||||
* Description : Configures parity mode in the LPUART controller.
|
||||
* In some LPUART instances, the user should disable the transmitter/receiver
|
||||
* before calling this function.
|
||||
* Generally, this may be applied to all LPUARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_SetParityMode(uint32_t baseAddr, lpuart_parity_mode_t parityModeType)
|
||||
{
|
||||
/* configure the parity enable/type */
|
||||
|
||||
if ((parityModeType) == kLpuartParityDisabled)
|
||||
{
|
||||
/* parity disabled, hence parity type is don't care */
|
||||
BW_LPUART_CTRL_PE(baseAddr, 0);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* parity enabled */
|
||||
BW_LPUART_CTRL_PE(baseAddr, 1);
|
||||
/* parity odd/even depending on parity mode setting */
|
||||
BW_LPUART_CTRL_PT(baseAddr, (parityModeType) & 0x1);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SetTxRxInversionCmd
|
||||
* Description : Configures the transmit and receive inversion control in the LPUART controller.
|
||||
* This function should only be called when the LPUART is between transmit and receive packets.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_SetTxRxInversionCmd(uint32_t baseAddr, uint32_t rxInvert, uint32_t txInvert)
|
||||
{
|
||||
/* 0 - receive data not inverted, 1 - receive data inverted */
|
||||
BW_LPUART_STAT_RXINV(baseAddr, rxInvert);
|
||||
/* 0 - transmit data not inverted, 1 - transmit data inverted */
|
||||
BW_LPUART_CTRL_TXINV(baseAddr, txInvert);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_EnableTransmitter
|
||||
* Description : Enables the LPUART transmitter.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_EnableTransmitter(uint32_t baseAddr)
|
||||
{
|
||||
/* enable the transmitter based on the lpuart baseAddr */
|
||||
|
||||
/* for this lpuart baseAddr, there is a two step process to clear the transmit complete */
|
||||
/* status flag: */
|
||||
/* 1. Read the status register with the status bit set */
|
||||
/* 2. enable the transmitter (change TE from 0 to 1) */
|
||||
/* first read the status register */
|
||||
|
||||
/* no need to store the read value, it's assumed the status bit is set */
|
||||
HW_LPUART_STAT_RD(baseAddr);
|
||||
/* second, enable the transmitter */
|
||||
BW_LPUART_CTRL_TE(baseAddr, 1);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SetIntMode
|
||||
* Description : Configures the LPUART module interrupts to enable/disable various interrupt sources.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_SetIntMode(uint32_t baseAddr, lpuart_interrupt_t interrupt, bool enable)
|
||||
{
|
||||
uint32_t reg = (uint32_t)(interrupt) >> LPUART_SHIFT;
|
||||
uint32_t temp = 1U << (uint32_t)interrupt;
|
||||
|
||||
switch ( reg )
|
||||
{
|
||||
case LPUART_BAUD_REG_ID:
|
||||
enable ? HW_LPUART_BAUD_SET(baseAddr, temp) : HW_LPUART_BAUD_CLR(baseAddr, temp);
|
||||
break;
|
||||
case LPUART_STAT_REG_ID:
|
||||
enable ? HW_LPUART_STAT_SET(baseAddr, temp) : HW_LPUART_STAT_CLR(baseAddr, temp);
|
||||
break;
|
||||
case LPUART_CTRL_REG_ID:
|
||||
enable ? HW_LPUART_CTRL_SET(baseAddr, temp) : HW_LPUART_CTRL_CLR(baseAddr, temp);
|
||||
break;
|
||||
case LPUART_DATA_REG_ID:
|
||||
enable ? HW_LPUART_DATA_SET(baseAddr, temp) : HW_LPUART_DATA_CLR(baseAddr, temp);
|
||||
break;
|
||||
case LPUART_MATCH_REG_ID:
|
||||
enable ? HW_LPUART_MATCH_SET(baseAddr, temp) : HW_LPUART_MATCH_CLR(baseAddr, temp);
|
||||
break;
|
||||
case LPUART_MODIR_REG_ID:
|
||||
enable ? HW_LPUART_MODIR_SET(baseAddr, temp) : HW_LPUART_MODIR_CLR(baseAddr, temp);
|
||||
break;
|
||||
default :
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_GetIntMode
|
||||
* Description : Returns whether the LPUART module interrupts is enabled/disabled.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool LPUART_HAL_GetIntMode(uint32_t baseAddr, lpuart_interrupt_t interrupt)
|
||||
{
|
||||
uint32_t reg = (uint32_t)(interrupt) >> LPUART_SHIFT;
|
||||
bool retVal = false;
|
||||
|
||||
switch ( reg )
|
||||
{
|
||||
case LPUART_BAUD_REG_ID:
|
||||
retVal = HW_LPUART_BAUD_RD(baseAddr) >> (uint32_t)(interrupt) & 1U;
|
||||
break;
|
||||
case LPUART_STAT_REG_ID:
|
||||
retVal = HW_LPUART_STAT_RD(baseAddr) >> (uint32_t)(interrupt) & 1U;
|
||||
break;
|
||||
case LPUART_CTRL_REG_ID:
|
||||
retVal = HW_LPUART_CTRL_RD(baseAddr) >> (uint32_t)(interrupt) & 1U;
|
||||
break;
|
||||
case LPUART_DATA_REG_ID:
|
||||
retVal = HW_LPUART_DATA_RD(baseAddr) >> (uint32_t)(interrupt) & 1U;
|
||||
break;
|
||||
case LPUART_MATCH_REG_ID:
|
||||
retVal = HW_LPUART_MATCH_RD(baseAddr) >> (uint32_t)(interrupt) & 1U;
|
||||
break;
|
||||
case LPUART_MODIR_REG_ID:
|
||||
retVal = HW_LPUART_MODIR_RD(baseAddr) >> (uint32_t)(interrupt) & 1U;
|
||||
break;
|
||||
default :
|
||||
break;
|
||||
}
|
||||
|
||||
return retVal;
|
||||
}
|
||||
|
||||
#if FSL_FEATURE_LPUART_HAS_DMA_ENABLE
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_ConfigureDma
|
||||
* Description : LPUART configures DMA requests for Transmitter and Receiver.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_ConfigureDma(uint32_t baseAddr, bool txDmaConfig, bool rxDmaConfig)
|
||||
{
|
||||
/* TDMAE configures the transmit data register empty flag, S1[TDRE], */
|
||||
/* to generate a DMA request. */
|
||||
BW_LPUART_BAUD_TDMAE(baseAddr, txDmaConfig) ;/* set TDMAE to enable, clear to disable */
|
||||
/* RDMAE configures the receive data register fell flag, S1[RDRF], */
|
||||
/* to generate a DMA request. */
|
||||
BW_LPUART_BAUD_RDMAE(baseAddr, rxDmaConfig); /* set RDMAE to enable, clear to disable */
|
||||
}
|
||||
#endif
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_GetWaitModeOperationConfig
|
||||
* Description : LPUART configures DMA requests for Transmitter and Receiver.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
lpuart_operation_config_t LPUART_HAL_GetWaitModeOperationConfig(uint32_t baseAddr)
|
||||
{
|
||||
/* get configuration lpuart operation in wait mode */
|
||||
/* In CPU wait mode: 0 - lpuart clocks continue to run; 1 - lpuart clocks freeze */
|
||||
if (BR_LPUART_CTRL_DOZEEN(baseAddr) == 0)
|
||||
{
|
||||
return kLpuartOperates;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kLpuartStops;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SedLoopbackCmd
|
||||
* Description : Configures the LPUART loopback operation (enable/disable loopback operation)
|
||||
* In some LPUART instances, the user should disable the transmitter/receiver
|
||||
* before calling this function.
|
||||
* Generally, this may be applied to all LPUARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_SedLoopbackCmd(uint32_t baseAddr, bool enable)
|
||||
{
|
||||
/* configure lpuart to enable/disable operation in loopback mode */
|
||||
|
||||
/* configure LOOPS bit to enable(1)/disable(0) loopback mode, but also need to clear RSRC */
|
||||
BW_LPUART_CTRL_LOOPS(baseAddr, enable);
|
||||
|
||||
/* clear RSRC for loopback mode, and if loopback disabled, */
|
||||
/* this bit has no meaning but clear anyway */
|
||||
/* to set it back to default value */
|
||||
BW_LPUART_CTRL_RSRC(baseAddr, 0);
|
||||
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SetSingleWireCmd
|
||||
* Description : Configures the LPUART single-wire operation (enable/disable single-wire mode)
|
||||
* In some LPUART instances, the user should disable the transmitter/receiver
|
||||
* before calling this function.
|
||||
* Generally, this may be applied to all LPUARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_SetSingleWireCmd(uint32_t baseAddr, bool enable)
|
||||
{
|
||||
/* configure lpuart to enable/disable operation in single mode */
|
||||
|
||||
/* to enable single-wire mode, need both LOOPS and RSRC set, to disable, clear both */
|
||||
BW_LPUART_CTRL_LOOPS(baseAddr, enable);
|
||||
BW_LPUART_CTRL_RSRC(baseAddr, enable);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_PutReceiverInStandbyMode
|
||||
* Description : Places the LPUART receiver in standby mode.
|
||||
* In some LPUART instances,
|
||||
* before placing LPUART in standby mode, first determine whether the receiver is set to
|
||||
* wake on idle or whether it is already in idle state.
|
||||
* NOTE that the RWU should only be set with C1[WAKE] = 0 (wakeup on idle) if the channel is currently
|
||||
* not idle.
|
||||
* This can be determined by the S2[RAF] flag. If it is set to wake up an IDLE event and the channel is
|
||||
* already idle, it is possible that the LPUART will discard data since data must be received
|
||||
* (or a LIN break detect) after an IDLE is detected and before IDLE is allowed to reasserted.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
lpuart_status_t LPUART_HAL_PutReceiverInStandbyMode(uint32_t baseAddr)
|
||||
{
|
||||
/* In some lpuart instances, there is a condition that must be met before placing */
|
||||
/* rx in standby mode. */
|
||||
/* Before placing lpuart in standby, need to first determine if receiver is set to */
|
||||
/* wake on idle and if receiver is already in idle state. Per ref manual: */
|
||||
/* NOTE: RWU should only be set with C1[WAKE] = 0 (wakeup on idle) if the channel is */
|
||||
/* currently not idle. */
|
||||
/* This can be determined by the STAT[RAF] flag. If set to wake up an IDLE event and */
|
||||
/* the channel is already idle, it is possible that the LPUART will discard data since data */
|
||||
/* must be received (or a LIN break detect) after an IDLE is detected before IDLE is */
|
||||
/* allowed to reasserted. */
|
||||
lpuart_wakeup_method_t rxWakeMethod;
|
||||
bool lpuart_current_rx_state;
|
||||
|
||||
/* see if wake is set for idle or */
|
||||
rxWakeMethod = LPUART_HAL_GetReceiverWakeupMethod(baseAddr);
|
||||
lpuart_current_rx_state = LPUART_HAL_GetStatusFlag(baseAddr, kLpuartRxActive);
|
||||
|
||||
/* if both rxWakeMethod is set for idle and current rx state is idle, don't put in standy */
|
||||
if ((rxWakeMethod == kLpuartIdleLineWake) && (lpuart_current_rx_state == 0))
|
||||
{
|
||||
return kStatus_LPUART_RxStandbyModeError;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* set the RWU bit to place receiver into standby mode */
|
||||
BW_LPUART_CTRL_RWU(baseAddr, 1);
|
||||
return kStatus_LPUART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_GetReceiverWakeupMethod
|
||||
* Description : Gets the LPUART receiver wakeup method (idle line or addr-mark) from standby mode.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
lpuart_wakeup_method_t LPUART_HAL_GetReceiverWakeupMethod(uint32_t baseAddr)
|
||||
{
|
||||
/* get configuration of the WAKE bit for idle line wake or address mark wake */
|
||||
if(HW_LPUART_CTRL(baseAddr).B.WAKE == 1)
|
||||
{
|
||||
return kLpuartAddrMarkWake;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kLpuartIdleLineWake;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_ConfigureIdleLineDetect
|
||||
* Description : LPUART idle-line detect operation configuration (idle line bit-count start and wake
|
||||
* up affect on IDLE status bit).
|
||||
* In some LPUART instances, the user should disable the transmitter/receiver
|
||||
* before calling this function.
|
||||
* Generally, this may be applied to all LPUARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_ConfigureIdleLineDetect(uint32_t baseAddr,
|
||||
const lpuart_idle_line_config_t *config)
|
||||
{
|
||||
/* Configure the idle line detection configuration as follows: */
|
||||
/* configure the ILT to bit count after start bit or stop bit */
|
||||
/* configure RWUID to set or not set IDLE status bit upon detection of */
|
||||
/* an idle character when recevier in standby */
|
||||
BW_LPUART_CTRL_ILT(baseAddr, config->idleLineType);
|
||||
BW_LPUART_STAT_RWUID(baseAddr, config->rxWakeIdleDetect);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SetMatchAddressOperation
|
||||
* Description : LPUART configures match address mode control (Note: Feature available on
|
||||
* select LPUART instances)
|
||||
*
|
||||
*END**************************************************************************/
|
||||
lpuart_status_t LPUART_HAL_SetMatchAddressOperation( uint32_t baseAddr,
|
||||
bool matchAddrMode1, bool matchAddrMode2,
|
||||
uint8_t matchAddrValue1, uint8_t matchAddrValue2, lpuart_match_config_t config)
|
||||
{
|
||||
BW_LPUART_BAUD_MAEN1(baseAddr, matchAddrMode1); /* Match Address Mode Enable 1 */
|
||||
BW_LPUART_BAUD_MAEN2(baseAddr, matchAddrMode2); /* Match Address Mode Enable 2 */
|
||||
BW_LPUART_MATCH_MA1(baseAddr, matchAddrValue1); /* match address register 1 */
|
||||
BW_LPUART_MATCH_MA2(baseAddr, matchAddrValue2); /* match address register 2 */
|
||||
BW_LPUART_BAUD_MATCFG(baseAddr, config); /* Match Configuration */
|
||||
|
||||
return kStatus_LPUART_Success;
|
||||
}
|
||||
|
||||
#if FSL_FEATURE_LPUART_HAS_IR_SUPPORT
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_SetInfraredOperation
|
||||
* Description : Configures the LPUART infrared operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_SetInfraredOperation(uint32_t baseAddr, bool enable,
|
||||
lpuart_ir_tx_pulsewidth_t pulseWidth)
|
||||
{
|
||||
/* enable or disable infrared */
|
||||
BW_LPUART_MODIR_IREN(baseAddr, enable);
|
||||
|
||||
/* configure the narrow pulse width of the IR pulse */
|
||||
BW_LPUART_MODIR_TNP(baseAddr, pulseWidth);
|
||||
}
|
||||
#endif /* FSL_FEATURE_LPUART_HAS_IR_SUPPORT */
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_GetStatusFlag
|
||||
* Description : LPUART get status flag by passing flag enum.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool LPUART_HAL_GetStatusFlag(uint32_t baseAddr, lpuart_status_flag_t statusFlag)
|
||||
{
|
||||
uint32_t reg = (uint32_t)(statusFlag) >> LPUART_SHIFT;
|
||||
bool retVal = false;
|
||||
|
||||
switch ( reg )
|
||||
{
|
||||
case LPUART_BAUD_REG_ID:
|
||||
retVal = HW_LPUART_BAUD_RD(baseAddr) >> (uint32_t)(statusFlag) & 1U;
|
||||
break;
|
||||
case LPUART_STAT_REG_ID:
|
||||
retVal = HW_LPUART_STAT_RD(baseAddr) >> (uint32_t)(statusFlag) & 1U;
|
||||
break;
|
||||
case LPUART_CTRL_REG_ID:
|
||||
retVal = HW_LPUART_CTRL_RD(baseAddr) >> (uint32_t)(statusFlag) & 1U;
|
||||
break;
|
||||
case LPUART_DATA_REG_ID:
|
||||
retVal = HW_LPUART_DATA_RD(baseAddr) >> (uint32_t)(statusFlag) & 1U;
|
||||
break;
|
||||
case LPUART_MATCH_REG_ID:
|
||||
retVal = HW_LPUART_MATCH_RD(baseAddr) >> (uint32_t)(statusFlag) & 1U;
|
||||
break;
|
||||
case LPUART_MODIR_REG_ID:
|
||||
retVal = HW_LPUART_MODIR_RD(baseAddr) >> (uint32_t)(statusFlag) & 1U;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return retVal;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_ClearStatusFlag
|
||||
* Description : LPUART clears an individual status flag
|
||||
* (see lpuart_status_flag_t for list of status bits).
|
||||
*
|
||||
*END**************************************************************************/
|
||||
lpuart_status_t LPUART_HAL_ClearStatusFlag(uint32_t baseAddr, lpuart_status_flag_t statusFlag)
|
||||
{
|
||||
lpuart_status_t returnCode = kStatus_LPUART_Success;
|
||||
|
||||
/* clear the desired, individual status flag as passed in through statusFlag */
|
||||
switch(statusFlag)
|
||||
{
|
||||
case kLpuartTxDataRegEmpty:
|
||||
/* This flag is cleared automatically by other lpuart operations */
|
||||
/* and cannot be manually cleared, return error code */
|
||||
returnCode = kStatus_LPUART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kLpuartTxComplete:
|
||||
/* This flag is cleared automatically by other lpuart operations */
|
||||
/* and cannot be manually cleared, return error code */
|
||||
returnCode = kStatus_LPUART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kLpuartRxDataRegFull:
|
||||
/* This flag is cleared automatically by other lpuart operations and */
|
||||
/* cannot be manually cleared, return error code */
|
||||
returnCode = kStatus_LPUART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kLpuartIdleLineDetect:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_IDLE(baseAddr, 1);
|
||||
break;
|
||||
|
||||
case kLpuartRxOverrun:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_OR(baseAddr, 1);
|
||||
break;
|
||||
|
||||
case kLpuartNoiseDetect:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_NF(baseAddr, 1);
|
||||
break;
|
||||
|
||||
case kLpuartFrameErr:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_FE(baseAddr, 1);
|
||||
break;
|
||||
|
||||
case kLpuartParityErr:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_PF(baseAddr, 1);
|
||||
break;
|
||||
|
||||
case kLpuartLineBreakDetect:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_LBKDIF(baseAddr, 1);
|
||||
break;
|
||||
|
||||
case kLpuartRxActiveEdgeDetect:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_RXEDGIF(baseAddr, (1U));
|
||||
break;
|
||||
|
||||
case kLpuartRxActive:
|
||||
/* This flag is cleared automatically by other lpuart operations and */
|
||||
/* cannot be manually cleared, return error code */
|
||||
returnCode = kStatus_LPUART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
#if FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS
|
||||
case kLpuartNoiseInCurrentWord:
|
||||
/* This flag is not clearable, it simply reflects the status in the */
|
||||
/* current data word and changes with each new data word */
|
||||
returnCode = kStatus_LPUART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kLpuartParityErrInCurrentWord:
|
||||
/* This flag is not clearable, it simply reflects the status in the */
|
||||
/* current data word and changes with each new data word */
|
||||
returnCode = kStatus_LPUART_ClearStatusFlagError;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#if FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
|
||||
case kLpuartMatchAddrOne:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_MA1F(baseAddr, 1);
|
||||
break;
|
||||
case kLpuartMatchAddrTwo:
|
||||
/* write one to clear status flag */
|
||||
BW_LPUART_STAT_MA2F(baseAddr, 1);
|
||||
break;
|
||||
#endif
|
||||
|
||||
default: /* catch inputs that are not recognized */
|
||||
returnCode = kStatus_LPUART_ClearStatusFlagError;
|
||||
break;
|
||||
}
|
||||
|
||||
return (returnCode);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_ClearAllNonAutoclearStatusFlags
|
||||
* Description : LPUART clears ALL status flags.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_ClearAllNonAutoclearStatusFlags(uint32_t baseAddr)
|
||||
{
|
||||
/* clear the status flags that can be manually cleared */
|
||||
/* note, some flags are automatically cleared and cannot be cleared automatically */
|
||||
LPUART_HAL_ClearStatusFlag(baseAddr, kLpuartIdleLineDetect);
|
||||
LPUART_HAL_ClearStatusFlag(baseAddr, kLpuartRxOverrun);
|
||||
LPUART_HAL_ClearStatusFlag(baseAddr, kLpuartNoiseDetect);
|
||||
LPUART_HAL_ClearStatusFlag(baseAddr, kLpuartFrameErr);
|
||||
LPUART_HAL_ClearStatusFlag(baseAddr, kLpuartParityErr);
|
||||
LPUART_HAL_ClearStatusFlag(baseAddr, kLpuartLineBreakDetect);
|
||||
LPUART_HAL_ClearStatusFlag(baseAddr, kLpuartRxActiveEdgeDetect);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_Putchar9
|
||||
* Description : Sends the LPUART 9-bit character.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_Putchar9(uint32_t baseAddr, uint16_t data)
|
||||
{
|
||||
uint8_t ninthDataBit;
|
||||
|
||||
ninthDataBit = (data >> 8U) & 0x1U; /* isolate the ninth data bit */
|
||||
|
||||
/* put 9-bit data to transmit */
|
||||
|
||||
/* first, write to the ninth data bit (bit position T8, where T[0:7]=8-bits, T8=9th bit) */
|
||||
BW_LPUART_CTRL_R9T8(baseAddr, ninthDataBit);
|
||||
|
||||
/* write to the data register last since this will trigger transmit complete status flag */
|
||||
/* also typecast to uint8_t to match register type */
|
||||
HW_LPUART_DATA_WR(baseAddr, (uint8_t)data);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_Putchar10
|
||||
* Description : Sends the LPUART 10-bit character.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
lpuart_status_t LPUART_HAL_Putchar10(uint32_t baseAddr, uint16_t data)
|
||||
{
|
||||
uint8_t ninthDataBit;
|
||||
uint8_t tenthDataBit;
|
||||
|
||||
/* put 10-bit data to transmit */
|
||||
ninthDataBit = (data >> 8U) & 0x1U; /* isolate the ninth data bit */
|
||||
tenthDataBit = (data >> 9U) & 0x1U; /* isolate the tenth data bit */
|
||||
|
||||
/* first, write to the tenth data bit (bit position T9, where T[0:7]=8-bits, */
|
||||
/* T9=10th bit, T8=9th bit) */
|
||||
BW_LPUART_CTRL_R8T9(baseAddr, tenthDataBit);
|
||||
|
||||
/* next, write to the ninth data bit (bit position T8, where T[0:7]=8-bits, */
|
||||
/* T9=10th bit, T8=9th bit) */
|
||||
BW_LPUART_CTRL_R9T8(baseAddr, ninthDataBit);
|
||||
|
||||
/* write to the data register last since this will trigger transmit complete status flag */
|
||||
/* also typecast to uint8_t to match register type */
|
||||
HW_LPUART_DATA_WR(baseAddr, (uint8_t)data);
|
||||
|
||||
return kStatus_LPUART_Success;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_Getchar
|
||||
* Description : Gets the LPUART 8-bit character.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_Getchar(uint32_t baseAddr, uint8_t *readData)
|
||||
{
|
||||
/* get 8-bit data from the lpuart data register */
|
||||
*readData = (uint8_t)HW_LPUART_DATA_RD(baseAddr); /* read 8-bit data from data register */
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_Getchar9
|
||||
* Description : Gets the LPUART 9-bit character.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void LPUART_HAL_Getchar9(uint32_t baseAddr, uint16_t *readData)
|
||||
{
|
||||
uint16_t temp;
|
||||
|
||||
/* get 9-bit data from the lpuart data register */
|
||||
/* read ninth data bit and left shift to bit position R8 before reading */
|
||||
/* the 8 other data bits R[7:0] */
|
||||
temp = HW_LPUART_CTRL(baseAddr).B.R8T9; /* need this two step process to work around mishra rule */
|
||||
*readData = temp << 8;
|
||||
|
||||
/* do last: get 8-bit data from the lpuart data register, will clear certain */
|
||||
/* receive status bits once completed */
|
||||
/* need to OR these 8-bits with the ninth bit value above */
|
||||
*readData |= (uint8_t)HW_LPUART_DATA_RD(baseAddr); /* read 8-bit data from data register */
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : LPUART_HAL_Getchar10
|
||||
* Description : Gets the LPUART 10-bit character.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
lpuart_status_t LPUART_HAL_Getchar10(uint32_t baseAddr, uint16_t *readData)
|
||||
{
|
||||
/* get 10-bit data from the lpuart data register, available only on supported lpuarts */
|
||||
|
||||
/* read tenth data bit and left shift to bit position R9 before reading the 9 other */
|
||||
/* data bits: R8 and R[7:0] */
|
||||
*readData = (uint16_t)((uint32_t)(HW_LPUART_CTRL(baseAddr).B.R9T8) << 9U);
|
||||
|
||||
/* read ninth data bit and left shift to bit position R8 before reading the 8 other */
|
||||
/* data bits R[7:0] */
|
||||
*readData |= (uint16_t)((uint32_t)(HW_LPUART_CTRL(baseAddr).B.R8T9) << 8U);
|
||||
|
||||
/* do last: get 8-bit data from the lpuart data register, will clear certain receive */
|
||||
/* status bits once completed */
|
||||
/* need to OR these 8-bits with the ninth bit value above */
|
||||
*readData |= HW_LPUART_DATA_RD(baseAddr); /* read 8-bit data from data register */
|
||||
|
||||
return kStatus_LPUART_Success;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,208 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_sim_hal.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief CLOCK name config table for K64*/
|
||||
const sim_clock_name_config_t kSimClockNameConfigTable [] = {
|
||||
{kSimCoreClock, false, kSimSystemClock, kSimClockDividerOutdiv1},
|
||||
{kSimSystemClock, false, kSimSystemClock, kSimClockDividerOutdiv1},
|
||||
{kSimBusClock, false, kSimSystemClock, kSimClockDividerOutdiv2},
|
||||
{kSimFlexBusClock, false, kSimSystemClock, kSimClockDividerOutdiv3},
|
||||
{kSimFlashClock, false, kSimSystemClock, kSimClockDividerOutdiv4},
|
||||
{kSimClockNameCount, false, kSimSystemClock, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief Clock gate module config table for K64.*/
|
||||
const sim_clock_gate_module_config_t kSimClockGateModuleConfigTable [] = {
|
||||
|
||||
/* System modules*/
|
||||
{kSimClockModuleDMA, 0, HW_SIM_SCGC7_ADDR, SIM_SCGC7_DMA_MASK},
|
||||
{kSimClockModuleDMAMUX, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_DMAMUX_MASK},
|
||||
{kSimClockModulePORT, 0, HW_SIM_SCGC5_ADDR, SIM_SCGC5_PORTA_MASK},
|
||||
{kSimClockModulePORT, 1, HW_SIM_SCGC5_ADDR, SIM_SCGC5_PORTB_MASK},
|
||||
{kSimClockModulePORT, 2, HW_SIM_SCGC5_ADDR, SIM_SCGC5_PORTC_MASK},
|
||||
{kSimClockModulePORT, 3, HW_SIM_SCGC5_ADDR, SIM_SCGC5_PORTD_MASK},
|
||||
{kSimClockModulePORT, 4, HW_SIM_SCGC5_ADDR, SIM_SCGC5_PORTE_MASK},
|
||||
{kSimClockModuleMPU, 0, HW_SIM_SCGC7_ADDR, SIM_SCGC7_MPU_MASK},
|
||||
{kSimClockModuleEWM, 0, HW_SIM_SCGC4_ADDR, SIM_SCGC4_EWM_MASK},
|
||||
|
||||
/* Memory and memory interfaces*/
|
||||
{kSimClockModuleFLEXBUS, 0, HW_SIM_SCGC7_ADDR, SIM_SCGC7_FLEXBUS_MASK},
|
||||
{kSimClockModuleFTF, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_FTF_MASK},
|
||||
|
||||
/* Security*/
|
||||
{kSimClockModuleCRC, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_CRC_MASK},
|
||||
{kSimClockModuleRNGA, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_RNGA_MASK},
|
||||
|
||||
/* Analog*/
|
||||
{kSimClockModuleADC, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_ADC0_MASK},
|
||||
{kSimClockModuleADC, 1, HW_SIM_SCGC3_ADDR, SIM_SCGC3_ADC1_MASK},
|
||||
{kSimClockModuleCMP, 0, HW_SIM_SCGC4_ADDR, SIM_SCGC4_CMP_MASK},
|
||||
{kSimClockModuleDAC, 0, HW_SIM_SCGC2_ADDR, SIM_SCGC2_DAC0_MASK},
|
||||
{kSimClockModuleDAC, 1, HW_SIM_SCGC2_ADDR, SIM_SCGC2_DAC1_MASK},
|
||||
{kSimClockModuleVREF, 0, HW_SIM_SCGC4_ADDR, SIM_SCGC4_VREF_MASK},
|
||||
{kSimClockModuleSAI, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_I2S_MASK},
|
||||
|
||||
/* Timers*/
|
||||
{kSimClockModulePDB, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_PDB_MASK},
|
||||
{kSimClockModuleFTM, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_FTM0_MASK},
|
||||
{kSimClockModuleFTM, 1, HW_SIM_SCGC6_ADDR, SIM_SCGC6_FTM1_MASK},
|
||||
{kSimClockModuleFTM, 2, HW_SIM_SCGC3_ADDR, SIM_SCGC3_FTM2_MASK},
|
||||
{kSimClockModuleFTM, 3, HW_SIM_SCGC3_ADDR, SIM_SCGC3_FTM3_MASK},
|
||||
{kSimClockModulePIT, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_PIT_MASK},
|
||||
{kSimClockModuleLPTIMER, 0, HW_SIM_SCGC5_ADDR, SIM_SCGC5_LPTMR_MASK},
|
||||
{kSimClockModuleCMT, 0, HW_SIM_SCGC4_ADDR, SIM_SCGC4_CMT_MASK},
|
||||
{kSimClockModuleRTC, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_RTC_MASK},
|
||||
|
||||
/* Communication Interfaces*/
|
||||
{kSimClockModuleENET, 0, HW_SIM_SCGC2_ADDR, SIM_SCGC2_ENET_MASK},
|
||||
{kSimClockModuleUSBFS, 0, HW_SIM_SCGC4_ADDR, SIM_SCGC4_USBOTG_MASK},
|
||||
{kSimClockModuleUSBDCD, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_USBDCD_MASK},
|
||||
{kSimClockModuleFLEXCAN, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_FLEXCAN0_MASK},
|
||||
{kSimClockModuleSPI, 0, HW_SIM_SCGC6_ADDR, SIM_SCGC6_SPI0_MASK},
|
||||
{kSimClockModuleSPI, 1, HW_SIM_SCGC6_ADDR, SIM_SCGC6_SPI1_MASK},
|
||||
{kSimClockModuleSPI, 2, HW_SIM_SCGC3_ADDR, SIM_SCGC3_SPI2_MASK},
|
||||
{kSimClockModuleI2C, 0, HW_SIM_SCGC4_ADDR, SIM_SCGC4_I2C0_MASK},
|
||||
{kSimClockModuleI2C, 1, HW_SIM_SCGC4_ADDR, SIM_SCGC4_I2C1_MASK},
|
||||
{kSimClockModuleI2C, 2, HW_SIM_SCGC1_ADDR, SIM_SCGC1_I2C2_MASK},
|
||||
{kSimClockModuleUART, 0, HW_SIM_SCGC4_ADDR, SIM_SCGC4_UART0_MASK},
|
||||
{kSimClockModuleUART, 1, HW_SIM_SCGC4_ADDR, SIM_SCGC4_UART1_MASK},
|
||||
{kSimClockModuleUART, 2, HW_SIM_SCGC4_ADDR, SIM_SCGC4_UART2_MASK},
|
||||
{kSimClockModuleUART, 3, HW_SIM_SCGC4_ADDR, SIM_SCGC4_UART3_MASK},
|
||||
{kSimClockModuleUART, 4, HW_SIM_SCGC1_ADDR, SIM_SCGC1_UART4_MASK},
|
||||
{kSimClockModuleUART, 5, HW_SIM_SCGC1_ADDR, SIM_SCGC1_UART5_MASK},
|
||||
{kSimClockModuleESDHC, 0, HW_SIM_SCGC3_ADDR, SIM_SCGC3_SDHC_MASK},
|
||||
|
||||
/* Human-machine Interfaces*/
|
||||
{kSimClockModuleMax, 0, 0, 0}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source OSC32KSEL setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockOsc32kSelTable [] = {
|
||||
{kSimOsc32kClock, false, false, kSimClockDividerMax},
|
||||
{kSimReserved, false, false, kSimClockDividerMax},
|
||||
{kSimRtc32kClock, false, false, kSimClockDividerMax},
|
||||
{kSimLpoClock, false, false, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source SDHC setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockSdhcSrcTable [] = {
|
||||
{kSimCoreClock, false, false, kSimClockDividerMax},
|
||||
{kSimClockPllfllSel, true, false, kSimClockDividerMax},
|
||||
{kSimOsc0ErClock, false, false, kSimClockDividerMax},
|
||||
{kSimSDHC0_CLKIN, false, false, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source TIME setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockTimeSrcTable [] = {
|
||||
{kSimCoreClock, false, false, kSimClockDividerMax},
|
||||
{kSimClockPllfllSel, true, false, kSimClockDividerMax},
|
||||
{kSimOsc0ErClock, false, false, kSimClockDividerMax},
|
||||
{kSimENET_1588_CLKIN, false, false, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source RMII setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockRmiiSrcTable [] = {
|
||||
{kSimEXTAL_Clock, false, false, kSimClockDividerMax},
|
||||
{kSimENET_1588_CLKIN, false, false, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source USB setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockUsbSrcTable [] = {
|
||||
{kSimUSB_CLKIN, false, false, kSimClockDividerMax},
|
||||
{kSimClockPllfllSel, true, true, kSimClockDividerUsbDiv}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source PLLFLLSEL setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockPllfllSelTable [] = {
|
||||
{kSimMcgFllClock, false, false, kSimClockDividerMax},
|
||||
{kSimMcgPll0Clock, false, false, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source TRACESEL setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockTraceSelTable [] = {
|
||||
{kSimMcgOutClock, false, false, kSimClockDividerMax},
|
||||
{kSimCoreClock, false, false, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source CLKOUT_SEL setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockClkoutSelTable [] = {
|
||||
{kSimFlexBusClock, false, false, kSimClockDividerMax},
|
||||
{kSimReserved, false, false, kSimClockDividerMax},
|
||||
{kSimFlashClock, false, false, kSimClockDividerMax},
|
||||
{kSimLpoClock, false, false, kSimClockDividerMax},
|
||||
{kSimMcgIrClock, false, false, kSimClockDividerMax},
|
||||
{kSimRtc32kClock, false, false, kSimClockDividerMax},
|
||||
{kSimReserved, false, false, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source RTCCLKOUTSEL setting config table for K64*/
|
||||
const sim_clock_source_value_t kSimClockRtcClkoutSelTable [] = {
|
||||
{kSimRtc1hzClock, false, false, kSimClockDividerMax},
|
||||
{kSimRtc32kClock, false, false, kSimClockDividerMax}
|
||||
};
|
||||
|
||||
/*! @brief CLOCK source value table for K64*/
|
||||
const sim_clock_source_value_t *kSimClockSourceValueTable [] = {
|
||||
NULL,
|
||||
NULL,
|
||||
kSimClockSdhcSrcTable,
|
||||
NULL,
|
||||
kSimClockTimeSrcTable,
|
||||
kSimClockRmiiSrcTable,
|
||||
NULL,
|
||||
kSimClockUsbSrcTable,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
kSimClockOsc32kSelTable,
|
||||
NULL,
|
||||
kSimClockPllfllSelTable,
|
||||
NULL,
|
||||
NULL,
|
||||
kSimClockTraceSelTable,
|
||||
kSimClockClkoutSelTable,
|
||||
kSimClockRtcClkoutSelTable,
|
||||
};
|
||||
|
||||
/*! @}*/
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
||||
|
|
@ -1,748 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#include "fsl_uart_hal.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_init
|
||||
* Description : Initialize the UART controller.
|
||||
* This function will initialize the module to user defined settings and default settings.
|
||||
* Here is an example demonstrating how to define the uart_config_t structure and call
|
||||
* the uart_hal_init function:
|
||||
* uart_config_t uartConfig;
|
||||
* uartConfig.uartSourceClockInHz = uartSourceClock;
|
||||
* uartConfig.baudRate = baudRate;
|
||||
* uartConfig.bitCountPerChar = kUart8BitsPerChar;
|
||||
* uartConfig.parityMode = kUartParityDisabled;
|
||||
* uartConfig.stopBitCount = kUartOneStopBit;
|
||||
* uartConfig.txDataInvert = 0; uartConfig.rxDataInvert = 0;
|
||||
* uart_hal_init(uartInstance, &uartConfig);
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_init(uint32_t uartInstance, const uart_config_t *config)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* first, disable the UART transmitter and receiver*/
|
||||
uart_hal_disable_transmitter(uartInstance);
|
||||
uart_hal_disable_receiver(uartInstance);
|
||||
|
||||
/*********************************************************/
|
||||
/* calculate baud rate settings */
|
||||
/*********************************************************/
|
||||
if (uart_hal_set_baud_rate(uartInstance, config->uartSourceClockInHz, config->baudRate)
|
||||
!= kStatus_UART_Success)
|
||||
{
|
||||
return kStatus_UART_BaudRateCalculationError;
|
||||
}
|
||||
|
||||
/*********************************************************/
|
||||
/* configure number of bits in a char */
|
||||
/*********************************************************/
|
||||
if (uart_hal_configure_bit_count_per_char(uartInstance, config->bitCountPerChar)
|
||||
!= kStatus_UART_Success)
|
||||
{
|
||||
return kStatus_UART_BitCountNotSupported;
|
||||
}
|
||||
|
||||
/*********************************************************/
|
||||
/* configure the parity enable/type */
|
||||
/*********************************************************/
|
||||
uart_hal_configure_parity_mode(uartInstance, config->parityMode);
|
||||
|
||||
/*********************************************************/
|
||||
/* configure the number of stop bits */
|
||||
/*********************************************************/
|
||||
if (uart_hal_configure_stop_bit_count(uartInstance, config->stopBitCount) !=
|
||||
kStatus_UART_Success)
|
||||
{
|
||||
return kStatus_UART_StopBitCountNotSupported;
|
||||
}
|
||||
|
||||
/*********************************************************/
|
||||
/* configure tx and rx inversions */
|
||||
/*********************************************************/
|
||||
uart_hal_configure_tx_rx_inversion(uartInstance, config->rxDataInvert, config->txDataInvert);
|
||||
|
||||
/* finally, enable the UART transmitter and receiver*/
|
||||
uart_hal_enable_transmitter(uartInstance);
|
||||
uart_hal_enable_receiver(uartInstance);
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_set_baud_rate
|
||||
* Description : Configure the UART baud rate.
|
||||
* This function programs the UART baud rate to the desired value passed in by the user. The user
|
||||
* must also pass in the module source clock so that the function can calculate the baud
|
||||
* rate divisors to their appropriate values.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this is be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_set_baud_rate(uint32_t uartInstance, uint32_t sourceClockInHz,
|
||||
uint32_t desiredBaudRate)
|
||||
{
|
||||
uint16_t sbr;
|
||||
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* SoCs with low power uart support differ in how they calculate the baud rate
|
||||
* for various instances of the uart from SoCs without low power uart support
|
||||
*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
uint16_t sbrTemp;
|
||||
uint32_t osr;
|
||||
uint8_t i;
|
||||
uint32_t tempDiff;
|
||||
uint32_t calculatedBaud, baudDiff;
|
||||
|
||||
/* calculate baud rate settings*/
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* This uart instantiation uses a slightly different baud rate calculation
|
||||
* The idea is to use the best OSR (over-sampling rate) possible
|
||||
* Note, osr is typically hard-set to 16 in other uart instantiations
|
||||
* First calculate the baud rate using the minimum OSR possible (4)
|
||||
*/
|
||||
osr = 4;
|
||||
sbr = (sourceClockInHz/(desiredBaudRate * osr));
|
||||
calculatedBaud = (sourceClockInHz / (osr * sbr));
|
||||
|
||||
if (calculatedBaud > desiredBaudRate)
|
||||
{
|
||||
baudDiff = calculatedBaud - desiredBaudRate;
|
||||
}
|
||||
else
|
||||
{
|
||||
baudDiff = desiredBaudRate - calculatedBaud;
|
||||
}
|
||||
|
||||
/* loop to find the best osr value possible, one that generates minimum baudDiff
|
||||
* iterate through the rest of the supported values of osr
|
||||
*/
|
||||
for (i = 5; i <= 32; i++)
|
||||
{
|
||||
/* calculate the temporary sbr value */
|
||||
sbrTemp = (sourceClockInHz/(desiredBaudRate * i));
|
||||
/* calculate the baud rate based on the temporary osr and sbr values*/
|
||||
calculatedBaud = (sourceClockInHz / (i * sbrTemp));
|
||||
|
||||
if (calculatedBaud > desiredBaudRate)
|
||||
{
|
||||
tempDiff = calculatedBaud - desiredBaudRate;
|
||||
}
|
||||
else
|
||||
{
|
||||
tempDiff = desiredBaudRate - calculatedBaud;
|
||||
}
|
||||
|
||||
if (tempDiff <= baudDiff)
|
||||
{
|
||||
baudDiff = tempDiff;
|
||||
osr = i; /* update and store the best osr value calculated*/
|
||||
sbr = sbrTemp; /* update store the best sbr value calculated*/
|
||||
}
|
||||
}
|
||||
|
||||
/* next, check to see if actual baud rate is within 3% of desired baud rate
|
||||
* based on the best calculate osr value
|
||||
*/
|
||||
if (baudDiff < ((desiredBaudRate / 100) * 3))
|
||||
{
|
||||
/* Acceptable baud rate */
|
||||
/* Check if osr is between 4x and 7x oversampling*/
|
||||
/* If so, then "BOTHEDGE" sampling must be turned on*/
|
||||
if ((osr > 3) && (osr < 8))
|
||||
{
|
||||
HW_UART0_C5_SET(BM_UART0_C5_BOTHEDGE);
|
||||
}
|
||||
|
||||
/* program the osr value (bit value is one less than actual value)*/
|
||||
BW_UART0_C4_OSR(osr-1);
|
||||
|
||||
/* program the sbr (divider) value obtained above*/
|
||||
BW_UART0_BDH_SBR((uint8_t)(sbr >> 8));
|
||||
BW_UART0_BDL_SBR((uint8_t)sbr);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Unacceptable baud rate difference of more than 3%*/
|
||||
return kStatus_UART_BaudRatePercentDiffExceeded;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* calculate the baud rate modulo divisor, sbr*/
|
||||
sbr = sourceClockInHz / (desiredBaudRate * 16);
|
||||
|
||||
/* check to see if sbr is out of range of register bits */
|
||||
if ( (sbr > 0x1FFF) || (sbr < 1) )
|
||||
{
|
||||
/* unsupported baud rate for given source clock input*/
|
||||
return kStatus_UART_BaudRateCalculationError;
|
||||
}
|
||||
|
||||
/* next, check to see if actual baud rate is within 3% of desired baud rate
|
||||
* calculate baud rate based on previosuly calculated sbr
|
||||
*/
|
||||
calculatedBaud = (sourceClockInHz / (16 * sbr));
|
||||
|
||||
if (calculatedBaud > desiredBaudRate)
|
||||
{
|
||||
baudDiff = calculatedBaud - desiredBaudRate;
|
||||
}
|
||||
else
|
||||
{
|
||||
baudDiff = desiredBaudRate - calculatedBaud;
|
||||
}
|
||||
|
||||
/* check for baud rate to be within 3%*/
|
||||
if (baudDiff > ((desiredBaudRate / 100) * 3))
|
||||
{
|
||||
/* Unacceptable baud rate difference of more than 3%*/
|
||||
return kStatus_UART_BaudRatePercentDiffExceeded;
|
||||
}
|
||||
|
||||
/* Else, baud rate is ok and write to the SBR bits in the BDH and BDL registers*/
|
||||
BW_UART_BDH_SBR(uartInstance, (uint8_t)(sbr >> 8));
|
||||
BW_UART_BDL_SBR(uartInstance, (uint8_t)sbr);
|
||||
}
|
||||
#else
|
||||
/* BaudRate = (SourceClkInHz)/[16 * (SBR + BRFA)]
|
||||
* First, calculate SBR (integer part) then calculate the BRFA (fine adjust fractional field)
|
||||
*/
|
||||
uint16_t brfa;
|
||||
|
||||
/* calculate the baud rate modulo divisor, sbr*/
|
||||
sbr = sourceClockInHz / (desiredBaudRate * 16);
|
||||
|
||||
/* check to see if sbr is out of range of register bits */
|
||||
if ( (sbr > 0x1FFF) || (sbr < 1) )
|
||||
{
|
||||
/* unsupported baud rate for given source clock input*/
|
||||
return kStatus_UART_BaudRateCalculationError;
|
||||
}
|
||||
|
||||
/* write the sbr value to the BDH and BDL registers*/
|
||||
BW_UART_BDH_SBR(uartInstance, (uint8_t)(sbr >> 8));
|
||||
BW_UART_BDL_SBR(uartInstance, (uint8_t)sbr);
|
||||
|
||||
/* determine if a fractional divider is needed to fine tune closer to the desired baud
|
||||
* each value of brfa is in 1/32 increments, hence the multiply-by-32
|
||||
*/
|
||||
brfa = (32*sourceClockInHz/(desiredBaudRate*16)) - 32*sbr;
|
||||
|
||||
/* write the brfa value to the register*/
|
||||
BW_UART_C4_BRFA(uartInstance, brfa);
|
||||
#endif
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_set_baud_rate_divisor
|
||||
* Description : Set the UART baud rate modulo divisor value.
|
||||
* This function allows the user to program the baud rate divisor directly in situations
|
||||
* where the divisor value is known. In this case, the user may not want to call the
|
||||
* uart_hal_set_baud_rate() function as the divisor is already known to them.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_set_baud_rate_divisor(uint32_t uartInstance, uint32_t baudRateDivisor)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* check to see if baudRateDivisor is out of range of register bits */
|
||||
if ( (baudRateDivisor > 0x1FFF) || (baudRateDivisor < 1) )
|
||||
{
|
||||
/* unsupported bit setting*/
|
||||
return kStatus_UART_InvalidBitSetting;
|
||||
}
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* program the sbr (baudRateDivisor) value to the BDH and BDL registers*/
|
||||
BW_UART0_BDH_SBR((uint8_t)(baudRateDivisor >> 8));
|
||||
BW_UART0_BDL_SBR((uint8_t)baudRateDivisor);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* program the sbr (baudRateDivisor) value to the BDH and BDL registers*/
|
||||
BW_UART_BDH_SBR(uartInstance, (uint8_t)(baudRateDivisor >> 8));
|
||||
BW_UART_BDL_SBR(uartInstance, (uint8_t)baudRateDivisor);
|
||||
}
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_set_baud_rate_fine_adjust
|
||||
* Description : Set the UART baud rate fine adjust. (Note: Feature available on select
|
||||
* UART instances used in conjunction with baud rate programming)
|
||||
* This function, which programs the baud rate fine adjust, is used in conjuction with
|
||||
* programming the baud rate modulo divisor in situations where these divisors value are known
|
||||
* In this case, the user may not want to call the uart_hal_set_baud_rate() function as the
|
||||
* divisors are already known to them.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_set_baud_rate_fine_adjust(uint32_t uartInstance, uint8_t baudFineAdjust)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
if (baudFineAdjust > 0x1F)
|
||||
{
|
||||
/* unsupported bit setting*/
|
||||
return kStatus_UART_InvalidBitSetting;
|
||||
}
|
||||
|
||||
BW_UART_C4_BRFA(uartInstance, baudFineAdjust);
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_set_oversampling_ratio
|
||||
* Description : Set the UART baud rate oversampling ratio. (Note: Feature available on select
|
||||
* UART instances used in conjunction with baud rate programming)
|
||||
* This function allows the user to directly configure the oversampling ratio (OSR). Normally this
|
||||
* ratio is automatically configured when calling the uart_hal_set_baud_rate(). However, if the user
|
||||
* knows the necessary dividers and wishes to directly program them, they also have the option to
|
||||
* directly program the OSR.
|
||||
* The oversampling ratio should be set between 4x (00011) and 32x (11111), writing
|
||||
* an invalid oversampling ratio with result in an error and will be set to a default
|
||||
* 16x (01111) oversampling ratio.
|
||||
* It is required that the transmitter/receiver be disabled before calling
|
||||
* this function.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_set_oversampling_ratio(uint32_t uartInstance, uint32_t overSamplingRatio)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
if (overSamplingRatio > 0x1F)
|
||||
{
|
||||
/* unsupported bit setting*/
|
||||
return kStatus_UART_InvalidBitSetting;
|
||||
}
|
||||
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_C4_OSR(overSamplingRatio);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kStatus_UART_OverSamplingNotSupported;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_BOTH_EDGE_SAMPLING_SUPPORT
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_both_edge_sampling
|
||||
* Description : Configure the UART baud rate both edge sampling option.
|
||||
* (Note: Feature available on select UART instances used in conjunction with
|
||||
* baud rate programming)
|
||||
* This function allows the user to directly configure the both edge sampling option.
|
||||
* When enabled, the received data is sampled on both edges of the baud rate clock.
|
||||
* This must be set when the oversampling ratio is between 4x and 7x.
|
||||
* This function should only be called when the receiver is disabled.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_configure_both_edge_sampling(uint32_t uartInstance,
|
||||
bool enableBothEdgeSampling)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_C5_BOTHEDGE(enableBothEdgeSampling);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kStatus_UART_BothEdgeNotSupported;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_both_edge_sampling
|
||||
* Description : Configure number of bits per character in the UART controller.
|
||||
* This function allows the user to configure the number of bits per character according to the
|
||||
* typedef uart_bit_count_per_char_t.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_configure_bit_count_per_char(uint32_t uartInstance,
|
||||
uart_bit_count_per_char_t bitCountPerChar)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* configure number of bits in a char*/
|
||||
#if FSL_FEATURE_UART_HAS_10BIT_DATA_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
if(bitCountPerChar == kUart10BitsPerChar)
|
||||
{
|
||||
HW_UART0_C4_SET(BM_UART0_C4_M10); /*set M10 for 10-bit mode, M bit in C1 is don't care*/
|
||||
}
|
||||
else
|
||||
{
|
||||
BW_UART0_C1_M(bitCountPerChar); /* config 8- (M=0) or 9-bits (M=1) */
|
||||
HW_UART0_C4_CLR(BM_UART0_C4_M10); /* clear M10 to make sure not 10-bit mode*/
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
if(bitCountPerChar == kUart10BitsPerChar)
|
||||
{
|
||||
/* re-enable the UART transmitter and receiver*/
|
||||
uart_hal_enable_transmitter(uartInstance);
|
||||
uart_hal_enable_receiver(uartInstance);
|
||||
|
||||
/* illegal value, this uart instance does not support 10-bit*/
|
||||
return kStatus_UART_BitCountNotSupported;
|
||||
}
|
||||
else
|
||||
{
|
||||
BW_UART_C1_M(uartInstance, bitCountPerChar); /* config 8- (M=0) or 9-bits (M=1) */
|
||||
}
|
||||
}
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_parity_mode
|
||||
* Description : Configure the parity mode in the UART controller.
|
||||
* This function allows the user to configure the parity mode of the UART controller to disable
|
||||
* it or enable it for even parity or for odd parity.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_parity_mode(uint32_t uartInstance, uart_parity_mode_t parityModeType)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* configure the parity enable/type */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
if ((parityModeType) == 0)
|
||||
{
|
||||
/* parity disabled, hence parity type is don't care*/
|
||||
HW_UART0_C1_CLR(BM_UART0_C1_PE);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* parity enabled*/
|
||||
HW_UART0_C1_SET(BM_UART0_C1_PE);
|
||||
/* parity odd/even depending on parity mode setting*/
|
||||
BW_UART0_C1_PT((parityModeType) & 0x1);
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
if ((parityModeType) == 0)
|
||||
{
|
||||
/* parity disabled, hence parity type is don't care*/
|
||||
HW_UART_C1_CLR(uartInstance, BM_UART_C1_PE);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* parity enabled*/
|
||||
HW_UART_C1_SET(uartInstance, BM_UART_C1_PE);
|
||||
/* parity odd/even depending on parity mode setting*/
|
||||
BW_UART_C1_PT(uartInstance, (parityModeType) & 0x1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_stop_bit_count
|
||||
* Description : Configure the number of stop bits in the UART controller.
|
||||
* This function allows the user to configure the number of stop bits in the UART controller
|
||||
* to be one or two stop bits.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_configure_stop_bit_count(uint32_t uartInstance,
|
||||
uart_stop_bit_count_t stopBitCount)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT
|
||||
/* configure the number of stop bits*/
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_BDH_SBNS(stopBitCount);
|
||||
}
|
||||
else
|
||||
{
|
||||
BW_UART_BDH_SBNS(uartInstance, stopBitCount);
|
||||
}
|
||||
|
||||
return kStatus_UART_Success;
|
||||
#else
|
||||
/* stop bit configuration not supported, only one stop bit is supported*/
|
||||
if(stopBitCount != kUartOneStopBit)
|
||||
{
|
||||
return kStatus_UART_StopBitCountNotSupported;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_tx_rx_inversion
|
||||
* Description : Configure the transmit and receive inversion control in UART controller.
|
||||
* This function allows the user to invert the transmit and receive signals, independently.
|
||||
* This function should only be called when the UART is between transmit and receive packets.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_tx_rx_inversion(uint32_t uartInstance, uint32_t rxInvert, uint32_t txInvert)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* configure tx and rx inversions*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* 0 - receive data not inverted, 1 - receive data inverted */
|
||||
BW_UART0_S2_RXINV(rxInvert);
|
||||
/* 0 - transmit data not inverted, 1 - transmit data inverted*/
|
||||
BW_UART0_C3_TXINV(txInvert);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* 0 - receive data not inverted, 1 - receive data inverted */
|
||||
BW_UART_S2_RXINV(uartInstance, rxInvert);
|
||||
/* 0 - transmit data not inverted, 1 - transmit data inverted*/
|
||||
BW_UART_C3_TXINV(uartInstance, txInvert);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_transmitter
|
||||
* Description : Enable the UART transmitter.
|
||||
* This function allows the user to enable the UART transmitter.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_enable_transmitter(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* enable the transmitter based on the uart instance*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
HW_UART0_C2_SET(BM_UART0_C2_TE);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* for this uart instance, there is a two step process to clear the transmit complete
|
||||
* status flag:
|
||||
* 1. Read the status register with the status bit set
|
||||
* 2. enable the transmitter (change TE from 0 to 1)
|
||||
*/
|
||||
|
||||
/* first read the status register
|
||||
* no need to store the read value, it's assumed the status bit is set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, enable the transmitter */
|
||||
HW_UART_C2_SET(uartInstance, BM_UART_C2_TE);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_transmitter
|
||||
* Description : Disable the UART transmitter.
|
||||
* This function allows the user to disable the UART transmitter.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_disable_transmitter(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* disable the transmitter based on the uart instance*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
HW_UART0_C2_CLR(BM_UART0_C2_TE);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
HW_UART_C2_CLR(uartInstance, BM_UART_C2_TE);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_transmitter_enabled
|
||||
* Description : Get the UART transmitter enabled/disabled configuration setting.
|
||||
* This function allows the user to get the setting of the UART transmitter.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_transmitter_enabled(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get the transmitter config based on the uart instance*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_C2.B.TE;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_C2(uartInstance).B.TE;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_receiver
|
||||
* Description : Enable the UART receiver.
|
||||
* This function allows the user to enable the UART receiver.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_enable_receiver(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* enable the receiver based on the uart instance*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
HW_UART0_C2_SET(BM_UART0_C2_RE);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
HW_UART_C2_SET(uartInstance, BM_UART_C2_RE);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_receiver
|
||||
* Description : Disable the UART receiver.
|
||||
* This function allows the user to disable the UART receiver.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_disable_receiver(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* disable the receiver based on the uart instance*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
HW_UART0_C2_CLR(BM_UART0_C2_RE);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
HW_UART_C2_CLR(uartInstance, BM_UART_C2_RE);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_receiver_enabled
|
||||
* Description : Get the UART receiver enabled/disabled configuration setting.
|
||||
* This function allows the user to get the setting of the UART receiver.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_receiver_enabled(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get the receiver config based on the uart instance*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_C2.B.RE;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_C2(uartInstance).B.RE;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
||||
|
|
@ -1,552 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#include "fsl_uart_hal.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_FIFO
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_tx_fifo
|
||||
* Description : Enable the UART transmit FIFO.
|
||||
* This function allows the user to enable the UART transmit FIFO.
|
||||
* It is required that the transmitter/receiver should be disabled before calling this function
|
||||
* and when the FIFO is empty.
|
||||
* Additionally, TXFLUSH and RXFLUSH commands should be issued after calling this function.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_enable_tx_fifo(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* before enabling the tx fifo, UARTx_C2[TE] (transmitter) and
|
||||
* UARTx_C2[RE] (receiver) must be disabled
|
||||
* if not, return an error code
|
||||
*/
|
||||
uint8_t txEnable = HW_UART_C2(uartInstance).B.TE;
|
||||
uint8_t rxEnable = HW_UART_C2(uartInstance).B.RE;
|
||||
|
||||
if (txEnable || rxEnable)
|
||||
{
|
||||
return kStatus_UART_TxOrRxNotDisabled;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set TXFE*/
|
||||
HW_UART_PFIFO_SET(uartInstance, BM_UART_PFIFO_TXFE);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_tx_fifo
|
||||
* Description : Disable the UART transmit FIFO.
|
||||
* This function allows the user to disable the UART transmit FIFO.
|
||||
* It is required that the transmitter/receiver should be disabled before calling this function
|
||||
* and when the FIFO is empty.
|
||||
* Additionally, TXFLUSH and RXFLUSH commands should be issued after calling this function.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_disable_tx_fifo(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* before enabling the tx fifo, UARTx_C2[TE] (transmitter) and
|
||||
* UARTx_C2[RE] (receiver) must be disabled
|
||||
* if not, return an error code
|
||||
*/
|
||||
uint8_t txEnable = HW_UART_C2(uartInstance).B.TE;
|
||||
uint8_t rxEnable = HW_UART_C2(uartInstance).B.RE;
|
||||
|
||||
if (txEnable || rxEnable)
|
||||
{
|
||||
return kStatus_UART_TxOrRxNotDisabled;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Clear TXFE*/
|
||||
HW_UART_PFIFO_CLR(uartInstance, BM_UART_PFIFO_TXFE);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_rx_fifo
|
||||
* Description : Enable the UART receive FIFO.
|
||||
* This function allows the user to enable the UART receive FIFO.
|
||||
* It is required that the transmitter/receiver should be disabled before calling this function
|
||||
* and when the FIFO is empty.
|
||||
* Additionally, TXFLUSH and RXFLUSH commands should be issued after calling this function.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_enable_rx_fifo(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* before enabling the rx fifo, UARTx_C2[TE] (transmitter) and
|
||||
* UARTx_C2[RE] (receiver) must be disabled
|
||||
* if not, return an error code
|
||||
*/
|
||||
uint8_t txEnable = HW_UART_C2(uartInstance).B.TE;
|
||||
uint8_t rxEnable = HW_UART_C2(uartInstance).B.RE;
|
||||
|
||||
if (txEnable || rxEnable)
|
||||
{
|
||||
return kStatus_UART_TxOrRxNotDisabled;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set RXFE*/
|
||||
HW_UART_PFIFO_SET(uartInstance, BM_UART_PFIFO_RXFE);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_rx_fifo
|
||||
* Description : Disable the UART receive FIFO.
|
||||
* This function allows the user to disable the UART receive FIFO.
|
||||
* It is required that the transmitter/receiver should be disabled before calling this function
|
||||
* and when the FIFO is empty.
|
||||
* Additionally, TXFLUSH and RXFLUSH commands should be issued after calling this function.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_disable_rx_fifo(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* before disabling the rx fifo, UARTx_C2[TE] (transmitter) and
|
||||
* UARTx_C2[RE] (receiver) must be disabled
|
||||
* if not, return an error code
|
||||
*/
|
||||
uint8_t txEnable = HW_UART_C2(uartInstance).B.TE;
|
||||
uint8_t rxEnable = HW_UART_C2(uartInstance).B.RE;
|
||||
|
||||
if (txEnable || rxEnable)
|
||||
{
|
||||
return kStatus_UART_TxOrRxNotDisabled;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Clear RXFE*/
|
||||
HW_UART_PFIFO_CLR(uartInstance, BM_UART_PFIFO_RXFE);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_tx_fifo_size
|
||||
* Description : Get the size of the UART transmit FIFO.
|
||||
* This function returns the size (number of entries) supported in the UART transmit FIFO for
|
||||
* a particular module instance.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uint8_t uart_hal_get_tx_fifo_size(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
return HW_UART_PFIFO(uartInstance).B.TXFIFOSIZE;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_rx_fifo_size
|
||||
* Description : Get the size of the UART receive FIFO.
|
||||
* This function returns the size (number of entries) supported in the UART receive FIFO for
|
||||
* a particular module instance.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uint8_t uart_hal_get_rx_fifo_size(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
return HW_UART_PFIFO(uartInstance).B.RXFIFOSIZE;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_flush_tx_fifo
|
||||
* Description : Flush the UART transmit FIFO.
|
||||
* This function allows you to flush the UART transmit FIFO for a particular module instance.
|
||||
* Flushing the FIFO may result in data loss.
|
||||
* It is recommended that the transmitter should be disabled before calling this function.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_flush_tx_fifo(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* in order to flush the tx fifo, UARTx_C2[TE] (transmitter) must be disabled
|
||||
* if not, return an error code
|
||||
*/
|
||||
if (HW_UART_C2(uartInstance).B.TE != 0)
|
||||
{
|
||||
return kStatus_UART_TxNotDisabled;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the bit to flush fifo*/
|
||||
HW_UART_CFIFO_SET(uartInstance, BM_UART_CFIFO_TXFLUSH);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_flush_rx_fifo
|
||||
* Description : Flush the UART receive FIFO.
|
||||
* This function allows you to flush the UART receive FIFO for a particular module instance.
|
||||
* Flushing the FIFO may result in data loss.
|
||||
* It is recommended that the receiver should be disabled before calling this function.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_flush_rx_fifo(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* in order to flush the rx fifo, UARTx_C2[RE] (receiver) must be disabled
|
||||
* if not, return an error code
|
||||
*/
|
||||
if (HW_UART_C2(uartInstance).B.RE != 0)
|
||||
{
|
||||
return kStatus_UART_RxNotDisabled;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the bit to flush fifo*/
|
||||
HW_UART_CFIFO_SET(uartInstance, BM_UART_CFIFO_RXFLUSH);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_tx_fifo_overflow_interrupt
|
||||
* Description : Enable the UART transmit FIFO overflow interrupt.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_enable_tx_fifo_overflow_interrupt(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Set to enable*/
|
||||
HW_UART_CFIFO_SET(uartInstance, BM_UART_CFIFO_TXOFE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_tx_fifo_overflow_interrupt
|
||||
* Description : Disable the UART transmit FIFO overflow interrupt.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_disable_tx_fifo_overflow_interrupt(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Clear to disable*/
|
||||
HW_UART_CFIFO_CLR(uartInstance, BM_UART_CFIFO_TXOFE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_tx_fifo_overflow_interrupt_enabled
|
||||
* Description : Get the configuration of the UART transmit FIFO overflow interrupt enable.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_tx_fifo_overflow_interrupt_enabled(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
return HW_UART_CFIFO(uartInstance).B.TXOFE;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_rx_fifo_underflow_interrupt
|
||||
* Description : Enable the UART receive FIFO underflow interrupt.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_enable_rx_fifo_underflow_interrupt(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Set to enable*/
|
||||
HW_UART_CFIFO_SET(uartInstance, BM_UART_CFIFO_RXUFE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_rx_fifo_underflow_interrupt
|
||||
* Description : Disable the UART receive FIFO underflow interrupt.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_disable_rx_fifo_underflow_interrupt(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Clear to disable*/
|
||||
HW_UART_CFIFO_CLR(uartInstance, BM_UART_CFIFO_RXUFE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_rx_fifo_underflow_interrupt_enabled
|
||||
* Description : Get the configuration of the UART receive FIFO underflow interrupt enable.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_rx_fifo_underflow_interrupt_enabled(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
return HW_UART_CFIFO(uartInstance).B.RXUFE;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_tx_fifo_empty
|
||||
* Description : Get the UART transmit FIFO empty status state.
|
||||
* The function returns the state of the transmit FIFO empty status state but does not take into
|
||||
* account data in the shift register.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_tx_fifo_empty(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
return HW_UART_SFIFO(uartInstance).B.TXEMPT;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_rx_fifo_empty
|
||||
* Description : Get the UART transmit FIFO empty status state.
|
||||
* The function returns the state of the receive FIFO empty status state but does not take into
|
||||
* account data in the shift register.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_rx_fifo_empty(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
return HW_UART_SFIFO(uartInstance).B.RXEMPT;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_tx_fifo_overflow
|
||||
* Description : Get the UART transmit FIFO overflow status state.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_tx_fifo_overflow(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
return HW_UART_SFIFO(uartInstance).B.TXOF;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_clear_tx_fifo_overflow
|
||||
* Description : Clear the UART transmit FIFO overflow status.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_clear_tx_fifo_overflow(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* write one to clear status flag */
|
||||
HW_UART_SFIFO_SET(uartInstance, BM_UART_SFIFO_TXOF);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_rx_fifo_underflow
|
||||
* Description : Get the UART receive FIFO underflow status state.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_rx_fifo_underflow(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
return HW_UART_SFIFO(uartInstance).B.RXUF;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_clear_rx_fifo_underflow
|
||||
* Description : Clear the UART receive FIFO underflow status.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_clear_rx_fifo_underflow(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* write one to clear status flag */
|
||||
HW_UART_SFIFO_SET(uartInstance, BM_UART_SFIFO_RXUF);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_set_tx_fifo_watermark
|
||||
* Description : Set the UART transmit FIFO watermark value.
|
||||
* Programming the transmit watermark should be done when UART the transmitter is disabled
|
||||
* and the value must be set less than the size obtained from uart_hal_get_tx_fifo_size.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_set_tx_fifo_watermark(uint32_t uartInstance, uint8_t watermark)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* in order to set the tx watermark, UARTx_C2[TE] (transmitter) must be disabled
|
||||
* if not, return an error code
|
||||
*/
|
||||
if (HW_UART_C2(uartInstance).B.TE != 0)
|
||||
{
|
||||
return kStatus_UART_TxNotDisabled;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* set watermark
|
||||
* Programming the transmit watermark should be done when the transmitter is disabled
|
||||
* and the value must be set less than the size given in PFIFO[TXFIFOSIZE]
|
||||
*/
|
||||
HW_UART_TWFIFO_WR(uartInstance, watermark);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_tx_fifo_watermark
|
||||
* Description : Get the UART transmit FIFO watermark value.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uint8_t uart_hal_get_tx_fifo_watermark(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get watermark*/
|
||||
return HW_UART_TWFIFO_RD(uartInstance);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_tx_dataword_count_in_fifo
|
||||
* Description : Get the UART transmit FIFO data word count (number of words in the
|
||||
* transmit FIFO).
|
||||
* The function uart_hal_get_tx_dataword_count_in_fifo excludes any data that may
|
||||
* be in the UART transmit shift register
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uint8_t uart_hal_get_tx_dataword_count_in_fifo(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get the current nmber of datawords in the FIFO*/
|
||||
return HW_UART_TCFIFO_RD(uartInstance);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_set_rx_fifo_watermark
|
||||
* Description : Set the UART receive FIFO watermark value.
|
||||
* Programming the receive watermark should be done when the receiver is disabled
|
||||
* and the value must be set less than the size obtained from uart_hal_get_rx_fifo_size and
|
||||
* greater than zero.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_set_rx_fifo_watermark(uint32_t uartInstance, uint8_t watermark)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* in order to set the rx watermark, UARTx_C2[RE] (receiver) must be disabled
|
||||
* if not, return an error code
|
||||
*/
|
||||
if (HW_UART_C2(uartInstance).B.RE != 0)
|
||||
{
|
||||
return kStatus_UART_RxNotDisabled;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* set watermark
|
||||
* Programming the receive watermark should be done when the receiver is disabled
|
||||
* and the value must be set less than the size given in PFIFO[RXFIFOSIZE]
|
||||
* and greater than zero.
|
||||
*/
|
||||
HW_UART_RWFIFO_WR(uartInstance, watermark);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_rx_fifo_watermark
|
||||
* Description : Get the UART receive FIFO data word count (number of words in the receive FIFO).
|
||||
* The function uart_hal_get_rx_dataword_count_in_fifo excludes any data that may be
|
||||
* in the receive shift register.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uint8_t uart_hal_get_rx_fifo_watermark(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get watermark*/
|
||||
return HW_UART_RWFIFO_RD(uartInstance);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_rx_dataword_count_in_fifo
|
||||
* Description : Get the UART receive FIFO watermark value.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uint8_t uart_hal_get_rx_dataword_count_in_fifo(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get the current nmber of datawords in the FIFO*/
|
||||
return HW_UART_RCFIFO_RD(uartInstance);
|
||||
}
|
||||
#endif /* FSL_FEATURE_UART_HAS_FIFO*/
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,795 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#include "fsl_uart_hal.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_wait_mode_operation
|
||||
* Description : Configure the UART to either operate or sieze to operate in WAIT mode.
|
||||
* The function configures the UART to either operate or seize to operate when WAIT mode is
|
||||
* entered.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_wait_mode_operation(uint32_t uartInstance, uart_operation_config_t mode)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* configure uart operation in wait mode*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* In CPU wait mode: 0 - uart clocks continue to run; 1 - uart clocks freeze */
|
||||
BW_UART0_C1_DOZEEN(mode);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/*In CPU wait mode: 0 - uart is enabled; 1 - uart is disabled */
|
||||
BW_UART_C1_UARTSWAI(uartInstance, mode);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_wait_mode_operation_config
|
||||
* Description : Determine if the UART operates or siezes to operate in WAIT mode.
|
||||
* This function returns kUartOperates if the UART has been configured to operate in WAIT mode.
|
||||
* Else it returns KUartStops if the UART has been configured to seize-to-operate in WAIT mode.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_operation_config_t uart_hal_get_wait_mode_operation_config(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get configuration uart operation in wait mode*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* In CPU wait mode: 0 - uart clocks continue to run; 1 - uart clocks freeze */
|
||||
if (HW_UART0_C1.B.DOZEEN==0)
|
||||
{
|
||||
return kUartOperates;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kUartStops;
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/*In CPU wait mode: 0 - uart is enabled; 1 - uart is disabled */
|
||||
if (HW_UART_C1(uartInstance).B.UARTSWAI == 0)
|
||||
{
|
||||
return kUartOperates;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kUartStops;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_loopback_mode
|
||||
* Description : Configure the UART loopback operation.
|
||||
* This function enables or disables the UART loopback operation.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_loopback_mode(uint32_t uartInstance, bool enable)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* configure uart to enable/disable operation in loopback mode*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* configure LOOPS bit to enable(1)/disable(0) loopback mode, but also need to clear RSRC*/
|
||||
BW_UART0_C1_LOOPS(enable);
|
||||
|
||||
/* clear RSRC for loopback mode, and if loopback disabled,
|
||||
* this bit has no meaning but clear anyway
|
||||
* to set it back to default value
|
||||
*/
|
||||
HW_UART0_C1_CLR(BM_UART0_C1_RSRC);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* configure LOOPS bit to enable(1)/disable(0) loopback mode, but also need to clear RSRC */
|
||||
BW_UART_C1_LOOPS(uartInstance, enable);
|
||||
|
||||
/* clear RSRC for loopback mode, and if loopback disabled,
|
||||
* this bit has no meaning but clear anyway
|
||||
* to set it back to default value
|
||||
*/
|
||||
HW_UART_C1_CLR(uartInstance, BM_UART_C1_RSRC);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_singlewire_mode
|
||||
* Description : Configure the UART single-wire operation.
|
||||
* This function enables or disables the UART single-wire operation.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_singlewire_mode(uint32_t uartInstance, bool enable)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* configure uart to enable/disable operation in single mode*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* to enable single-wire mode, need both LOOPS and RSRC set, to disable, clear both*/
|
||||
BW_UART0_C1_LOOPS(enable);
|
||||
BW_UART0_C1_RSRC(enable);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* to enable single-wire mode, need both LOOPS and RSRC set, to disable, clear both*/
|
||||
BW_UART_C1_LOOPS(uartInstance, enable);
|
||||
BW_UART_C1_RSRC(uartInstance, enable);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_txdir_in_singlewire_mode
|
||||
* Description : Configure the UART transmit direction while in single-wire mode.
|
||||
* This function configures the transmitter direction when the UART is configured for single-wire
|
||||
* operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_txdir_in_singlewire_mode(uint32_t uartInstance,
|
||||
uart_singlewire_txdir_t direction)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* configure uart transmit direction (input or output) when in single-wire mode
|
||||
* it is assumed uart is in single-wire mode
|
||||
*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_C3_TXDIR(direction);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
BW_UART_C3_TXDIR(uartInstance, direction);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_put_receiver_in_standby_mode
|
||||
* Description : Place the UART receiver in standby mode.
|
||||
* This function, when called, will place the UART receiver into standby mode.
|
||||
* In some UART instances, there is a condition that must be met before placing rx in standby mode.
|
||||
* Before placing UART in standby, you need to first determine if receiver is set to
|
||||
* wake on idle and if receiver is already in idle state. Per ref manual:
|
||||
* NOTE: RWU should only be set with C1[WAKE] = 0 (wakeup on idle) if the channel is currently
|
||||
* not idle.
|
||||
* This can be determined by the S2[RAF] flag. If set to wake up FROM an IDLE event and the channel
|
||||
* is already idle, it is possible that the UART will discard data since data must be received
|
||||
* (or a LIN break detect) after an IDLE is detected before IDLE is allowed to reasserted.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_put_receiver_in_standby_mode(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* In some uart instances, there is a condition that must be met before placing
|
||||
* rx in standby mode.
|
||||
* Before placing uart in standby, need to first determine if receiver is set to
|
||||
* wake on idle and if receiver is already in idle state. Per ref manual:
|
||||
* NOTE: RWU should only be set with C1[WAKE] = 0 (wakeup on idle) if the channel is
|
||||
* currently not idle.
|
||||
* This can be determined by the S2[RAF] flag. If set to wake up an IDLE event and
|
||||
* the channel is already idle, it is possible that the UART will discard data since data
|
||||
* must be received (or a LIN break detect) after an IDLE is detected before IDLE is
|
||||
* allowed to reasserted.
|
||||
*/
|
||||
uart_wakeup_method_t rxWakeMethod;
|
||||
bool uart_current_rx_state;
|
||||
|
||||
/* see if wake is set for idle or */
|
||||
rxWakeMethod = uart_hal_get_receiver_wakeup_method(uartInstance);
|
||||
uart_current_rx_state = uart_hal_is_receiver_active(uartInstance);
|
||||
|
||||
/* if both rxWakeMethod is set for idle and current rx state is idle, don't put in standy*/
|
||||
if ((rxWakeMethod == kUartIdleLineWake) && (uart_current_rx_state == 0))
|
||||
{
|
||||
return kStatus_UART_RxStandbyModeError;
|
||||
}
|
||||
else
|
||||
{
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* set the RWU bit to place receiver into standby mode*/
|
||||
HW_UART0_C2_SET(BM_UART0_C2_RWU);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* set the RWU bit to place receiver into standby mode*/
|
||||
HW_UART_C2_SET(uartInstance, BM_UART_C2_RWU);
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_put_receiver_in_normal_mode
|
||||
* Description : Place the UART receiver in normal mode (disable standby mode operation).
|
||||
* This function, when called, will place the UART receiver into normal mode and out of
|
||||
* standby mode.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_put_receiver_in_normal_mode(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* clear the RWU bit to place receiver into normal mode (disable standby mode)*/
|
||||
HW_UART0_C2_CLR(BM_UART0_C2_RWU);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* clear the RWU bit to place receiver into normal mode (disable standby mode)*/
|
||||
HW_UART_C2_CLR(uartInstance, BM_UART_C2_RWU);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_receiver_in_standby
|
||||
* Description : Determine if the UART receiver is currently in standby mode.
|
||||
* This function determines the state of the UART receiver. If it returns true, this means
|
||||
* that the UART receiver is in standby mode, otherwise if it returns false, the UART receiver
|
||||
* is in normal mode.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_receiver_in_standby(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* return the RWU bit setting (0 - normal more, 1 - standby)*/
|
||||
return HW_UART0_C2.B.RWU;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* return the RWU bit setting (0 - normal more, 1 - standby)*/
|
||||
return HW_UART_C2(uartInstance).B.RWU;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_select_receiver_wakeup_method
|
||||
* Description : Select the UART receiver wakeup method (idle line or addr-mark) from standby
|
||||
* mode.
|
||||
* This function configured the wakeup method of the UART receiver from standby mode. The options
|
||||
* are idle-line wake or address-mark wake.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_select_receiver_wakeup_method(uint32_t uartInstance, uart_wakeup_method_t method)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* configure the WAKE bit for idle line wake or address mark wake */
|
||||
BW_UART0_C1_WAKE(method);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* configure the WAKE bit for idle line wake or address mark wake */
|
||||
BW_UART_C1_WAKE(uartInstance, method);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_receiver_wakeup_method
|
||||
* Description : Get the UART receiver wakeup method (idle line or addr-mark) from standby mode.
|
||||
* This function returns how the UART recevier is configured to wake from standby mode. The
|
||||
* wake method options that can be returned are kUartIdleLineWake or kUartAddrMarkWake.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_wakeup_method_t uart_hal_get_receiver_wakeup_method(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get configuration of the WAKE bit for idle line wake or address mark wake */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
if(HW_UART0_C1.B.WAKE == 1)
|
||||
{
|
||||
return kUartAddrMarkWake;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kUartIdleLineWake;
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* get configuration of the WAKE bit for idle line wake or address mark wake */
|
||||
if(HW_UART_C1(uartInstance).B.WAKE == 1)
|
||||
{
|
||||
return kUartAddrMarkWake;
|
||||
}
|
||||
else
|
||||
{
|
||||
return kUartIdleLineWake;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_idle_line_detect
|
||||
* Description : Configure the operation options of the UART idle line detect.
|
||||
* This function allows the user to configure the UART idle-line detect operation. There are two
|
||||
* separate operations for the user to configure, the idle line bit-count start and the receive
|
||||
* wake up affect on IDLE status bit. The user will pass in a stucture of type
|
||||
* uart_idle_line_config_t.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_idle_line_detect(uint32_t uartInstance,
|
||||
const uart_idle_line_config_t *config)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Configure the idle line detection configuration as follows:
|
||||
* configure the ILT to bit count after start bit or stop bit
|
||||
* configure RWUID to set or not set IDLE status bit upon detection of
|
||||
* an idle character when recevier in standby
|
||||
*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_C1_ILT(config->idleLineType);
|
||||
BW_UART0_S2_RWUID(config->rxWakeIdleDetect);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
BW_UART_C1_ILT(uartInstance, config->idleLineType);
|
||||
BW_UART_S2_RWUID(uartInstance, config->rxWakeIdleDetect);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_set_break_char_transmit_length
|
||||
* Description : Configure the UART break character transmit length.
|
||||
* This function allows the user to configure the UART break character transmit length. Refer to
|
||||
* the typedef uart_break_char_length_t for setting options.
|
||||
* In some UART instances it is required that the transmitter should be disabled before calling
|
||||
* this function. Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_set_break_char_transmit_length(uint32_t uartInstance,
|
||||
uart_break_char_length_t length)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Configure BRK13 - Break Character transmit length configuration
|
||||
* UART break character length setting:
|
||||
* 0 - minimum 10-bit times (default),
|
||||
* 1 - minimum 13-bit times
|
||||
*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_S2_BRK13(length);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
BW_UART_S2_BRK13(uartInstance, length);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_set_break_char_detect_length
|
||||
* Description : Configure the UART break character detect length.
|
||||
* This function allows the user to configure the UART break character detect length. Refer to
|
||||
* the typedef uart_break_char_length_t for setting options.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_set_break_char_detect_length(uint32_t uartInstance, uart_break_char_length_t length)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Configure LBKDE - Break Character detect length configuration
|
||||
* UART break character length setting:
|
||||
* 0 - minimum 10-bit times (default),
|
||||
* 1 - minimum 13-bit times
|
||||
*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_S2_LBKDE(length);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
BW_UART_S2_LBKDE(uartInstance, length);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_queue_break_char_to_send
|
||||
* Description : Configure the UART transmit send break character operation.
|
||||
* This function allows the user to queue a UART break character to send. If true is passed into
|
||||
* the function, then a break character will be queued for transmission. A break character will
|
||||
* continuously be queued until this function is called again with a false is passed into this
|
||||
* function.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_queue_break_char_to_send(uint32_t uartInstance, bool enable)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Configure SBK - Send Break
|
||||
* UART send break character setting:
|
||||
* 0 - normal transmitter operation,
|
||||
* 1 - Queue break character(s) to be sent
|
||||
*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_C2_SBK(enable);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* in addition to queuing a break char to send, this function also clears the
|
||||
* transmit complete status flag
|
||||
* for this uart instance, there is a two step process to
|
||||
* clear the transmit complete status flag:
|
||||
* 1. Read the status register with the status bit set
|
||||
* 2. queue a break character
|
||||
* first read the status register
|
||||
* no need to store the read value, it's assumed the status bit is set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, queue a break character */
|
||||
BW_UART_C2_SBK(uartInstance, enable);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_match_address_operation
|
||||
* Description : Configure the UART match address mode control operation. (Note: Feature
|
||||
* available on select UART instances)
|
||||
* The function allows the user to configure the UART match address control operation. The user
|
||||
* has the option to enable the match address mode and to program the match address value. There
|
||||
* are two match address modes, each with it's own enable and programmable match address value.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_configure_match_address_operation
|
||||
(
|
||||
uint32_t uartInstance,
|
||||
bool matchAddrMode1,
|
||||
bool matchAddrMode2,
|
||||
uint8_t matchAddrValue1,
|
||||
uint8_t matchAddrValue2)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
BW_UART0_C4_MAEN1(matchAddrMode1); /* Match Address Mode Enable 1 */
|
||||
BW_UART0_C4_MAEN2(matchAddrMode2); /* Match Address Mode Enable 2 */
|
||||
HW_UART0_MA1_WR(matchAddrValue1); /* match address register 1 */
|
||||
HW_UART0_MA2_WR(matchAddrValue2); /* match address register 2 */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* unsupported feature of this instance number, return error code */
|
||||
return kStatus_UART_InvalidInstanceNumber;
|
||||
}
|
||||
#else
|
||||
BW_UART_C4_MAEN1(uartInstance, matchAddrMode1); /* Match Address Mode Enable 1 */
|
||||
BW_UART_C4_MAEN2(uartInstance, matchAddrMode2); /* Match Address Mode Enable 2 */
|
||||
HW_UART_MA1_WR(uartInstance, matchAddrValue1); /* match address register 1 */
|
||||
HW_UART_MA2_WR(uartInstance, matchAddrValue2); /* match address register 2 */
|
||||
#endif
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_send_msb_first_operation
|
||||
* Description : Configre the UART to send data MSB first
|
||||
* (Note: Feature available on select UART instances)
|
||||
* The function allows the user to configure the UART to send data MSB first or LSB first.
|
||||
* In some UART instances it is required that the transmitter/receiver should be disabled
|
||||
* before calling this function.
|
||||
* Generally this may be applied to all UARTs to ensure safe operation.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_configure_send_msb_first_operation(uint32_t uartInstance, bool enable)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* Setting this bit reverses the order of the bits that are
|
||||
* transmitted and received on the wire.
|
||||
*/
|
||||
BW_UART0_S2_MSBF(enable);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* unsupported feature of this instance number, return error code */
|
||||
return kStatus_UART_MSBFirstNotSupported;
|
||||
}
|
||||
#else
|
||||
|
||||
BW_UART_S2_MSBF(uartInstance, enable);
|
||||
|
||||
#endif
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_receive_resync_disable_operation
|
||||
* Description : Configuration option to disable the UART resynchronization during received data.
|
||||
* (Note: Feature available on select UART instances)
|
||||
* This function allows the user to disable the UART resync of received data. The default setting
|
||||
* of this is false meaning that resynchronization during the received data word is supported.
|
||||
* If the user passes in true, this disables resynchronization during the received data word.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_configure_receive_resync_disable_operation(uint32_t uartInstance,
|
||||
bool enable)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_RX_RESYNC_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* When set, disables the resynchronization of the received data word when a data
|
||||
* one followed by data zero transition is detected. This bit should only be changed
|
||||
* when the receiver is disabled.
|
||||
*/
|
||||
BW_UART0_C5_RESYNCDIS(enable);
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* unsupported feature of this instance number, return error code */
|
||||
return kStatus_UART_ResyncNotSupported;
|
||||
}
|
||||
}
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_MODEM_SUPPORT
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_receiver_rts
|
||||
* Description : Enable the UART receiver request-to-send functionality.
|
||||
* This function allows the user to enable the UART receiver request-to-send (RTS) functionality.
|
||||
* By enabling, it allows the RTS output to control the CTS input of the transmitting device to
|
||||
* prevent receiver overrun. RTS is deasserted if the number of characters in the receiver data
|
||||
* register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted when the
|
||||
* number of characters in the receiver data register (FIFO) is less than RWFIFO[RXWATER].
|
||||
* Do not set both RXRTSE and TXRTSE.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_enable_receiver_rts(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Set RXRTSE */
|
||||
HW_UART_MODEM_SET(uartInstance, BM_UART_MODEM_RXRTSE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_receiver_rts
|
||||
* Description : Disable the UART receiver request-to-send functionality.
|
||||
* This function allows the user to disable the UART receiver request-to-send (RTS) functionality.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_disable_receiver_rts(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Clear RXRTSE */
|
||||
HW_UART_MODEM_CLR(uartInstance, BM_UART_MODEM_RXRTSE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_transmitter_rts
|
||||
* Description : Enable the UART transmitter request-to-send functionality.
|
||||
* This function allows the user to enable the UART transmitter request-to-send (RTS) functionality.
|
||||
* When enabled, it allows the UART to control the RTS assertion before and after a transmission
|
||||
* such that when a character is placed into an empty transmitter data buffer , RTS
|
||||
* asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all
|
||||
* characters in the transmitter data buffer and shift register are completely sent, including
|
||||
* the last stop bit.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_enable_transmitter_rts(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Set TXRTSE */
|
||||
HW_UART_MODEM_SET(uartInstance, BM_UART_MODEM_TXRTSE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_transmitter_rts
|
||||
* Description : Disable the UART transmitter request-to-send functionality.
|
||||
* This function allows the user to disable the UART transmitter request-to-send (RTS)
|
||||
* functionality.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_disable_transmitter_rts(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Clear TXRTSE */
|
||||
HW_UART_MODEM_CLR(uartInstance, BM_UART_MODEM_TXRTSE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_transmitter_rts_polarity
|
||||
* Description : Configure the UART transmitter RTS polarity.
|
||||
* This function allows the user configure the transmitter RTS polarity to be either active low
|
||||
* or active high.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_transmitter_rts_polarity(uint32_t uartInstance, bool polarity)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Configure the transmitter rts polarity: 0=active low, 1=active high */
|
||||
BW_UART_MODEM_TXRTSPOL(uartInstance, polarity);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_enable_transmitter_cts
|
||||
* Description : Enable the UART transmitter clear-to-send functionality.
|
||||
* This function allows the user to enable the UART transmitter clear-to-send (CTS) functionality.
|
||||
* When enabled, he transmitter checks the state of CTS each time it is ready to send a character.
|
||||
* If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in
|
||||
* the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a
|
||||
* character is being sent do not affect its transmission.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_enable_transmitter_cts(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Set TXCTSE */
|
||||
HW_UART_MODEM_SET(uartInstance, BM_UART_MODEM_TXCTSE);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_disable_transmitter_cts
|
||||
* Description : Disable the UART transmitter clear-to-send functionality.
|
||||
* This function allows the user to disable the UART transmitter clear-to-send (CTS)
|
||||
* functionality.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_disable_transmitter_cts(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* Clear TXCTSE */
|
||||
HW_UART_MODEM_CLR(uartInstance, BM_UART_MODEM_TXCTSE);
|
||||
}
|
||||
#endif /* FSL_FEATURE_UART_HAS_MODEM_SUPPORT */
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_IR_SUPPORT
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_infrared_operation
|
||||
* Description : Configure the UART infrared operation.
|
||||
* The function allows the user to enable or disable the UART infrared (IR) operation
|
||||
* and to configure the IR pulse width.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_infrared_operation(uint32_t uartInstance, bool enable,
|
||||
uart_ir_tx_pulsewidth_t pulseWidth)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* enable or disable infrared */
|
||||
BW_UART_IR_IREN(uartInstance, enable);
|
||||
|
||||
/* configure the narrow pulse width of the IR pulse */
|
||||
BW_UART_IR_TNP(uartInstance, pulseWidth);
|
||||
}
|
||||
#endif /* FSL_FEATURE_UART_HAS_IR_SUPPORT */
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
||||
|
|
@ -1,617 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#include "fsl_uart_hal.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_get_all_status_flag
|
||||
* Description : Get all of the UART status flag states.
|
||||
* This function gets all of the UART status flag states and places into a structure of
|
||||
* type uart_status_flag_all_t. The user must pass in a pointer to this structure.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_get_all_status_flag(uint32_t uartInstance, uart_status_flag_all_t *allStatusFlag)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of all status flags */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
allStatusFlag->transmitDataRegisterEmpty = HW_UART0_S1.B.TDRE;
|
||||
allStatusFlag->transmissionComplete = HW_UART0_S1.B.TC;
|
||||
allStatusFlag->receiveDataRegisterFull = HW_UART0_S1.B.RDRF;
|
||||
allStatusFlag->idleLineDetect = HW_UART0_S1.B.IDLE;
|
||||
allStatusFlag->receiveOverrun = HW_UART0_S1.B.OR;
|
||||
allStatusFlag->noiseDetect = HW_UART0_S1.B.NF;
|
||||
allStatusFlag->frameError = HW_UART0_S1.B.FE;
|
||||
allStatusFlag->parityError = HW_UART0_S1.B.PF;
|
||||
allStatusFlag->lineBreakDetect = HW_UART0_S2.B.LBKDIF;
|
||||
allStatusFlag->receiveActiveEdgeDetect = HW_UART0_S2.B.RXEDGIF;
|
||||
allStatusFlag->receiverActive = HW_UART0_S2.B.RAF;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
allStatusFlag->transmitDataRegisterEmpty = HW_UART_S1(uartInstance).B.TDRE;
|
||||
allStatusFlag->transmissionComplete = HW_UART_S1(uartInstance).B.TC;
|
||||
allStatusFlag->receiveDataRegisterFull = HW_UART_S1(uartInstance).B.RDRF;
|
||||
allStatusFlag->idleLineDetect = HW_UART_S1(uartInstance).B.IDLE;
|
||||
allStatusFlag->receiveOverrun = HW_UART_S1(uartInstance).B.OR;
|
||||
allStatusFlag->noiseDetect = HW_UART_S1(uartInstance).B.NF;
|
||||
allStatusFlag->frameError = HW_UART_S1(uartInstance).B.FE;
|
||||
allStatusFlag->parityError = HW_UART_S1(uartInstance).B.PF;
|
||||
allStatusFlag->lineBreakDetect = HW_UART_S2(uartInstance).B.LBKDIF;
|
||||
allStatusFlag->receiveActiveEdgeDetect = HW_UART_S2(uartInstance).B.RXEDGIF;
|
||||
allStatusFlag->receiverActive = HW_UART_S2(uartInstance).B.RAF;
|
||||
#if FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS
|
||||
allStatusFlag->noiseInCurrentWord = HW_UART_ED(uartInstance).B.NOISY;
|
||||
allStatusFlag->parityErrorInCurrentWord = HW_UART_ED(uartInstance).B.PARITYE;
|
||||
#endif
|
||||
#if FSL_FEATURE_UART_HAS_FIFO
|
||||
allStatusFlag->txBufferEmpty = HW_UART_SFIFO(uartInstance).B.TXEMPT;
|
||||
allStatusFlag->rxBufferEmpty = HW_UART_SFIFO(uartInstance).B.RXEMPT;
|
||||
allStatusFlag->txBufferOverflow = HW_UART_SFIFO(uartInstance).B.TXOF;
|
||||
allStatusFlag->rxBufferUnderflow = HW_UART_SFIFO(uartInstance).B.RXUF;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_transmit_data_register_empty
|
||||
* Description : Get the UART Transmit data register empty flag.
|
||||
* This function returns the state of the UART Transmit data register empty flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_transmit_data_register_empty(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of TDRE flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S1.B.TDRE;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S1(uartInstance).B.TDRE;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_transmission_complete
|
||||
* Description : Get the UART Transmission complete flag.
|
||||
* This function returns the state of the UART Transmission complete flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_transmission_complete(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of TC flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S1.B.TC;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S1(uartInstance).B.TC;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_receive_data_register_full
|
||||
* Description : Get the UART Receive data register full flag.
|
||||
* This function returns the state of the UART Receive data register full flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_receive_data_register_full(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of RDRF flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S1.B.RDRF;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S1(uartInstance).B.RDRF;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_idle_line_detected
|
||||
* Description : Get the UART Idle line detect flag.
|
||||
* This function returns the state of the UART Idle line detect flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_idle_line_detected(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of IDLE flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S1.B.IDLE;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S1(uartInstance).B.IDLE;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_receive_overrun_detected
|
||||
* Description : Get the UART Receiver Overrun status flag.
|
||||
* This function returns the state of the the UART Receiver Overrun status flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_receive_overrun_detected(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of OR flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S1.B.OR;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S1(uartInstance).B.OR;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_noise_detected
|
||||
* Description : Get the UART noise status flag.
|
||||
* This function returns the state of the UART noise status flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_noise_detected(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of NF flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S1.B.NF;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S1(uartInstance).B.NF;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_frame_error_detected
|
||||
* Description : Get the UART Frame error status flag.
|
||||
* This function returns the state of the UART Frame error status flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_frame_error_detected(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of FE flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S1.B.FE;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S1(uartInstance).B.FE;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_parity_error_detected
|
||||
* Description : Get the UART parity error status flag.
|
||||
* This function returns the state of the UART parity error status flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_parity_error_detected(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of PF flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S1.B.PF;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S1(uartInstance).B.PF;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_line_break_detected
|
||||
* Description : Get the UART LIN break detect interrupt status flag.
|
||||
* This function returns the state of the UART LIN break detect interrupt status flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_line_break_detected(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of LBKDIF flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S2.B.LBKDIF;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S2(uartInstance).B.LBKDIF;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_receive_active_edge_detected
|
||||
* Description : Get the UART Receive pin active edge interrupt status flag.
|
||||
* This function returns the state of the UART Receive pin active edge interrupt status flag.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_receive_active_edge_detected(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of RXEDGIF flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S2.B.RXEDGIF;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S2(uartInstance).B.RXEDGIF;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_receiver_active
|
||||
* Description : Get the UART Receiver Active Flag (RAF) state.
|
||||
* This function returns the state of the UART Receiver Active Flag (RAF).
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_receiver_active(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* return status condition of RAF flag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
return HW_UART0_S2.B.RAF;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
return HW_UART_S2(uartInstance).B.RAF;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_clear_status_flag
|
||||
* Description : Clear an individual and specific UART status flag.
|
||||
* This function allows the user to clear an individual and specific UART status flag. Refer to
|
||||
* structure definition uart_status_flag_t for list of status bits.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_clear_status_flag(uint32_t uartInstance, uart_status_flag_t statusFlag)
|
||||
{
|
||||
uart_status_t returnCode; /* return code variable */
|
||||
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
returnCode = kStatus_UART_Success; /* default return code, unless changed by error condition*/
|
||||
|
||||
/* clear the desired, individual status flag as passed in through statusFlag */
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
switch(statusFlag)
|
||||
{
|
||||
case kUartTransmitDataRegisterEmpty:
|
||||
/* This flag is cleared automatically by other uart operations
|
||||
* and cannot be manually cleared, return error code
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartTransmissionComplete:
|
||||
/* This flag is cleared automatically by other uart operations
|
||||
* and cannot be manually cleared, return error code
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartReceiveDataRegisterFull:
|
||||
/* This flag is cleared automatically by other uart operations and
|
||||
* cannot be manually cleared, return error code
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartIdleLineDetect:
|
||||
/* write one to clear status flag */
|
||||
HW_UART0_S1_SET(BM_UART0_S1_IDLE);
|
||||
break;
|
||||
|
||||
case kUartReceiveOverrun:
|
||||
/* write one to clear status flag */
|
||||
HW_UART0_S1_SET(BM_UART0_S1_OR);
|
||||
break;
|
||||
|
||||
case kUartNoiseDetect:
|
||||
/* write one to clear status flag */
|
||||
HW_UART0_S1_SET(BM_UART0_S1_NF);
|
||||
break;
|
||||
|
||||
case kUartFrameError:
|
||||
/* write one to clear status flag */
|
||||
HW_UART0_S1_SET(BM_UART0_S1_FE);
|
||||
break;
|
||||
|
||||
case kUartParityError:
|
||||
/* write one to clear status flag */
|
||||
HW_UART0_S1_SET(BM_UART0_S1_PF);
|
||||
break;
|
||||
|
||||
case kUartLineBreakDetect:
|
||||
/* write one to clear status flag */
|
||||
HW_UART0_S2_SET(BM_UART0_S2_LBKDIF);
|
||||
break;
|
||||
|
||||
case kUartReceiveActiveEdgeDetect:
|
||||
/* write one to clear status flag */
|
||||
HW_UART0_S2_SET(BM_UART0_S2_RXEDGIF);
|
||||
break;
|
||||
|
||||
case kUartReceiverActive:
|
||||
/* This flag is cleared automatically by other uart operations and
|
||||
* cannot be manually cleared, return error code
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
default: /* catch inputs that are not recognized*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
switch(statusFlag)
|
||||
{
|
||||
case kUartTransmitDataRegisterEmpty:
|
||||
/* This flag is cleared automatically by other uart operations and
|
||||
* cannot be manually cleared, return error code
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartTransmissionComplete:
|
||||
/* This flag is cleared automatically by other uart operations and
|
||||
* cannot be manually cleared, return error code
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartReceiveDataRegisterFull:
|
||||
/* This flag is cleared automatically by other uart operations and
|
||||
* cannot be manually cleared, return error code
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartIdleLineDetect:
|
||||
/* to clear the status is a two-step process:
|
||||
* first, read S1 register with the status flag set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, read the data register*/
|
||||
HW_UART_D_RD(uartInstance);
|
||||
break;
|
||||
|
||||
case kUartReceiveOverrun:
|
||||
/* to clear the status is a two-step process:
|
||||
* first, read S1 register with the status flag set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, read the data register*/
|
||||
HW_UART_D_RD(uartInstance);
|
||||
break;
|
||||
|
||||
case kUartNoiseDetect:
|
||||
/* to clear the status is a two-step process:
|
||||
* first, read S1 register with the status flag set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, read the data register*/
|
||||
HW_UART_D_RD(uartInstance);
|
||||
break;
|
||||
|
||||
case kUartFrameError:
|
||||
/* to clear the status is a two-step process:
|
||||
* first, read S1 register with the status flag set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, read the data register*/
|
||||
HW_UART_D_RD(uartInstance);
|
||||
break;
|
||||
|
||||
case kUartParityError:
|
||||
/* to clear the status is a two-step process:
|
||||
* first, read S1 register with the status flag set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, read the data register*/
|
||||
HW_UART_D_RD(uartInstance);
|
||||
break;
|
||||
|
||||
case kUartLineBreakDetect:
|
||||
/* write one to clear status flag */
|
||||
HW_UART_S2_SET(uartInstance, BM_UART_S2_LBKDIF);
|
||||
break;
|
||||
|
||||
case kUartReceiveActiveEdgeDetect:
|
||||
/* write one to clear status flag */
|
||||
HW_UART_S2_SET(uartInstance, BM_UART_S2_RXEDGIF);
|
||||
break;
|
||||
|
||||
case kUartReceiverActive:
|
||||
/* This flag is cleared automatically by other uart operations and
|
||||
* cannot be manually cleared, return error code
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS
|
||||
case kUartNoiseInCurrentWord:
|
||||
/* This flag is not clearable, it simply reflects the status in the
|
||||
* current data word and changes with each new data word
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartParityErrorInCurrentWord:
|
||||
/* This flag is not clearable, it simply reflects the status in the
|
||||
* current data word and changes with each new data word
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
#endif
|
||||
#if FSL_FEATURE_UART_HAS_FIFO
|
||||
case kUartTxBufferEmpty:
|
||||
/* This flag is not clearable, it simply reflects the current
|
||||
* status of the buffer/FIFO
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartRxBufferEmpty:
|
||||
/* This flag is not clearable, it simply reflects the current
|
||||
* status of the buffer/FIFO
|
||||
*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
|
||||
case kUartTxBufferOverflow:
|
||||
/* write one to clear status flag */
|
||||
HW_UART_SFIFO_SET(uartInstance, BM_UART_SFIFO_TXOF);
|
||||
break;
|
||||
|
||||
case kUartRxBufferUnderflow:
|
||||
/* write one to clear status flag */
|
||||
HW_UART_SFIFO_SET(uartInstance, BM_UART_SFIFO_RXUF);
|
||||
break;
|
||||
#endif
|
||||
default: /* catch inputs that are not recognized*/
|
||||
returnCode = kStatus_UART_ClearStatusFlagError;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return (returnCode);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_clear_all_non_autoclear_status_flags
|
||||
* Description : Clear ALL of the UART status flags.
|
||||
* This function tries to clear all of the UART status flags. In some cases, some of the status
|
||||
* flags may not get cleared because of the condition that set the flag may still exist.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_clear_all_non_autoclear_status_flags(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* clear the status flags that can be manually cleared
|
||||
* note, some flags are automatically cleared and cannot be cleared automatically
|
||||
*/
|
||||
uart_hal_clear_status_flag(uartInstance, kUartIdleLineDetect);
|
||||
uart_hal_clear_status_flag(uartInstance, kUartReceiveOverrun);
|
||||
uart_hal_clear_status_flag(uartInstance, kUartNoiseDetect);
|
||||
uart_hal_clear_status_flag(uartInstance, kUartFrameError);
|
||||
uart_hal_clear_status_flag(uartInstance, kUartParityError);
|
||||
uart_hal_clear_status_flag(uartInstance, kUartLineBreakDetect);
|
||||
uart_hal_clear_status_flag(uartInstance, kUartReceiveActiveEdgeDetect);
|
||||
#if FSL_FEATURE_UART_HAS_FIFO
|
||||
uart_hal_clear_status_flag(uartInstance, kUartTxBufferOverflow);
|
||||
uart_hal_clear_status_flag(uartInstance, kUartRxBufferUnderflow);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
||||
|
|
@ -1,377 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#include "fsl_uart_hal.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_putchar
|
||||
* Description : This function allows the user to send an 8-bit character from the UART
|
||||
* data register.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_putchar(uint32_t uartInstance, uint8_t data)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* put 8-bit data into the uart data register*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
HW_UART0_D_WR(data);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* in addition to sending a char, this function also clears the transmit status flags
|
||||
* for this uart instance, there is a two step process to clear the transmit status flags:
|
||||
* 1. Read the status register with the status bit set
|
||||
* 2. write to the data register
|
||||
* first read the status register
|
||||
* no need to store the read value, it's assumed the status bit is set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, perform a write to the data register */
|
||||
HW_UART_D_WR(uartInstance, data);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_putchar9
|
||||
* Description : This function allows the user to send a 9-bit character from the UART
|
||||
* data register.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
|
||||
void uart_hal_putchar9(uint32_t uartInstance, uint16_t data)
|
||||
{
|
||||
uint8_t ninthDataBit;
|
||||
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
ninthDataBit = (data >> 8U) & 0x1U; /* isolate the ninth data bit*/
|
||||
|
||||
/* put 9-bit data to transmit*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* first, write to the ninth data bit (bit position T8, where T[0:7]=8-bits, T8=9th bit)*/
|
||||
BW_UART0_C3_R9T8(ninthDataBit);
|
||||
|
||||
/* write to the data register last since this will trigger transmit complete status flag
|
||||
* also typecast to uint8_t to match register type
|
||||
*/
|
||||
HW_UART0_D_WR((uint8_t)data);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* first, write to the ninth data bit (bit position T8, where T[0:7]=8-bits, T8=9th bit)*/
|
||||
BW_UART_C3_T8(uartInstance, ninthDataBit);
|
||||
|
||||
/* in addition to sending a char, this function also clears the transmit status flags
|
||||
* for this uart instance, there is a two step process to clear the transmit status flags:
|
||||
* 1. Read the status register with the status bit set
|
||||
* 2. write to the data register
|
||||
* first read the status register
|
||||
* no need to store the read value, it's assumed the status bit is set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* write to the data register last since this will trigger transmit complete status flags
|
||||
* also typecast to uint8_t to match register type
|
||||
*/
|
||||
HW_UART_D_WR(uartInstance, (uint8_t)data);
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_putchar10
|
||||
* Description : This function allows the user to send a 10-bit character from the UART
|
||||
* data register. (Note: Feature available on select UART instances)
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_putchar10(uint32_t uartInstance, uint16_t data)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* put 10-bit data to transmit*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
uint8_t ninthDataBit;
|
||||
uint8_t tenthDataBit;
|
||||
ninthDataBit = (data >> 8U) & 0x1U; /* isolate the ninth data bit*/
|
||||
tenthDataBit = (data >> 9U) & 0x1U; /* isolate the tenth data bit*/
|
||||
|
||||
/* first, write to the tenth data bit (bit position T9, where T[0:7]=8-bits,
|
||||
* T9=10th bit, T8=9th bit)
|
||||
*/
|
||||
BW_UART0_C3_R8T9(tenthDataBit);
|
||||
|
||||
/* next, write to the ninth data bit (bit position T8, where T[0:7]=8-bits,
|
||||
* T9=10th bit, T8=9th bit)
|
||||
*/
|
||||
BW_UART0_C3_R9T8(ninthDataBit);
|
||||
|
||||
/* write to the data register last since this will trigger transmit complete status flag
|
||||
* also typecast to uint8_t to match register type
|
||||
*/
|
||||
HW_UART0_D_WR((uint8_t)data);
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* unsupported feature of this instance number, return error code*/
|
||||
return kStatus_UART_BitCountNotSupported;
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_getchar
|
||||
* Description : This function gets a received 8-bit character from the UART data register.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_getchar(uint32_t uartInstance, uint8_t *readData)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get 8-bit data from the uart data register*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
*readData = HW_UART0_D_RD(); /* read 8-bit data from data register*/
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* in addition to getting a char, this function also clears the receive status flag RDRF
|
||||
* along with IDLE, OR, NF, FE, and PF (these can also be cleared in separate functions)
|
||||
* for this uart instance, there is a two step process to clear the receive status flag:
|
||||
* 1. Read the status register with the status bit set
|
||||
* 2. read from the data register
|
||||
* first read the status register
|
||||
* no need to store the read value, it's assumed the status bit is set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* second, perform a read from the data register */
|
||||
*readData = HW_UART_D_RD(uartInstance); /* read 8-bit data from data register*/
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_getchar9
|
||||
* Description : This function gets a received 9-bit character from the UART data register.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_getchar9(uint32_t uartInstance, uint16_t *readData)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
uint16_t temp;
|
||||
|
||||
/* get 9-bit data from the uart data register*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* read ninth data bit and left shift to bit position R8 before reading
|
||||
* the 8 other data bits R[7:0]
|
||||
* *readData = (HW_UART0_C3.B.R8T9) << 8;
|
||||
*/
|
||||
temp = HW_UART0_C3.B.R8T9; /* need this two step process to work around mishra rule*/
|
||||
*readData = temp << 8;
|
||||
|
||||
/* do last: get 8-bit data from the uart data register, will clear certain
|
||||
* receive status bits once completed
|
||||
* need to OR these 8-bits with the ninth bit value above
|
||||
*/
|
||||
*readData |= HW_UART0_D_RD(); /* read 8-bit data from data register*/
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* read ninth data bit and left shift to bit position R8 before reading
|
||||
* the 8 other data bits R[7:0]
|
||||
* *readData = (HW_UART_C3(uartInstance).B.R8) << 8;
|
||||
*/
|
||||
temp = (HW_UART_C3(uartInstance).B.R8);
|
||||
*readData = temp << 8;
|
||||
|
||||
/* in addition to getting a char, this function also clears the receive status flag RDRF
|
||||
* along with IDLE, OR, NF, FE, and PF (these can also be cleared in separate functions)
|
||||
* for this uart instance, there is a two step process to clear the receive status flag:
|
||||
* 1. Read the status register with the status bit set
|
||||
* 2. read from the data register
|
||||
* first read the status register
|
||||
* no need to store the read value, it's assumed the status bit is set
|
||||
*/
|
||||
HW_UART_S1_RD(uartInstance);
|
||||
/* do last: get 8-bit data from the uart data register,
|
||||
* will clear certain receive status bits once completed
|
||||
* need to OR these 8-bits with the ninth bit value above
|
||||
*/
|
||||
*readData |= HW_UART_D_RD(uartInstance); /* read 8-bit data from data register*/
|
||||
}
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_getchar10
|
||||
* Description : This function gets a received 10-bit character from the UART data register.
|
||||
* (Note: Feature available on select UART instances)
|
||||
*
|
||||
*END**************************************************************************/
|
||||
uart_status_t uart_hal_getchar10(uint32_t uartInstance, uint16_t *readData)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* get 10-bit data from the uart data register, available only on supported uarts*/
|
||||
#if FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT
|
||||
if (uartInstance == 0)
|
||||
{
|
||||
/* read tenth data bit and left shift to bit position R9 before reading the 9 other
|
||||
* data bits: R8 and R[7:0]
|
||||
*/
|
||||
*readData = (uint16_t)((uint32_t)(HW_UART0_C3.B.R9T8) << 9U);
|
||||
|
||||
/* read ninth data bit and left shift to bit position R8 before reading the 8 other
|
||||
* data bits R[7:0]
|
||||
*/
|
||||
*readData |= (uint16_t)((uint32_t)(HW_UART0_C3.B.R8T9) << 8U);
|
||||
|
||||
/* do last: get 8-bit data from the uart data register, will clear certain receive
|
||||
* status bits once completed
|
||||
* need to OR these 8-bits with the ninth bit value above
|
||||
*/
|
||||
*readData |= HW_UART0_D_RD(); /* read 8-bit data from data register*/
|
||||
|
||||
return kStatus_UART_Success;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* unsupported feature of this instance number, return error code*/
|
||||
return kStatus_UART_BitCountNotSupported;
|
||||
}
|
||||
}
|
||||
|
||||
#if FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_configure_bit10_as_paritybit_operation
|
||||
* Description : Configure the UART bit 10 (if enabled) or bit 9 (if disabled) as the
|
||||
* parity bit in the serial transmission.
|
||||
* This function configures bit 10 or bit 9 to be the parity bit. To configure bit 10 as the parity
|
||||
* bit, the function sets UARTx_C4[M10]; it also sets UARTx_C1[M] and UARTx_C1[PE] as required.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
void uart_hal_configure_bit10_as_paritybit_operation(uint32_t uartInstance, bool enable)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* to enable the parity bit as the tenth data bit, along with enabling UARTx_C4[M10]
|
||||
* need to also enable parity and set UARTx_C1[M] bit
|
||||
* assumed that the user has already set the appropriate bits
|
||||
*/
|
||||
BW_UART_C4_M10(uartInstance, enable);
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_bit10_set_as_paritybit
|
||||
* Description : Get the configuration of the UART bit 10 (if enabled) or bit 9 (if disabled)
|
||||
* as the parity bit in the serial transmission
|
||||
* This function returns true if bit 10 is configured as the parity bit, otherwise it returns
|
||||
* false if bit 9 is configured as the parity bit.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_bit10_set_as_paritybit(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* to see if the parity bit is set as the tenth data bit,
|
||||
* return value of UARTx_C4[M10]
|
||||
*/
|
||||
return HW_UART_C4(uartInstance).B.M10;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_current_dataword_received_with_noise
|
||||
* Description : Determine if the UART received data word was received with noise.
|
||||
* This function will return true if the received data word was received with noise. Otherwise,
|
||||
* it will return false indicating no noise was detected.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_current_dataword_received_with_noise(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* to see if the current dataword was received with noise,
|
||||
* return value of UARTx_ED[NOISY]
|
||||
*/
|
||||
return HW_UART_ED(uartInstance).B.NOISY;
|
||||
}
|
||||
|
||||
/*FUNCTION**********************************************************************
|
||||
*
|
||||
* Function Name : uart_hal_is_current_dataword_received_with_parityerror
|
||||
* Description : Determine if the UART received data word was received with a parity error.
|
||||
* This function will return true if the received data word was received with a parity error.
|
||||
* Otherwise, it will return false indicating no parity error was detected.
|
||||
*
|
||||
*END**************************************************************************/
|
||||
bool uart_hal_is_current_dataword_received_with_parityerror(uint32_t uartInstance)
|
||||
{
|
||||
assert(uartInstance < UART_INSTANCE_COUNT);
|
||||
|
||||
/* to see if the current dataword was received with parity error,
|
||||
* return value of UARTx_ED[PARITYE]
|
||||
*/
|
||||
return HW_UART_ED(uartInstance).B.PARITYE;
|
||||
}
|
||||
#endif /* FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS*/
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
||||
|
|
@ -27,61 +27,34 @@
|
|||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#include "fsl_sdhc_hal.h"
|
||||
#ifndef __FSL_MISC_UTILITIES_H__
|
||||
#define __FSL_MISC_UTILITIES_H__
|
||||
|
||||
/*FUNCTION****************************************************************
|
||||
*
|
||||
* Function Name: sdhc_hal_enable_intr_signal
|
||||
* Description: Enable specified interrupts
|
||||
*
|
||||
*END*********************************************************************/
|
||||
void sdhc_hal_enable_intr_signal(uint8_t instance, bool isEnabled, uint32_t mask)
|
||||
{
|
||||
assert(instance < HW_SDHC_INSTANCE_COUNT);
|
||||
if (isEnabled)
|
||||
{
|
||||
HW_SDHC_IRQSIGEN_SET(mask);
|
||||
}
|
||||
else
|
||||
{
|
||||
HW_SDHC_IRQSIGEN_CLR(mask);
|
||||
}
|
||||
}
|
||||
#include <stdint.h>
|
||||
|
||||
/*FUNCTION****************************************************************
|
||||
*
|
||||
* Function Name: sdhc_hal_enable_intr_state
|
||||
* Description: Enable specified interrupts' state
|
||||
*
|
||||
*END*********************************************************************/
|
||||
void sdhc_hal_enable_intr_state(uint8_t instance, bool isEnabled, uint32_t mask)
|
||||
{
|
||||
assert(instance < HW_SDHC_INSTANCE_COUNT);
|
||||
if (isEnabled)
|
||||
{
|
||||
HW_SDHC_IRQSTATEN_SET(mask);
|
||||
}
|
||||
else
|
||||
{
|
||||
HW_SDHC_IRQSTATEN_CLR(mask);
|
||||
}
|
||||
}
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*FUNCTION****************************************************************
|
||||
*
|
||||
* Function Name: sdhc_hal_get_resp
|
||||
* Description: get command response
|
||||
*
|
||||
*END*********************************************************************/
|
||||
void sdhc_hal_get_resp(uint8_t instance, uint32_t * resp)
|
||||
{
|
||||
assert(instance < HW_SDHC_INSTANCE_COUNT);
|
||||
resp[0] = BR_SDHC_CMDRSP0_CMDRSP0;
|
||||
resp[1] = BR_SDHC_CMDRSP1_CMDRSP1;
|
||||
resp[2] = BR_SDHC_CMDRSP2_CMDRSP2;
|
||||
resp[3] = BR_SDHC_CMDRSP3_CMDRSP3;
|
||||
}
|
||||
/*! @brief Min/max macros */
|
||||
#if !defined(MIN)
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
#endif
|
||||
|
||||
/*************************************************************************************************
|
||||
#if !defined(MAX)
|
||||
#define MAX(a, b) ((a) > (b) ? (a) : (b))
|
||||
#endif
|
||||
|
||||
/*! @brief Computes the number of elements in an array.*/
|
||||
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
|
||||
|
||||
/*! @brief Byte swap macros */
|
||||
#define BSWAP_16(x) (uint16_t)((((x) & 0xFF00) >> 0x8) | (((x) & 0xFF) << 0x8))
|
||||
#define BSWAP_32(val) (uint32_t)((BSWAP_16((uint32_t)(val) & (uint32_t)0xFFFF) << 0x10) | \
|
||||
(BSWAP_16((uint32_t)((val) >> 0x10))))
|
||||
|
||||
#endif /* __FSL_MISC_UTILITIES_H__ */
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
************************************************************************************************/
|
||||
******************************************************************************/
|
||||
|
||||
|
|
@ -84,6 +84,14 @@ typedef enum _osa_critical_section_mode_t
|
|||
#define USE_RTOS 1
|
||||
#include "fsl_os_abstraction_ucosiii.h"
|
||||
|
||||
#elif defined (FSL_RTOS_CMSIS)
|
||||
#define USE_RTOS 1
|
||||
#include "fsl_os_abstraction_cmsis.h"
|
||||
|
||||
#elif defined (FSL_RTOS_MBED)
|
||||
#define USE_RTOS 1
|
||||
#include "fsl_os_abstraction_mbed.h"
|
||||
|
||||
#else
|
||||
#define USE_RTOS 0
|
||||
#include "fsl_os_abstraction_bm.h"
|
||||
|
|
|
|||
|
|
@ -35,4 +35,10 @@ typedef int msg_queue_handler_t;
|
|||
typedef void msg_queue_t;
|
||||
typedef int msg_queue_item_t;
|
||||
|
||||
typedef int semaphore_t;
|
||||
typedef int mutex_t;
|
||||
typedef int event_t;
|
||||
typedef int event_flags_t;
|
||||
typedef int task_param_t;
|
||||
|
||||
#endif // #ifdef FSL_OS_ABSTRACTION_MBED_H_
|
||||
|
|
|
|||
|
|
@ -20,14 +20,14 @@
|
|||
#include "fsl_os_abstraction.h"
|
||||
#include "wait_api.h"
|
||||
|
||||
fsl_rtos_status lock_destroy(lock_object_t *obj) {
|
||||
return kSuccess;
|
||||
}
|
||||
// fsl_rtos_status lock_destroy(lock_object_t *obj) {
|
||||
// return kSuccess;
|
||||
// }
|
||||
|
||||
|
||||
fsl_rtos_status event_set(event_object_t *obj, event_group_t flags) {
|
||||
return kSuccess;
|
||||
}
|
||||
// fsl_rtos_status event_set(event_object_t *obj, event_group_t flags) {
|
||||
// return kSuccess;
|
||||
// }
|
||||
|
||||
void time_delay(uint32_t delay) {
|
||||
wait_ms(delay);
|
||||
|
|
|
|||
|
|
@ -1,311 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*************************************************************************************************
|
||||
* Includes Section
|
||||
************************************************************************************************/
|
||||
|
||||
#include "sw_timer.h"
|
||||
#include "fsl_interrupt_manager.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "fsl_pit_driver.h"
|
||||
|
||||
/*************************************************************************************************
|
||||
* Defines & Macros Section
|
||||
************************************************************************************************/
|
||||
|
||||
#ifndef SW_TIMER_NUMBER_CHANNELS
|
||||
|
||||
/*! Number of channels to be used as timers. The maximum value of channels supported is 32.*/
|
||||
#define SW_TIMER_NUMBER_CHANNELS (32)
|
||||
|
||||
/*! Defines the count unit in ms of the software timer.*/
|
||||
#define SW_TIMER_COUNT_UNIT_MS (1)
|
||||
|
||||
#endif
|
||||
|
||||
/*! Return if the timer channel is reserved.*/
|
||||
#define IS_TIMER_CHANNEL_RESERVED(chann) (gs_areChannelsEnabled & (channel_enabler_t)(1 << chann))
|
||||
|
||||
/*************************************************************************************************
|
||||
* Typedef Section
|
||||
************************************************************************************************/
|
||||
|
||||
#if (SW_TIMER_NUMBER_CHANNELS <= 8)
|
||||
|
||||
/*! Defines the size of variable that stores "enable" flags of each channel.*/
|
||||
typedef uint8_t channel_enabler_t;
|
||||
|
||||
#else
|
||||
#if (SW_TIMER_NUMBER_CHANNELS <= 16)
|
||||
|
||||
/*! Defines the size of variable that stores "enable" flags of each channel.*/
|
||||
typedef uint16_t channel_enabler_t;
|
||||
|
||||
#else
|
||||
|
||||
#if (SW_TIMER_NUMBER_CHANNELS <= 32)
|
||||
|
||||
/*! Defines the size of variable that stores "enable" flags of each channel.*/
|
||||
typedef uint32_t channel_enabler_t;
|
||||
|
||||
#else
|
||||
#error "Cannot handle more than 32 auxiliary software timer channels."
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*************************************************************************************************
|
||||
* Global Constants Section
|
||||
************************************************************************************************/
|
||||
|
||||
|
||||
/*************************************************************************************************
|
||||
* Static Constants Section
|
||||
************************************************************************************************/
|
||||
/** Constant to select the PIT timer channel to use for timebase. Channels 0 and 1 have special
|
||||
* hardware trigger capabilities, so they should be avoided.
|
||||
*/
|
||||
static const uint8_t kSWTimerPITChannel = FSL_FEATURE_PIT_TIMER_COUNT - 1;
|
||||
|
||||
/*************************************************************************************************
|
||||
* Global Variables Section
|
||||
************************************************************************************************/
|
||||
|
||||
|
||||
/*************************************************************************************************
|
||||
* Static Variables Section
|
||||
************************************************************************************************/
|
||||
|
||||
/*! Free running counter that everyone can read.*/
|
||||
static volatile time_free_counter_t gs_freeCounter;
|
||||
|
||||
/*! Independent counters of software timer module. A counter is defined for every channel.*/
|
||||
static volatile time_counter_t gs_channelCounters[SW_TIMER_NUMBER_CHANNELS];
|
||||
|
||||
/*! Variable used to indicate which channels are enabled. Bit 0 corresponds to channel 0, bit 1 to*/
|
||||
/*! channel 1, etc.*/
|
||||
static volatile channel_enabler_t gs_areChannelsEnabled;
|
||||
|
||||
|
||||
/*************************************************************************************************
|
||||
* Functions Section
|
||||
************************************************************************************************/
|
||||
|
||||
/* See sw_timer.h for documentation of this function.*/
|
||||
uint32_t sw_timer_init_service(void)
|
||||
{
|
||||
pit_user_config_t pitConfig;
|
||||
|
||||
/* All channels are disabled*/
|
||||
gs_areChannelsEnabled = 0;
|
||||
|
||||
/* Init free running counter*/
|
||||
gs_freeCounter = 0;
|
||||
|
||||
/* Define PIT channel init structure. */
|
||||
pitConfig.isInterruptEnabled = true;
|
||||
pitConfig.isTimerChained = false;
|
||||
pitConfig.periodUs = 1000;/* Set 1ms period */
|
||||
|
||||
/* Init PIT module and enable all timers run in debug mode.*/
|
||||
pit_init_module(true);
|
||||
|
||||
/* Init PIT channel. */
|
||||
pit_init_channel(kSWTimerPITChannel, &pitConfig);
|
||||
|
||||
/* Register PIT callback function.*/
|
||||
pit_register_isr_callback_function(kSWTimerPITChannel, sw_timer_update_counters);
|
||||
|
||||
/* Start timer counting. */
|
||||
pit_timer_start(kSWTimerPITChannel);
|
||||
|
||||
return kSwTimerStatusSuccess;
|
||||
}
|
||||
|
||||
/* See sw_timer.h for documentation of this function.*/
|
||||
void sw_timer_shutdown_service(void)
|
||||
{
|
||||
pit_shutdown();
|
||||
}
|
||||
|
||||
/* See sw_timer.h for documentation of this function.*/
|
||||
uint8_t sw_timer_reserve_channel(void)
|
||||
{
|
||||
static uint8_t lastFreeChannel = 0;
|
||||
uint8_t searchIndex;
|
||||
uint8_t newReservedChannel;
|
||||
|
||||
/* Initialize search index with the last free channel to search faster for a free channel*/
|
||||
searchIndex = lastFreeChannel;
|
||||
|
||||
/* Not channel available by default*/
|
||||
newReservedChannel = kSwTimerChannelNotAvailable;
|
||||
|
||||
/* Searching for a free channel*/
|
||||
do {
|
||||
/* The channel is free*/
|
||||
if(!IS_TIMER_CHANNEL_RESERVED(searchIndex))
|
||||
{
|
||||
/* Set channel as reserved*/
|
||||
newReservedChannel = searchIndex;
|
||||
gs_areChannelsEnabled |= (1u << newReservedChannel);
|
||||
|
||||
/* Update last free channel with the next channel*/
|
||||
lastFreeChannel = newReservedChannel + 1;
|
||||
|
||||
/* Flag of the last channel has been checked and need to start over with channel 0*/
|
||||
if (lastFreeChannel == SW_TIMER_NUMBER_CHANNELS)
|
||||
{
|
||||
lastFreeChannel = 0;
|
||||
}
|
||||
}
|
||||
/* The channel is already reserved*/
|
||||
else
|
||||
{
|
||||
searchIndex = (searchIndex + 1) % SW_TIMER_NUMBER_CHANNELS;
|
||||
}
|
||||
|
||||
}while((searchIndex != lastFreeChannel) &&
|
||||
(kSwTimerChannelNotAvailable == newReservedChannel));
|
||||
|
||||
return newReservedChannel;
|
||||
}
|
||||
|
||||
/* See sw_timer.h for documentation of this function.*/
|
||||
sw_timer_channel_status_t sw_timer_get_channel_status(uint8_t timerChannel)
|
||||
{
|
||||
sw_timer_channel_status_t channelStatus;
|
||||
|
||||
/* Is it a valid channel?*/
|
||||
if(SW_TIMER_NUMBER_CHANNELS > timerChannel)
|
||||
{
|
||||
/* The channel is reserved*/
|
||||
if(IS_TIMER_CHANNEL_RESERVED(timerChannel))
|
||||
{
|
||||
/* The timeout has expired*/
|
||||
if(0 >= gs_channelCounters[timerChannel])
|
||||
{
|
||||
channelStatus = kSwTimerChannelExpired;
|
||||
}
|
||||
/* The counter is still counting*/
|
||||
else
|
||||
{
|
||||
channelStatus = kSwTimerChannelStillCounting;
|
||||
}
|
||||
}
|
||||
/* The channel is not reserved*/
|
||||
else
|
||||
{
|
||||
channelStatus = kSwTimerChannelIsDisable;
|
||||
}
|
||||
}
|
||||
/* The channel is not valid*/
|
||||
else
|
||||
{
|
||||
channelStatus = kSwTimerChannelNotAvailable;
|
||||
}
|
||||
|
||||
return channelStatus;
|
||||
}
|
||||
|
||||
/* See sw_timer.h for documentation of this function.*/
|
||||
uint32_t sw_timer_start_channel(uint8_t timerChannel, time_counter_t timeout)
|
||||
{
|
||||
uint32_t startStatus;
|
||||
|
||||
/* Is it a valid channel?*/
|
||||
if(SW_TIMER_NUMBER_CHANNELS > timerChannel)
|
||||
{
|
||||
/* Set the given timeout in the corresponding channel counter. The timeout should be a */
|
||||
/* multiple of SW_TIMER_COUNT_UNIT_MS, otherwise it will be taken the integer part of the */
|
||||
/* division.*/
|
||||
gs_channelCounters[timerChannel] = timeout / SW_TIMER_COUNT_UNIT_MS;
|
||||
|
||||
startStatus = kSwTimerStatusSuccess;
|
||||
}
|
||||
else
|
||||
{
|
||||
startStatus = kSwTimerStatusInvalidChannel;
|
||||
}
|
||||
|
||||
return startStatus;
|
||||
}
|
||||
|
||||
/* See sw_timer.h for documentation of this function.*/
|
||||
uint32_t sw_timer_release_channel(uint8_t timerChannel)
|
||||
{
|
||||
uint32_t releaseStatus;
|
||||
|
||||
/* Is it a valid channel?*/
|
||||
if(SW_TIMER_NUMBER_CHANNELS > timerChannel)
|
||||
{
|
||||
/* Set channel as disable*/
|
||||
gs_areChannelsEnabled &= (~(1u << timerChannel));
|
||||
releaseStatus = kSwTimerStatusSuccess;
|
||||
}
|
||||
else
|
||||
{
|
||||
releaseStatus = kSwTimerStatusInvalidChannel;
|
||||
}
|
||||
|
||||
return releaseStatus;
|
||||
}
|
||||
|
||||
/* See sw_timer.h for documentation of this function.*/
|
||||
time_free_counter_t sw_timer_get_free_counter(void)
|
||||
{
|
||||
return gs_freeCounter;
|
||||
}
|
||||
|
||||
/* See sw_timer.h for documentation of this function.*/
|
||||
void sw_timer_update_counters(void)
|
||||
{
|
||||
uint8_t index;
|
||||
|
||||
index = SW_TIMER_NUMBER_CHANNELS;
|
||||
|
||||
do {
|
||||
--index;
|
||||
|
||||
/* Decrement all counters. To determine if the timeout has expired call */
|
||||
--gs_channelCounters[index];
|
||||
|
||||
} while(0 != index);
|
||||
|
||||
/* Increment free running counter*/
|
||||
++gs_freeCounter;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF
|
||||
******************************************************************************/
|
||||
|
||||
Loading…
Reference in New Issue