diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h
index d7279fc10e..dad976cd3d 100644
--- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/mbed_drv_cfg.h
@@ -40,6 +40,7 @@
 #define FLASH_BASE                 (0x18000000UL) /**< Flash Base Address */
 #define FLASH_SIZE                 (0x00800000UL) /**< Available Flash Memory */
 #define FLASH_PAGE_SIZE            256            /**< Flash Memory page size (interleaving off) */
+                                                  /**< Maximum size per one writing is 256 byte and minimum size per one writing is 1 byte */
 #define FLASH_SECTOR_SIZE          4096           /**< Flash Memory sector size (interleaving off) */
 
 #endif
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
index b883ed84a8..1a86f60f54 100644
--- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
@@ -40,6 +40,7 @@
 #define FLASH_BASE                 (0x18000000UL) /**< Flash Base Address */
 #define FLASH_SIZE                 (0x00800000UL) /**< Available Flash Memory */
 #define FLASH_PAGE_SIZE            256            /**< Flash Memory page size (interleaving off) */
+                                                  /**< Maximum size per one writing is 256 byte and minimum size per one writing is 1 byte */
 #define FLASH_SECTOR_SIZE          4096           /**< Flash Memory sector size (interleaving off) */
 
 #endif
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/flash_api.c b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/flash_api.c
index 6e902ae99a..5db7a2c75a 100644
--- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/flash_api.c
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/flash_api.c
@@ -167,7 +167,7 @@ uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
 
 uint32_t flash_get_page_size(const flash_t *obj)
 {
-    return FLASH_PAGE_SIZE;
+    return 1;
 }
 
 uint32_t flash_get_start_address(const flash_t *obj)
@@ -222,49 +222,72 @@ int32_t _sector_erase(uint32_t addr)
 int32_t _page_program(uint32_t addr, const uint8_t * buf, int32_t size)
 {
     int32_t ret;
+    int32_t program_size;
+    int32_t remainder;
+    int32_t idx = 0;
 
     spi_mode();
 
-    /* ---- Write enable   ---- */
-    ret = write_enable();      /* WREN Command */
-    if (ret != 0) {
-        ex_mode();
-        return ret;
+    while (size > 0) {
+        if (size > FLASH_PAGE_SIZE) {
+            program_size = FLASH_PAGE_SIZE;
+        } else {
+            program_size = size;
+        }
+        remainder = FLASH_PAGE_SIZE - (addr % FLASH_PAGE_SIZE);
+        if ((remainder != 0) && (program_size > remainder)) {
+            program_size = remainder;
+        }
+
+        /* ---- Write enable   ---- */
+        ret = write_enable();      /* WREN Command */
+        if (ret != 0) {
+            ex_mode();
+            return ret;
+        }
+
+        /* ----------- 1. Command, Address ---------------*/
+        /* ---- spimd_reg init ---- */
+        clear_spimd_reg(&spimd_reg);
+
+        /* ---- command ---- */
+        spimd_reg.cde    = SPIBSC_OUTPUT_ENABLE;
+        spimd_reg.cdb    = SPIBSC_1BIT;
+        spimd_reg.cmd    = SFLASHCMD_PAGE_PROGRAM;
+
+        /* ---- address ---- */
+        spimd_reg.ade    = SPIBSC_OUTPUT_ADDR_24;
+        spimd_reg.addre  = SPIBSC_SDR_TRANS;       /* SDR */
+        spimd_reg.adb    = SPIBSC_1BIT;
+        spimd_reg.addr   = addr;
+
+        /* ---- Others ---- */
+        spimd_reg.sslkp  = SPIBSC_SPISSL_KEEP;     /* SPBSSL level */
+
+        ret = spibsc_transfer(&spimd_reg);         /* Command,Address */
+        if (ret != 0) {
+            ex_mode();
+            return ret;
+        }
+
+        /* ----------- 2. Data ---------------*/
+        ret = data_send(SPIBSC_1BIT, SPIBSC_SPISSL_NEGATE, &buf[idx], program_size);
+        if (ret != 0) {
+            ex_mode();
+            return ret;
+        }
+
+        ret = busy_wait();
+        if (ret != 0) {
+            ex_mode();
+            return ret;
+        }
+
+        addr += program_size;
+        idx  += program_size;
+        size -= program_size;
     }
 
-    /* ----------- 1. Command, Address ---------------*/
-    /* ---- spimd_reg init ---- */
-    clear_spimd_reg(&spimd_reg);
-
-    /* ---- command ---- */
-    spimd_reg.cde    = SPIBSC_OUTPUT_ENABLE;
-    spimd_reg.cdb    = SPIBSC_1BIT;
-    spimd_reg.cmd    = SFLASHCMD_PAGE_PROGRAM;
-
-    /* ---- address ---- */
-    spimd_reg.ade    = SPIBSC_OUTPUT_ADDR_24;
-    spimd_reg.addre  = SPIBSC_SDR_TRANS;       /* SDR */
-    spimd_reg.adb    = SPIBSC_1BIT;
-    spimd_reg.addr   = addr;
-
-    /* ---- Others ---- */
-    spimd_reg.sslkp  = SPIBSC_SPISSL_KEEP;     /* SPBSSL level */
-
-    ret = spibsc_transfer(&spimd_reg);         /* Command,Address */
-    if (ret != 0) {
-        ex_mode();
-        return ret;
-    }
-
-    /* ----------- 2. Data ---------------*/
-    ret = data_send(SPIBSC_1BIT, SPIBSC_SPISSL_NEGATE, buf, size);
-    if (ret != 0) {
-        ex_mode();
-        return ret;
-    }
-
-    ret = busy_wait();
-
     ex_mode();
     return ret;
 }