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[NUCLEO_L152RE] Add LSE configuration for RTC and... 

... remove trailing spaces, typo corrections
pull/283/head
bcostm 2014-04-29 10:12:59 +02:00 committed by Toyomasa Watarai
parent 3de6ec9451
commit da8db27ea4
18 changed files with 437 additions and 407 deletions
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2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/system_stm32l1xx.h
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@ -94,6 +94,8 @@ extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Cloc
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
extern void SetSysClock(void);
/**
* @}
*/

154
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/analogin_api.c
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@ -26,13 +26,13 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "analogin_api.h"
#include "wait_api.h"
#if DEVICE_ANALOGIN
#include "cmsis.h"
#include "pinmap.h"
#include "error.h"
#include "wait_api.h"
static const PinMap PinMap_ADC[] = {
{PA_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF)}, // ADC_IN0
@ -68,7 +68,7 @@ void analogin_init(analogin_t *obj, PinName pin) {
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
if (obj->adc == (ADCName)NC) {
error("ADC pin mapping failed");
error("ADC pin mapping failed");
}
// Configure GPIO
@ -103,92 +103,92 @@ void analogin_init(analogin_t *obj, PinName pin) {
}
static inline uint16_t adc_read(analogin_t *obj) {
// Get ADC registers structure address
ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc);
uint8_t channel = 0;
// Get ADC registers structure address
ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc);
uint8_t channel = 0;
// Configure ADC channel
switch (obj->pin) {
case PA_0:
channel = ADC_Channel_0;
break;
case PA_1:
channel = ADC_Channel_1;
break;
case PA_2:
channel = ADC_Channel_2;
break;
case PA_3:
channel = ADC_Channel_3;
break;
case PA_4:
channel = ADC_Channel_4;
break;
case PA_5:
channel = ADC_Channel_5;
break;
case PA_6:
channel = ADC_Channel_6;
break;
case PA_7:
channel = ADC_Channel_7;
break;
case PB_0:
channel = ADC_Channel_8;
break;
case PB_1:
channel = ADC_Channel_9;
break;
case PB_12:
channel = ADC_Channel_18;
break;
case PB_13:
channel = ADC_Channel_19;
break;
case PB_14:
channel = ADC_Channel_20;
break;
case PB_15:
channel = ADC_Channel_21;
break;
case PC_0:
channel = ADC_Channel_10;
break;
case PC_1:
channel = ADC_Channel_11;
break;
case PC_2:
channel = ADC_Channel_12;
break;
case PC_3:
channel = ADC_Channel_13;
break;
case PC_4:
channel = ADC_Channel_14;
break;
case PC_5:
channel = ADC_Channel_15;
break;
default:
return 0;
}
// Configure ADC channel
switch (obj->pin) {
case PA_0:
channel = ADC_Channel_0;
break;
case PA_1:
channel = ADC_Channel_1;
break;
case PA_2:
channel = ADC_Channel_2;
break;
case PA_3:
channel = ADC_Channel_3;
break;
case PA_4:
channel = ADC_Channel_4;
break;
case PA_5:
channel = ADC_Channel_5;
break;
case PA_6:
channel = ADC_Channel_6;
break;
case PA_7:
channel = ADC_Channel_7;
break;
case PB_0:
channel = ADC_Channel_8;
break;
case PB_1:
channel = ADC_Channel_9;
break;
case PB_12:
channel = ADC_Channel_18;
break;
case PB_13:
channel = ADC_Channel_19;
break;
case PB_14:
channel = ADC_Channel_20;
break;
case PB_15:
channel = ADC_Channel_21;
break;
case PC_0:
channel = ADC_Channel_10;
break;
case PC_1:
channel = ADC_Channel_11;
break;
case PC_2:
channel = ADC_Channel_12;
break;
case PC_3:
channel = ADC_Channel_13;
break;
case PC_4:
channel = ADC_Channel_14;
break;
case PC_5:
channel = ADC_Channel_15;
break;
default:
return 0;
}
ADC_RegularChannelConfig(adc, channel, 1, ADC_SampleTime_4Cycles);
ADC_RegularChannelConfig(adc, channel, 1, ADC_SampleTime_4Cycles);
ADC_SoftwareStartConv(adc); // Start conversion
ADC_SoftwareStartConv(adc); // Start conversion
while(ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion
while (ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion
return(ADC_GetConversionValue(adc)); // Get conversion value
return (ADC_GetConversionValue(adc)); // Get conversion value
}
uint16_t analogin_read_u16(analogin_t *obj) {
return(adc_read(obj));
return (adc_read(obj));
}
float analogin_read(analogin_t *obj) {
uint16_t value = adc_read(obj);
return (float)value * (1.0f / (float)0xFFF); // 12 bits range
uint16_t value = adc_read(obj);
return (float)value * (1.0f / (float)0xFFF); // 12 bits range
}
#endif

7
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/analogout_api.c
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@ -112,10 +112,9 @@ void analogout_write(dac_t *obj, float value) {
void analogout_write_u16(dac_t *obj, uint16_t value) {
if (value > (uint16_t)RANGE_12BIT) {
dac_write(obj, (uint16_t)RANGE_12BIT); // Max value
}
else {
dac_write(obj, value);
dac_write(obj, (uint16_t)RANGE_12BIT); // Max value
} else {
dac_write(obj, value);
}
}

3
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/gpio_api.c
View File

@ -65,8 +65,7 @@ void gpio_mode(gpio_t *obj, PinMode mode) {
void gpio_dir(gpio_t *obj, PinDirection direction) {
if (direction == PIN_OUTPUT) {
pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_OUT, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF));
}
else { // PIN_INPUT
} else { // PIN_INPUT
pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF));
}
}

44
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/gpio_irq_api.c
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@ -29,7 +29,6 @@
*/
#include <stddef.h>
#include "cmsis.h"
#include "gpio_irq_api.h"
#include "pinmap.h"
#include "error.h"
@ -53,8 +52,7 @@ static void handle_interrupt_in(uint32_t irq_index) {
uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]);
// Clear interrupt flag
if (EXTI_GetITStatus(pin) != RESET)
{
if (EXTI_GetITStatus(pin) != RESET) {
EXTI_ClearITPendingBit(pin);
}
@ -63,20 +61,33 @@ static void handle_interrupt_in(uint32_t irq_index) {
// Check which edge has generated the irq
if ((gpio->IDR & pin) == 0) {
irq_handler(channel_ids[irq_index], IRQ_FALL);
}
else {
} else {
irq_handler(channel_ids[irq_index], IRQ_RISE);
}
}
// The irq_index is passed to the function
static void gpio_irq0(void) {handle_interrupt_in(0);} // EXTI line 0
static void gpio_irq1(void) {handle_interrupt_in(1);} // EXTI line 1
static void gpio_irq2(void) {handle_interrupt_in(2);} // EXTI line 2
static void gpio_irq3(void) {handle_interrupt_in(3);} // EXTI line 3
static void gpio_irq4(void) {handle_interrupt_in(4);} // EXTI line 4
static void gpio_irq5(void) {handle_interrupt_in(5);} // EXTI lines 5 to 9
static void gpio_irq6(void) {handle_interrupt_in(6);} // EXTI lines 10 to 15
static void gpio_irq0(void) {
handle_interrupt_in(0); // EXTI line 0
}
static void gpio_irq1(void) {
handle_interrupt_in(1); // EXTI line 1
}
static void gpio_irq2(void) {
handle_interrupt_in(2); // EXTI line 2
}
static void gpio_irq3(void) {
handle_interrupt_in(3); // EXTI line 3
}
static void gpio_irq4(void) {
handle_interrupt_in(4); // EXTI line 4
}
static void gpio_irq5(void) {
handle_interrupt_in(5); // EXTI lines 5 to 9
}
static void gpio_irq6(void) {
handle_interrupt_in(6); // EXTI lines 10 to 15
}
extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
@ -205,8 +216,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
obj->event = EDGE_BOTH;
}
else { // NONE or RISE
} else { // NONE or RISE
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
obj->event = EDGE_RISE;
}
@ -216,8 +226,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
obj->event = EDGE_BOTH;
}
else { // NONE or FALL
} else { // NONE or FALL
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
obj->event = EDGE_FALL;
}
@ -225,8 +234,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
if (enable) {
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
}
else {
} else {
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
}

3
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/gpio_object.h
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@ -50,8 +50,7 @@ typedef struct {
static inline void gpio_write(gpio_t *obj, int value) {
if (value) {
*obj->reg_set = obj->mask;
}
else {
} else {
*obj->reg_clr = obj->mask;
}
}

7
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/i2c_api.c
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@ -147,8 +147,7 @@ inline int i2c_stop(i2c_t *obj) {
}
temp = i2c->SR1;
I2C_Cmd(i2c, ENABLE);
}
else {
} else {
I2C_GenerateSTOP(i2c, ENABLE);
}
@ -266,7 +265,7 @@ int i2c_byte_write(i2c_t *obj, int data) {
// Wait until the byte is transmitted
timeout = FLAG_TIMEOUT;
while ((I2C_GetFlagStatus(i2c, I2C_FLAG_TXE) == RESET) &&
(I2C_GetFlagStatus(i2c, I2C_FLAG_BTF) == RESET)) {
(I2C_GetFlagStatus(i2c, I2C_FLAG_BTF) == RESET)) {
timeout--;
if (timeout == 0) {
return 0;
@ -314,7 +313,7 @@ void i2c_slave_mode(i2c_t *obj, int enable_slave) {
#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
int i2c_slave_receive(i2c_t *obj) {
return(0);
return (0);
}
int i2c_slave_read(i2c_t *obj, char *data, int length) {

3
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/mbed_overrides.c
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@ -25,8 +25,7 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
extern void SystemCoreClockUpdate(void);
#include "cmsis.h"
// This function is called after RAM initialization and before main.
void mbed_sdk_init() {

13
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/port_api.c
View File

@ -28,18 +28,19 @@
*******************************************************************************
*/
#include "port_api.h"
#if DEVICE_PORTIN || DEVICE_PORTOUT
#include "pinmap.h"
#include "gpio_api.h"
#include "error.h"
#if DEVICE_PORTIN || DEVICE_PORTOUT
extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
// high nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, ...)
// low nibble = pin number
PinName port_pin(PortName port, int pin_n) {
return (PinName)(pin_n + (port << 4));
return (PinName)(pin_n + (port << 4));
}
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
@ -66,8 +67,7 @@ void port_dir(port_t *obj, PinDirection dir) {
if (obj->mask & (1 << i)) { // If the pin is used
if (dir == PIN_OUTPUT) {
pin_function(port_pin(obj->port, i), STM_PIN_DATA(GPIO_Mode_OUT, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF));
}
else { // PIN_INPUT
} else { // PIN_INPUT
pin_function(port_pin(obj->port, i), STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF));
}
}
@ -90,8 +90,7 @@ void port_write(port_t *obj, int value) {
int port_read(port_t *obj) {
if (obj->direction == PIN_OUTPUT) {
return (*obj->reg_out & obj->mask);
}
else { // PIN_INPUT
} else { // PIN_INPUT
return (*obj->reg_in & obj->mask);
}
}

38
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/pwmout_api.c
View File

@ -29,25 +29,27 @@
*/
#include "pwmout_api.h"
#if DEVICE_PWMOUT
#include "cmsis.h"
#include "pinmap.h"
#include "error.h"
// TIM5 cannot be used because already used by the us_ticker
static const PinMap PinMap_PWM[] = {
//{PA_0, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH1
// {PA_0, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH1
{PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH2
//{PA_1, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH1
// {PA_1, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH1
{PA_2, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH3
//{PA_2, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH3
//{PA_2, PWM_9, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM9)}, // TIM9_CH1
// {PA_2, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH3
// {PA_2, PWM_9, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM9)}, // TIM9_CH1
{PA_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH4
//{PA_3, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH4
//{PA_3, PWM_9, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM9)}, // TIM9_CH2
// {PA_3, PWM_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM5)}, // TIM5_CH4
// {PA_3, PWM_9, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM9)}, // TIM9_CH2
{PA_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH1
//{PA_6, PWM_10, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM10)}, // TIM10_CH1
// {PA_6, PWM_10, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM10)}, // TIM10_CH1
{PA_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH2
//{PA_7, PWM_11, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM11)}, // TIM11_CH1
// {PA_7, PWM_11, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM11)}, // TIM11_CH1
{PB_0, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH3
{PB_1, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH4
{PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH2
@ -56,9 +58,9 @@ static const PinMap PinMap_PWM[] = {
{PB_6, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH1
{PB_7, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH2
{PB_8, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH3
//{PB_8, PWM_10, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM10)}, // TIM10_CH1
// {PB_8, PWM_10, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM10)}, // TIM10_CH1
{PB_9, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH4
//{PB_9, PWM_11, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM11)}, // TIM11_CH1
// {PB_9, PWM_11, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM11)}, // TIM11_CH1
{PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH3
{PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH4
{PB_12, PWM_10, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM10)}, // TIM10_CH1
@ -124,15 +126,15 @@ void pwmout_write(pwmout_t* obj, float value) {
// Configure the channels
switch (obj->pin) {
// Channels 1
//case PA_0:
//case PA_1:
//case PA_2:
//case PA_0:
//case PA_1:
//case PA_2:
case PA_6:
//case PA_7:
//case PA_7:
case PB_4:
case PB_6:
//case PB_8:
//case PB_9:
//case PB_8:
//case PB_9:
case PB_12:
case PB_13:
case PB_15:
@ -142,7 +144,7 @@ void pwmout_write(pwmout_t* obj, float value) {
break;
// Channels 2
case PA_1:
//case PA_3:
//case PA_3:
case PA_7:
case PB_3:
case PB_5:
@ -225,3 +227,5 @@ void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
float value = (float)us / (float)obj->period;
pwmout_write(obj, value);
}
#endif

63
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/rtc_api.c
View File

@ -29,35 +29,62 @@
*/
#include "rtc_api.h"
#if DEVICE_RTC
#include "wait_api.h"
#define LSE_STARTUP_TIMEOUT ((uint16_t)400) // delay in ms
static int rtc_inited = 0;
void rtc_init(void) {
uint32_t StartUpCounter = 0;
uint32_t LSEStatus = 0;
uint32_t rtc_freq = 0;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); // Enable PWR clock
PWR_RTCAccessCmd(ENABLE); // Enable access to RTC
PWR_RTCAccessCmd(ENABLE); // Enable access to Backup domain
// Note: the LSI is used as RTC source clock
// The RTC Clock may vary due to LSI frequency dispersion.
// Reset RTC and Backup registers
RCC_RTCResetCmd(ENABLE);
RCC_RTCResetCmd(DISABLE);
RCC_LSICmd(ENABLE); // Enable LSI
// Enable LSE clock
RCC_LSEConfig(RCC_LSE_ON);
while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET) {} // Wait until ready
// Wait till LSE is ready
do {
LSEStatus = RCC_GetFlagStatus(RCC_FLAG_LSERDY);
wait_ms(1);
StartUpCounter++;
} while ((LSEStatus == 0) && (StartUpCounter <= LSE_STARTUP_TIMEOUT));
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI); // Select LSI as RTC Clock Source
if (StartUpCounter > LSE_STARTUP_TIMEOUT) {
// The LSE has not started, use LSI instead.
// The RTC Clock may vary due to LSI frequency dispersion.
RCC_LSEConfig(RCC_LSE_OFF);
RCC_LSICmd(ENABLE); // Enable LSI
while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET) {} // Wait until ready
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI); // Select the RTC Clock Source
rtc_freq = 40000; // [TODO] To be measured precisely using a timer input capture
} else {
// The LSE has correctly started
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); // Select the RTC Clock Source
rtc_freq = LSE_VALUE;
}
RTC_InitTypeDef RTC_InitStructure;
RTC_InitStructure.RTC_AsynchPrediv = 127;
RTC_InitStructure.RTC_SynchPrediv = (rtc_freq / 128) - 1;
RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
RTC_Init(&RTC_InitStructure);
RCC_RTCCLKCmd(ENABLE); // Enable RTC Clock
RTC_WaitForSynchro(); // Wait for RTC registers synchronization
uint32_t lsi_freq = 40000; // [TODO] To be measured precisely using a timer input capture
RTC_InitTypeDef RTC_InitStructure;
RTC_InitStructure.RTC_AsynchPrediv = 127;
RTC_InitStructure.RTC_SynchPrediv = (lsi_freq / 128) - 1;
RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
RTC_Init(&RTC_InitStructure);
PWR_RTCAccessCmd(DISABLE); // Disable access to RTC
PWR_RTCAccessCmd(DISABLE); // Disable access to Backup domain
rtc_inited = 1;
}
@ -130,8 +157,10 @@ void rtc_write(time_t t) {
timeStruct.RTC_H12 = RTC_HourFormat_24;
// Change the RTC current date/time
PWR_RTCAccessCmd(ENABLE); // Enable access to RTC
PWR_RTCAccessCmd(ENABLE); // Enable access to Backup domain
RTC_SetDate(RTC_Format_BIN, &dateStruct);
RTC_SetTime(RTC_Format_BIN, &timeStruct);
PWR_RTCAccessCmd(DISABLE); // Disable access to RTC
PWR_RTCAccessCmd(DISABLE); // Disable access to Backup domain
}
#endif

83
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/serial_api.c
View File

@ -28,6 +28,9 @@
*******************************************************************************
*/
#include "serial_api.h"
#if DEVICE_SERIAL
#include "cmsis.h"
#include "pinmap.h"
#include "error.h"
@ -38,7 +41,7 @@ static const PinMap PinMap_UART_TX[] = {
{PA_9, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
{PB_6, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
{PB_10, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
//{PC_10, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
// {PC_10, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
{PC_10, UART_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART4)},
{PC_12, UART_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART5)},
{NC, NC, 0}
@ -49,7 +52,7 @@ static const PinMap PinMap_UART_RX[] = {
{PA_10, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
{PB_7, UART_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART1)},
{PB_11, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
//{PC_11, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
// {PC_11, UART_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_USART3)},
{PC_11, UART_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART4)},
{PD_2, UART_5, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_UART5)},
{NC, NC, 0}
@ -150,29 +153,27 @@ void serial_baud(serial_t *obj, int baudrate) {
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
if (data_bits == 8) {
obj->databits = USART_WordLength_8b;
}
else {
} else {
obj->databits = USART_WordLength_9b;
}
switch (parity) {
case ParityOdd:
case ParityForced0:
obj->parity = USART_Parity_Odd;
break;
case ParityEven:
case ParityForced1:
obj->parity = USART_Parity_Even;
break;
default: // ParityNone
obj->parity = USART_Parity_No;
break;
case ParityOdd:
case ParityForced0:
obj->parity = USART_Parity_Odd;
break;
case ParityEven:
case ParityForced1:
obj->parity = USART_Parity_Even;
break;
default: // ParityNone
obj->parity = USART_Parity_No;
break;
}
if (stop_bits == 2) {
obj->stopbits = USART_StopBits_2;
}
else {
} else {
obj->stopbits = USART_StopBits_1;
}
@ -197,11 +198,21 @@ static void uart_irq(USART_TypeDef* usart, int id) {
}
}
static void uart1_irq(void) {uart_irq((USART_TypeDef*)UART_1, 0);}
static void uart2_irq(void) {uart_irq((USART_TypeDef*)UART_2, 1);}
static void uart3_irq(void) {uart_irq((USART_TypeDef*)UART_3, 2);}
static void uart4_irq(void) {uart_irq((USART_TypeDef*)UART_4, 3);}
static void uart5_irq(void) {uart_irq((USART_TypeDef*)UART_5, 4);}
static void uart1_irq(void) {
uart_irq((USART_TypeDef*)UART_1, 0);
}
static void uart2_irq(void) {
uart_irq((USART_TypeDef*)UART_2, 1);
}
static void uart3_irq(void) {
uart_irq((USART_TypeDef*)UART_3, 2);
}
static void uart4_irq(void) {
uart_irq((USART_TypeDef*)UART_4, 3);
}
static void uart5_irq(void) {
uart_irq((USART_TypeDef*)UART_5, 4);
}
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
irq_handler = handler;
@ -214,36 +225,35 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
USART_TypeDef *usart = (USART_TypeDef *)(obj->uart);
if (obj->uart == UART_1) {
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
irq_n = USART1_IRQn;
vector = (uint32_t)&uart1_irq;
}
if (obj->uart == UART_2) {
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
irq_n = USART2_IRQn;
vector = (uint32_t)&uart2_irq;
}
if (obj->uart == UART_3) {
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
irq_n = USART3_IRQn;
vector = (uint32_t)&uart3_irq;
}
if (obj->uart == UART_4) {
irq_n = UART4_IRQn;
vector = (uint32_t)&uart4_irq;
irq_n = UART4_IRQn;
vector = (uint32_t)&uart4_irq;
}
if (obj->uart == UART_5) {
irq_n = UART5_IRQn;
vector = (uint32_t)&uart5_irq;
irq_n = UART5_IRQn;
vector = (uint32_t)&uart5_irq;
}
if (enable) {
if (irq == RxIrq) {
USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
}
else { // TxIrq
} else { // TxIrq
USART_ITConfig(usart, USART_IT_TC, ENABLE);
}
@ -258,8 +268,7 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
USART_ITConfig(usart, USART_IT_RXNE, DISABLE);
// Check if TxIrq is disabled too
if ((usart->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
}
else { // TxIrq
} else { // TxIrq
USART_ITConfig(usart, USART_IT_TXE, DISABLE);
// Check if RxIrq is disabled too
if ((usart->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
@ -319,3 +328,5 @@ void serial_break_set(serial_t *obj) {
void serial_break_clear(serial_t *obj) {
}
#endif

14
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/sleep.c
View File

@ -28,14 +28,13 @@
*******************************************************************************
*/
#include "sleep_api.h"
#if DEVICE_SLEEP
#include "cmsis.h"
// This function is in the system_stm32l1xx.c file
extern void SetSysClock(void);
// MCU SLEEP mode
void sleep(void)
{
void sleep(void) {
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
@ -44,8 +43,7 @@ void sleep(void)
}
// MCU STOP mode (Regulator in LP mode, LSI, HSI and HSE OFF)
void deepsleep(void)
{
void deepsleep(void) {
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
@ -58,3 +56,5 @@ void deepsleep(void)
// After wake-up from STOP reconfigure the PLL
SetSysClock();
}
#endif

88
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/spi_api.c
View File

@ -40,7 +40,7 @@ static const PinMap PinMap_SPI_MOSI[] = {
{PA_7, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
{PA_12, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
{PB_5, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
//{PB_5, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
// {PB_5, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
{PB_15, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
{PC_12, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
{NC, NC, 0}
@ -50,7 +50,7 @@ static const PinMap PinMap_SPI_MISO[] = {
{PA_6, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
{PA_11, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
{PB_4, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
//{PB_4, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
// {PB_4, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
{PB_14, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
{PC_11, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
{NC, NC, 0}
@ -59,7 +59,7 @@ static const PinMap PinMap_SPI_MISO[] = {
static const PinMap PinMap_SPI_SCLK[] = {
{PA_5, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
{PB_3, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
//{PB_3, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
// {PB_3, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
{PB_13, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
{PC_10, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
{NC, NC, 0}
@ -67,9 +67,9 @@ static const PinMap PinMap_SPI_SCLK[] = {
static const PinMap PinMap_SPI_SSEL[] = {
{PA_4, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
//{PA_4, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
// {PA_4, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
{PA_15, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI1)},
//{PA_15, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
// {PA_15, SPI_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI3)},
{PB_12, SPI_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_SPI2)},
{NC, NC, 0}
};
@ -135,8 +135,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
if (ssel == NC) { // Master
obj->mode = SPI_Mode_Master;
obj->nss = SPI_NSS_Soft;
}
else { // Slave
} else { // Slave
pinmap_pinout(ssel, PinMap_SPI_SSEL);
obj->mode = SPI_Mode_Slave;
obj->nss = SPI_NSS_Soft;
@ -154,35 +153,33 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
// Save new values
if (bits == 8) {
obj->bits = SPI_DataSize_8b;
}
else {
} else {
obj->bits = SPI_DataSize_16b;
}
switch (mode) {
case 0:
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_1Edge;
break;
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_1Edge;
break;
case 1:
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_2Edge;
break;
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_2Edge;
break;
case 2:
obj->cpol = SPI_CPOL_High;
obj->cpha = SPI_CPHA_1Edge;
break;
obj->cpol = SPI_CPOL_High;
obj->cpha = SPI_CPHA_1Edge;
break;
default:
obj->cpol = SPI_CPOL_High;
obj->cpha = SPI_CPHA_2Edge;
break;
obj->cpol = SPI_CPOL_High;
obj->cpha = SPI_CPHA_2Edge;
break;
}
if (slave == 0) {
obj->mode = SPI_Mode_Master;
obj->nss = SPI_NSS_Soft;
}
else {
} else {
obj->mode = SPI_Mode_Slave;
obj->nss = SPI_NSS_Hard;
}
@ -195,52 +192,37 @@ void spi_frequency(spi_t *obj, int hz) {
if (SystemCoreClock == 32000000) { // HSI
if (hz < 250000) {
obj->br_presc = SPI_BaudRatePrescaler_256; // 125 kHz
}
else if ((hz >= 250000) && (hz < 500000)) {
} else if ((hz >= 250000) && (hz < 500000)) {
obj->br_presc = SPI_BaudRatePrescaler_128; // 250 kHz
}
else if ((hz >= 500000) && (hz < 1000000)) {
} else if ((hz >= 500000) && (hz < 1000000)) {
obj->br_presc = SPI_BaudRatePrescaler_64; // 500 kHz
}
else if ((hz >= 1000000) && (hz < 2000000)) {
} else if ((hz >= 1000000) && (hz < 2000000)) {
obj->br_presc = SPI_BaudRatePrescaler_32; // 1 MHz
}
else if ((hz >= 2000000) && (hz < 4000000)) {
} else if ((hz >= 2000000) && (hz < 4000000)) {
obj->br_presc = SPI_BaudRatePrescaler_16; // 2 MHz
}
else if ((hz >= 4000000) && (hz < 8000000)) {
} else if ((hz >= 4000000) && (hz < 8000000)) {
obj->br_presc = SPI_BaudRatePrescaler_8; // 4 MHz
}
else if ((hz >= 8000000) && (hz < 16000000)) {
} else if ((hz >= 8000000) && (hz < 16000000)) {
obj->br_presc = SPI_BaudRatePrescaler_4; // 8 MHz
}
else { // >= 16000000
} else { // >= 16000000
obj->br_presc = SPI_BaudRatePrescaler_2; // 16 MHz
}
}
else { // 24 MHz - HSE
} else { // 24 MHz - HSE
if (hz < 180000) {
obj->br_presc = SPI_BaudRatePrescaler_256; // 94 kHz
}
else if ((hz >= 180000) && (hz < 350000)) {
} else if ((hz >= 180000) && (hz < 350000)) {
obj->br_presc = SPI_BaudRatePrescaler_128; // 188 kHz
}
else if ((hz >= 350000) && (hz < 750000)) {
} else if ((hz >= 350000) && (hz < 750000)) {
obj->br_presc = SPI_BaudRatePrescaler_64; // 375 kHz
}
else if ((hz >= 750000) && (hz < 1000000)) {
} else if ((hz >= 750000) && (hz < 1000000)) {
obj->br_presc = SPI_BaudRatePrescaler_32; // 750 kHz
}
else if ((hz >= 1000000) && (hz < 3000000)) {
} else if ((hz >= 1000000) && (hz < 3000000)) {
obj->br_presc = SPI_BaudRatePrescaler_16; // 1.5 MHz
}
else if ((hz >= 3000000) && (hz < 6000000)) {
} else if ((hz >= 3000000) && (hz < 6000000)) {
obj->br_presc = SPI_BaudRatePrescaler_8; // 3 MHz
}
else if ((hz >= 6000000) && (hz < 12000000)) {
} else if ((hz >= 6000000) && (hz < 12000000)) {
obj->br_presc = SPI_BaudRatePrescaler_4; // 6 MHz
}
else { // >= 12000000
} else { // >= 12000000
obj->br_presc = SPI_BaudRatePrescaler_2; // 12 MHz
}
}