From d8ba8b3b0628070b7e2cca571ab8d8196c0934ce Mon Sep 17 00:00:00 2001 From: Senthil Ramakrishnan Date: Wed, 29 Nov 2017 14:01:04 -0600 Subject: [PATCH] Fix code style issues --- drivers/QSPI.cpp | 132 +++++++++++++++++++++++++++++++++-------------- drivers/QSPI.h | 10 ++-- 2 files changed, 100 insertions(+), 42 deletions(-) diff --git a/drivers/QSPI.cpp b/drivers/QSPI.cpp index 28fe402c19..99a06ed2f1 100644 --- a/drivers/QSPI.cpp +++ b/drivers/QSPI.cpp @@ -26,8 +26,8 @@ namespace mbed { QSPI* QSPI::_owner = NULL; -SingletonPtr QSPI::_mutex; - +SingletonPtr QSPI::_mutex; + QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel) : _qspi() { // No lock needed in the constructor @@ -49,59 +49,115 @@ QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, Pin } qspi_return_status_t QSPI::configure_format(qspi_config_bus_width_t inst_width, qspi_config_bus_width_t address_width, qspi_config_address_size_t address_size, qspi_config_bus_width_t alt_width, qspi_config_alt_size_t alt_size, qspi_config_bus_width_t data_width, int dummy_cycles, int mode ) { - if(!IS_BUS_WIDTH_VALID(inst_width)) return QSPI_INVALID_PARAMETER; - if(!IS_BUS_WIDTH_VALID(address_width)) return QSPI_INVALID_PARAMETER; - if(!IS_SIZE_VALID(address_size)) return QSPI_INVALID_PARAMETER; - if(!IS_BUS_WIDTH_VALID(alt_width)) return QSPI_INVALID_PARAMETER; - if(!IS_ALT_SIZE_VALID(alt_size)) return QSPI_INVALID_PARAMETER; - if(!IS_BUS_WIDTH_VALID(data_width)) return QSPI_INVALID_PARAMETER; - if(dummy_cycles < 0) return QSPI_INVALID_PARAMETER; - if(mode != 0 && mode != 1) return QSPI_INVALID_PARAMETER; + if(!IS_BUS_WIDTH_VALID(inst_width)) + return QSPI_INVALID_PARAMETER; + if(!IS_BUS_WIDTH_VALID(address_width)) + return QSPI_INVALID_PARAMETER; + if(!IS_SIZE_VALID(address_size)) + return QSPI_INVALID_PARAMETER; + if(!IS_BUS_WIDTH_VALID(alt_width)) + return QSPI_INVALID_PARAMETER; + if(!IS_ALT_SIZE_VALID(alt_size)) + return QSPI_INVALID_PARAMETER; + if(!IS_BUS_WIDTH_VALID(data_width)) + return QSPI_INVALID_PARAMETER; + if(dummy_cycles < 0) + return QSPI_INVALID_PARAMETER; + if(mode != 0 && mode != 1) + return QSPI_INVALID_PARAMETER; lock(); switch(inst_width) { - case QSPI_BUS_SINGLE:_inst_width = QSPI_CFG_BUS_SINGLE; break; - case QSPI_BUS_DUAL:_inst_width = QSPI_CFG_BUS_DUAL; break; - case QSPI_BUS_QUAD:_inst_width = QSPI_CFG_BUS_QUAD; break; - default:_inst_width = QSPI_CFG_BUS_SINGLE; + case QSPI_BUS_SINGLE: + _inst_width = QSPI_CFG_BUS_SINGLE; + break; + case QSPI_BUS_DUAL: + _inst_width = QSPI_CFG_BUS_DUAL; + break; + case QSPI_BUS_QUAD: + _inst_width = QSPI_CFG_BUS_QUAD; + break; + default: + _inst_width = QSPI_CFG_BUS_SINGLE; } switch(address_width) { - case QSPI_BUS_SINGLE:_address_width = QSPI_CFG_BUS_SINGLE; break; - case QSPI_BUS_DUAL:_address_width = QSPI_CFG_BUS_DUAL; break; - case QSPI_BUS_QUAD:_address_width = QSPI_CFG_BUS_QUAD; break; - default:_address_width = QSPI_CFG_BUS_SINGLE; + case QSPI_BUS_SINGLE: + _address_width = QSPI_CFG_BUS_SINGLE; + break; + case QSPI_BUS_DUAL: + _address_width = QSPI_CFG_BUS_DUAL; + break; + case QSPI_BUS_QUAD: + _address_width = QSPI_CFG_BUS_QUAD; + break; + default: + _address_width = QSPI_CFG_BUS_SINGLE; } switch(address_size) { - case QSPI_ADDR_SIZE_8:_address_size = QSPI_CFG_ADDR_SIZE_8; break; - case QSPI_ADDR_SIZE_16:_address_size = QSPI_CFG_ADDR_SIZE_16; break; - case QSPI_ADDR_SIZE_24:_address_size = QSPI_CFG_ADDR_SIZE_24; break; - case QSPI_ADDR_SIZE_32:_address_size = QSPI_CFG_ADDR_SIZE_32; break; - default:_address_size = QSPI_CFG_ADDR_SIZE_8; + case QSPI_ADDR_SIZE_8: + _address_size = QSPI_CFG_ADDR_SIZE_8; + break; + case QSPI_ADDR_SIZE_16: + _address_size = QSPI_CFG_ADDR_SIZE_16; + break; + case QSPI_ADDR_SIZE_24: + _address_size = QSPI_CFG_ADDR_SIZE_24; + break; + case QSPI_ADDR_SIZE_32: + _address_size = QSPI_CFG_ADDR_SIZE_32; + break; + default: + _address_size = QSPI_CFG_ADDR_SIZE_8; } switch(alt_width) { - case QSPI_BUS_SINGLE:_alt_width = QSPI_CFG_BUS_SINGLE; break; - case QSPI_BUS_DUAL:_alt_width = QSPI_CFG_BUS_DUAL; break; - case QSPI_BUS_QUAD:_alt_width = QSPI_CFG_BUS_QUAD; break; - default:_alt_width = QSPI_CFG_BUS_SINGLE; + case QSPI_BUS_SINGLE: + _alt_width = QSPI_CFG_BUS_SINGLE; + break; + case QSPI_BUS_DUAL: + _alt_width = QSPI_CFG_BUS_DUAL; + break; + case QSPI_BUS_QUAD: + _alt_width = QSPI_CFG_BUS_QUAD; + break; + default: + _alt_width = QSPI_CFG_BUS_SINGLE; } switch(alt_size) { - case QSPI_ALT_SIZE_NONE:_alt_size = QSPI_CFG_ALT_SIZE_NONE; break; - case QSPI_ALT_SIZE_8:_alt_size = QSPI_CFG_ALT_SIZE_8; break; - case QSPI_ALT_SIZE_16:_alt_size = QSPI_CFG_ALT_SIZE_16; break; - case QSPI_ALT_SIZE_24:_alt_size = QSPI_CFG_ALT_SIZE_24; break; - case QSPI_ALT_SIZE_32:_alt_size = QSPI_CFG_ALT_SIZE_32; break; - default:_alt_size = QSPI_CFG_ALT_SIZE_NONE; + case QSPI_ALT_SIZE_NONE: + _alt_size = QSPI_CFG_ALT_SIZE_NONE; + break; + case QSPI_ALT_SIZE_8: + _alt_size = QSPI_CFG_ALT_SIZE_8; + break; + case QSPI_ALT_SIZE_16: + _alt_size = QSPI_CFG_ALT_SIZE_16; + break; + case QSPI_ALT_SIZE_24: + _alt_size = QSPI_CFG_ALT_SIZE_24; + break; + case QSPI_ALT_SIZE_32: + _alt_size = QSPI_CFG_ALT_SIZE_32; + break; + default: + _alt_size = QSPI_CFG_ALT_SIZE_NONE; } switch(data_width) { - case QSPI_BUS_SINGLE:_data_width = QSPI_CFG_BUS_SINGLE; break; - case QSPI_BUS_DUAL:_data_width = QSPI_CFG_BUS_DUAL; break; - case QSPI_BUS_QUAD:_data_width = QSPI_CFG_BUS_QUAD; break; - default:_data_width = QSPI_CFG_BUS_SINGLE; + case QSPI_BUS_SINGLE: + _data_width = QSPI_CFG_BUS_SINGLE; + break; + case QSPI_BUS_DUAL: + _data_width = QSPI_CFG_BUS_DUAL; + break; + case QSPI_BUS_QUAD: + _data_width = QSPI_CFG_BUS_QUAD; + break; + default: + _data_width = QSPI_CFG_BUS_SINGLE; } _num_dummy_cycles = dummy_cycles; @@ -135,7 +191,7 @@ qspi_return_status_t QSPI::initialize() { qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode ); unlock(); - return ( ret == QSPI_STATUS_OK )? QSPI_SUCCESS:QSPI_ERROR; + return ( ret == QSPI_STATUS_OK )? QSPI_SUCCESS : QSPI_ERROR; } qspi_return_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_length) { diff --git a/drivers/QSPI.h b/drivers/QSPI.h index a3b672e30b..f71bd106ad 100644 --- a/drivers/QSPI.h +++ b/drivers/QSPI.h @@ -27,6 +27,9 @@ #define ONE_MHZ 1000000 +namespace mbed { + +// Config/Mode Defines /** QSPI Bus width Enum */ typedef enum qspi_config_bus_width { @@ -61,9 +64,8 @@ typedef enum qspi_return_status { QSPI_ERROR = -1, /**< Generic error >*/ QSPI_INVALID_PARAMETER = -2, /**< The parameter is invalid >*/ QSPI_SUCCESS = 0, /**< Function executed sucessfully >*/ -} qspi_return_status_t; - -namespace mbed { +} qspi_return_status_t; + /** \addtogroup drivers */ /** A QSPI Driver, used for communicating with QSPI slave devices @@ -100,7 +102,7 @@ namespace mbed { class QSPI : private NonCopyable { public: - + /** Create a QSPI master connected to the specified pins * * io0-io3 is used to specify the Pins used for Quad SPI mode