mirror of https://github.com/ARMmbed/mbed-os.git
Merge remote-tracking branch 'upstream/master'
U-owner-PC\owner
commit
d812fb0002
|
|
@ -119,7 +119,7 @@ float USBAudio::getVolume() {
|
|||
}
|
||||
|
||||
|
||||
bool USBAudio::EP3_OUT_callback() {
|
||||
bool USBAudio::EPISO_OUT_callback() {
|
||||
uint32_t size = 0;
|
||||
interruptOUT = true;
|
||||
if (buf_stream_in != NULL) {
|
||||
|
|
@ -132,7 +132,7 @@ bool USBAudio::EP3_OUT_callback() {
|
|||
}
|
||||
|
||||
|
||||
bool USBAudio::EP3_IN_callback() {
|
||||
bool USBAudio::EPISO_IN_callback() {
|
||||
interruptIN = true;
|
||||
writeIN = true;
|
||||
return true;
|
||||
|
|
|
|||
|
|
@ -216,12 +216,12 @@ protected:
|
|||
/*
|
||||
* Callback called when a packet is received
|
||||
*/
|
||||
virtual bool EP3_OUT_callback();
|
||||
virtual bool EPISO_OUT_callback();
|
||||
|
||||
/*
|
||||
* Callback called when a packet has been sent
|
||||
*/
|
||||
virtual bool EP3_IN_callback();
|
||||
virtual bool EPISO_IN_callback();
|
||||
|
||||
private:
|
||||
|
||||
|
|
|
|||
|
|
@ -36,9 +36,7 @@ Includes <System Includes> , "Project Includes"
|
|||
#include <MBRZA1H.h>
|
||||
#include "r_typedefs.h"
|
||||
#include "usb0_function_api.h"
|
||||
#if 0
|
||||
#include "usb1_function_api.h"
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
|
|
@ -0,0 +1,171 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB1_FUNCTION_H
|
||||
#define USB1_FUNCTION_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "devdrv_usb_function_api.h"
|
||||
#include "usb_function.h"
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
extern const uint16_t g_usb1_function_bit_set[];
|
||||
extern uint32_t g_usb1_function_data_count[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
extern uint8_t *g_usb1_function_data_pointer[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
|
||||
extern uint16_t g_usb1_function_PipeIgnore[];
|
||||
extern uint16_t g_usb1_function_PipeTbl[];
|
||||
extern uint16_t g_usb1_function_pipe_status[];
|
||||
extern uint32_t g_usb1_function_PipeDataSize[];
|
||||
|
||||
extern USB_FUNCTION_DMA_t g_usb1_function_DmaInfo[];
|
||||
extern uint16_t g_usb1_function_DmaPipe[];
|
||||
extern uint16_t g_usb1_function_DmaBval[];
|
||||
extern uint16_t g_usb1_function_DmaStatus[];
|
||||
|
||||
extern uint16_t g_usb1_function_CtrZeroLengthFlag;
|
||||
|
||||
extern uint16_t g_usb1_function_ConfigNum;
|
||||
extern uint16_t g_usb1_function_Alternate[USB_FUNCTION_ALT_NO];
|
||||
extern uint16_t g_usb1_function_RemoteWakeupFlag;
|
||||
extern uint16_t g_usb1_function_TestModeFlag;
|
||||
extern uint16_t g_usb1_function_TestModeSelectors;
|
||||
|
||||
extern uint16_t g_usb1_function_ReqType;
|
||||
extern uint16_t g_usb1_function_ReqTypeType;
|
||||
extern uint16_t g_usb1_function_ReqTypeRecip;
|
||||
extern uint16_t g_usb1_function_ReqRequest;
|
||||
extern uint16_t g_usb1_function_ReqValue;
|
||||
extern uint16_t g_usb1_function_ReqIndex;
|
||||
extern uint16_t g_usb1_function_ReqLength;
|
||||
|
||||
extern uint16_t g_usb1_function_EPTableIndex[USB_FUNCTION_MAX_EP_NO + 1];
|
||||
|
||||
extern uint16_t g_usb1_function_pipecfg[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb1_function_pipebuf[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb1_function_pipemaxp[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb1_function_pipeperi[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
/* ==== common ==== */
|
||||
void usb1_function_dma_stop_d0(uint16_t pipe, uint32_t remain);
|
||||
void usb1_function_dma_stop_d1(uint16_t pipe, uint32_t remain);
|
||||
uint16_t usb1_function_is_hispeed(void);
|
||||
uint16_t usb1_function_is_hispeed_enable(void);
|
||||
uint16_t usb1_function_start_send_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
|
||||
uint16_t usb1_function_write_buffer(uint16_t pipe);
|
||||
uint16_t usb1_function_write_buffer_c(uint16_t pipe);
|
||||
uint16_t usb1_function_write_buffer_d0(uint16_t pipe);
|
||||
uint16_t usb1_function_write_buffer_d1(uint16_t pipe);
|
||||
void usb1_function_start_receive_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
|
||||
uint16_t usb1_function_read_buffer(uint16_t pipe);
|
||||
uint16_t usb1_function_read_buffer_c(uint16_t pipe);
|
||||
uint16_t usb1_function_read_buffer_d0(uint16_t pipe);
|
||||
uint16_t usb1_function_read_buffer_d1(uint16_t pipe);
|
||||
uint16_t usb1_function_change_fifo_port(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
|
||||
void usb1_function_set_curpipe(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
|
||||
void usb1_function_set_curpipe2(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc);
|
||||
uint16_t usb1_function_get_mbw(uint32_t trncount, uint32_t dtptr);
|
||||
uint16_t usb1_function_read_dma(uint16_t pipe);
|
||||
void usb1_function_brdy_int(uint16_t status, uint16_t int_enb);
|
||||
void usb1_function_nrdy_int(uint16_t status, uint16_t int_enb);
|
||||
void usb1_function_bemp_int(uint16_t status, uint16_t int_enb);
|
||||
void usb1_function_setting_interrupt(uint8_t level);
|
||||
void usb1_function_reset_module(uint16_t clockmode);
|
||||
uint16_t usb1_function_get_buf_size(uint16_t pipe);
|
||||
uint16_t usb1_function_get_mxps(uint16_t pipe);
|
||||
void usb1_function_clear_brdy_sts(uint16_t pipe);
|
||||
void usb1_function_clear_bemp_sts(uint16_t pipe);
|
||||
void usb1_function_clear_nrdy_sts(uint16_t pipe);
|
||||
void usb1_function_set_pid_buf(uint16_t pipe);
|
||||
void usb1_function_set_pid_nak(uint16_t pipe);
|
||||
void usb1_function_set_pid_stall(uint16_t pipe);
|
||||
void usb1_function_clear_pid_stall(uint16_t pipe);
|
||||
uint16_t usb1_function_get_pid(uint16_t pipe);
|
||||
void usb1_function_set_sqclr(uint16_t pipe);
|
||||
void usb1_function_set_sqset(uint16_t pipe);
|
||||
void usb1_function_set_csclr(uint16_t pipe);
|
||||
void usb1_function_aclrm(uint16_t pipe);
|
||||
void usb1_function_set_aclrm(uint16_t pipe);
|
||||
void usb1_function_clr_aclrm(uint16_t pipe);
|
||||
uint16_t usb1_function_get_sqmon(uint16_t pipe);
|
||||
uint16_t usb1_function_get_inbuf(uint16_t pipe);
|
||||
|
||||
/* ==== function ==== */
|
||||
void usb1_function_init_status(void);
|
||||
void usb1_function_InitModule(uint16_t mode);
|
||||
uint16_t usb1_function_CheckVBUStaus(void);
|
||||
void usb1_function_USB_FUNCTION_Attach(void);
|
||||
void usb1_function_USB_FUNCTION_Detach(void);
|
||||
void usb1_function_USB_FUNCTION_BusReset(void);
|
||||
void usb1_function_USB_FUNCTION_Resume(void);
|
||||
void usb1_function_USB_FUNCTION_Suspend(void);
|
||||
void usb1_function_USB_FUNCTION_TestMode(void);
|
||||
void usb1_function_ResetDCP(void);
|
||||
void usb1_function_ResetEP(uint16_t num);
|
||||
uint16_t usb1_function_EpToPipe(uint16_t ep);
|
||||
void usb1_function_InitEPTable(uint16_t Con_Num, uint16_t Int_Num, uint16_t Alt_Num);
|
||||
uint16_t usb1_function_GetConfigNum(void);
|
||||
uint16_t usb1_function_GetAltNum(uint16_t Con_Num, uint16_t Int_Num);
|
||||
uint16_t usb1_function_CheckRemoteWakeup(void);
|
||||
void usb1_function_clear_alt(void);
|
||||
void usb1_function_clear_pipe_tbl(void);
|
||||
void usb1_function_clear_ep_table_index(void);
|
||||
uint16_t usb1_function_GetInterfaceNum(uint16_t num);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* USB1_FUNCTION_H */
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,104 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_api.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB1_FUNCTION_API_H
|
||||
#define USB1_FUNCTION_API_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Variable Externs
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_init(uint8_t int_level, uint16_t mode, uint16_t clockmode);
|
||||
uint16_t usb1_api_function_IsConfigured(void);
|
||||
uint16_t usb1_function_GetDeviceState(void);
|
||||
uint16_t usb1_api_function_CtrlReadStart(uint32_t size, uint8_t *data);
|
||||
void usb1_api_function_CtrlWriteStart(uint32_t size, uint8_t *data);
|
||||
uint16_t usb1_api_function_start_send_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
|
||||
uint16_t usb1_api_function_check_pipe_status(uint16_t pipe, uint32_t *size);
|
||||
void usb1_api_function_clear_pipe_status(uint16_t pipe);
|
||||
void usb1_api_function_start_receive_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
|
||||
void usb1_api_function_set_pid_buf(uint16_t pipe);
|
||||
void usb1_api_function_set_pid_nak(uint16_t pipe);
|
||||
void usb1_api_function_set_pid_stall(uint16_t pipe);
|
||||
void usb1_api_function_clear_pid_stall(uint16_t pipe);
|
||||
uint16_t usb1_api_function_get_pid(uint16_t pipe);
|
||||
int32_t usb1_api_function_check_stall(uint16_t pipe);
|
||||
void usb1_api_function_set_sqclr(uint16_t pipe);
|
||||
void usb1_api_function_set_sqset(uint16_t pipe);
|
||||
void usb1_api_function_set_csclr(uint16_t pipe);
|
||||
void usb1_api_function_set_curpipe(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
|
||||
void usb1_api_function_clear_brdy_sts(uint16_t pipe);
|
||||
void usb1_api_function_clear_bemp_sts(uint16_t pipe);
|
||||
void usb1_api_function_clear_nrdy_sts(uint16_t pipe);
|
||||
|
||||
void usb1_function_ClearFeature(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_SetFeature(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_SetAddress(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_SetDescriptor(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_SetConfiguration(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_SetInterface(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_SynchFrame(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_GetStatus(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_GetDescriptor(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_GetConfiguration(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_GetInterface(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_Resrv_0(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_Resrv_123(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_Resrv_4(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
void usb1_function_Resrv_5(uint16_t type, uint16_t value, uint16_t index, uint16_t length);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* USB1_FUNCTION_API_H */
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,142 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_dmacdrv.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB1_FUNCTION_DMACDRV_H
|
||||
#define USB1_FUNCTION_DMACDRV_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
typedef struct dmac_transinfo
|
||||
{
|
||||
uint32_t src_addr; /* Transfer source address */
|
||||
uint32_t dst_addr; /* Transfer destination address */
|
||||
uint32_t count; /* Transfer byte count */
|
||||
uint32_t src_size; /* Transfer source data size */
|
||||
uint32_t dst_size; /* Transfer destination data size */
|
||||
uint32_t saddr_dir; /* Transfer source address direction */
|
||||
uint32_t daddr_dir; /* Transfer destination address direction */
|
||||
} dmac_transinfo_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
/* ==== Transfer specification of the sample program ==== */
|
||||
#define DMAC_SAMPLE_SINGLE (0) /* Single transfer */
|
||||
#define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */
|
||||
|
||||
/* ==== DMA modes ==== */
|
||||
#define DMAC_MODE_REGISTER (0) /* Register mode */
|
||||
#define DMAC_MODE_LINK (1) /* Link mode */
|
||||
|
||||
/* ==== Transfer requests ==== */
|
||||
#define DMAC_REQ_MODE_EXT (0) /* External request */
|
||||
#define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */
|
||||
#define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */
|
||||
|
||||
/* ==== DMAC transfer sizes ==== */
|
||||
#define DMAC_TRANS_SIZE_8 (0) /* 8 bits */
|
||||
#define DMAC_TRANS_SIZE_16 (1) /* 16 bits */
|
||||
#define DMAC_TRANS_SIZE_32 (2) /* 32 bits */
|
||||
#define DMAC_TRANS_SIZE_64 (3) /* 64 bits */
|
||||
#define DMAC_TRANS_SIZE_128 (4) /* 128 bits */
|
||||
#define DMAC_TRANS_SIZE_256 (5) /* 256 bits */
|
||||
#define DMAC_TRANS_SIZE_512 (6) /* 512 bits */
|
||||
#define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */
|
||||
|
||||
/* ==== Address increment for transferring ==== */
|
||||
#define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */
|
||||
#define DMAC_TRANS_ADR_INC (0) /* Increment */
|
||||
|
||||
/* ==== Method for detecting DMA request ==== */
|
||||
#define DMAC_REQ_DET_FALL (0) /* Falling edge detection */
|
||||
#define DMAC_REQ_DET_RISE (1) /* Rising edge detection */
|
||||
#define DMAC_REQ_DET_LOW (2) /* Low level detection */
|
||||
#define DMAC_REQ_DET_HIGH (3) /* High level detection */
|
||||
|
||||
/* ==== Request Direction ==== */
|
||||
#define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */
|
||||
#define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */
|
||||
|
||||
/* ==== Descriptors ==== */
|
||||
#define DMAC_DESC_HEADER (0) /* Header */
|
||||
#define DMAC_DESC_SRC_ADDR (1) /* Source Address */
|
||||
#define DMAC_DESC_DST_ADDR (2) /* Destination Address */
|
||||
#define DMAC_DESC_COUNT (3) /* Transaction Byte */
|
||||
#define DMAC_DESC_CHCFG (4) /* Channel Confg */
|
||||
#define DMAC_DESC_CHITVL (5) /* Channel Interval */
|
||||
#define DMAC_DESC_CHEXT (6) /* Channel Extension */
|
||||
#define DMAC_DESC_LINK_ADDR (7) /* Link Address */
|
||||
|
||||
/* ==== On-chip peripheral module requests ===== */
|
||||
typedef enum dmac_request_factor
|
||||
{
|
||||
DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */
|
||||
DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */
|
||||
DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */
|
||||
DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */
|
||||
DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */
|
||||
DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */
|
||||
DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */
|
||||
DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */
|
||||
} dmac_request_factor_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
void usb1_function_DMAC3_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction);
|
||||
int32_t usb1_function_DMAC3_Open(uint32_t req);
|
||||
void usb1_function_DMAC3_Close(uint32_t *remain);
|
||||
void usb1_function_DMAC3_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
|
||||
|
||||
void usb1_function_DMAC4_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction);
|
||||
int32_t usb1_function_DMAC4_Open(uint32_t req);
|
||||
void usb1_function_DMAC4_Close(uint32_t *remain);
|
||||
void usb1_function_DMAC4_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* USB1_FUNCTION_DMACDRV_H */
|
||||
|
||||
/* End of File */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,346 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_dma.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_function.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
static void usb1_function_dmaint(uint16_t fifo);
|
||||
static void usb1_function_dmaint_buf2fifo(uint16_t pipe);
|
||||
static void usb1_function_dmaint_fifo2buf(uint16_t pipe);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_dma_stop_d0
|
||||
* Description : D0FIFO DMA stop
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* : uint32_t remain : transfer byte
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_dma_stop_d0 (uint16_t pipe, uint32_t remain)
|
||||
{
|
||||
uint16_t dtln;
|
||||
uint16_t dfacc;
|
||||
uint16_t buffer;
|
||||
uint16_t sds_b = 1;
|
||||
|
||||
dfacc = RZA_IO_RegRead_16(&USB201.D0FBCFG, USB_DnFBCFG_DFACC_SHIFT, USB_DnFBCFG_DFACC);
|
||||
|
||||
if (dfacc == 2)
|
||||
{
|
||||
sds_b = 32;
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
sds_b = 16;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (g_usb1_function_DmaInfo[USB_FUNCTION_D0FIFO].size == 2)
|
||||
{
|
||||
sds_b = 4;
|
||||
}
|
||||
else if (g_usb1_function_DmaInfo[USB_FUNCTION_D0FIFO].size == 1)
|
||||
{
|
||||
sds_b = 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
sds_b = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
|
||||
{
|
||||
if (g_usb1_function_pipe_status[pipe] != DEVDRV_USBF_PIPE_DONE)
|
||||
{
|
||||
buffer = USB201.D0FIFOCTR;
|
||||
dtln = (buffer & USB_FUNCTION_BITDTLN);
|
||||
|
||||
if ((dtln % sds_b) != 0)
|
||||
{
|
||||
remain += (sds_b - (dtln % sds_b));
|
||||
}
|
||||
g_usb1_function_PipeDataSize[pipe] = (g_usb1_function_data_count[pipe] - remain);
|
||||
g_usb1_function_data_count[pipe] = remain;
|
||||
}
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.D0FIFOSEL, 0, USB_DnFIFOSEL_DREQE_SHIFT, USB_DnFIFOSEL_DREQE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_dma_stop_d1
|
||||
* Description : D1FIFO DMA stop
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* : uint32_t remain : transfer byte
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_dma_stop_d1 (uint16_t pipe, uint32_t remain)
|
||||
{
|
||||
uint16_t dtln;
|
||||
uint16_t dfacc;
|
||||
uint16_t buffer;
|
||||
uint16_t sds_b = 1;
|
||||
|
||||
dfacc = RZA_IO_RegRead_16(&USB201.D1FBCFG, USB_DnFBCFG_DFACC_SHIFT, USB_DnFBCFG_DFACC);
|
||||
|
||||
if (dfacc == 2)
|
||||
{
|
||||
sds_b = 32;
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
sds_b = 16;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (g_usb1_function_DmaInfo[USB_FUNCTION_D1FIFO].size == 2)
|
||||
{
|
||||
sds_b = 4;
|
||||
}
|
||||
else if (g_usb1_function_DmaInfo[USB_FUNCTION_D1FIFO].size == 1)
|
||||
{
|
||||
sds_b = 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
sds_b = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
|
||||
{
|
||||
if (g_usb1_function_pipe_status[pipe] != DEVDRV_USBF_PIPE_DONE)
|
||||
{
|
||||
buffer = USB201.D1FIFOCTR;
|
||||
dtln = (buffer & USB_FUNCTION_BITDTLN);
|
||||
|
||||
if ((dtln % sds_b) != 0)
|
||||
{
|
||||
remain += (sds_b - (dtln % sds_b));
|
||||
}
|
||||
g_usb1_function_PipeDataSize[pipe] = (g_usb1_function_data_count[pipe] - remain);
|
||||
g_usb1_function_data_count[pipe] = remain;
|
||||
}
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.D1FIFOSEL, 0, USB_DnFIFOSEL_DREQE_SHIFT, USB_DnFIFOSEL_DREQE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_dma_interrupt_d0fifo
|
||||
* Description : This function is DMA interrupt handler entry.
|
||||
* : Execute usb1_function_dmaint() after disabling DMA interrupt in this function.
|
||||
* : Disable DMA interrupt to DMAC executed when USB_FUNCTION_D0FIFO_DMA is
|
||||
* : specified by dma->fifo.
|
||||
* : Register this function as DMA complete interrupt.
|
||||
* Arguments : uint32_t int_sense ; Interrupts detection mode
|
||||
* : ; INTC_LEVEL_SENSITIVE : Level sense
|
||||
* : ; INTC_EDGE_TRIGGER : Edge trigger
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_dma_interrupt_d0fifo (uint32_t int_sense)
|
||||
{
|
||||
usb1_function_dmaint(USB_FUNCTION_D0FIFO);
|
||||
g_usb1_function_DmaStatus[USB_FUNCTION_D0FIFO] = USB_FUNCTION_DMA_READY;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_dma_interrupt_d1fifo
|
||||
* Description : This function is DMA interrupt handler entry.
|
||||
* : Execute usb1_function_dmaint() after disabling DMA interrupt in this function.
|
||||
* : Disable DMA interrupt to DMAC executed when USB_FUNCTION_D1FIFO_DMA is
|
||||
* : specified by dma->fifo.
|
||||
* : Register this function as DMA complete interrupt.
|
||||
* Arguments : uint32_t int_sense ; Interrupts detection mode
|
||||
* : ; INTC_LEVEL_SENSITIVE : Level sense
|
||||
* : ; INTC_EDGE_TRIGGER : Edge trigger
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_dma_interrupt_d1fifo (uint32_t int_sense)
|
||||
{
|
||||
usb1_function_dmaint(USB_FUNCTION_D1FIFO);
|
||||
g_usb1_function_DmaStatus[USB_FUNCTION_D1FIFO] = USB_FUNCTION_DMA_READY;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_dmaint
|
||||
* Description : This function is DMA transfer end interrupt
|
||||
* Arguments : uint16_t fifo ; fifo number
|
||||
* : ; USB_FUNCTION_D0FIFO
|
||||
* : ; USB_FUNCTION_D1FIFO
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_function_dmaint (uint16_t fifo)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
pipe = g_usb1_function_DmaPipe[fifo];
|
||||
|
||||
if (g_usb1_function_DmaInfo[fifo].dir == USB_FUNCTION_BUF2FIFO)
|
||||
{
|
||||
usb1_function_dmaint_buf2fifo(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_function_dmaint_fifo2buf(pipe);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_dmaint_fifo2buf
|
||||
* Description : Executes read completion from FIFO by DMAC.
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_function_dmaint_fifo2buf (uint16_t pipe)
|
||||
{
|
||||
uint32_t remain;
|
||||
uint16_t useport;
|
||||
|
||||
if (g_usb1_function_pipe_status[pipe] != DEVDRV_USBF_PIPE_DONE)
|
||||
{
|
||||
useport = (uint16_t)(g_usb1_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE);
|
||||
|
||||
if (useport == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
remain = Userdef_USB_usb1_function_stop_dma0();
|
||||
usb1_function_dma_stop_d0(pipe, remain);
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
if (g_usb1_function_DmaStatus[USB_FUNCTION_D0FIFO] == USB_FUNCTION_DMA_BUSYEND)
|
||||
{
|
||||
USB201.D0FIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_function_enable_brdy_int(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
remain = Userdef_USB_usb1_function_stop_dma1();
|
||||
usb1_function_dma_stop_d1(pipe, remain);
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
if (g_usb1_function_DmaStatus[USB_FUNCTION_D1FIFO] == USB_FUNCTION_DMA_BUSYEND)
|
||||
{
|
||||
USB201.D1FIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_function_enable_brdy_int(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_dmaint_buf2fifo
|
||||
* Description : Executes write completion in FIFO by DMAC.
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_function_dmaint_buf2fifo (uint16_t pipe)
|
||||
{
|
||||
uint32_t remain;
|
||||
uint16_t useport;
|
||||
|
||||
useport = (uint16_t)(g_usb1_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE);
|
||||
|
||||
if (useport == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
remain = Userdef_USB_usb1_function_stop_dma0();
|
||||
usb1_function_dma_stop_d0(pipe, remain);
|
||||
|
||||
if (g_usb1_function_DmaBval[USB_FUNCTION_D0FIFO] != 0)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.D0FIFOCTR,
|
||||
1,
|
||||
USB_DnFIFOCTR_BVAL_SHIFT,
|
||||
USB_DnFIFOCTR_BVAL);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
remain = Userdef_USB_usb1_function_stop_dma1();
|
||||
usb1_function_dma_stop_d1(pipe, remain);
|
||||
|
||||
if (g_usb1_function_DmaBval[USB_FUNCTION_D1FIFO] != 0)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.D1FIFOCTR,
|
||||
1,
|
||||
USB_DnFIFOCTR_BVAL_SHIFT,
|
||||
USB_DnFIFOCTR_BVAL);
|
||||
}
|
||||
}
|
||||
|
||||
usb1_function_enable_bemp_int(pipe);
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,249 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_intrn.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_function.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_brdy_int
|
||||
* Description : Executes BRDY interrupt(USB_FUNCTION_PIPE1-9).
|
||||
* : According to the pipe that interrupt is generated in,
|
||||
* : reads/writes buffer allocated in the pipe.
|
||||
* : This function is executed in the BRDY interrupt handler.
|
||||
* : This function clears BRDY interrupt status and BEMP interrupt
|
||||
* : status.
|
||||
* Arguments : uint16_t Status ; BRDYSTS Register Value
|
||||
* : uint16_t Int_enbl ; BRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
void usb1_function_brdy_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint32_t int_sense = 0;
|
||||
uint16_t pipe;
|
||||
uint16_t pipebit;
|
||||
|
||||
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
pipebit = g_usb1_function_bit_set[pipe];
|
||||
|
||||
if ((status & pipebit) && (int_enb & pipebit))
|
||||
{
|
||||
USB201.BRDYSTS = (uint16_t)~pipebit;
|
||||
USB201.BEMPSTS = (uint16_t)~pipebit;
|
||||
if ((g_usb1_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE) == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
if (g_usb1_function_DmaStatus[USB_FUNCTION_D0FIFO] != USB_FUNCTION_DMA_READY)
|
||||
{
|
||||
usb1_function_dma_interrupt_d0fifo(int_sense);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
usb1_function_read_dma(pipe);
|
||||
usb1_function_disable_brdy_int(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
USB201.D0FIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
}
|
||||
else if ((g_usb1_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE) == USB_FUNCTION_D1FIFO_DMA)
|
||||
{
|
||||
if (g_usb1_function_DmaStatus[USB_FUNCTION_D1FIFO] != USB_FUNCTION_DMA_READY)
|
||||
{
|
||||
usb1_function_dma_interrupt_d1fifo(int_sense);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
usb1_function_read_dma(pipe);
|
||||
usb1_function_disable_brdy_int(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
USB201.D1FIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (RZA_IO_RegRead_16(&g_usb1_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
|
||||
{
|
||||
usb1_function_read_buffer(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_function_write_buffer(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_nrdy_int
|
||||
* Description : Executes NRDY interrupt(USB_FUNCTION_PIPE1-9).
|
||||
* : Checks NRDY interrupt cause by PID. When the cause if STALL,
|
||||
* : regards the pipe state as STALL and ends the processing.
|
||||
* : Then the cause is not STALL, increments the error count to
|
||||
* : communicate again. When the error count is 3, determines
|
||||
* : the pipe state as DEVDRV_USBF_PIPE_NORES and ends the processing.
|
||||
* : This function is executed in the NRDY interrupt handler.
|
||||
* : This function clears NRDY interrupt status.
|
||||
* Arguments : uint16_t status ; NRDYSTS Register Value
|
||||
* : uint16_t int_enb ; NRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_nrdy_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint16_t pid;
|
||||
uint16_t pipe;
|
||||
uint16_t bitcheck;
|
||||
|
||||
bitcheck = (uint16_t)(status & int_enb);
|
||||
|
||||
USB201.NRDYSTS = (uint16_t)~status;
|
||||
|
||||
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
if ((bitcheck&g_usb1_function_bit_set[pipe]) == g_usb1_function_bit_set[pipe])
|
||||
{
|
||||
if (RZA_IO_RegRead_16(&USB201.SYSCFG0, USB_SYSCFG_DCFM_SHIFT, USB_SYSCFG_DCFM) == 1)
|
||||
{
|
||||
if (g_usb1_function_pipe_status[pipe] == DEVDRV_USBF_PIPE_WAIT)
|
||||
{
|
||||
pid = usb1_function_get_pid(pipe);
|
||||
if ((pid == DEVDRV_USBF_PID_STALL) || (pid == DEVDRV_USBF_PID_STALL2))
|
||||
{
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb1_function_PipeIgnore[pipe]++;
|
||||
if (g_usb1_function_PipeIgnore[pipe] == 3)
|
||||
{
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_NORES;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_function_set_pid_buf(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* USB Function */
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_bemp_int
|
||||
* Description : Executes BEMP interrupt(USB_FUNCTION_PIPE1-9).
|
||||
* Arguments : uint16_t status ; BEMPSTS Register Value
|
||||
* : uint16_t int_enb ; BEMPENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_bemp_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint16_t pid;
|
||||
uint16_t pipe;
|
||||
uint16_t bitcheck;
|
||||
uint16_t inbuf;
|
||||
|
||||
bitcheck = (uint16_t)(status & int_enb);
|
||||
|
||||
USB201.BEMPSTS = (uint16_t)~status;
|
||||
|
||||
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
if ((bitcheck&g_usb1_function_bit_set[pipe]) == g_usb1_function_bit_set[pipe])
|
||||
{
|
||||
pid = usb1_function_get_pid(pipe);
|
||||
|
||||
if ((pid == DEVDRV_USBF_PID_STALL) || (pid == DEVDRV_USBF_PID_STALL2))
|
||||
{
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_STALL;
|
||||
}
|
||||
else
|
||||
{
|
||||
inbuf = usb1_function_get_inbuf(pipe);
|
||||
|
||||
if (inbuf == 0)
|
||||
{
|
||||
usb1_function_disable_bemp_int(pipe);
|
||||
usb1_function_set_pid_nak(pipe);
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,441 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_api.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_function.h"
|
||||
#include "dev_drv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_init
|
||||
* Description : Initializes the USB module in the USB function mode.
|
||||
* Arguments : uint8_t int_level ; interruput level
|
||||
* : uint16_t mode : Speed modes
|
||||
* : : USB_FUCNTION_HIGH_SPEED: High-speed device
|
||||
* : : USB_FUCNTION_FULL_SPEED: Full-speed device
|
||||
* : uint16_t clockmode ; 48MHz ; USBFCLOCK_X1_48MHZ
|
||||
* : ; 12MHz ; USBFCLOCK_EXTAL_12MHZ
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
void usb1_api_function_init (uint8_t int_level, uint16_t mode, uint16_t clockmode)
|
||||
{
|
||||
volatile uint8_t dummy_buf;
|
||||
|
||||
CPG.STBCR7 &= 0xfc; /*The clock of USB0/1 modules is permitted */
|
||||
dummy_buf = CPG.STBCR7; /* (Dummy read) */
|
||||
|
||||
usb1_function_setting_interrupt(int_level);
|
||||
|
||||
usb1_function_reset_module(clockmode); /* reset USB module with setting tranciever */
|
||||
/* and HSE=1 */
|
||||
|
||||
usb1_function_init_status(); /* clear variables */
|
||||
|
||||
usb1_function_InitModule(mode); /* select USB Function and Interrupt Enable */
|
||||
/* Detect USB Device to attach or detach */
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_IsConfigured
|
||||
* Description : Checks if the USB device is configured to return the result as
|
||||
* : the return value.
|
||||
* Arguments : none
|
||||
* Return Value : DEVDRV_USBF_YES : Configured & Configured Suspend
|
||||
* : DEVDRV_USBF_NO : not Configured
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_api_function_IsConfigured (void)
|
||||
{
|
||||
uint16_t dvst;
|
||||
|
||||
dvst = usb1_function_GetDeviceState();
|
||||
|
||||
if ((dvst == USB_FUNCTION_DVST_CONFIGURED) ||
|
||||
(dvst == USB_FUNCTION_DVST_CONFIGURED_SUSPEND))
|
||||
{
|
||||
return DEVDRV_USBF_YES;
|
||||
}
|
||||
|
||||
return DEVDRV_USBF_NO;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_GetDeviceState
|
||||
* Description : Returns the state of USB device.
|
||||
* Arguments : none
|
||||
* Return Value : Device States
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_function_GetDeviceState (void)
|
||||
{
|
||||
uint16_t dvsq;
|
||||
uint16_t dvst;
|
||||
|
||||
dvsq = USB201.INTSTS0;
|
||||
switch (dvsq & USB_FUNCTION_BITDVSQ)
|
||||
{
|
||||
case USB_FUNCTION_DS_POWR: /* Power state *//* power-on */
|
||||
dvst = USB_FUNCTION_DVST_POWERED;
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_DS_DFLT: /* Default state *//* bus-reset */
|
||||
dvst = USB_FUNCTION_DVST_DEFAULT;
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_DS_ADDS: /* Address state */
|
||||
dvst = USB_FUNCTION_DVST_ADDRESS;
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_DS_CNFG: /* Configured state */
|
||||
dvst = USB_FUNCTION_DVST_CONFIGURED;
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_DS_SPD_CNFG: /* Configured Suspend state */
|
||||
dvst = USB_FUNCTION_DVST_CONFIGURED_SUSPEND;
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_DS_SPD_POWR: /* Power Suspend state */
|
||||
case USB_FUNCTION_DS_SPD_DFLT: /* Default Suspend state */
|
||||
case USB_FUNCTION_DS_SPD_ADDR: /* Address Suspend state */
|
||||
dvst = USB_FUNCTION_DVST_SUSPEND;
|
||||
break;
|
||||
|
||||
default: /* error */
|
||||
dvst = USB_FUNCTION_DVST_SUSPEND;
|
||||
break;
|
||||
}
|
||||
|
||||
return dvst;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_start_receive_transfer
|
||||
* Description : Starts USB data reception using the pipe specified in the argument.
|
||||
* : The FIFO for using is set in the pipe definition table.
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* : uint32_t size ; Data Size
|
||||
* : uint8_t *data ; Data data Address
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_start_receive_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
|
||||
{
|
||||
usb1_function_start_receive_transfer(pipe, size, data);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_start_send_transfer
|
||||
* Description : Starts the USB data communication using pipe specified by the argument.
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* : uint32_t size ; Data Size
|
||||
* : uint8_t *data ; Data data Address
|
||||
* Return Value : DEVDRV_USBF_WRITEEND ; Write end
|
||||
* : DEVDRV_USBF_WRITESHRT ; short data
|
||||
* : DEVDRV_USBF_WRITING ; Continue of data write
|
||||
* : DEVDRV_USBF_WRITEDMA ; Write DMA
|
||||
* : DEVDRV_USBF_FIFOERROR ; FIFO status
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_api_function_start_send_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
|
||||
{
|
||||
uint16_t status;
|
||||
|
||||
status = usb1_function_start_send_transfer(pipe, size, data);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_check_pipe_status
|
||||
* Description : Starts USB data reception using the pipe specified in the argument.
|
||||
* : The FIFO for using is set in the pipe definition table.
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* : uint32_t *size ; Data Size
|
||||
* Return Value : Pipe Status
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_api_function_check_pipe_status (uint16_t pipe, uint32_t * size)
|
||||
{
|
||||
if (g_usb1_function_pipe_status[pipe] == DEVDRV_USBF_PIPE_DONE)
|
||||
{
|
||||
*size = g_usb1_function_PipeDataSize[pipe];
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_IDLE;
|
||||
|
||||
return DEVDRV_USBF_PIPE_DONE;
|
||||
}
|
||||
else if (g_usb1_function_pipe_status[pipe] == DEVDRV_USBF_PIPE_NORES)
|
||||
{
|
||||
*size = 0;
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_IDLE;
|
||||
|
||||
return DEVDRV_USBF_PIPE_NORES;
|
||||
}
|
||||
else if (g_usb1_function_pipe_status[pipe] == DEVDRV_USBF_PIPE_STALL)
|
||||
{
|
||||
*size = 0;
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_IDLE;
|
||||
|
||||
return DEVDRV_USBF_PIPE_STALL;
|
||||
}
|
||||
else if (g_usb1_function_pipe_status[pipe] == DEVDRV_USBF_FIFOERROR)
|
||||
{
|
||||
*size = 0;
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_IDLE;
|
||||
|
||||
return DEVDRV_USBF_FIFOERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
return g_usb1_function_pipe_status[pipe];
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_clear_pipe_status
|
||||
* Description : Starts USB data reception using the pipe specified in the argument.
|
||||
* : The FIFO for using is set in the pipe definition table.
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* Return Value : Pipe Status
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_clear_pipe_status (uint16_t pipe)
|
||||
{
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_IDLE;
|
||||
g_usb1_function_PipeDataSize[pipe] = 0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_set_pid_buf
|
||||
* Description : Enables communicaqtion in the pipe specified by the argument
|
||||
* : (BUF).
|
||||
* Arguments : uint16_t pipe ; pipe Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_set_pid_buf (uint16_t pipe)
|
||||
{
|
||||
usb1_function_set_pid_buf(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_set_pid_nak
|
||||
* Description : Disables communication (NAK) in the pipe specified by the argument.
|
||||
* : When the pipe status was enabling communication (BUF) before
|
||||
* : executing before executing this function, waits in the software
|
||||
* : until the pipe becomes ready after setting disabled.
|
||||
* Arguments : uint16_t pipe ; pipe Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_set_pid_nak (uint16_t pipe)
|
||||
{
|
||||
usb1_function_set_pid_nak(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_set_pid_stall
|
||||
* Description : Disables communication (STALL) in the pipe specified by the
|
||||
* : argument.
|
||||
* Arguments : uint16_t pipe ; pipe Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_set_pid_stall (uint16_t pipe)
|
||||
{
|
||||
usb1_function_set_pid_stall(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_clear_pid_stall
|
||||
* Description : Disables communication (NAK) in the pipe specified by the argument.
|
||||
* Arguments : uint16_t pipe ; pipe Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_clear_pid_stall (uint16_t pipe)
|
||||
{
|
||||
usb1_function_clear_pid_stall(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_get_pid
|
||||
* Description : Returns the pipe state specified by the argument.
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* Return Value : PID
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_api_function_get_pid (uint16_t pipe)
|
||||
{
|
||||
uint16_t pid;
|
||||
|
||||
pid = usb1_function_get_pid(pipe);
|
||||
|
||||
return pid;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_check_stall
|
||||
* Description :
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* Return Value : PID
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_function_check_stall (uint16_t pipe)
|
||||
{
|
||||
uint16_t pid;
|
||||
|
||||
pid = usb1_function_get_pid(pipe);
|
||||
|
||||
if ((pid & DEVDRV_USBF_PID_STALL) == DEVDRV_USBF_PID_STALL)
|
||||
{
|
||||
return DEVDRV_USBF_STALL;
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_set_sqclr
|
||||
* Description : Sets the sequence bit of the pipe specified by the argument to
|
||||
* : DATA0.
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_set_sqclr (uint16_t pipe)
|
||||
{
|
||||
usb1_function_set_sqclr(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_set_sqset
|
||||
* Description : Sets the sequence bit of the pipe specified by the argument to
|
||||
* : DATA1.
|
||||
* Arguments : uint16_t pipe ; Pipe number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_set_sqset (uint16_t pipe)
|
||||
{
|
||||
usb1_function_set_sqset(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_set_csclr
|
||||
* Description : CSPLIT status clear setting of sprit transaction in specified
|
||||
* : pipe is performed.
|
||||
* : When SQSET bit or SQCLR bit, and SQSET bit or SQCLR bit
|
||||
* : in DCPCTR register are continuously changed (when the sequence
|
||||
* : toggle bit of data PID is continuously changed over two or more pipes),
|
||||
* : the access cycle with 120 ns and more than 5 cycle bus clock is necessary.
|
||||
* : Do not set both SQCLR bit and SQSET bit to 1 at the same time.
|
||||
* : In addition, both bits should be operated after PID is set to NAK.
|
||||
* : However, when it is set to the isochronous transfer as the transfer type
|
||||
* : (TYPE=11), writing in SQSET bit is disabled.
|
||||
* Arguments : uint16_t pipe ; Pipe number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_set_csclr (uint16_t pipe)
|
||||
{
|
||||
usb1_function_set_csclr(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_set_curpipe
|
||||
* Description : Allocates FIF0 specifed by the argument in the pipe assigned
|
||||
* : by the argument.
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* : uint16_t fifosel ; Select FIFO
|
||||
* : uint16_t isel ; FIFO Access Direction
|
||||
* : uint16_t mbw ; FIFO Port Access Bit Width
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_set_curpipe (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
|
||||
{
|
||||
usb1_function_set_curpipe(pipe, fifosel, isel, mbw);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_clear_brdy_sts
|
||||
* Description : Clear BRDY interrupt status in the pipe spceified by the argument.
|
||||
* Arguments : uint16_t pipe ; pipe Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_clear_brdy_sts (uint16_t pipe)
|
||||
{
|
||||
usb1_function_clear_brdy_sts(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_clear_bemp_sts
|
||||
* Description : Clear BEMP interrupt status in the pipe spceified by the argument.
|
||||
* Arguments : uint16_t pipe ; pipe Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_clear_bemp_sts (uint16_t pipe)
|
||||
{
|
||||
usb1_function_clear_bemp_sts(pipe);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_clear_nrdy_sts
|
||||
* Description : Clear NRDY interrupt status in the pipe spceified by the argument.
|
||||
* Arguments : uint16_t pipe ; pipe Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_clear_nrdy_sts (uint16_t pipe)
|
||||
{
|
||||
usb1_function_clear_nrdy_sts(pipe);
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,142 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_controlrw.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_function.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_CtrlReadStart
|
||||
* Description : Executes the USB control read transfer.
|
||||
* : USB host controller <- USB device
|
||||
* Arguments : uint16_t size ; Data Size
|
||||
* : uint8_t *data ; Data Address
|
||||
* Return Value : DEVDRV_USBF_WRITEEND ; End of data write
|
||||
* : DEVDRV_USBF_WRITESHRT ; End of short data write
|
||||
* : DEVDRV_USBF_WRITING ; Continue of data write
|
||||
* : DEVDRV_USBF_FIFOERROR ; FIFO access error
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_api_function_CtrlReadStart (uint32_t size, uint8_t * data)
|
||||
{
|
||||
uint16_t status;
|
||||
uint16_t mbw;
|
||||
|
||||
usb1_function_set_pid_nak(USB_FUNCTION_PIPE0);
|
||||
|
||||
g_usb1_function_data_count[USB_FUNCTION_PIPE0] = size;
|
||||
g_usb1_function_data_pointer[USB_FUNCTION_PIPE0] = data;
|
||||
|
||||
mbw = usb1_function_get_mbw(g_usb1_function_data_count[USB_FUNCTION_PIPE0],
|
||||
(uint32_t)g_usb1_function_data_pointer[USB_FUNCTION_PIPE0]);
|
||||
usb1_function_set_curpipe(USB_FUNCTION_PIPE0, USB_FUNCTION_CUSE, USB_FUNCTION_CFIFO_WRITE, mbw);
|
||||
USB201.CFIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
|
||||
status = usb1_function_write_buffer_c(USB_FUNCTION_PIPE0);
|
||||
|
||||
/* Peripheral Control sequence */
|
||||
switch (status)
|
||||
{
|
||||
case DEVDRV_USBF_WRITESHRT: /* End of data write */
|
||||
case DEVDRV_USBF_WRITEEND: /* End of data write (not null) */
|
||||
case DEVDRV_USBF_WRITING: /* Continue of data write */
|
||||
usb1_function_enable_bemp_int(USB_FUNCTION_PIPE0); /* Enable Empty Interrupt */
|
||||
usb1_function_set_pid_buf(USB_FUNCTION_PIPE0); /* Set BUF */
|
||||
break;
|
||||
|
||||
case DEVDRV_USBF_FIFOERROR: /* FIFO access error */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return status; /* End or Err or Continue */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_function_CtrlWriteStart
|
||||
* Description : Executes the USB control write transfer.
|
||||
* : USB host controller -> USB device
|
||||
* Arguments : uint16_t size ; Data Size
|
||||
* : uint8_t *data ; Data Address
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_api_function_CtrlWriteStart (uint32_t size, uint8_t * data)
|
||||
{
|
||||
uint16_t mbw;
|
||||
|
||||
usb1_function_set_pid_nak(USB_FUNCTION_PIPE0);
|
||||
|
||||
g_usb1_function_data_count[USB_FUNCTION_PIPE0] = size;
|
||||
g_usb1_function_data_pointer[USB_FUNCTION_PIPE0] = data;
|
||||
|
||||
mbw = usb1_function_get_mbw(g_usb1_function_data_count[USB_FUNCTION_PIPE0],
|
||||
(uint32_t)g_usb1_function_data_pointer[USB_FUNCTION_PIPE0]);
|
||||
usb1_function_set_curpipe(USB_FUNCTION_PIPE0, USB_FUNCTION_CUSE, USB_FUNCTION_CFIFO_WRITE, mbw);
|
||||
USB201.CFIFOCTR = USB_FUNCTION_BITBCLR;
|
||||
|
||||
usb1_function_enable_brdy_int(USB_FUNCTION_PIPE0);
|
||||
usb1_function_set_pid_buf(USB_FUNCTION_PIPE0);
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,144 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_global.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_function.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
const uint16_t g_usb1_function_bit_set[16] =
|
||||
{
|
||||
0x0001, 0x0002, 0x0004, 0x0008,
|
||||
0x0010, 0x0020, 0x0040, 0x0080,
|
||||
0x0100, 0x0200, 0x0400, 0x0800,
|
||||
0x1000, 0x2000, 0x4000, 0x8000
|
||||
};
|
||||
|
||||
uint32_t g_usb1_function_data_count[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
uint8_t * g_usb1_function_data_pointer[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
|
||||
uint16_t g_usb1_function_PipeIgnore[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_function_PipeTbl[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_function_pipe_status[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
uint32_t g_usb1_function_PipeDataSize[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
|
||||
USB_FUNCTION_DMA_t g_usb1_function_DmaInfo[2];
|
||||
uint16_t g_usb1_function_DmaPipe[2];
|
||||
uint16_t g_usb1_function_DmaBval[2];
|
||||
uint16_t g_usb1_function_DmaStatus[2];
|
||||
|
||||
uint16_t g_usb1_function_CtrZeroLengthFlag;
|
||||
|
||||
//uint16_t g_usb1_function_ConfigNum;
|
||||
//uint16_t g_usb1_function_Alternate[USB_FUNCTION_ALT_NO];
|
||||
//uint16_t g_usb1_function_RemoteWakeupFlag;
|
||||
uint16_t g_usb1_function_TestModeFlag;
|
||||
uint16_t g_usb1_function_TestModeSelectors;
|
||||
|
||||
//uint16_t g_usb1_function_ReqType;
|
||||
//uint16_t g_usb1_function_ReqTypeType;
|
||||
//uint16_t g_usb1_function_ReqTypeRecip;
|
||||
//uint16_t g_usb1_function_ReqRequest;
|
||||
//uint16_t g_usb1_function_ReqValue;
|
||||
//uint16_t g_usb1_function_ReqIndex;
|
||||
//uint16_t g_usb1_function_ReqLength;
|
||||
|
||||
//uint16_t g_usb1_function_EPTableIndex[USB_FUNCTION_MAX_EP_NO + 1];
|
||||
|
||||
uint16_t g_usb1_function_pipecfg[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_function_pipebuf[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_function_pipemaxp[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_function_pipeperi[USB_FUNCTION_MAX_PIPE_NO + 1];
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_init_status
|
||||
* Description : Initialization USB Sample Driver Variable.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_init_status (void)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
//g_usb1_function_ConfigNum = 0;
|
||||
//g_usb1_function_RemoteWakeupFlag = DEVDRV_USBF_OFF;
|
||||
g_usb1_function_TestModeFlag = DEVDRV_USBF_OFF;
|
||||
g_usb1_function_CtrZeroLengthFlag = 0;
|
||||
|
||||
#if 0
|
||||
usb1_function_clear_alt();
|
||||
#endif
|
||||
|
||||
for (pipe = 0; pipe < (USB_FUNCTION_MAX_PIPE_NO + 1); ++pipe)
|
||||
{
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_IDLE;
|
||||
g_usb1_function_PipeDataSize[pipe] = 0;
|
||||
g_usb1_function_data_count[pipe] = 0;
|
||||
|
||||
/* pipe configuration in usb1_function_ResetEP() */
|
||||
g_usb1_function_pipecfg[pipe] = 0;
|
||||
g_usb1_function_pipebuf[pipe] = 0;
|
||||
g_usb1_function_pipemaxp[pipe] = 0;
|
||||
g_usb1_function_pipeperi[pipe] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,330 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_sig.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_function.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb1_function_EnableINTModule(void);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_InitModule
|
||||
* Description : Initializes the USB module in the USB function mode.
|
||||
* Arguments : uint16_t mode ; USB_FUNCTION_HIGH_SPEED ; Hi-Speed Mode
|
||||
* : ; other ; Full-speed Mode
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_InitModule (uint16_t mode)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_DCFM_SHIFT,
|
||||
USB_SYSCFG_DCFM); /* USB function */
|
||||
|
||||
/* USB module operation enabled */
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_USBE_SHIFT,
|
||||
USB_SYSCFG_USBE);
|
||||
|
||||
if (mode == USB_FUNCTION_HIGH_SPEED)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_HSE_SHIFT,
|
||||
USB_SYSCFG_HSE); /* Hi-Speed Mode */
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_HSE_SHIFT,
|
||||
USB_SYSCFG_HSE);
|
||||
}
|
||||
|
||||
/* for power-on */
|
||||
if (usb1_function_CheckVBUStaus() == DEVDRV_USBF_ON)
|
||||
{
|
||||
usb1_function_EnableINTModule(); /* Interrupt Enable */
|
||||
usb1_function_USB_FUNCTION_Attach(); /* pull-up D+ and open D- */
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_function_USB_FUNCTION_Detach(); /* USB Detach */
|
||||
/* with Interrupt Enable */
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_CheckVBUStaus
|
||||
* Description : Checks the USB-VBUS state to returns the connection state to
|
||||
* : the USB host.
|
||||
* Arguments : none
|
||||
* Return Value : DEVDRV_USBF_ON : VBUS ON
|
||||
* : DEVDRV_USBF_OFF : VBUS OFF
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_function_CheckVBUStaus (void)
|
||||
{
|
||||
uint16_t buf1;
|
||||
uint16_t buf2;
|
||||
uint16_t buf3;
|
||||
|
||||
/* monitor VBUS pins */
|
||||
do
|
||||
{
|
||||
buf1 = RZA_IO_RegRead_16(&USB201.INTSTS0,
|
||||
USB_INTSTS0_VBSTS_SHIFT,
|
||||
USB_INTSTS0_VBSTS);
|
||||
Userdef_USB_usb1_function_delay_10us(1);
|
||||
buf2 = RZA_IO_RegRead_16(&USB201.INTSTS0,
|
||||
USB_INTSTS0_VBSTS_SHIFT,
|
||||
USB_INTSTS0_VBSTS);
|
||||
Userdef_USB_usb1_function_delay_10us(1);
|
||||
buf3 = RZA_IO_RegRead_16(&USB201.INTSTS0,
|
||||
USB_INTSTS0_VBSTS_SHIFT,
|
||||
USB_INTSTS0_VBSTS);
|
||||
} while ((buf1 != buf2) || (buf2 != buf3));
|
||||
|
||||
if (buf1 == DEVDRV_USBF_OFF)
|
||||
{
|
||||
return DEVDRV_USBF_OFF; /* detach */
|
||||
}
|
||||
|
||||
return DEVDRV_USBF_ON; /* attach */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_USB_FUNCTION_Attach
|
||||
* Description : Connects to the USB host controller.
|
||||
* : This function pulls up D+.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_USB_FUNCTION_Attach (void)
|
||||
{
|
||||
Userdef_USB_usb1_function_attach();
|
||||
|
||||
Userdef_USB_usb1_function_delay_xms(10);
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_DPRPU_SHIFT,
|
||||
USB_SYSCFG_DPRPU); /* Pull-up D+ and open D- */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_USB_FUNCTION_Detach
|
||||
* Description : Disconnects from the USB host controller.
|
||||
* : This function opens D+/D-.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_USB_FUNCTION_Detach (void)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
Userdef_USB_usb1_function_detach();
|
||||
|
||||
for (pipe = 0; pipe < (USB_FUNCTION_MAX_PIPE_NO + 1); ++pipe)
|
||||
{
|
||||
if (g_usb1_function_pipe_status[pipe] != DEVDRV_USBF_PIPE_IDLE)
|
||||
{
|
||||
usb1_function_stop_transfer(pipe);
|
||||
}
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_DPRPU_SHIFT,
|
||||
USB_SYSCFG_DPRPU); /* open D+ and D- */
|
||||
|
||||
/* Detach Recovery */
|
||||
Userdef_USB_usb1_function_delay_500ns(); /* need 1us=500ns * 2 wait */
|
||||
Userdef_USB_usb1_function_delay_500ns();
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_DCFM_SHIFT,
|
||||
USB_SYSCFG_DCFM);
|
||||
Userdef_USB_usb1_function_delay_500ns(); /* need 100ns wait but 500ns S/W wait */
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_DCFM_SHIFT,
|
||||
USB_SYSCFG_DCFM);
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_USBE_SHIFT,
|
||||
USB_SYSCFG_USBE); /* soft reset module */
|
||||
Userdef_USB_usb1_function_delay_500ns();
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_USBE_SHIFT,
|
||||
USB_SYSCFG_USBE);
|
||||
|
||||
usb1_function_EnableINTModule(); /* Interrupt Enable */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_USB_FUNCTION_BusReset
|
||||
* Description : This function is executed when the USB device is transitioned
|
||||
* : to POWERD_STATE. Sets the device descriptor according to the
|
||||
* : connection speed determined by the USB reset hand shake.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0 /*The USBHAL in mbed does not need this function*/
|
||||
void usb1_function_USB_FUNCTION_BusReset (void)
|
||||
{
|
||||
usb1_function_init_status(); /* memory clear */
|
||||
|
||||
if (usb1_function_is_hispeed() == USB_FUNCTION_HIGH_SPEED)
|
||||
{
|
||||
usb1_function_ResetDescriptor(USB_FUNCTION_HIGH_SPEED); /* Device Descriptor reset */
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_function_ResetDescriptor(USB_FUNCTION_FULL_SPEED); /* Device Descriptor reset */
|
||||
}
|
||||
|
||||
usb1_function_ResetDCP(); /* Default Control PIPE reset */
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_USB_FUNCTION_Resume
|
||||
* Description : This function is executed when the USB device detects a resume
|
||||
* : signal.
|
||||
* : The USB sample driver does not operate for this function.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0 /*The USBHAL in mbed does not need this function*/
|
||||
void usb1_function_USB_FUNCTION_Resume (void)
|
||||
{
|
||||
/* NOP */
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_USB_FUNCTION_Suspend
|
||||
* Description : This function is executed when the USB device detects a suspend
|
||||
* : signal.
|
||||
* : The USB sample driver does not operate for this function.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0 /*The USBHAL in mbed does not need this function*/
|
||||
void usb1_function_USB_FUNCTION_Suspend (void)
|
||||
{
|
||||
/* NOP */
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_USB_FUNCTION_TestMode
|
||||
* Description : This function is executed when the USB device is transitioned U
|
||||
* : to TEST_MODE by the USB standard request.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_USB_FUNCTION_TestMode (void)
|
||||
{
|
||||
switch (g_usb1_function_TestModeSelectors & USB_FUNCTION_FUNCTION_TEST_SELECT)
|
||||
{
|
||||
case USB_FUNCTION_FUNCTION_TEST_J:
|
||||
case USB_FUNCTION_FUNCTION_TEST_K:
|
||||
case USB_FUNCTION_FUNCTION_TEST_SE0_NAK:
|
||||
case USB_FUNCTION_FUNCTION_TEST_PACKET:
|
||||
RZA_IO_RegWrite_16(&USB201.TESTMODE,
|
||||
(g_usb1_function_TestModeSelectors >> 8),
|
||||
USB_TESTMODE_UTST_SHIFT,
|
||||
USB_TESTMODE_UTST);
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_FUNCTION_TEST_FORCE_ENABLE:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_EnableINTModule
|
||||
* Description : Enables USB interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_function_EnableINTModule (void)
|
||||
{
|
||||
uint16_t buf;
|
||||
|
||||
buf = USB201.INTENB0;
|
||||
buf |= (USB_FUNCTION_BITVBSE | USB_FUNCTION_BITDVSE | USB_FUNCTION_BITCTRE |
|
||||
USB_FUNCTION_BITBEMPE | USB_FUNCTION_BITNRDYE | USB_FUNCTION_BITBRDYE);
|
||||
USB201.INTENB0 = buf;
|
||||
|
||||
usb1_function_enable_bemp_int(USB_FUNCTION_PIPE0);
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,453 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_sub.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_function.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
extern const uint16_t *g_usb1_function_EndPntPtr[];
|
||||
extern uint8_t g_usb1_function_DeviceDescriptor[];
|
||||
extern uint8_t *g_usb1_function_ConfigurationPtr[];
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_ResetDCP
|
||||
* Description : Initializes the default control pipe(DCP).
|
||||
* Outline : Reset default control pipe
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_ResetDCP (void)
|
||||
{
|
||||
USB201.DCPCFG = 0;
|
||||
#if 0
|
||||
USB201.DCPMAXP = g_usb1_function_DeviceDescriptor[7];
|
||||
#else
|
||||
USB201.DCPMAXP = 64;
|
||||
#endif
|
||||
|
||||
USB201.CFIFOSEL = (uint16_t)(USB_FUNCTION_BITMBW_8 | USB_FUNCTION_BITBYTE_LITTLE);
|
||||
USB201.D0FIFOSEL = (uint16_t)(USB_FUNCTION_BITMBW_8 | USB_FUNCTION_BITBYTE_LITTLE);
|
||||
USB201.D1FIFOSEL = (uint16_t)(USB_FUNCTION_BITMBW_8 | USB_FUNCTION_BITBYTE_LITTLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_ResetEP
|
||||
* Description : Initializes the end point.
|
||||
* Arguments : uint16_t num ; Configuration Number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
void usb1_function_ResetEP (uint16_t num)
|
||||
{
|
||||
uint16_t pipe;
|
||||
uint16_t ep;
|
||||
uint16_t index;
|
||||
uint16_t buf;
|
||||
uint16_t * tbl;
|
||||
|
||||
tbl = (uint16_t *)(g_usb1_function_EndPntPtr[num - 1]);
|
||||
|
||||
for (ep = 1; ep <= USB_FUNCTION_MAX_EP_NO; ++ep)
|
||||
{
|
||||
if (g_usb1_function_EPTableIndex[ep] != USB_FUNCTION_EP_ERROR)
|
||||
{
|
||||
index = (uint16_t)(USB_FUNCTION_EPTABLE_LENGTH * g_usb1_function_EPTableIndex[ep]);
|
||||
pipe = (uint16_t)(tbl[index + 0] & USB_FUNCTION_BITCURPIPE);
|
||||
|
||||
g_usb1_function_PipeTbl[pipe] = (uint16_t)(((tbl[index + 1] & USB_FUNCTION_DIRFIELD) << 3) |
|
||||
ep |
|
||||
(tbl[index + 0] & USB_FUNCTION_FIFO_USE));
|
||||
|
||||
if ((tbl[index + 1] & USB_FUNCTION_DIRFIELD) == USB_FUNCTION_DIR_P_OUT)
|
||||
{
|
||||
tbl[index + 1] |= USB_FUNCTION_SHTNAKON;
|
||||
#ifdef __USB_DMA_BFRE_ENABLE__
|
||||
/* this routine cannnot be perfomred if read operation is executed in buffer size */
|
||||
if (((tbl[index + 0] & USB_FUNCTION_FIFO_USE) == USB_FUNCTION_D0FIFO_DMA) ||
|
||||
((tbl[index + 0] & USB_FUNCTION_FIFO_USE) == USB_FUNCTION_D1FIFO_DMA))
|
||||
{
|
||||
tbl[index + 1] |= USB_FUNCTION_BFREON;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Interrupt Disable */
|
||||
buf = USB201.BRDYENB;
|
||||
buf &= (uint16_t)~g_usb1_function_bit_set[pipe];
|
||||
USB201.BRDYENB = buf;
|
||||
buf = USB201.NRDYENB;
|
||||
buf &= (uint16_t)~g_usb1_function_bit_set[pipe];
|
||||
USB201.NRDYENB = buf;
|
||||
buf = USB201.BEMPENB;
|
||||
buf &= (uint16_t)~g_usb1_function_bit_set[pipe];
|
||||
USB201.BEMPENB = buf;
|
||||
|
||||
usb1_function_set_pid_nak(pipe);
|
||||
|
||||
/* CurrentPIPE Clear */
|
||||
if (RZA_IO_RegRead_16(&USB201.CFIFOSEL,
|
||||
USB_CFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_CFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.CFIFOSEL,
|
||||
0,
|
||||
USB_CFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_CFIFOSEL_CURPIPE);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&USB201.D0FIFOSEL,
|
||||
USB_DnFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_DnFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.D0FIFOSEL,
|
||||
0,
|
||||
USB_DnFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_DnFIFOSEL_CURPIPE);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&USB201.D1FIFOSEL,
|
||||
USB_DnFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_DnFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.D1FIFOSEL,
|
||||
0,
|
||||
USB_DnFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_DnFIFOSEL_CURPIPE);
|
||||
}
|
||||
|
||||
/* PIPE Configuration */
|
||||
USB201.PIPESEL = pipe;
|
||||
USB201.PIPECFG = tbl[index + 1];
|
||||
USB201.PIPEBUF = tbl[index + 2];
|
||||
USB201.PIPEMAXP = tbl[index + 3];
|
||||
USB201.PIPEPERI = tbl[index + 4];
|
||||
|
||||
g_usb1_function_pipecfg[pipe] = tbl[index + 1];
|
||||
g_usb1_function_pipebuf[pipe] = tbl[index + 2];
|
||||
g_usb1_function_pipemaxp[pipe] = tbl[index + 3];
|
||||
g_usb1_function_pipeperi[pipe] = tbl[index + 4];
|
||||
|
||||
/* Buffer Clear */
|
||||
usb1_function_set_sqclr(pipe);
|
||||
usb1_function_aclrm(pipe);
|
||||
|
||||
/* init Global */
|
||||
g_usb1_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_IDLE;
|
||||
g_usb1_function_PipeDataSize[pipe] = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_EpToPipe
|
||||
* Description : Returns the pipe which end point specified by the argument is
|
||||
* : allocated to.
|
||||
* Arguments : uint16_t ep ; Direction + Endpoint Number
|
||||
* Return Value : USB_FUNCTION_EP_ERROR : Error
|
||||
* : Others : Pipe Number
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_function_EpToPipe (uint16_t ep)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
for (pipe = 1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
if ((g_usb1_function_PipeTbl[pipe] & 0x00ff) == ep)
|
||||
{
|
||||
return pipe;
|
||||
}
|
||||
}
|
||||
|
||||
return USB_FUNCTION_EP_ERROR;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_InitEPTable
|
||||
* Description : Sets the end point by the Alternate setting value of the
|
||||
* : configuration number and the interface number specified by the
|
||||
* : argument.
|
||||
* Arguments : uint16_t Con_Num ; Configuration Number
|
||||
* : uint16_t Int_Num ; Interface Number
|
||||
* : uint16_t Alt_Num ; Alternate Setting
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
void usb1_function_InitEPTable (uint16_t Con_Num, uint16_t Int_Num, uint16_t Alt_Num)
|
||||
{
|
||||
uint8_t * ptr;
|
||||
uint16_t point_interface;
|
||||
uint16_t point_endpoint;
|
||||
uint16_t length;
|
||||
uint16_t start;
|
||||
uint16_t numbers;
|
||||
uint16_t endpoint;
|
||||
|
||||
ptr = (uint8_t *)g_usb1_function_ConfigurationPtr[Con_Num - 1];
|
||||
point_interface = *ptr;
|
||||
length = (uint16_t)((uint16_t)*(ptr + 3) << 8 | (uint16_t)*(ptr + 2));
|
||||
ptr += *ptr;
|
||||
start = 0;
|
||||
numbers = 0;
|
||||
point_endpoint = 0;
|
||||
|
||||
for (; point_interface < length;)
|
||||
{
|
||||
switch (*(ptr + 1)) /* Descriptor Type ? */
|
||||
{
|
||||
case USB_FUNCTION_DT_INTERFACE: /* Interface */
|
||||
if ((*(ptr + 2) == Int_Num) && (*(ptr + 3) == Alt_Num))
|
||||
{
|
||||
numbers = *(ptr + 4);
|
||||
}
|
||||
else
|
||||
{
|
||||
start += *(ptr + 4);
|
||||
}
|
||||
point_interface += *ptr;
|
||||
ptr += *ptr;
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_DT_ENDPOINT: /* Endpoint */
|
||||
if (point_endpoint < numbers)
|
||||
{
|
||||
endpoint = (uint16_t)(*(ptr + 2) & 0x0f);
|
||||
g_usb1_function_EPTableIndex[endpoint] = (uint16_t)(start + point_endpoint);
|
||||
++point_endpoint;
|
||||
}
|
||||
point_interface += *ptr;
|
||||
ptr += *ptr;
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_DT_DEVICE: /* Device */
|
||||
case USB_FUNCTION_DT_CONFIGURATION: /* Configuration */
|
||||
case USB_FUNCTION_DT_STRING: /* String */
|
||||
default: /* Class, Vendor, else */
|
||||
point_interface += *ptr;
|
||||
ptr += *ptr;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_GetConfigNum
|
||||
* Description : Returns the number of configuration referring to the number of
|
||||
* : configuration described in the device descriptor.
|
||||
* Arguments : none
|
||||
* Return Value : Number of possible configurations (bNumConfigurations).
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
uint16_t usb1_function_GetConfigNum (void)
|
||||
{
|
||||
return (uint16_t)g_usb1_function_DeviceDescriptor[17];
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_GetInterfaceNum
|
||||
* Description : Returns the number of interface referring to the number of
|
||||
* : interface described in the configuration descriptor.
|
||||
* Arguments : uint16_t num ; Configuration Number
|
||||
* Return Value : Number of this interface (bNumInterfaces).
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
uint16_t usb1_function_GetInterfaceNum (uint16_t num)
|
||||
{
|
||||
return (uint16_t)(*(g_usb1_function_ConfigurationPtr[num - 1] + 4));
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_GetAltNum
|
||||
* Description : Returns the Alternate setting value of the configuration number
|
||||
* : and the interface number specified by the argument.
|
||||
* Arguments : uint16_t Con_Num ; Configuration Number
|
||||
* : uint16_t Int_Num ; Interface Number
|
||||
* Return Value : Value used to select this alternate setting(bAlternateSetting).
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
uint16_t usb1_function_GetAltNum (uint16_t Con_Num, uint16_t Int_Num)
|
||||
{
|
||||
uint8_t * ptr;
|
||||
uint16_t point;
|
||||
uint16_t alt_num = 0;
|
||||
uint16_t length;
|
||||
|
||||
ptr = (uint8_t *)(g_usb1_function_ConfigurationPtr[Con_Num - 1]);
|
||||
point = ptr[0];
|
||||
ptr += ptr[0]; /* InterfaceDescriptor[0] */
|
||||
length = (uint16_t)(*(g_usb1_function_ConfigurationPtr[Con_Num - 1] + 2));
|
||||
length |= (uint16_t)((uint16_t)(*(g_usb1_function_ConfigurationPtr[Con_Num - 1] + 3)) << 8);
|
||||
|
||||
for (; point < length;) /* Search Descriptor Table size */
|
||||
{
|
||||
switch (ptr[1]) /* Descriptor Type ? */
|
||||
{
|
||||
case USB_FUNCTION_DT_INTERFACE: /* Interface */
|
||||
if (Int_Num == ptr[2])
|
||||
{
|
||||
alt_num = (uint16_t)ptr[3]; /* Alternate Number count */
|
||||
}
|
||||
point += ptr[0];
|
||||
ptr += ptr[0];
|
||||
break;
|
||||
|
||||
case USB_FUNCTION_DT_DEVICE: /* Device */
|
||||
case USB_FUNCTION_DT_CONFIGURATION: /* Configuration */
|
||||
case USB_FUNCTION_DT_STRING: /* String */
|
||||
case USB_FUNCTION_DT_ENDPOINT: /* Endpoint */
|
||||
default: /* Class, Vendor, else */
|
||||
point += ptr[0];
|
||||
ptr += ptr[0];
|
||||
break;
|
||||
}
|
||||
}
|
||||
return alt_num;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_CheckRemoteWakeup
|
||||
* Description : Returns the result of the remote wake up function is supported
|
||||
* : or not referring to the configuration descriptor.
|
||||
* Arguments : none
|
||||
* Return Value : DEVDRV_USBF_ON : Support Remote Wakeup
|
||||
* : DEVDRV_USBF_OFF : not Support Remote Wakeup
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
uint16_t usb1_function_CheckRemoteWakeup (void)
|
||||
{
|
||||
uint8_t atr;
|
||||
|
||||
if (g_usb1_function_ConfigNum == 0)
|
||||
{
|
||||
return DEVDRV_USBF_OFF;
|
||||
}
|
||||
|
||||
atr = *(g_usb1_function_ConfigurationPtr[g_usb1_function_ConfigNum - 1] + 7);
|
||||
|
||||
if (atr & USB_FUNCTION_CF_RWUP)
|
||||
{
|
||||
return DEVDRV_USBF_ON;
|
||||
}
|
||||
|
||||
return DEVDRV_USBF_OFF;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_clear_alt
|
||||
* Description : Initializes the Alternate setting area.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
void usb1_function_clear_alt (void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < USB_FUNCTION_ALT_NO; ++i)
|
||||
{
|
||||
g_usb1_function_Alternate[i] = 0; /* Alternate */
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_clear_pipe_tbl
|
||||
* Description : Initializes pipe definition table.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_clear_pipe_tbl (void)
|
||||
{
|
||||
int pipe;
|
||||
|
||||
for (pipe = 0; pipe < (USB_FUNCTION_MAX_PIPE_NO + 1); ++pipe)
|
||||
{
|
||||
g_usb1_function_PipeTbl[pipe] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_clear_ep_table_index
|
||||
* Description : Initializes the end point table index.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
#if 0
|
||||
void usb1_function_clear_ep_table_index (void)
|
||||
{
|
||||
int ep;
|
||||
|
||||
for (ep = 0; ep <= USB_FUNCTION_MAX_EP_NO; ++ep)
|
||||
{
|
||||
g_usb1_function_EPTableIndex[ep] = USB_FUNCTION_EP_ERROR;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,698 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_dmacdrv.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include <stdio.h>
|
||||
#include "r_typedefs.h"
|
||||
#include "iodefine.h"
|
||||
#include "rza_io_regrw.h"
|
||||
#include "usb1_function_dmacdrv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
#define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
|
||||
|
||||
/* ==== Request setting information for on-chip peripheral module ==== */
|
||||
typedef enum dmac_peri_req_reg_type
|
||||
{
|
||||
DMAC_REQ_MID,
|
||||
DMAC_REQ_RID,
|
||||
DMAC_REQ_AM,
|
||||
DMAC_REQ_LVL,
|
||||
DMAC_REQ_REQD
|
||||
} dmac_peri_req_reg_type_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
/* ==== Prototype declaration ==== */
|
||||
|
||||
/* ==== Global variable ==== */
|
||||
/* On-chip peripheral module request setting table */
|
||||
static const uint8_t usb1_function_dmac_peri_req_init_table[8][5] =
|
||||
{
|
||||
/* MID,RID,AM,LVL,REQD */
|
||||
{32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
|
||||
{32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
|
||||
{33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
|
||||
{33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
|
||||
{34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
|
||||
{34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
|
||||
{35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
|
||||
{35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_DMAC3_PeriReqInit
|
||||
* Description : Sets the register mode for DMA mode and the on-chip peripheral
|
||||
* : module request for transfer request for DMAC channel 1.
|
||||
* : Executes DMAC initial setting using the DMA information
|
||||
* : specified by the argument *trans_info and the enabled/disabled
|
||||
* : continuous transfer specified by the argument continuation.
|
||||
* : Registers DMAC channel 1 interrupt handler function and sets
|
||||
* : the interrupt priority level. Then enables transfer completion
|
||||
* : interrupt.
|
||||
* Arguments : dmac_transinfo_t *trans_info : Setting information to DMAC register
|
||||
* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
|
||||
* : uint32_t continuation : Set continuous transfer to be valid
|
||||
* : after DMA transfer has been completed
|
||||
* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
|
||||
* : DMAC_SAMPLE_SINGLE : Do not execute continuous transfer
|
||||
* : uint32_t request_factor : Factor for on-chip peripheral module request
|
||||
* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
|
||||
* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
|
||||
* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
|
||||
* : :
|
||||
* : uint32_t req_direction: Setting value of CHCFG_n register REQD bit
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_DMAC3_PeriReqInit (const dmac_transinfo_t * trans_info,
|
||||
uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction)
|
||||
{
|
||||
/* ==== Register mode ==== */
|
||||
if (DMAC_MODE_REGISTER == dmamode)
|
||||
{
|
||||
/* ==== Next0 register set ==== */
|
||||
DMAC3.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
|
||||
DMAC3.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
|
||||
DMAC3.N0TB_n = trans_info->count; /* Total transfer byte count */
|
||||
|
||||
/* DAD : Transfer destination address counting direction */
|
||||
/* SAD : Transfer source address counting direction */
|
||||
/* DDS : Transfer destination transfer size */
|
||||
/* SDS : Transfer source transfer size */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
trans_info->daddr_dir,
|
||||
DMAC3_CHCFG_n_DAD_SHIFT,
|
||||
DMAC3_CHCFG_n_DAD);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
trans_info->saddr_dir,
|
||||
DMAC3_CHCFG_n_SAD_SHIFT,
|
||||
DMAC3_CHCFG_n_SAD);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
trans_info->dst_size,
|
||||
DMAC3_CHCFG_n_DDS_SHIFT,
|
||||
DMAC3_CHCFG_n_DDS);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
trans_info->src_size,
|
||||
DMAC3_CHCFG_n_SDS_SHIFT,
|
||||
DMAC3_CHCFG_n_SDS);
|
||||
|
||||
/* DMS : Register mode */
|
||||
/* RSEL : Select Next0 register set */
|
||||
/* SBE : No discharge of buffer data when aborted */
|
||||
/* DEM : No DMA interrupt mask */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_DMS_SHIFT,
|
||||
DMAC3_CHCFG_n_DMS);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_RSEL_SHIFT,
|
||||
DMAC3_CHCFG_n_RSEL);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_SBE_SHIFT,
|
||||
DMAC3_CHCFG_n_SBE);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_DEM_SHIFT,
|
||||
DMAC3_CHCFG_n_DEM);
|
||||
|
||||
/* ---- Continuous transfer ---- */
|
||||
if (DMAC_SAMPLE_CONTINUATION == continuation)
|
||||
{
|
||||
/* REN : Execute continuous transfer */
|
||||
/* RSW : Change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
1,
|
||||
DMAC3_CHCFG_n_REN_SHIFT,
|
||||
DMAC3_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
1,
|
||||
DMAC3_CHCFG_n_RSW_SHIFT,
|
||||
DMAC3_CHCFG_n_RSW);
|
||||
}
|
||||
/* ---- Single transfer ---- */
|
||||
else
|
||||
{
|
||||
/* REN : Do not execute continuous transfer */
|
||||
/* RSW : Do not change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_REN_SHIFT,
|
||||
DMAC3_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_RSW_SHIFT,
|
||||
DMAC3_CHCFG_n_RSW);
|
||||
}
|
||||
|
||||
/* TM : Single transfer */
|
||||
/* SEL : Channel setting */
|
||||
/* HIEN, LOEN : On-chip peripheral module request */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_TM_SHIFT,
|
||||
DMAC3_CHCFG_n_TM);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
3,
|
||||
DMAC3_CHCFG_n_SEL_SHIFT,
|
||||
DMAC3_CHCFG_n_SEL);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
1,
|
||||
DMAC3_CHCFG_n_HIEN_SHIFT,
|
||||
DMAC3_CHCFG_n_HIEN);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_LOEN_SHIFT,
|
||||
DMAC3_CHCFG_n_LOEN);
|
||||
|
||||
/* ---- Set factor by specified on-chip peripheral module request ---- */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
|
||||
DMAC3_CHCFG_n_AM_SHIFT,
|
||||
DMAC3_CHCFG_n_AM);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
|
||||
DMAC3_CHCFG_n_LVL_SHIFT,
|
||||
DMAC3_CHCFG_n_LVL);
|
||||
|
||||
if (usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
|
||||
DMAC3_CHCFG_n_REQD_SHIFT,
|
||||
DMAC3_CHCFG_n_REQD);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
req_direction,
|
||||
DMAC3_CHCFG_n_REQD_SHIFT,
|
||||
DMAC3_CHCFG_n_REQD);
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_32(&DMAC23.DMARS,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
|
||||
DMAC23_DMARS_CH3_RID_SHIFT,
|
||||
DMAC23_DMARS_CH3_RID);
|
||||
RZA_IO_RegWrite_32(&DMAC23.DMARS,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
|
||||
DMAC23_DMARS_CH3_MID_SHIFT,
|
||||
DMAC23_DMARS_CH3_MID);
|
||||
|
||||
/* PR : Round robin mode */
|
||||
RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
|
||||
1,
|
||||
DMAC07_DCTRL_0_7_PR_SHIFT,
|
||||
DMAC07_DCTRL_0_7_PR);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_DMAC3_Open
|
||||
* Description : Enables DMAC channel 3 transfer.
|
||||
* Arguments : uint32_t req : DMAC request mode
|
||||
* Return Value : 0 : Succeeded in enabling DMA transfer
|
||||
* : -1 : Failed to enable DMA transfer (due to DMA operation)
|
||||
*******************************************************************************/
|
||||
int32_t usb1_function_DMAC3_Open (uint32_t req)
|
||||
{
|
||||
int32_t ret;
|
||||
volatile uint8_t dummy;
|
||||
|
||||
/* Transferable? */
|
||||
if ((0 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_EN_SHIFT,
|
||||
DMAC3_CHSTAT_n_EN)) &&
|
||||
(0 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC3_CHSTAT_n_TACT)))
|
||||
{
|
||||
/* Clear Channel Status Register */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
|
||||
1,
|
||||
DMAC3_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC3_CHCTRL_n_SWRST);
|
||||
dummy = RZA_IO_RegRead_32(&DMAC3.CHCTRL_n,
|
||||
DMAC3_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC3_CHCTRL_n_SWRST);
|
||||
/* Enable DMA transfer */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
|
||||
1,
|
||||
DMAC3_CHCTRL_n_SETEN_SHIFT,
|
||||
DMAC3_CHCTRL_n_SETEN);
|
||||
|
||||
/* ---- Request by software ---- */
|
||||
if (DMAC_REQ_MODE_SOFT == req)
|
||||
{
|
||||
/* DMA transfer Request by software */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
|
||||
1,
|
||||
DMAC3_CHCTRL_n_STG_SHIFT,
|
||||
DMAC3_CHCTRL_n_STG);
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = -1;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_DMAC3_Close
|
||||
* Description : Aborts DMAC channel 3 transfer. Returns the remaining transfer
|
||||
* : byte count at the time of DMA transfer abort to the argument
|
||||
* : *remain.
|
||||
* Arguments : uint32_t * remain : Remaining transfer byte count when
|
||||
* : : DMA transfer is aborted
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_DMAC3_Close (uint32_t * remain)
|
||||
{
|
||||
|
||||
/* ==== Abort transfer ==== */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
|
||||
1,
|
||||
DMAC3_CHCTRL_n_CLREN_SHIFT,
|
||||
DMAC3_CHCTRL_n_CLREN);
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC3_CHSTAT_n_TACT))
|
||||
{
|
||||
/* Loop until transfer is aborted */
|
||||
}
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_EN_SHIFT,
|
||||
DMAC3_CHSTAT_n_EN))
|
||||
{
|
||||
/* Loop until 0 is set in EN before checking the remaining transfer byte count */
|
||||
}
|
||||
/* ==== Obtain remaining transfer byte count ==== */
|
||||
*remain = DMAC3.CRTB_n;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_DMAC3_Load_Set
|
||||
* Description : Sets the transfer source address, transfer destination
|
||||
* : address, and total transfer byte count respectively
|
||||
* : specified by the argument src_addr, dst_addr, and count to
|
||||
* : DMAC channel 3 as DMA transfer information.
|
||||
* : Sets the register set selected by the CHCFG_n register
|
||||
* : RSEL bit from the Next0 or Next1 register set.
|
||||
* : This function should be called when DMA transfer of DMAC
|
||||
* : channel 3 is aboted.
|
||||
* Arguments : uint32_t src_addr : Transfer source address
|
||||
* : uint32_t dst_addr : Transfer destination address
|
||||
* : uint32_t count : Total transfer byte count
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_DMAC3_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
|
||||
{
|
||||
uint8_t reg_set;
|
||||
|
||||
/* Obtain register set in use */
|
||||
reg_set = RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_SR_SHIFT,
|
||||
DMAC3_CHSTAT_n_SR);
|
||||
|
||||
/* ==== Load ==== */
|
||||
if (0 == reg_set)
|
||||
{
|
||||
/* ---- Next0 Register Set ---- */
|
||||
DMAC3.N0SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC3.N0DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC3.N0TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* ---- Next1 Register Set ---- */
|
||||
DMAC3.N1SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC3.N1DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC3.N1TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_DMAC4_PeriReqInit
|
||||
* Description : Sets the register mode for DMA mode and the on-chip peripheral
|
||||
* : module request for transfer request for DMAC channel 2.
|
||||
* : Executes DMAC initial setting using the DMA information
|
||||
* : specified by the argument *trans_info and the enabled/disabled
|
||||
* : continuous transfer specified by the argument continuation.
|
||||
* : Registers DMAC channel 2 interrupt handler function and sets
|
||||
* : the interrupt priority level. Then enables transfer completion
|
||||
* : interrupt.
|
||||
* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
|
||||
* : : register
|
||||
* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
|
||||
* : uint32_t continuation : Set continuous transfer to be valid
|
||||
* : : after DMA transfer has been completed
|
||||
* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
|
||||
* : DMAC_SAMPLE_SINGLE : Do not execute continuous
|
||||
* : : transfer
|
||||
* : uint32_t request_factor : Factor for on-chip peripheral module
|
||||
* : : request
|
||||
* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
|
||||
* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
|
||||
* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
|
||||
* : :
|
||||
* : uint32_t req_direction : Setting value of CHCFG_n register
|
||||
* : : REQD bit
|
||||
*******************************************************************************/
|
||||
void usb1_function_DMAC4_PeriReqInit (const dmac_transinfo_t * trans_info,
|
||||
uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction)
|
||||
{
|
||||
/* ==== Register mode ==== */
|
||||
if (DMAC_MODE_REGISTER == dmamode)
|
||||
{
|
||||
/* ==== Next0 register set ==== */
|
||||
DMAC4.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
|
||||
DMAC4.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
|
||||
DMAC4.N0TB_n = trans_info->count; /* Total transfer byte count */
|
||||
|
||||
/* DAD : Transfer destination address counting direction */
|
||||
/* SAD : Transfer source address counting direction */
|
||||
/* DDS : Transfer destination transfer size */
|
||||
/* SDS : Transfer source transfer size */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
trans_info->daddr_dir,
|
||||
DMAC4_CHCFG_n_DAD_SHIFT,
|
||||
DMAC4_CHCFG_n_DAD);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
trans_info->saddr_dir,
|
||||
DMAC4_CHCFG_n_SAD_SHIFT,
|
||||
DMAC4_CHCFG_n_SAD);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
trans_info->dst_size,
|
||||
DMAC4_CHCFG_n_DDS_SHIFT,
|
||||
DMAC4_CHCFG_n_DDS);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
trans_info->src_size,
|
||||
DMAC4_CHCFG_n_SDS_SHIFT,
|
||||
DMAC4_CHCFG_n_SDS);
|
||||
|
||||
/* DMS : Register mode */
|
||||
/* RSEL : Select Next0 register set */
|
||||
/* SBE : No discharge of buffer data when aborted */
|
||||
/* DEM : No DMA interrupt mask */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_DMS_SHIFT,
|
||||
DMAC4_CHCFG_n_DMS);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_RSEL_SHIFT,
|
||||
DMAC4_CHCFG_n_RSEL);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_SBE_SHIFT,
|
||||
DMAC4_CHCFG_n_SBE);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_DEM_SHIFT,
|
||||
DMAC4_CHCFG_n_DEM);
|
||||
|
||||
/* ---- Continuous transfer ---- */
|
||||
if (DMAC_SAMPLE_CONTINUATION == continuation)
|
||||
{
|
||||
/* REN : Execute continuous transfer */
|
||||
/* RSW : Change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
1,
|
||||
DMAC4_CHCFG_n_REN_SHIFT,
|
||||
DMAC4_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
1,
|
||||
DMAC4_CHCFG_n_RSW_SHIFT,
|
||||
DMAC4_CHCFG_n_RSW);
|
||||
}
|
||||
/* ---- Single transfer ---- */
|
||||
else
|
||||
{
|
||||
/* REN : Do not execute continuous transfer */
|
||||
/* RSW : Do not change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_REN_SHIFT,
|
||||
DMAC4_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_RSW_SHIFT,
|
||||
DMAC4_CHCFG_n_RSW);
|
||||
}
|
||||
|
||||
/* TM : Single transfer */
|
||||
/* SEL : Channel setting */
|
||||
/* HIEN, LOEN : On-chip peripheral module request */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_TM_SHIFT,
|
||||
DMAC4_CHCFG_n_TM);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
4,
|
||||
DMAC4_CHCFG_n_SEL_SHIFT,
|
||||
DMAC4_CHCFG_n_SEL);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
1,
|
||||
DMAC4_CHCFG_n_HIEN_SHIFT,
|
||||
DMAC4_CHCFG_n_HIEN);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_LOEN_SHIFT,
|
||||
DMAC4_CHCFG_n_LOEN);
|
||||
|
||||
/* ---- Set factor by specified on-chip peripheral module request ---- */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
|
||||
DMAC4_CHCFG_n_AM_SHIFT,
|
||||
DMAC4_CHCFG_n_AM);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
|
||||
DMAC4_CHCFG_n_LVL_SHIFT,
|
||||
DMAC4_CHCFG_n_LVL);
|
||||
if (usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
|
||||
DMAC4_CHCFG_n_REQD_SHIFT,
|
||||
DMAC4_CHCFG_n_REQD);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
req_direction,
|
||||
DMAC4_CHCFG_n_REQD_SHIFT,
|
||||
DMAC4_CHCFG_n_REQD);
|
||||
}
|
||||
RZA_IO_RegWrite_32(&DMAC45.DMARS,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
|
||||
DMAC45_DMARS_CH4_RID_SHIFT,
|
||||
DMAC45_DMARS_CH4_RID);
|
||||
RZA_IO_RegWrite_32(&DMAC45.DMARS,
|
||||
usb1_function_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
|
||||
DMAC45_DMARS_CH4_MID_SHIFT,
|
||||
DMAC45_DMARS_CH4_MID);
|
||||
|
||||
/* PR : Round robin mode */
|
||||
RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
|
||||
1,
|
||||
DMAC07_DCTRL_0_7_PR_SHIFT,
|
||||
DMAC07_DCTRL_0_7_PR);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_DMAC4_Open
|
||||
* Description : Enables DMAC channel 4 transfer.
|
||||
* Arguments : uint32_t req : DMAC request mode
|
||||
* Return Value : 0 : Succeeded in enabling DMA transfer
|
||||
* : -1 : Failed to enable DMA transfer (due to DMA operation)
|
||||
*******************************************************************************/
|
||||
int32_t usb1_function_DMAC4_Open (uint32_t req)
|
||||
{
|
||||
int32_t ret;
|
||||
volatile uint8_t dummy;
|
||||
|
||||
/* Transferable? */
|
||||
if ((0 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_EN_SHIFT,
|
||||
DMAC4_CHSTAT_n_EN)) &&
|
||||
(0 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC4_CHSTAT_n_TACT)))
|
||||
{
|
||||
/* Clear Channel Status Register */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
|
||||
1,
|
||||
DMAC4_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC4_CHCTRL_n_SWRST);
|
||||
dummy = RZA_IO_RegRead_32(&DMAC4.CHCTRL_n,
|
||||
DMAC4_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC4_CHCTRL_n_SWRST);
|
||||
/* Enable DMA transfer */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
|
||||
1,
|
||||
DMAC4_CHCTRL_n_SETEN_SHIFT,
|
||||
DMAC4_CHCTRL_n_SETEN);
|
||||
|
||||
/* ---- Request by software ---- */
|
||||
if (DMAC_REQ_MODE_SOFT == req)
|
||||
{
|
||||
/* DMA transfer Request by software */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
|
||||
1,
|
||||
DMAC4_CHCTRL_n_STG_SHIFT,
|
||||
DMAC4_CHCTRL_n_STG);
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = -1;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_DMAC4_Close
|
||||
* Description : Aborts DMAC channel 4 transfer. Returns the remaining transfer
|
||||
* : byte count at the time of DMA transfer abort to the argument
|
||||
* : *remain.
|
||||
* Arguments : uint32_t * remain : Remaining transfer byte count when
|
||||
* : : DMA transfer is aborted
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_DMAC4_Close (uint32_t * remain)
|
||||
{
|
||||
|
||||
/* ==== Abort transfer ==== */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
|
||||
1,
|
||||
DMAC4_CHCTRL_n_CLREN_SHIFT,
|
||||
DMAC4_CHCTRL_n_CLREN);
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC4_CHSTAT_n_TACT))
|
||||
{
|
||||
/* Loop until transfer is aborted */
|
||||
}
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_EN_SHIFT,
|
||||
DMAC4_CHSTAT_n_EN))
|
||||
{
|
||||
/* Loop until 0 is set in EN before checking the remaining transfer byte count */
|
||||
}
|
||||
/* ==== Obtain remaining transfer byte count ==== */
|
||||
*remain = DMAC4.CRTB_n;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_DMAC4_Load_Set
|
||||
* Description : Sets the transfer source address, transfer destination
|
||||
* : address, and total transfer byte count respectively
|
||||
* : specified by the argument src_addr, dst_addr, and count to
|
||||
* : DMAC channel 4 as DMA transfer information.
|
||||
* : Sets the register set selected by the CHCFG_n register
|
||||
* : RSEL bit from the Next0 or Next1 register set.
|
||||
* : This function should be called when DMA transfer of DMAC
|
||||
* : channel 4 is aboted.
|
||||
* Arguments : uint32_t src_addr : Transfer source address
|
||||
* : uint32_t dst_addr : Transfer destination address
|
||||
* : uint32_t count : Total transfer byte count
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_function_DMAC4_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
|
||||
{
|
||||
uint8_t reg_set;
|
||||
|
||||
/* Obtain register set in use */
|
||||
reg_set = RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_SR_SHIFT,
|
||||
DMAC4_CHSTAT_n_SR);
|
||||
|
||||
/* ==== Load ==== */
|
||||
if (0 == reg_set)
|
||||
{
|
||||
/* ---- Next0 Register Set ---- */
|
||||
DMAC4.N0SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC4.N0DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC4.N0TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* ---- Next1 Register Set ---- */
|
||||
DMAC4.N1SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC4.N1DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC4.N1TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,762 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_function_userdef.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include <stdio.h>
|
||||
#include "r_typedefs.h"
|
||||
#include "iodefine.h"
|
||||
#include "devdrv_usb_function_api.h"
|
||||
#include "usb1_function_dmacdrv.h" /* common DMAC driver for USB */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
#define DUMMY_ACCESS OSTM0CNT
|
||||
|
||||
/* #define CACHE_WRITEBACK */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
extern int32_t io_cwb(unsigned long start, unsigned long end);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb1_function_enable_dmac0(uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
|
||||
static void usb1_function_enable_dmac1(uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
|
||||
static void Userdef_USB_usb1_function_delay_10us_2(void);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_d0fifo_dmaintid
|
||||
* Description : get D0FIFO DMA Interrupt ID
|
||||
* Arguments : none
|
||||
* Return Value : D0FIFO DMA Interrupt ID
|
||||
*******************************************************************************/
|
||||
IRQn_Type Userdef_USB_usb1_function_d0fifo_dmaintid (void)
|
||||
{
|
||||
#if 0
|
||||
return DMAINT1_IRQn;
|
||||
#else
|
||||
return 0xFFFF;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_d1fifo_dmaintid
|
||||
* Description : get D1FIFO DMA Interrupt ID
|
||||
* Arguments : none
|
||||
* Return Value : D1FIFO DMA Interrupt ID
|
||||
*******************************************************************************/
|
||||
IRQn_Type Userdef_USB_usb1_function_d1fifo_dmaintid (void)
|
||||
{
|
||||
#if 0
|
||||
return DMAINT1_IRQn;
|
||||
#else
|
||||
return 0xFFFF;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_attach
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_function_attach (void)
|
||||
{
|
||||
printf("\n");
|
||||
printf("channel 1 attach device\n");
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_detach
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_function_detach (void)
|
||||
{
|
||||
printf("\n");
|
||||
printf("channel 1 detach device\n");
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_delay_1ms
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_function_delay_1ms (void)
|
||||
{
|
||||
volatile int i;
|
||||
volatile unsigned long tmp;
|
||||
|
||||
/*
|
||||
* Wait 1ms (Please change for your MCU).
|
||||
*/
|
||||
for (i = 0; i < 1440; ++i)
|
||||
{
|
||||
tmp = DUMMY_ACCESS;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_delay_xms
|
||||
* Description : Wait for the software in the period of time specified by the
|
||||
* : argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : uint32_t msec ; Wait Time (msec)
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_function_delay_xms (uint32_t msec)
|
||||
{
|
||||
volatile unsigned short i;
|
||||
|
||||
for (i = 0; i < msec; ++i)
|
||||
{
|
||||
Userdef_USB_usb1_function_delay_1ms();
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_delay_10us
|
||||
* Description : Waits for software for the period specified by the argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : uint32_t usec ; Wait Time(x 10usec)
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_function_delay_10us (uint32_t usec)
|
||||
{
|
||||
volatile int i;
|
||||
|
||||
/* Wait 10us (Please change for your MCU) */
|
||||
for (i = 0; i < usec; ++i)
|
||||
{
|
||||
Userdef_USB_usb1_function_delay_10us_2();
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_delay_10us_2
|
||||
* Description : Waits for software for the period specified by the argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void Userdef_USB_usb1_function_delay_10us_2 (void)
|
||||
{
|
||||
volatile int i;
|
||||
volatile unsigned long tmp;
|
||||
|
||||
/* Wait 1us (Please change for your MCU) */
|
||||
for (i = 0; i < 14; ++i)
|
||||
{
|
||||
tmp = DUMMY_ACCESS;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_delay_500ns
|
||||
* Description : Wait for software for 500ns.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_function_delay_500ns (void)
|
||||
{
|
||||
volatile int i;
|
||||
volatile unsigned long tmp;
|
||||
|
||||
/* Wait 500ns (Please change for your MCU) */
|
||||
/* Wait 500ns I clock 266MHz */
|
||||
tmp = DUMMY_ACCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_start_dma
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* : Set DMAC register by this function to enable DMA transfer.
|
||||
* : After executing this function, USB module is set to start DMA
|
||||
* : transfer. DMA transfer should not wait for DMA transfer complete.
|
||||
* Arguments : USB_FUNCTION_DMA_t *dma : DMA parameter
|
||||
* : typedef struct{
|
||||
* : uint32_t fifo; FIFO for using
|
||||
* : uint32_t buffer; Start address of transfer source/destination
|
||||
* : uint32_t bytes; Transfer size(Byte)
|
||||
* : uint32_t dir; Transfer direction(0:Buffer->FIFO, 1:FIFO->Buffer)
|
||||
* : uint32_t size; DMA transfer size
|
||||
* : } USB_FUNCTION_DMA_t;
|
||||
* : uint16_t dfacc ; 0 : cycle steal mode
|
||||
* : 1 : 16byte continuous mode
|
||||
* : 2 : 32byte continuous mode
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_function_start_dma (USB_FUNCTION_DMA_t * dma, uint16_t dfacc)
|
||||
{
|
||||
uint32_t trncount;
|
||||
uint32_t src;
|
||||
uint32_t dst;
|
||||
uint32_t size;
|
||||
uint32_t dir;
|
||||
#ifdef CACHE_WRITEBACK
|
||||
uint32_t ptr;
|
||||
#endif
|
||||
|
||||
trncount = dma->bytes;
|
||||
dir = dma->dir;
|
||||
|
||||
if (dir == USB_FUNCTION_FIFO2BUF)
|
||||
{
|
||||
/* DxFIFO determination */
|
||||
dst = dma->buffer;
|
||||
#ifndef __USB_FUNCTION_DF_ACC_ENABLE__
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
size = dma->size;
|
||||
|
||||
if (size == 0)
|
||||
{
|
||||
src += 3; /* byte access */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
src += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
#else
|
||||
size = dma->size;
|
||||
|
||||
if (size == 2)
|
||||
{
|
||||
/* 32bit access */
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
/* 16bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
src += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 8bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
src += 3; /* byte access */
|
||||
}
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/* DxFIFO determination */
|
||||
src = dma->buffer;
|
||||
#ifndef __USB_FUNCTION_DF_ACC_ENABLE__
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
size = dma->size;
|
||||
|
||||
if (size == 0)
|
||||
{
|
||||
dst += 3; /* byte access */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
dst += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
#else
|
||||
size = dma->size;
|
||||
|
||||
if (size == 2)
|
||||
{
|
||||
/* 32bit access */
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
/* 16bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
dst += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 8bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
dst += 3; /* byte access */
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CACHE_WRITEBACK
|
||||
ptr = (uint32_t)dma->buffer;
|
||||
|
||||
if ((ptr & 0x20000000ul) == 0)
|
||||
{
|
||||
io_cwb((uint32_t)ptr, (uint32_t)(ptr) + trncount);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dma->fifo == USB_FUNCTION_D0FIFO_DMA)
|
||||
{
|
||||
usb1_function_enable_dmac0(src, dst, trncount, size, dir, dma->fifo, dfacc);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_function_enable_dmac1(src, dst, trncount, size, dir, dma->fifo, dfacc);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_enable_dmac0
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* Arguments : uint32_t src : src address
|
||||
* : uint32_t dst : dst address
|
||||
* : uint32_t count : transfer byte
|
||||
* : uint32_t size : transfer size
|
||||
* : uint32_t dir : direction
|
||||
* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
|
||||
* : uint16_t dfacc : 0 : normal access
|
||||
* : : 1 : 16byte access
|
||||
* : : 2 : 32byte access
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_function_enable_dmac0 (uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
|
||||
{
|
||||
dmac_transinfo_t trans_info;
|
||||
uint32_t request_factor = 0;
|
||||
int32_t ret;
|
||||
|
||||
/* ==== Variable setting for DMAC initialization ==== */
|
||||
trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
|
||||
trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
|
||||
trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
|
||||
#ifndef __USB_FUNCTION_DF_ACC_ENABLE__
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("size error!!\n");
|
||||
}
|
||||
#else
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("size error!!\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dir == USB_FUNCTION_FIFO2BUF)
|
||||
{
|
||||
request_factor =DMAC_REQ_USB1_DMA0_RX; /* USB_0 channel 0 receive FIFO full */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else if (dir == USB_FUNCTION_BUF2FIFO)
|
||||
{
|
||||
request_factor =DMAC_REQ_USB1_DMA0_TX; /* USB_0 channel 0 receive FIFO empty */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
/* ==== DMAC initialization ==== */
|
||||
usb1_function_DMAC3_PeriReqInit((const dmac_transinfo_t *)&trans_info,
|
||||
DMAC_MODE_REGISTER,
|
||||
DMAC_SAMPLE_SINGLE,
|
||||
request_factor,
|
||||
0); /* Don't care DMAC_REQ_REQD is setting in
|
||||
usb1_function_DMAC3_PeriReqInit() */
|
||||
|
||||
/* ==== DMAC startup ==== */
|
||||
ret = usb1_function_DMAC3_Open(DMAC_REQ_MODE_PERI);
|
||||
if (ret != 0)
|
||||
{
|
||||
printf("DMAC3 Open error!!\n");
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_function_enable_dmac1
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* Arguments : uint32_t src : src address
|
||||
* : uint32_t dst : dst address
|
||||
* : uint32_t count : transfer byte
|
||||
* : uint32_t size : transfer size
|
||||
* : uint32_t dir : direction
|
||||
* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
|
||||
* : uint16_t dfacc : 0 : normal access
|
||||
* : : 1 : 16byte access
|
||||
* : : 2 : 32byte access
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_function_enable_dmac1 (uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
|
||||
{
|
||||
dmac_transinfo_t trans_info;
|
||||
uint32_t request_factor = 0;
|
||||
int32_t ret;
|
||||
|
||||
/* ==== Variable setting for DMAC initialization ==== */
|
||||
trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
|
||||
trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
|
||||
trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
|
||||
#ifndef __USB_FUNCTION_DF_ACC_ENABLE__
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("size error!!\n");
|
||||
}
|
||||
#else
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("size error!!\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dir == USB_FUNCTION_FIFO2BUF)
|
||||
{
|
||||
request_factor =DMAC_REQ_USB1_DMA1_RX; /* USB_0 channel 0 receive FIFO full */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else if (dir == USB_FUNCTION_BUF2FIFO)
|
||||
{
|
||||
request_factor =DMAC_REQ_USB1_DMA1_TX; /* USB_0 channel 0 receive FIFO empty */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
/* ==== DMAC initialization ==== */
|
||||
usb1_function_DMAC4_PeriReqInit((const dmac_transinfo_t *)&trans_info,
|
||||
DMAC_MODE_REGISTER,
|
||||
DMAC_SAMPLE_SINGLE,
|
||||
request_factor,
|
||||
0); /* Don't care DMAC_REQ_REQD is setting in
|
||||
usb1_function_DMAC4_PeriReqInit() */
|
||||
|
||||
/* ==== DMAC startup ==== */
|
||||
ret = usb1_function_DMAC4_Open(DMAC_REQ_MODE_PERI);
|
||||
if (ret != 0)
|
||||
{
|
||||
printf("DMAC4 Open error!!\n");
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_stop_dma0
|
||||
* Description : Disables DMA transfer.
|
||||
* : This function should be executed to DMAC executed at the time
|
||||
* : of specification of D0_FIF0_DMA in dma->fifo.
|
||||
* Arguments : none
|
||||
* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
|
||||
* : regarding to the bus width.
|
||||
*******************************************************************************/
|
||||
uint32_t Userdef_USB_usb1_function_stop_dma0 (void)
|
||||
{
|
||||
uint32_t remain;
|
||||
|
||||
/* ==== DMAC release ==== */
|
||||
usb1_function_DMAC3_Close(&remain);
|
||||
|
||||
return remain;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_function_stop_dma1
|
||||
* Description : Disables DMA transfer.
|
||||
* : This function should be executed to DMAC executed at the time
|
||||
* : of specification of D1_FIF0_DMA in dma->fifo.
|
||||
* Arguments : none
|
||||
* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
|
||||
* : regarding to the bus width.
|
||||
*******************************************************************************/
|
||||
uint32_t Userdef_USB_usb1_function_stop_dma1 (void)
|
||||
{
|
||||
uint32_t remain;
|
||||
|
||||
/* ==== DMAC release ==== */
|
||||
usb1_function_DMAC4_Close(&remain);
|
||||
|
||||
return remain;
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,173 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2014 - 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef USB_FUNCTION_SETTING_H
|
||||
#define USB_FUNCTION_SETTING_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define USB_FUNCTION_CH 0
|
||||
#define USB_FUNCTION_HISPEED 1
|
||||
|
||||
#if (USB_FUNCTION_CH == 0)
|
||||
#include "usb0_function.h"
|
||||
#define USB20X USB200
|
||||
#define USBIX_IRQn USBI0_IRQn
|
||||
#define g_usbx_function_bit_set g_usb0_function_bit_set
|
||||
#define g_usbx_function_PipeDataSize g_usb0_function_PipeDataSize
|
||||
#define g_usbx_function_data_count g_usb0_function_data_count
|
||||
#define g_usbx_function_PipeTbl g_usb0_function_PipeTbl
|
||||
#define g_usbx_function_DmaStatus g_usb0_function_DmaStatus
|
||||
#define g_usbx_function_pipecfg g_usb0_function_pipecfg
|
||||
#define g_usbx_function_pipe_status g_usb0_function_pipe_status
|
||||
#define g_usbx_function_data_pointer g_usb0_function_data_pointer
|
||||
#define g_usbx_function_pipebuf g_usb0_function_pipebuf
|
||||
#define g_usbx_function_pipemaxp g_usb0_function_pipemaxp
|
||||
#define g_usbx_function_pipeperi g_usb0_function_pipeperi
|
||||
#define g_usbx_function_TestModeFlag g_usb0_function_TestModeFlag
|
||||
#define usbx_function_BRDYInterruptPIPE0 usb0_function_BRDYInterruptPIPE0
|
||||
#define usbx_function_BRDYInterrupt usb0_function_BRDYInterrupt
|
||||
#define usbx_function_NRDYInterruptPIPE0 usb0_function_NRDYInterruptPIPE0
|
||||
#define usbx_function_NRDYInterrupt usb0_function_NRDYInterrupt
|
||||
#define usbx_function_BEMPInterruptPIPE0 usb0_function_BEMPInterruptPIPE0
|
||||
#define usbx_function_BEMPInterrupt usb0_function_BEMPInterrupt
|
||||
#define usbx_function_read_buffer_c usb0_function_read_buffer_c
|
||||
#define usbx_function_set_pid_buf usb0_function_set_pid_buf
|
||||
#define usbx_function_disable_brdy_int usb0_function_disable_brdy_int
|
||||
#define usbx_function_set_pid_stall usb0_function_set_pid_stall
|
||||
#define usbx_function_dma_interrupt_d0fifo usb0_function_dma_interrupt_d0fifo
|
||||
#define usbx_function_read_dma usb0_function_read_dma
|
||||
#define usbx_function_dma_interrupt_d1fifo usb0_function_dma_interrupt_d1fifo
|
||||
#define usbx_function_write_buffer usb0_function_write_buffer
|
||||
#define usbx_function_set_pid_nak usb0_function_set_pid_nak
|
||||
#define usbx_function_get_mbw usb0_function_get_mbw
|
||||
#define usbx_function_set_curpipe usb0_function_set_curpipe
|
||||
#define usbx_function_aclrm usb0_function_aclrm
|
||||
#define usbx_function_enable_nrdy_int usb0_function_enable_nrdy_int
|
||||
#define usbx_function_enable_brdy_int usb0_function_enable_brdy_int
|
||||
#define usbx_function_get_pid usb0_function_get_pid
|
||||
#define usbx_function_get_inbuf usb0_function_get_inbuf
|
||||
#define usbx_function_disable_bemp_int usb0_function_disable_bemp_int
|
||||
#define usbx_function_EpToPipe usb0_function_EpToPipe
|
||||
#define usbx_function_clear_pipe_tbl usb0_function_clear_pipe_tbl
|
||||
#define Userdef_USB_usbx_function_d0fifo_dmaintid Userdef_USB_usb0_function_d0fifo_dmaintid
|
||||
#define Userdef_USB_usbx_function_d1fifo_dmaintid Userdef_USB_usb0_function_d1fifo_dmaintid
|
||||
#define usbx_function_reset_module usb0_function_reset_module
|
||||
#define usbx_function_init_status usb0_function_init_status
|
||||
#define usbx_function_InitModule usb0_function_InitModule
|
||||
#define usbx_function_clear_alt usb0_function_clear_alt
|
||||
#define usbx_function_set_sqclr usb0_function_set_sqclr
|
||||
#define usbx_api_function_CtrlWriteStart usb0_api_function_CtrlWriteStart
|
||||
#define usbx_api_function_CtrlReadStart usb0_api_function_CtrlReadStart
|
||||
#define usbx_function_write_buffer_c usb0_function_write_buffer_c
|
||||
#define usbx_api_function_check_pipe_status usb0_api_function_check_pipe_status
|
||||
#define usbx_api_function_set_pid_nak usb0_api_function_set_pid_nak
|
||||
#define usbx_api_function_clear_pipe_status usb0_api_function_clear_pipe_status
|
||||
#define usbx_api_function_start_receive_transfer usb0_api_function_start_receive_transfer
|
||||
#define usbx_function_read_buffer usb0_function_read_buffer
|
||||
#define usbx_api_function_start_send_transfer usb0_api_function_start_send_transfer
|
||||
#define usbx_function_stop_transfer usb0_function_stop_transfer
|
||||
#define usbx_function_clear_pid_stall usb0_function_clear_pid_stall
|
||||
#define usbx_function_CheckVBUStaus usb0_function_CheckVBUStaus
|
||||
#define usbx_function_USB_FUNCTION_Attach usb0_function_USB_FUNCTION_Attach
|
||||
#define usbx_function_USB_FUNCTION_Detach usb0_function_USB_FUNCTION_Detach
|
||||
#define usbx_function_is_hispeed usb0_function_is_hispeed
|
||||
#define usbx_function_ResetDescriptor usb0_function_ResetDescriptor
|
||||
#define usbx_function_USB_FUNCTION_Suspend usb0_function_USB_FUNCTION_Suspend
|
||||
#define usbx_function_USB_FUNCTION_TestMode usb0_function_USB_FUNCTION_TestMode
|
||||
#else
|
||||
#include "usb1_function.h"
|
||||
#define USB20X USB201
|
||||
#define USBIX_IRQn USBI1_IRQn
|
||||
#define g_usbx_function_bit_set g_usb1_function_bit_set
|
||||
#define g_usbx_function_PipeDataSize g_usb1_function_PipeDataSize
|
||||
#define g_usbx_function_data_count g_usb1_function_data_count
|
||||
#define g_usbx_function_PipeTbl g_usb1_function_PipeTbl
|
||||
#define g_usbx_function_DmaStatus g_usb1_function_DmaStatus
|
||||
#define g_usbx_function_pipecfg g_usb1_function_pipecfg
|
||||
#define g_usbx_function_pipe_status g_usb1_function_pipe_status
|
||||
#define g_usbx_function_data_pointer g_usb1_function_data_pointer
|
||||
#define g_usbx_function_pipebuf g_usb1_function_pipebuf
|
||||
#define g_usbx_function_pipemaxp g_usb1_function_pipemaxp
|
||||
#define g_usbx_function_pipeperi g_usb1_function_pipeperi
|
||||
#define g_usbx_function_TestModeFlag g_usb1_function_TestModeFlag
|
||||
#define usbx_function_BRDYInterruptPIPE0 usb1_function_BRDYInterruptPIPE0
|
||||
#define usbx_function_BRDYInterrupt usb1_function_BRDYInterrupt
|
||||
#define usbx_function_NRDYInterruptPIPE0 usb1_function_NRDYInterruptPIPE0
|
||||
#define usbx_function_NRDYInterrupt usb1_function_NRDYInterrupt
|
||||
#define usbx_function_BEMPInterruptPIPE0 usb1_function_BEMPInterruptPIPE0
|
||||
#define usbx_function_BEMPInterrupt usb1_function_BEMPInterrupt
|
||||
#define usbx_function_read_buffer_c usb1_function_read_buffer_c
|
||||
#define usbx_function_set_pid_buf usb1_function_set_pid_buf
|
||||
#define usbx_function_disable_brdy_int usb1_function_disable_brdy_int
|
||||
#define usbx_function_set_pid_stall usb1_function_set_pid_stall
|
||||
#define usbx_function_dma_interrupt_d0fifo usb1_function_dma_interrupt_d0fifo
|
||||
#define usbx_function_read_dma usb1_function_read_dma
|
||||
#define usbx_function_dma_interrupt_d1fifo usb1_function_dma_interrupt_d1fifo
|
||||
#define usbx_function_write_buffer usb1_function_write_buffer
|
||||
#define usbx_function_set_pid_nak usb1_function_set_pid_nak
|
||||
#define usbx_function_get_mbw usb1_function_get_mbw
|
||||
#define usbx_function_set_curpipe usb1_function_set_curpipe
|
||||
#define usbx_function_aclrm usb1_function_aclrm
|
||||
#define usbx_function_enable_nrdy_int usb1_function_enable_nrdy_int
|
||||
#define usbx_function_enable_brdy_int usb1_function_enable_brdy_int
|
||||
#define usbx_function_get_pid usb1_function_get_pid
|
||||
#define usbx_function_get_inbuf usb1_function_get_inbuf
|
||||
#define usbx_function_disable_bemp_int usb1_function_disable_bemp_int
|
||||
#define usbx_function_EpToPipe usb1_function_EpToPipe
|
||||
#define usbx_function_clear_pipe_tbl usb1_function_clear_pipe_tbl
|
||||
#define Userdef_USB_usbx_function_d0fifo_dmaintid Userdef_USB_usb1_function_d0fifo_dmaintid
|
||||
#define Userdef_USB_usbx_function_d1fifo_dmaintid Userdef_USB_usb1_function_d1fifo_dmaintid
|
||||
#define usbx_function_reset_module usb1_function_reset_module
|
||||
#define usbx_function_init_status usb1_function_init_status
|
||||
#define usbx_function_InitModule usb1_function_InitModule
|
||||
#define usbx_function_clear_alt usb1_function_clear_alt
|
||||
#define usbx_function_set_sqclr usb1_function_set_sqclr
|
||||
#define usbx_api_function_CtrlWriteStart usb1_api_function_CtrlWriteStart
|
||||
#define usbx_api_function_CtrlReadStart usb1_api_function_CtrlReadStart
|
||||
#define usbx_function_write_buffer_c usb1_function_write_buffer_c
|
||||
#define usbx_api_function_check_pipe_status usb1_api_function_check_pipe_status
|
||||
#define usbx_api_function_set_pid_nak usb1_api_function_set_pid_nak
|
||||
#define usbx_api_function_clear_pipe_status usb1_api_function_clear_pipe_status
|
||||
#define usbx_api_function_start_receive_transfer usb1_api_function_start_receive_transfer
|
||||
#define usbx_function_read_buffer usb1_function_read_buffer
|
||||
#define usbx_api_function_start_send_transfer usb1_api_function_start_send_transfer
|
||||
#define usbx_function_stop_transfer usb1_function_stop_transfer
|
||||
#define usbx_function_clear_pid_stall usb1_function_clear_pid_stall
|
||||
#define usbx_function_CheckVBUStaus usb1_function_CheckVBUStaus
|
||||
#define usbx_function_USB_FUNCTION_Attach usb1_function_USB_FUNCTION_Attach
|
||||
#define usbx_function_USB_FUNCTION_Detach usb1_function_USB_FUNCTION_Detach
|
||||
#define usbx_function_is_hispeed usb1_function_is_hispeed
|
||||
#define usbx_function_ResetDescriptor usb1_function_ResetDescriptor
|
||||
#define usbx_function_USB_FUNCTION_Suspend usb1_function_USB_FUNCTION_Suspend
|
||||
#define usbx_function_USB_FUNCTION_TestMode usb1_function_USB_FUNCTION_TestMode
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* USB_FUNCTION_SETTING_H */
|
||||
|
|
@ -81,12 +81,18 @@
|
|||
/* Bulk endpoints */
|
||||
#define EPBULK_OUT (EP2OUT)
|
||||
#define EPBULK_IN (EP2IN)
|
||||
#define EPBULK_OUT_callback EP2_OUT_callback
|
||||
#define EPBULK_IN_callback EP2_IN_callback
|
||||
/* Interrupt endpoints */
|
||||
#define EPINT_OUT (EP1OUT)
|
||||
#define EPINT_IN (EP1IN)
|
||||
#define EPINT_OUT_callback EP1_OUT_callback
|
||||
#define EPINT_IN_callback EP1_IN_callback
|
||||
/* Isochronous endpoints */
|
||||
#define EPISO_OUT (EP3OUT)
|
||||
#define EPISO_IN (EP3IN)
|
||||
#define EPISO_OUT_callback EP3_OUT_callback
|
||||
#define EPISO_IN_callback EP3_IN_callback
|
||||
|
||||
#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2)
|
||||
#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1)
|
||||
|
|
|
|||
|
|
@ -53,12 +53,18 @@
|
|||
/* Bulk endpoint */
|
||||
#define EPBULK_OUT (EP2OUT)
|
||||
#define EPBULK_IN (EP2IN)
|
||||
#define EPBULK_OUT_callback EP2_OUT_callback
|
||||
#define EPBULK_IN_callback EP2_IN_callback
|
||||
/* Interrupt endpoint */
|
||||
#define EPINT_OUT (EP1OUT)
|
||||
#define EPINT_IN (EP1IN)
|
||||
#define EPINT_OUT_callback EP1_OUT_callback
|
||||
#define EPINT_IN_callback EP1_IN_callback
|
||||
/* Isochronous endpoint */
|
||||
#define EPISO_OUT (EP3OUT)
|
||||
#define EPISO_IN (EP3IN)
|
||||
#define EPISO_OUT_callback EP3_OUT_callback
|
||||
#define EPISO_IN_callback EP3_IN_callback
|
||||
|
||||
#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2)
|
||||
#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1)
|
||||
|
|
|
|||
|
|
@ -81,12 +81,18 @@
|
|||
/* Bulk endpoints */
|
||||
#define EPBULK_OUT (EP2OUT)
|
||||
#define EPBULK_IN (EP2IN)
|
||||
#define EPBULK_OUT_callback EP2_OUT_callback
|
||||
#define EPBULK_IN_callback EP2_IN_callback
|
||||
/* Interrupt endpoints */
|
||||
#define EPINT_OUT (EP1OUT)
|
||||
#define EPINT_IN (EP1IN)
|
||||
#define EPINT_OUT_callback EP1_OUT_callback
|
||||
#define EPINT_IN_callback EP1_IN_callback
|
||||
/* Isochronous endpoints */
|
||||
#define EPISO_OUT (EP3OUT)
|
||||
#define EPISO_IN (EP3IN)
|
||||
#define EPISO_OUT_callback EP3_OUT_callback
|
||||
#define EPISO_IN_callback EP3_IN_callback
|
||||
|
||||
#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2)
|
||||
#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1)
|
||||
|
|
|
|||
|
|
@ -65,12 +65,18 @@
|
|||
/* Bulk endpoints */
|
||||
#define EPBULK_OUT (EP2OUT)
|
||||
#define EPBULK_IN (EP2IN)
|
||||
#define EPBULK_OUT_callback EP2_OUT_callback
|
||||
#define EPBULK_IN_callback EP2_IN_callback
|
||||
/* Interrupt endpoints */
|
||||
#define EPINT_OUT (EP1OUT)
|
||||
#define EPINT_IN (EP1IN)
|
||||
#define EPINT_OUT_callback EP1_OUT_callback
|
||||
#define EPINT_IN_callback EP1_IN_callback
|
||||
/* Isochronous endpoints */
|
||||
#define EPISO_OUT (EP3OUT)
|
||||
#define EPISO_IN (EP3IN)
|
||||
#define EPISO_OUT_callback EP3_OUT_callback
|
||||
#define EPISO_IN_callback EP3_IN_callback
|
||||
|
||||
#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2)
|
||||
#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1)
|
||||
|
|
|
|||
|
|
@ -49,12 +49,18 @@
|
|||
/* Bulk endpoint */
|
||||
#define EPBULK_OUT (EP2OUT)
|
||||
#define EPBULK_IN (EP2IN)
|
||||
#define EPBULK_OUT_callback EP2_OUT_callback
|
||||
#define EPBULK_IN_callback EP2_IN_callback
|
||||
/* Interrupt endpoint */
|
||||
#define EPINT_OUT (EP1OUT)
|
||||
#define EPINT_IN (EP1IN)
|
||||
#define EPINT_OUT_callback EP1_OUT_callback
|
||||
#define EPINT_IN_callback EP1_IN_callback
|
||||
/* Isochronous endpoint */
|
||||
#define EPISO_OUT (EP3OUT)
|
||||
#define EPISO_IN (EP3IN)
|
||||
#define EPISO_OUT_callback EP3_OUT_callback
|
||||
#define EPISO_IN_callback EP3_IN_callback
|
||||
|
||||
#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2)
|
||||
#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1)
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -420,7 +420,7 @@ uint8_t * USBKeyboard::reportDesc() {
|
|||
}
|
||||
|
||||
|
||||
bool USBKeyboard::EP1_OUT_callback() {
|
||||
bool USBKeyboard::EPINT_OUT_callback() {
|
||||
uint32_t bytesRead = 0;
|
||||
uint8_t led[65];
|
||||
USBDevice::readEP(EPINT_OUT, led, &bytesRead, MAX_HID_REPORT_SIZE);
|
||||
|
|
|
|||
|
|
@ -150,7 +150,7 @@ public:
|
|||
*
|
||||
* @returns if handle by subclass, return true
|
||||
*/
|
||||
virtual bool EP1_OUT_callback();
|
||||
virtual bool EPINT_OUT_callback();
|
||||
|
||||
/**
|
||||
* Read status of lock keys. Useful to switch-on/off leds according to key pressed. Only the first three bits of the result is important:
|
||||
|
|
|
|||
|
|
@ -548,7 +548,7 @@ uint8_t * USBMouseKeyboard::reportDesc() {
|
|||
return NULL;
|
||||
}
|
||||
|
||||
bool USBMouseKeyboard::EP1_OUT_callback() {
|
||||
bool USBMouseKeyboard::EPINT_OUT_callback() {
|
||||
uint32_t bytesRead = 0;
|
||||
uint8_t led[65];
|
||||
USBDevice::readEP(EPINT_OUT, led, &bytesRead, MAX_HID_REPORT_SIZE);
|
||||
|
|
|
|||
|
|
@ -202,7 +202,7 @@ class USBMouseKeyboard: public USBHID, public Stream
|
|||
*
|
||||
* @returns if handle by subclass, return true
|
||||
*/
|
||||
virtual bool EP1_OUT_callback();
|
||||
virtual bool EPINT_OUT_callback();
|
||||
|
||||
|
||||
private:
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@ void USBMIDI::attach(void (*fptr)(MIDIMessage)) {
|
|||
}
|
||||
|
||||
|
||||
bool USBMIDI::EP2_OUT_callback() {
|
||||
bool USBMIDI::EPBULK_OUT_callback() {
|
||||
uint8_t buf[64];
|
||||
uint32_t len;
|
||||
readEP(EPBULK_OUT, buf, &len, 64);
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ public:
|
|||
|
||||
|
||||
protected:
|
||||
virtual bool EP2_OUT_callback();
|
||||
virtual bool EPBULK_OUT_callback();
|
||||
virtual bool USBCallback_setConfiguration(uint8_t configuration);
|
||||
/*
|
||||
* Get string product descriptor
|
||||
|
|
|
|||
|
|
@ -147,7 +147,7 @@ void USBMSD::reset() {
|
|||
|
||||
|
||||
// Called in ISR context called when a data is received
|
||||
bool USBMSD::EP2_OUT_callback() {
|
||||
bool USBMSD::EPBULK_OUT_callback() {
|
||||
uint32_t size = 0;
|
||||
uint8_t buf[MAX_PACKET_SIZE_EPBULK];
|
||||
readEP(EPBULK_OUT, buf, &size, MAX_PACKET_SIZE_EPBULK);
|
||||
|
|
@ -184,7 +184,7 @@ bool USBMSD::EP2_OUT_callback() {
|
|||
}
|
||||
|
||||
// Called in ISR context when a data has been transferred
|
||||
bool USBMSD::EP2_IN_callback() {
|
||||
bool USBMSD::EPBULK_IN_callback() {
|
||||
switch (stage) {
|
||||
|
||||
// the device has to send data to the host
|
||||
|
|
|
|||
|
|
@ -158,12 +158,12 @@ protected:
|
|||
/*
|
||||
* Callback called when a packet is received
|
||||
*/
|
||||
virtual bool EP2_OUT_callback();
|
||||
virtual bool EPBULK_OUT_callback();
|
||||
|
||||
/*
|
||||
* Callback called when a packet has been sent
|
||||
*/
|
||||
virtual bool EP2_IN_callback();
|
||||
virtual bool EPBULK_IN_callback();
|
||||
|
||||
/*
|
||||
* Set configuration of device. Add endpoints
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ bool USBSerial::writeBlock(uint8_t * buf, uint16_t size) {
|
|||
|
||||
|
||||
|
||||
bool USBSerial::EP2_OUT_callback() {
|
||||
bool USBSerial::EPBULK_OUT_callback() {
|
||||
uint8_t c[65];
|
||||
uint32_t size = 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -145,7 +145,7 @@ public:
|
|||
}
|
||||
|
||||
protected:
|
||||
virtual bool EP2_OUT_callback();
|
||||
virtual bool EPBULK_OUT_callback();
|
||||
virtual void lineCodingChanged(int baud, int bits, int parity, int stop){
|
||||
if (settingsChangedCallback) {
|
||||
settingsChangedCallback(baud, bits, parity, stop);
|
||||
|
|
|
|||
|
|
@ -286,10 +286,7 @@ void R_USB_api_host_elt_get_desc(uint16_t root);
|
|||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb0_host_api.h"
|
||||
#if(1) /* ohci_wrapp */
|
||||
#else
|
||||
#include "usb1_host_api.h"
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -23,32 +23,32 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define OHCI_REG_REVISION (0x00)
|
||||
#define OHCI_REG_CONTROL (0x04)
|
||||
#define OHCI_REG_COMMANDSTATUS (0x08)
|
||||
#define OHCI_REG_INTERRUPTSTATUS (0x0C)
|
||||
#define OHCI_REG_INTERRUPTENABLE (0x10)
|
||||
#define OHCI_REG_INTERRUPTDISABLE (0x14)
|
||||
#define OHCI_REG_HCCA (0x18)
|
||||
#define OHCI_REG_PERIODCURRENTED (0x1C)
|
||||
#define OHCI_REG_CONTROLHEADED (0x20)
|
||||
#define OHCI_REG_CONTROLCURRENTED (0x24)
|
||||
#define OHCI_REG_BULKHEADED (0x28)
|
||||
#define OHCI_REG_BULKCURRENTED (0x2C)
|
||||
#define OHCI_REG_DONEHEADED (0x30)
|
||||
#define OHCI_REG_FMINTERVAL (0x34)
|
||||
#define OHCI_REG_FMREMAINING (0x38)
|
||||
#define OHCI_REG_FMNUMBER (0x3C)
|
||||
#define OHCI_REG_PERIODICSTART (0x40)
|
||||
#define OHCI_REG_LSTHRESHOLD (0x44)
|
||||
#define OHCI_REG_RHDESCRIPTORA (0x48)
|
||||
#define OHCI_REG_RHDESCRIPTORB (0x4C)
|
||||
#define OHCI_REG_RHSTATUS (0x50)
|
||||
#define OHCI_REG_RHPORTSTATUS1 (0x54)
|
||||
#define OHCI_REG_REVISION (0x00) /* HcRevision */
|
||||
#define OHCI_REG_CONTROL (0x04) /* HcControl */
|
||||
#define OHCI_REG_COMMANDSTATUS (0x08) /* HcCommandStatus */
|
||||
#define OHCI_REG_INTERRUPTSTATUS (0x0C) /* HcInterruptStatus */
|
||||
#define OHCI_REG_INTERRUPTENABLE (0x10) /* HcInterruptEnable */
|
||||
#define OHCI_REG_INTERRUPTDISABLE (0x14) /* HcInterruptDisable */
|
||||
#define OHCI_REG_HCCA (0x18) /* HcHCCA */
|
||||
#define OHCI_REG_PERIODCURRENTED (0x1C) /* HcPeriodCurrentED */
|
||||
#define OHCI_REG_CONTROLHEADED (0x20) /* HcControlHeadED */
|
||||
#define OHCI_REG_CONTROLCURRENTED (0x24) /* HcControlCurrentED */
|
||||
#define OHCI_REG_BULKHEADED (0x28) /* HcBulkHeadED */
|
||||
#define OHCI_REG_BULKCURRENTED (0x2C) /* HcBulkCurrentED */
|
||||
#define OHCI_REG_DONEHEADED (0x30) /* HcDoneHead */
|
||||
#define OHCI_REG_FMINTERVAL (0x34) /* HcFmInterval */
|
||||
#define OHCI_REG_FMREMAINING (0x38) /* HcFmRemaining */
|
||||
#define OHCI_REG_FMNUMBER (0x3C) /* HcFmNumber */
|
||||
#define OHCI_REG_PERIODICSTART (0x40) /* HcPeriodicStart */
|
||||
#define OHCI_REG_LSTHRESHOLD (0x44) /* HcLSThreshold */
|
||||
#define OHCI_REG_RHDESCRIPTORA (0x48) /* HcRhDescriptorA */
|
||||
#define OHCI_REG_RHDESCRIPTORB (0x4C) /* HcRhDescriptorB */
|
||||
#define OHCI_REG_RHSTATUS (0x50) /* HcRhStatus */
|
||||
#define OHCI_REG_RHPORTSTATUS1 (0x54) /* HcRhPortStatus1 */
|
||||
|
||||
typedef void (usbisr_fnc_t)(void);
|
||||
|
||||
extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc, uint32_t hi_speed);
|
||||
extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc);
|
||||
extern uint32_t ohciwrapp_reg_r(uint32_t reg_ofs);
|
||||
extern void ohciwrapp_reg_w(uint32_t reg_ofs, uint32_t set_data);
|
||||
extern void ohciwrapp_interrupt(uint32_t int_sense);
|
||||
|
|
|
|||
|
|
@ -77,10 +77,10 @@ Exported global variables and functions (to be accessed by other files)
|
|||
/********************************************************************************************************/
|
||||
|
||||
/* Device Address 1 */
|
||||
USB_HOST_CFG_PIPETBL_t usb0_host_blk_ep_tbl1[ ] =
|
||||
USB_HOST_CFG_PIPETBL_t usb_host_blk_ep_tbl1[ ] =
|
||||
{
|
||||
{
|
||||
USB_HOST_PIPE1,
|
||||
USB_HOST_PIPE3,
|
||||
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
|
||||
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
|
||||
(uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(8),
|
||||
|
|
@ -100,7 +100,7 @@ USB_HOST_CFG_PIPETBL_t usb0_host_blk_ep_tbl1[ ] =
|
|||
}
|
||||
};
|
||||
|
||||
USB_HOST_CFG_PIPETBL_t usb0_host_int_ep_tbl1[ ] =
|
||||
USB_HOST_CFG_PIPETBL_t usb_host_int_ep_tbl1[ ] =
|
||||
{
|
||||
{
|
||||
USB_HOST_PIPE6,
|
||||
|
|
@ -153,4 +153,38 @@ USB_HOST_CFG_PIPETBL_t usb0_host_int_ep_tbl1[ ] =
|
|||
}
|
||||
};
|
||||
|
||||
USB_HOST_CFG_PIPETBL_t usb_host_iso_ep_tbl1[ ] =
|
||||
{
|
||||
{
|
||||
USB_HOST_PIPE1,
|
||||
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
|
||||
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
|
||||
(uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(44),
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_D1USE
|
||||
},
|
||||
|
||||
{
|
||||
USB_HOST_PIPE2,
|
||||
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
|
||||
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
|
||||
(uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(60),
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_NONE,
|
||||
USB_HOST_D1USE
|
||||
},
|
||||
|
||||
{
|
||||
/* Pipe end */
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF,
|
||||
0xFFFF
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -209,7 +209,7 @@ void usb0_host_nrdy_int (uint16_t status, uint16_t int_enb)
|
|||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_DEVICENOTRESPONDING);
|
||||
#else
|
||||
g_usb0_host_PipeIgnore[pipe]++;
|
||||
|
||||
|
|
@ -90,7 +90,11 @@ Private global variables and functions
|
|||
*******************************************************************************/
|
||||
uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid (void)
|
||||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
return 0xFFFF;
|
||||
#else
|
||||
return DMAINT1_IRQn;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
|
|
@ -101,7 +105,11 @@ uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid (void)
|
|||
*******************************************************************************/
|
||||
uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid (void)
|
||||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
return 0xFFFF;
|
||||
#else
|
||||
return DMAINT2_IRQn;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
|
|
@ -0,0 +1,156 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB1_HOST_H
|
||||
#define USB1_HOST_H
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "devdrv_usb_host_api.h"
|
||||
#include "usb_host.h"
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
extern const uint16_t g_usb1_host_bit_set[];
|
||||
extern uint32_t g_usb1_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
|
||||
extern uint8_t *g_usb1_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
extern uint16_t g_usb1_host_PipeIgnore[];
|
||||
extern uint16_t g_usb1_host_PipeTbl[];
|
||||
extern uint16_t g_usb1_host_pipe_status[];
|
||||
extern uint32_t g_usb1_host_PipeDataSize[];
|
||||
|
||||
extern USB_HOST_DMA_t g_usb1_host_DmaInfo[];
|
||||
extern uint16_t g_usb1_host_DmaPipe[];
|
||||
extern uint16_t g_usb1_host_DmaBval[];
|
||||
extern uint16_t g_usb1_host_DmaStatus[];
|
||||
|
||||
extern uint16_t g_usb1_host_driver_state;
|
||||
extern uint16_t g_usb1_host_ConfigNum;
|
||||
extern uint16_t g_usb1_host_CmdStage;
|
||||
extern uint16_t g_usb1_host_bchg_flag;
|
||||
extern uint16_t g_usb1_host_detach_flag;
|
||||
extern uint16_t g_usb1_host_attach_flag;
|
||||
|
||||
extern uint16_t g_usb1_host_UsbAddress;
|
||||
extern uint16_t g_usb1_host_setUsbAddress;
|
||||
extern uint16_t g_usb1_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
|
||||
extern uint16_t g_usb1_host_UsbDeviceSpeed;
|
||||
extern uint16_t g_usb1_host_SupportUsbDeviceSpeed;
|
||||
|
||||
extern uint16_t g_usb1_host_SavReq;
|
||||
extern uint16_t g_usb1_host_SavVal;
|
||||
extern uint16_t g_usb1_host_SavIndx;
|
||||
extern uint16_t g_usb1_host_SavLen;
|
||||
|
||||
extern uint16_t g_usb1_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb1_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb1_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
|
||||
extern uint16_t g_usb1_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
/*******************************************************************************
|
||||
Functions Prototypes
|
||||
*******************************************************************************/
|
||||
/* ==== common ==== */
|
||||
void usb1_host_dma_stop_d0(uint16_t pipe, uint32_t remain);
|
||||
void usb1_host_dma_stop_d1(uint16_t pipe, uint32_t remain);
|
||||
uint16_t usb1_host_is_hispeed(void);
|
||||
uint16_t usb1_host_is_hispeed_enable(void);
|
||||
uint16_t usb1_host_start_send_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
|
||||
uint16_t usb1_host_write_buffer(uint16_t pipe);
|
||||
uint16_t usb1_host_write_buffer_c(uint16_t pipe);
|
||||
uint16_t usb1_host_write_buffer_d0(uint16_t pipe);
|
||||
uint16_t usb1_host_write_buffer_d1(uint16_t pipe);
|
||||
void usb1_host_start_receive_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
|
||||
uint16_t usb1_host_read_buffer(uint16_t pipe);
|
||||
uint16_t usb1_host_read_buffer_c(uint16_t pipe);
|
||||
uint16_t usb1_host_read_buffer_d0(uint16_t pipe);
|
||||
uint16_t usb1_host_read_buffer_d1(uint16_t pipe);
|
||||
uint16_t usb1_host_change_fifo_port(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
|
||||
void usb1_host_set_curpipe(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
|
||||
void usb1_host_set_curpipe2(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc);
|
||||
uint16_t usb1_host_get_mbw(uint32_t trncount, uint32_t dtptr);
|
||||
uint16_t usb1_host_read_dma(uint16_t pipe);
|
||||
void usb1_host_stop_transfer(uint16_t pipe);
|
||||
void usb1_host_brdy_int(uint16_t status, uint16_t int_enb);
|
||||
void usb1_host_nrdy_int(uint16_t status, uint16_t int_enb);
|
||||
void usb1_host_bemp_int(uint16_t status, uint16_t int_enb);
|
||||
void usb1_host_setting_interrupt(uint8_t level);
|
||||
void usb1_host_reset_module(uint16_t clockmode);
|
||||
uint16_t usb1_host_get_buf_size(uint16_t pipe);
|
||||
uint16_t usb1_host_get_mxps(uint16_t pipe);
|
||||
void usb1_host_enable_brdy_int(uint16_t pipe);
|
||||
void usb1_host_disable_brdy_int(uint16_t pipe);
|
||||
void usb1_host_clear_brdy_sts(uint16_t pipe);
|
||||
void usb1_host_enable_bemp_int(uint16_t pipe);
|
||||
void usb1_host_disable_bemp_int(uint16_t pipe);
|
||||
void usb1_host_clear_bemp_sts(uint16_t pipe);
|
||||
void usb1_host_enable_nrdy_int(uint16_t pipe);
|
||||
void usb1_host_disable_nrdy_int(uint16_t pipe);
|
||||
void usb1_host_clear_nrdy_sts(uint16_t pipe);
|
||||
void usb1_host_set_pid_buf(uint16_t pipe);
|
||||
void usb1_host_set_pid_nak(uint16_t pipe);
|
||||
void usb1_host_set_pid_stall(uint16_t pipe);
|
||||
void usb1_host_clear_pid_stall(uint16_t pipe);
|
||||
uint16_t usb1_host_get_pid(uint16_t pipe);
|
||||
void usb1_host_set_sqclr(uint16_t pipe);
|
||||
void usb1_host_set_sqset(uint16_t pipe);
|
||||
void usb1_host_set_csclr(uint16_t pipe);
|
||||
void usb1_host_aclrm(uint16_t pipe);
|
||||
void usb1_host_set_aclrm(uint16_t pipe);
|
||||
void usb1_host_clr_aclrm(uint16_t pipe);
|
||||
uint16_t usb1_host_get_sqmon(uint16_t pipe);
|
||||
uint16_t usb1_host_get_inbuf(uint16_t pipe);
|
||||
|
||||
/* ==== host ==== */
|
||||
void usb1_host_init_pipe_status(void);
|
||||
int32_t usb1_host_CtrlTransStart(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf);
|
||||
void usb1_host_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len);
|
||||
void usb1_host_CtrlReadStart(uint32_t Bsize, uint8_t *Table);
|
||||
uint16_t usb1_host_CtrlWriteStart(uint32_t Bsize, uint8_t *Table);
|
||||
void usb1_host_StatusStage(void);
|
||||
void usb1_host_get_devadd(uint16_t addr, uint16_t *devadd);
|
||||
void usb1_host_set_devadd(uint16_t addr, uint16_t *devadd);
|
||||
void usb1_host_InitModule(void);
|
||||
uint16_t usb1_host_CheckAttach(void);
|
||||
void usb1_host_UsbDetach(void);
|
||||
void usb1_host_UsbDetach2(void);
|
||||
void usb1_host_UsbAttach(void);
|
||||
uint16_t usb1_host_UsbBusReset(void);
|
||||
int32_t usb1_host_UsbResume(void);
|
||||
int32_t usb1_host_UsbSuspend(void);
|
||||
void usb1_host_Enable_DetachINT(void);
|
||||
void usb1_host_Disable_DetachINT(void);
|
||||
void usb1_host_UsbStateManager(void);
|
||||
|
||||
|
||||
#endif /* USB1_HOST_H */
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,112 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_api.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB1_HOST_API_H
|
||||
#define USB1_HOST_API_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Variable Externs
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Functions Prototypes
|
||||
*******************************************************************************/
|
||||
void usb1_host_interrupt(uint32_t int_sense);
|
||||
void usb1_host_dma_interrupt_d0fifo(uint32_t int_sense);
|
||||
void usb1_host_dma_interrupt_d1fifo(uint32_t int_sense);
|
||||
|
||||
uint16_t usb1_api_host_init(uint8_t int_level, uint16_t mode, uint16_t clockmode);
|
||||
int32_t usb1_api_host_enumeration(uint16_t devadr);
|
||||
int32_t usb1_api_host_detach(void);
|
||||
int32_t usb1_api_host_data_in(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
|
||||
int32_t usb1_api_host_data_out(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
|
||||
int32_t usb1_api_host_control_transfer(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf);
|
||||
int32_t usb1_api_host_set_endpoint(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *configdescriptor);
|
||||
int32_t usb1_api_host_clear_endpoint(USB_HOST_CFG_PIPETBL_t *user_table);
|
||||
int32_t usb1_api_host_clear_endpoint_pipe(uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t *user_table);
|
||||
uint16_t usb1_api_host_SetEndpointTable(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *Table);
|
||||
int32_t usb1_api_host_data_count(uint16_t pipe, uint32_t *data_count);
|
||||
|
||||
int32_t usb1_api_host_GetDeviceDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf);
|
||||
int32_t usb1_api_host_GetConfigDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf);
|
||||
int32_t usb1_api_host_SetConfig(uint16_t devadr, uint16_t confignum);
|
||||
int32_t usb1_api_host_SetInterface(uint16_t devadr, uint16_t interface_alt, uint16_t interface_index);
|
||||
int32_t usb1_api_host_ClearStall(uint16_t devadr, uint16_t ep_dir);
|
||||
uint16_t usb1_api_host_GetUsbDeviceState(void);
|
||||
|
||||
void usb1_api_host_elt_4_4(void);
|
||||
void usb1_api_host_elt_4_5(void);
|
||||
void usb1_api_host_elt_4_6(void);
|
||||
void usb1_api_host_elt_4_7(void);
|
||||
void usb1_api_host_elt_4_8(void);
|
||||
void usb1_api_host_elt_4_9(void);
|
||||
void usb1_api_host_elt_get_desc(void);
|
||||
|
||||
void usb1_host_EL_ModeInit(void);
|
||||
void usb1_host_EL_SetUACT(void);
|
||||
void usb1_host_EL_ClearUACT(void);
|
||||
void usb1_host_EL_SetTESTMODE(uint16_t mode);
|
||||
void usb1_host_EL_ClearNRDYSTS(uint16_t pipe);
|
||||
uint16_t usb1_host_EL_GetINTSTS1(void);
|
||||
void usb1_host_EL_UsbBusReset(void);
|
||||
void usb1_host_EL_UsbAttach(void);
|
||||
void usb1_host_EL_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len);
|
||||
void usb1_host_EL_StatusStage(void);
|
||||
void usb1_host_EL_CtrlReadStart(uint32_t Bsize, uint8_t *Table);
|
||||
int32_t usb1_host_EL_UsbSuspend(void);
|
||||
int32_t usb1_host_EL_UsbResume(void);
|
||||
|
||||
#if 0 /* prototype in devdrv_usb_host_api.h */
|
||||
uint16_t Userdef_USB_usb1_host_d0fifo_dmaintid(void);
|
||||
uint16_t Userdef_USB_usb1_host_d1fifo_dmaintid(void);
|
||||
void Userdef_USB_usb1_host_attach(void);
|
||||
void Userdef_USB_usb1_host_detach(void);
|
||||
void Userdef_USB_usb1_host_delay_1ms(void);
|
||||
void Userdef_USB_usb1_host_delay_xms(uint32_t msec);
|
||||
void Userdef_USB_usb1_host_delay_10us(uint32_t usec);
|
||||
void Userdef_USB_usb1_host_delay_500ns(void);
|
||||
void Userdef_USB_usb1_host_start_dma(USB_HOST_DMA_t *dma, uint16_t dfacc);
|
||||
uint32_t Userdef_USB_usb1_host_stop_dma0(void);
|
||||
uint32_t Userdef_USB_usb1_host_stop_dma1(void);
|
||||
#endif
|
||||
|
||||
#endif /* USB1_HOST_API_H */
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,139 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_dmacdrv.h
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
*******************************************************************************/
|
||||
#ifndef USB1_HOST_DMACDRV_H
|
||||
#define USB1_HOST_DMACDRV_H
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
typedef struct dmac_transinfo
|
||||
{
|
||||
uint32_t src_addr; /* Transfer source address */
|
||||
uint32_t dst_addr; /* Transfer destination address */
|
||||
uint32_t count; /* Transfer byte count */
|
||||
uint32_t src_size; /* Transfer source data size */
|
||||
uint32_t dst_size; /* Transfer destination data size */
|
||||
uint32_t saddr_dir; /* Transfer source address direction */
|
||||
uint32_t daddr_dir; /* Transfer destination address direction */
|
||||
} dmac_transinfo_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
/* ==== Transfer specification of the sample program ==== */
|
||||
#define DMAC_SAMPLE_SINGLE (0) /* Single transfer */
|
||||
#define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */
|
||||
|
||||
/* ==== DMA modes ==== */
|
||||
#define DMAC_MODE_REGISTER (0) /* Register mode */
|
||||
#define DMAC_MODE_LINK (1) /* Link mode */
|
||||
|
||||
/* ==== Transfer requests ==== */
|
||||
#define DMAC_REQ_MODE_EXT (0) /* External request */
|
||||
#define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */
|
||||
#define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */
|
||||
|
||||
/* ==== DMAC transfer sizes ==== */
|
||||
#define DMAC_TRANS_SIZE_8 (0) /* 8 bits */
|
||||
#define DMAC_TRANS_SIZE_16 (1) /* 16 bits */
|
||||
#define DMAC_TRANS_SIZE_32 (2) /* 32 bits */
|
||||
#define DMAC_TRANS_SIZE_64 (3) /* 64 bits */
|
||||
#define DMAC_TRANS_SIZE_128 (4) /* 128 bits */
|
||||
#define DMAC_TRANS_SIZE_256 (5) /* 256 bits */
|
||||
#define DMAC_TRANS_SIZE_512 (6) /* 512 bits */
|
||||
#define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */
|
||||
|
||||
/* ==== Address increment for transferring ==== */
|
||||
#define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */
|
||||
#define DMAC_TRANS_ADR_INC (0) /* Increment */
|
||||
|
||||
/* ==== Method for detecting DMA request ==== */
|
||||
#define DMAC_REQ_DET_FALL (0) /* Falling edge detection */
|
||||
#define DMAC_REQ_DET_RISE (1) /* Rising edge detection */
|
||||
#define DMAC_REQ_DET_LOW (2) /* Low level detection */
|
||||
#define DMAC_REQ_DET_HIGH (3) /* High level detection */
|
||||
|
||||
/* ==== Request Direction ==== */
|
||||
#define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */
|
||||
#define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */
|
||||
|
||||
/* ==== Descriptors ==== */
|
||||
#define DMAC_DESC_HEADER (0) /* Header */
|
||||
#define DMAC_DESC_SRC_ADDR (1) /* Source Address */
|
||||
#define DMAC_DESC_DST_ADDR (2) /* Destination Address */
|
||||
#define DMAC_DESC_COUNT (3) /* Transaction Byte */
|
||||
#define DMAC_DESC_CHCFG (4) /* Channel Confg */
|
||||
#define DMAC_DESC_CHITVL (5) /* Channel Interval */
|
||||
#define DMAC_DESC_CHEXT (6) /* Channel Extension */
|
||||
#define DMAC_DESC_LINK_ADDR (7) /* Link Address */
|
||||
|
||||
/* ==== On-chip peripheral module requests ===== */
|
||||
typedef enum dmac_request_factor
|
||||
{
|
||||
DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */
|
||||
DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */
|
||||
DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */
|
||||
DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */
|
||||
DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */
|
||||
DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */
|
||||
DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */
|
||||
DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */
|
||||
} dmac_request_factor_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Variable Externs
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Functions Prototypes
|
||||
*******************************************************************************/
|
||||
void usb1_host_DMAC3_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction);
|
||||
int32_t usb1_host_DMAC3_Open(uint32_t req);
|
||||
void usb1_host_DMAC3_Close(uint32_t *remain);
|
||||
void usb1_host_DMAC3_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
|
||||
|
||||
void usb1_host_DMAC4_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction);
|
||||
int32_t usb1_host_DMAC4_Open(uint32_t req);
|
||||
void usb1_host_DMAC4_Close(uint32_t *remain);
|
||||
void usb1_host_DMAC4_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
|
||||
|
||||
#endif /* USB1_HOST_DMACDRV_H */
|
||||
|
||||
/* End of File */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,355 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_dma.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_host.h"
|
||||
/* #include "usb1_host_dmacdrv.h" */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
static void usb1_host_dmaint(uint16_t fifo);
|
||||
static void usb1_host_dmaint_buf2fifo(uint16_t pipe);
|
||||
static void usb1_host_dmaint_fifo2buf(uint16_t pipe);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_dma_stop_d0
|
||||
* Description : D0FIFO DMA stop
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* : uint32_t remain : transfer byte
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_dma_stop_d0 (uint16_t pipe, uint32_t remain)
|
||||
{
|
||||
uint16_t dtln;
|
||||
uint16_t dfacc;
|
||||
uint16_t buffer;
|
||||
uint16_t sds_b = 1;
|
||||
|
||||
dfacc = RZA_IO_RegRead_16(&USB201.D0FBCFG,
|
||||
USB_DnFBCFG_DFACC_SHIFT,
|
||||
USB_DnFBCFG_DFACC);
|
||||
if (dfacc == 2)
|
||||
{
|
||||
sds_b = 32;
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
sds_b = 16;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size == 2)
|
||||
{
|
||||
sds_b = 4;
|
||||
}
|
||||
else if (g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size == 1)
|
||||
{
|
||||
sds_b = 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
sds_b = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
|
||||
{
|
||||
if (g_usb1_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
|
||||
{
|
||||
buffer = USB201.D0FIFOCTR;
|
||||
dtln = (buffer & USB_HOST_BITDTLN);
|
||||
|
||||
if ((dtln % sds_b) != 0)
|
||||
{
|
||||
remain += (sds_b - (dtln % sds_b));
|
||||
}
|
||||
g_usb1_host_PipeDataSize[pipe] = (g_usb1_host_data_count[pipe] - remain);
|
||||
g_usb1_host_data_count[pipe] = remain;
|
||||
}
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.D0FIFOSEL,
|
||||
0,
|
||||
USB_DnFIFOSEL_DREQE_SHIFT,
|
||||
USB_DnFIFOSEL_DREQE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_dma_stop_d1
|
||||
* Description : D1FIFO DMA stop
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* : uint32_t remain : transfer byte
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_dma_stop_d1 (uint16_t pipe, uint32_t remain)
|
||||
{
|
||||
uint16_t dtln;
|
||||
uint16_t dfacc;
|
||||
uint16_t buffer;
|
||||
uint16_t sds_b = 1;
|
||||
|
||||
dfacc = RZA_IO_RegRead_16(&USB201.D1FBCFG,
|
||||
USB_DnFBCFG_DFACC_SHIFT,
|
||||
USB_DnFBCFG_DFACC);
|
||||
if (dfacc == 2)
|
||||
{
|
||||
sds_b = 32;
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
sds_b = 16;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size == 2)
|
||||
{
|
||||
sds_b = 4;
|
||||
}
|
||||
else if (g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size == 1)
|
||||
{
|
||||
sds_b = 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
sds_b = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
|
||||
{
|
||||
if (g_usb1_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
|
||||
{
|
||||
buffer = USB201.D1FIFOCTR;
|
||||
dtln = (buffer & USB_HOST_BITDTLN);
|
||||
|
||||
if ((dtln % sds_b) != 0)
|
||||
{
|
||||
remain += (sds_b - (dtln % sds_b));
|
||||
}
|
||||
g_usb1_host_PipeDataSize[pipe] = (g_usb1_host_data_count[pipe] - remain);
|
||||
g_usb1_host_data_count[pipe] = remain;
|
||||
}
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.D1FIFOSEL,
|
||||
0,
|
||||
USB_DnFIFOSEL_DREQE_SHIFT,
|
||||
USB_DnFIFOSEL_DREQE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_dma_interrupt_d0fifo
|
||||
* Description : This function is DMA interrupt handler entry.
|
||||
* : Execute usb1_host_dmaint() after disabling DMA interrupt in this function.
|
||||
* : Disable DMA interrupt to DMAC executed when USB_HOST_D0FIFO_DMA is
|
||||
* : specified by dma->fifo.
|
||||
* : Register this function as DMA complete interrupt.
|
||||
* Arguments : uint32_t int_sense ; Interrupts detection mode
|
||||
* : ; INTC_LEVEL_SENSITIVE : Level sense
|
||||
* : ; INTC_EDGE_TRIGGER : Edge trigger
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_dma_interrupt_d0fifo (uint32_t int_sense)
|
||||
{
|
||||
usb1_host_dmaint(USB_HOST_D0FIFO);
|
||||
g_usb1_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_dma_interrupt_d1fifo
|
||||
* Description : This function is DMA interrupt handler entry.
|
||||
* : Execute usb0_host_dmaint() after disabling DMA interrupt in this function.
|
||||
* : Disable DMA interrupt to DMAC executed when USB_HOST_D1FIFO_DMA is
|
||||
* : specified by dma->fifo.
|
||||
* : Register this function as DMA complete interrupt.
|
||||
* Arguments : uint32_t int_sense ; Interrupts detection mode
|
||||
* : ; INTC_LEVEL_SENSITIVE : Level sense
|
||||
* : ; INTC_EDGE_TRIGGER : Edge trigger
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_dma_interrupt_d1fifo (uint32_t int_sense)
|
||||
{
|
||||
usb1_host_dmaint(USB_HOST_D1FIFO);
|
||||
g_usb1_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_dmaint
|
||||
* Description : This function is DMA transfer end interrupt
|
||||
* Arguments : uint16_t fifo ; fifo number
|
||||
* : ; USB_HOST_D0FIFO
|
||||
* : ; USB_HOST_D1FIFO
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_host_dmaint (uint16_t fifo)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
pipe = g_usb1_host_DmaPipe[fifo];
|
||||
|
||||
if (g_usb1_host_DmaInfo[fifo].dir == USB_HOST_BUF2FIFO)
|
||||
{
|
||||
usb1_host_dmaint_buf2fifo(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_dmaint_fifo2buf(pipe);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_dmaint_fifo2buf
|
||||
* Description : Executes read completion from FIFO by DMAC.
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_host_dmaint_fifo2buf (uint16_t pipe)
|
||||
{
|
||||
uint32_t remain;
|
||||
uint16_t useport;
|
||||
|
||||
if (g_usb1_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
|
||||
{
|
||||
useport = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
|
||||
|
||||
if (useport == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
remain = Userdef_USB_usb1_host_stop_dma0();
|
||||
usb1_host_dma_stop_d0(pipe, remain);
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
if (g_usb1_host_DmaStatus[USB_HOST_D0FIFO] == USB_HOST_DMA_BUSYEND)
|
||||
{
|
||||
USB201.D0FIFOCTR = USB_HOST_BITBCLR;
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_enable_brdy_int(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
remain = Userdef_USB_usb1_host_stop_dma1();
|
||||
usb1_host_dma_stop_d1(pipe, remain);
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
if (g_usb1_host_DmaStatus[USB_HOST_D1FIFO] == USB_HOST_DMA_BUSYEND)
|
||||
{
|
||||
USB201.D1FIFOCTR = USB_HOST_BITBCLR;
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_enable_brdy_int(pipe);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_dmaint_buf2fifo
|
||||
* Description : Executes write completion in FIFO by DMAC.
|
||||
* Arguments : uint16_t pipe : pipe number
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_host_dmaint_buf2fifo (uint16_t pipe)
|
||||
{
|
||||
uint16_t useport;
|
||||
uint32_t remain;
|
||||
|
||||
useport = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
|
||||
|
||||
if (useport == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
remain = Userdef_USB_usb1_host_stop_dma0();
|
||||
usb1_host_dma_stop_d0(pipe, remain);
|
||||
|
||||
if (g_usb1_host_DmaBval[USB_HOST_D0FIFO] != 0)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.D0FIFOCTR,
|
||||
1,
|
||||
USB_DnFIFOCTR_BVAL_SHIFT,
|
||||
USB_DnFIFOCTR_BVAL);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
remain = Userdef_USB_usb1_host_stop_dma1();
|
||||
usb1_host_dma_stop_d1(pipe, remain);
|
||||
|
||||
if (g_usb1_host_DmaBval[USB_HOST_D1FIFO] != 0)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.D1FIFOCTR,
|
||||
1,
|
||||
USB_DnFIFOCTR_BVAL_SHIFT,
|
||||
USB_DnFIFOCTR_BVAL);
|
||||
}
|
||||
}
|
||||
|
||||
usb1_host_enable_bemp_int(pipe);
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,285 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_intrn.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_host.h"
|
||||
#if(1) /* ohci_wrapp */
|
||||
#include "ohci_wrapp_RZ_A1_local.h"
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_brdy_int
|
||||
* Description : Executes BRDY interrupt(USB_HOST_PIPE1-9).
|
||||
* : According to the pipe that interrupt is generated in,
|
||||
* : reads/writes buffer allocated in the pipe.
|
||||
* : This function is executed in the BRDY interrupt handler.
|
||||
* : This function clears BRDY interrupt status and BEMP interrupt
|
||||
* : status.
|
||||
* Arguments : uint16_t status ; BRDYSTS Register Value
|
||||
* : uint16_t int_enb ; BRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_brdy_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint32_t int_sense = 0;
|
||||
uint16_t pipe;
|
||||
uint16_t pipebit;
|
||||
|
||||
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
pipebit = g_usb1_host_bit_set[pipe];
|
||||
|
||||
if ((status & pipebit) && (int_enb & pipebit))
|
||||
{
|
||||
USB201.BRDYSTS = (uint16_t)~pipebit;
|
||||
USB201.BEMPSTS = (uint16_t)~pipebit;
|
||||
|
||||
if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
if (g_usb1_host_DmaStatus[USB_HOST_D0FIFO] != USB_HOST_DMA_READY)
|
||||
{
|
||||
usb1_host_dma_interrupt_d0fifo(int_sense);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
usb1_host_read_dma(pipe);
|
||||
usb1_host_disable_brdy_int(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
USB201.D0FIFOCTR = USB_HOST_BITBCLR;
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
}
|
||||
}
|
||||
else if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_DMA)
|
||||
{
|
||||
if (g_usb1_host_DmaStatus[USB_HOST_D1FIFO] != USB_HOST_DMA_READY)
|
||||
{
|
||||
usb1_host_dma_interrupt_d1fifo(int_sense);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
|
||||
{
|
||||
usb1_host_read_dma(pipe);
|
||||
usb1_host_disable_brdy_int(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
USB201.D1FIFOCTR = USB_HOST_BITBCLR;
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
|
||||
{
|
||||
usb1_host_read_buffer(pipe);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_write_buffer(pipe);
|
||||
}
|
||||
}
|
||||
#if(1) /* ohci_wrapp */
|
||||
switch (g_usb1_host_pipe_status[pipe])
|
||||
{
|
||||
case USB_HOST_PIPE_DONE:
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
|
||||
break;
|
||||
case USB_HOST_PIPE_NORES:
|
||||
case USB_HOST_PIPE_STALL:
|
||||
case USB_HOST_PIPE_ERROR:
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
|
||||
break;
|
||||
default:
|
||||
/* Do Nothing */
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_nrdy_int
|
||||
* Description : Executes NRDY interrupt(USB_HOST_PIPE1-9).
|
||||
* : Checks NRDY interrupt cause by PID. When the cause if STALL,
|
||||
* : regards the pipe state as STALL and ends the processing.
|
||||
* : Then the cause is not STALL, increments the error count to
|
||||
* : communicate again. When the error count is 3, determines
|
||||
* : the pipe state as USB_HOST_PIPE_NORES and ends the processing.
|
||||
* : This function is executed in the NRDY interrupt handler.
|
||||
* : This function clears NRDY interrupt status.
|
||||
* Arguments : uint16_t status ; NRDYSTS Register Value
|
||||
* : uint16_t int_enb ; NRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_nrdy_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint16_t pid;
|
||||
uint16_t pipe;
|
||||
uint16_t bitcheck;
|
||||
|
||||
bitcheck = (uint16_t)(status & int_enb);
|
||||
|
||||
USB201.NRDYSTS = (uint16_t)~status;
|
||||
|
||||
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
if ((bitcheck&g_usb1_host_bit_set[pipe]) == g_usb1_host_bit_set[pipe])
|
||||
{
|
||||
if (RZA_IO_RegRead_16(&USB201.SYSCFG0,
|
||||
USB_SYSCFG_DCFM_SHIFT,
|
||||
USB_SYSCFG_DCFM) == 1)
|
||||
{
|
||||
if (g_usb1_host_pipe_status[pipe] == USB_HOST_PIPE_WAIT)
|
||||
{
|
||||
pid = usb1_host_get_pid(pipe);
|
||||
|
||||
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
|
||||
{
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
|
||||
#if(1) /* ohci_wrapp */
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_DEVICENOTRESPONDING);
|
||||
#else
|
||||
g_usb1_host_PipeIgnore[pipe]++;
|
||||
|
||||
if (g_usb1_host_PipeIgnore[pipe] == 3)
|
||||
{
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_set_pid_buf(pipe);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* USB Function */
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_bemp_int
|
||||
* Description : Executes BEMP interrupt(USB_HOST_PIPE1-9).
|
||||
* Arguments : uint16_t status ; BEMPSTS Register Value
|
||||
* : uint16_t int_enb ; BEMPENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_bemp_int (uint16_t status, uint16_t int_enb)
|
||||
{
|
||||
uint16_t pid;
|
||||
uint16_t pipe;
|
||||
uint16_t bitcheck;
|
||||
uint16_t inbuf;
|
||||
|
||||
bitcheck = (uint16_t)(status & int_enb);
|
||||
|
||||
USB201.BEMPSTS = (uint16_t)~status;
|
||||
|
||||
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
|
||||
{
|
||||
if ((bitcheck&g_usb1_host_bit_set[pipe]) == g_usb1_host_bit_set[pipe])
|
||||
{
|
||||
pid = usb1_host_get_pid(pipe);
|
||||
|
||||
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
|
||||
{
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
|
||||
#if(1) /* ohci_wrapp */
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
inbuf = usb1_host_get_inbuf(pipe);
|
||||
|
||||
if (inbuf == 0)
|
||||
{
|
||||
usb1_host_disable_bemp_int(pipe);
|
||||
usb1_host_set_pid_nak(pipe);
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
|
||||
#if(1) /* ohci_wrapp */
|
||||
ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,434 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_controlrw.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_host.h"
|
||||
#include "dev_drv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_CtrlTransStart
|
||||
* Description : Executes USB control transfer.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint16_t Req ; bmRequestType & bRequest
|
||||
* : uint16_t Val ; wValue
|
||||
* : uint16_t Indx ; wIndex
|
||||
* : uint16_t Len ; wLength
|
||||
* : uint8_t *Buf ; Data buffer
|
||||
* Return Value : DEVDRV_SUCCESS ; SUCCESS
|
||||
* : DEVDRV_ERROR ; ERROR
|
||||
*******************************************************************************/
|
||||
int32_t usb1_host_CtrlTransStart (uint16_t devadr, uint16_t Req, uint16_t Val,
|
||||
uint16_t Indx, uint16_t Len, uint8_t * Buf)
|
||||
{
|
||||
if (g_usb1_host_UsbDeviceSpeed == USB_HOST_LOW_SPEED)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.SOFCFG,
|
||||
1,
|
||||
USB_SOFCFG_TRNENSEL_SHIFT,
|
||||
USB_SOFCFG_TRNENSEL);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.SOFCFG,
|
||||
0,
|
||||
USB_SOFCFG_TRNENSEL_SHIFT,
|
||||
USB_SOFCFG_TRNENSEL);
|
||||
}
|
||||
|
||||
USB201.DCPMAXP = (uint16_t)((uint16_t)(devadr << 12) + g_usb1_host_default_max_packet[devadr]);
|
||||
|
||||
if (g_usb1_host_pipe_status[USB_HOST_PIPE0] == USB_HOST_PIPE_IDLE)
|
||||
{
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
|
||||
g_usb1_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
|
||||
g_usb1_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
|
||||
|
||||
if (Len == 0)
|
||||
{
|
||||
g_usb1_host_CmdStage |= USB_HOST_MODE_NO_DATA; /* No-data Control */
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((Req & 0x0080) != 0)
|
||||
{
|
||||
g_usb1_host_CmdStage |= USB_HOST_MODE_READ; /* Control Read */
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb1_host_CmdStage |= USB_HOST_MODE_WRITE; /* Control Write */
|
||||
}
|
||||
}
|
||||
|
||||
g_usb1_host_SavReq = Req; /* save request */
|
||||
g_usb1_host_SavVal = Val;
|
||||
g_usb1_host_SavIndx = Indx;
|
||||
g_usb1_host_SavLen = Len;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((g_usb1_host_SavReq != Req) || (g_usb1_host_SavVal != Val)
|
||||
|| (g_usb1_host_SavIndx != Indx) || (g_usb1_host_SavLen != Len))
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
switch ((g_usb1_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
/* --------------- SETUP STAGE --------------- */
|
||||
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE):
|
||||
usb1_host_SetupStage(Req, Val, Indx, Len);
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DOING):
|
||||
/* do nothing */
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DONE): /* goto next stage */
|
||||
g_usb1_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
|
||||
switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
|
||||
{
|
||||
case USB_HOST_MODE_WRITE:
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_STAGE_DATA;
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_READ:
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_STAGE_DATA;
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_NO_DATA:
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_NORES):
|
||||
if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
|
||||
{
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
|
||||
}
|
||||
break;
|
||||
|
||||
/* --------------- DATA STAGE --------------- */
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE):
|
||||
switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
|
||||
{
|
||||
case USB_HOST_MODE_WRITE:
|
||||
usb1_host_CtrlWriteStart((uint32_t)Len, Buf);
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_READ:
|
||||
usb1_host_CtrlReadStart((uint32_t)Len, Buf);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
/* do nothing */
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DONE): /* goto next stage */
|
||||
g_usb1_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_NORES):
|
||||
if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
|
||||
{
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
usb1_host_clear_pid_stall(USB_HOST_PIPE0);
|
||||
usb1_host_set_pid_buf(USB_HOST_PIPE0);
|
||||
}
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_STALL):
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
|
||||
break;
|
||||
|
||||
/* --------------- STATUS STAGE --------------- */
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE):
|
||||
usb1_host_StatusStage();
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
/* do nothing */
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DONE): /* end of Control transfer */
|
||||
usb1_host_set_pid_nak(USB_HOST_PIPE0);
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_DONE; /* exit DONE */
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_NORES):
|
||||
if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
|
||||
{
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
usb1_host_clear_pid_stall(USB_HOST_PIPE0);
|
||||
usb1_host_set_pid_buf(USB_HOST_PIPE0);
|
||||
}
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_STALL):
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (g_usb1_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.SOFCFG,
|
||||
0,
|
||||
USB_SOFCFG_TRNENSEL_SHIFT,
|
||||
USB_SOFCFG_TRNENSEL);
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_SetupStage
|
||||
* Description : Executes USB control transfer/set up stage.
|
||||
* Arguments : uint16_t Req ; bmRequestType & bRequest
|
||||
* : uint16_t Val ; wValue
|
||||
* : uint16_t Indx ; wIndex
|
||||
* : uint16_t Len ; wLength
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_SetupStage (uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len)
|
||||
{
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
|
||||
USB201.INTSTS1 = (uint16_t)~(USB_HOST_BITSACK | USB_HOST_BITSIGN); /* Status Clear */
|
||||
USB201.USBREQ = Req;
|
||||
USB201.USBVAL = Val;
|
||||
USB201.USBINDX = Indx;
|
||||
USB201.USBLENG = Len;
|
||||
USB201.DCPCTR = USB_HOST_BITSUREQ; /* PID=NAK & Send Setup */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_StatusStage
|
||||
* Description : Executes USB control transfer/status stage.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_StatusStage (void)
|
||||
{
|
||||
uint8_t Buf1[16];
|
||||
|
||||
switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
|
||||
{
|
||||
case USB_HOST_MODE_READ:
|
||||
usb1_host_CtrlWriteStart((uint32_t)0, (uint8_t*)&Buf1);
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_WRITE:
|
||||
usb1_host_CtrlReadStart((uint32_t)0, (uint8_t*)&Buf1);
|
||||
break;
|
||||
|
||||
case USB_HOST_MODE_NO_DATA:
|
||||
usb1_host_CtrlReadStart((uint32_t)0, (uint8_t*)&Buf1);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_CtrlWriteStart
|
||||
* Description : Executes USB control transfer/data stage(write).
|
||||
* Arguments : uint32_t Bsize ; Data Size
|
||||
* : uint8_t *Table ; Data Table Address
|
||||
* Return Value : USB_HOST_WRITESHRT ; End of data write
|
||||
* : USB_HOST_WRITEEND ; End of data write (not null)
|
||||
* : USB_HOST_WRITING ; Continue of data write
|
||||
* : USB_HOST_FIFOERROR ; FIFO access error
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_host_CtrlWriteStart (uint32_t Bsize, uint8_t * Table)
|
||||
{
|
||||
uint16_t EndFlag_K;
|
||||
uint16_t mbw;
|
||||
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
|
||||
usb1_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
|
||||
g_usb1_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
|
||||
g_usb1_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
|
||||
|
||||
USB201.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
|
||||
#if(1) /* ohci_wrapp */
|
||||
Userdef_USB_usb1_host_delay_10us(3);
|
||||
#endif
|
||||
RZA_IO_RegWrite_16(&USB201.DCPCFG,
|
||||
1,
|
||||
USB_DCPCFG_DIR_SHIFT,
|
||||
USB_DCPCFG_DIR);
|
||||
|
||||
mbw = usb1_host_get_mbw(g_usb1_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb1_host_data_pointer[USB_HOST_PIPE0]);
|
||||
usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_BITISEL, mbw);
|
||||
USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
|
||||
|
||||
usb1_host_clear_pid_stall(USB_HOST_PIPE0);
|
||||
EndFlag_K = usb1_host_write_buffer_c(USB_HOST_PIPE0);
|
||||
/* Host Control sequence */
|
||||
switch (EndFlag_K)
|
||||
{
|
||||
case USB_HOST_WRITESHRT: /* End of data write */
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
usb1_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
|
||||
usb1_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
|
||||
break;
|
||||
|
||||
case USB_HOST_WRITEEND: /* End of data write (not null) */
|
||||
case USB_HOST_WRITING: /* Continue of data write */
|
||||
usb1_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
|
||||
usb1_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
usb1_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
|
||||
return (EndFlag_K); /* End or Err or Continue */
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_CtrlReadStart
|
||||
* Description : Executes USB control transfer/data stage(read).
|
||||
* Arguments : uint32_t Bsize ; Data Size
|
||||
* : uint8_t *Table ; Data Table Address
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_CtrlReadStart (uint32_t Bsize, uint8_t * Table)
|
||||
{
|
||||
uint16_t mbw;
|
||||
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
|
||||
|
||||
usb1_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
|
||||
g_usb1_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
|
||||
g_usb1_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
|
||||
|
||||
USB201.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
|
||||
#if(1) /* ohci_wrapp */
|
||||
Userdef_USB_usb1_host_delay_10us(3);
|
||||
#endif
|
||||
RZA_IO_RegWrite_16(&USB201.DCPCFG,
|
||||
0,
|
||||
USB_DCPCFG_DIR_SHIFT,
|
||||
USB_DCPCFG_DIR);
|
||||
|
||||
mbw = usb1_host_get_mbw(g_usb1_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb1_host_data_pointer[USB_HOST_PIPE0]);
|
||||
usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, mbw);
|
||||
USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
|
||||
|
||||
usb1_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
|
||||
usb1_host_enable_brdy_int(USB_HOST_PIPE0); /* Ok */
|
||||
usb1_host_clear_pid_stall(USB_HOST_PIPE0);
|
||||
usb1_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,889 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_drv_api.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_host.h"
|
||||
#include "dev_drv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb1_host_resetEP(USB_HOST_CFG_PIPETBL_t *tbl);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_init
|
||||
* Description : Initializes USB module in the USB host mode.
|
||||
* : USB connection is executed when executing this function in
|
||||
* : the states that USB device isconnected to the USB port.
|
||||
* Arguments : uint8_t int_level : USB Module interrupt level
|
||||
* : USBU16 mode : USB_HOST_HIGH_SPEED
|
||||
* : USB_HOST_FULL_SPEED
|
||||
* : uint16_t clockmode : USB Clock mode
|
||||
* Return Value : USB detach or attach
|
||||
* : USB_HOST_ATTACH
|
||||
* : USB_HOST_DETACH
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_api_host_init (uint8_t int_level, uint16_t mode, uint16_t clockmode)
|
||||
{
|
||||
uint16_t connect;
|
||||
volatile uint8_t dummy_buf;
|
||||
|
||||
CPG.STBCR7 &= 0xfc; /*The clock of USB0/1 modules is permitted */
|
||||
dummy_buf = CPG.STBCR7; /* (Dummy read) */
|
||||
|
||||
g_usb1_host_SupportUsbDeviceSpeed = mode;
|
||||
|
||||
usb1_host_setting_interrupt(int_level);
|
||||
usb1_host_reset_module(clockmode);
|
||||
|
||||
g_usb1_host_bchg_flag = USB_HOST_NO;
|
||||
g_usb1_host_detach_flag = USB_HOST_NO;
|
||||
g_usb1_host_attach_flag = USB_HOST_NO;
|
||||
|
||||
g_usb1_host_driver_state = USB_HOST_DRV_DETACHED;
|
||||
g_usb1_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
|
||||
|
||||
usb1_host_InitModule();
|
||||
|
||||
connect = usb1_host_CheckAttach();
|
||||
|
||||
if (connect == USB_HOST_ATTACH)
|
||||
{
|
||||
g_usb1_host_attach_flag = USB_HOST_YES;
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_UsbDetach2();
|
||||
}
|
||||
|
||||
return connect;
|
||||
}
|
||||
|
||||
#if(1) /* ohci_wrapp */
|
||||
#else
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_enumeration
|
||||
* Description : Initializes USB module in the USB host mode.
|
||||
* : USB connection is executed when executing this function in
|
||||
* : the states that USB device isconnected to the USB port.
|
||||
* Arguments : uint16_t devadr : device address
|
||||
* Return Value : DEVDRV_USBH_DETACH_ERR : device detach
|
||||
* : DEVDRV_SUCCESS : device enumeration success
|
||||
* : DEVDRV_ERROR : device enumeration error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_enumeration (uint16_t devadr)
|
||||
{
|
||||
int32_t ret;
|
||||
uint16_t driver_sts;
|
||||
|
||||
g_usb1_host_setUsbAddress = devadr;
|
||||
|
||||
while (1)
|
||||
{
|
||||
driver_sts = usb1_api_host_GetUsbDeviceState();
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_DETACHED)
|
||||
{
|
||||
ret = DEVDRV_USBH_DETACH_ERR;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_CONFIGURED)
|
||||
{
|
||||
ret = DEVDRV_SUCCESS;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_STALL)
|
||||
{
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_NORES)
|
||||
{
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_NORES)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
driver_sts = usb1_api_host_GetUsbDeviceState();
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_DETACHED)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_detach
|
||||
* Description : USB detach routine
|
||||
* Arguments : none
|
||||
* Return Value : USB_HOST_DETACH : USB detach
|
||||
* : USB_HOST_ATTACH : USB attach
|
||||
* : DEVDRV_ERROR : error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_detach (void)
|
||||
{
|
||||
int32_t ret;
|
||||
uint16_t driver_sts;
|
||||
|
||||
while (1)
|
||||
{
|
||||
driver_sts = usb1_api_host_GetUsbDeviceState();
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_DETACHED)
|
||||
{
|
||||
ret = USB_HOST_DETACH;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_CONFIGURED)
|
||||
{
|
||||
ret = USB_HOST_ATTACH;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_STALL)
|
||||
{
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
else if (driver_sts == USB_HOST_DRV_NORES)
|
||||
{
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_NORES)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
driver_sts = usb1_api_host_GetUsbDeviceState();
|
||||
|
||||
if (driver_sts == USB_HOST_DRV_DETACHED)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_data_in
|
||||
* Description : Executes USB transfer as data-in in the argument specified pipe.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint16_t Pipe ; Pipe Number
|
||||
* : uint32_t Size ; Data Size
|
||||
* : uint8_t *data_buf ; Data data_buf Address
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_data_in (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Pipe == USB_HOST_PIPE0)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 1)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (g_usb1_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
|
||||
{
|
||||
usb1_host_start_receive_transfer(Pipe, Size, data_buf);
|
||||
}
|
||||
else
|
||||
{
|
||||
return DEVDRV_ERROR; /* Now pipe is busy */
|
||||
}
|
||||
|
||||
/* waiting for completing routine */
|
||||
do
|
||||
{
|
||||
if (g_usb1_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if ((g_usb1_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb1_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
} while (1);
|
||||
|
||||
if (g_usb1_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
return DEVDRV_USBH_DETACH_ERR;
|
||||
}
|
||||
|
||||
switch (g_usb1_host_pipe_status[Pipe])
|
||||
{
|
||||
case USB_HOST_PIPE_DONE:
|
||||
ret = DEVDRV_SUCCESS;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_STALL:
|
||||
ret = DEVDRV_USBH_STALL;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_NORES:
|
||||
ret = DEVDRV_USBH_COM_ERR;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
usb1_host_stop_transfer(Pipe);
|
||||
|
||||
g_usb1_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_data_out
|
||||
* Description : Executes USB transfer as data-out in the argument specified pipe.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint16_t Pipe ; Pipe Number
|
||||
* : uint32_t Size ; Data Size
|
||||
* : uint8_t *data_buf ; Data data_buf Address
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_data_out (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
if (Pipe == USB_HOST_PIPE0)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
if (g_usb1_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
|
||||
{
|
||||
usb1_host_start_send_transfer(Pipe, Size, data_buf);
|
||||
}
|
||||
else
|
||||
{
|
||||
return DEVDRV_ERROR; /* Now pipe is busy */
|
||||
}
|
||||
|
||||
/* waiting for completing routine */
|
||||
do
|
||||
{
|
||||
if (g_usb1_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if ((g_usb1_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb1_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
} while (1);
|
||||
|
||||
if (g_usb1_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
return DEVDRV_USBH_DETACH_ERR;
|
||||
}
|
||||
|
||||
switch (g_usb1_host_pipe_status[Pipe])
|
||||
{
|
||||
case USB_HOST_PIPE_DONE:
|
||||
ret = DEVDRV_SUCCESS;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_STALL:
|
||||
ret = DEVDRV_USBH_STALL;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_NORES:
|
||||
ret = DEVDRV_USBH_COM_ERR;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
usb1_host_stop_transfer(Pipe);
|
||||
|
||||
g_usb1_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_control_transfer
|
||||
* Description : Executes USB control transfer.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint16_t Req ; bmRequestType & bRequest
|
||||
* : uint16_t Val ; wValue
|
||||
* : uint16_t Indx ; wIndex
|
||||
* : uint16_t Len ; wLength
|
||||
* : uint8_t *buf ; Buffer
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_USBH_DETACH_ERR ; device detach
|
||||
* : DEVDRV_USBH_CTRL_COM_ERR ; device no response
|
||||
* : DEVDRV_USBH_STALL ; STALL
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_control_transfer (uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx,
|
||||
uint16_t Len, uint8_t * Buf)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
do
|
||||
{
|
||||
ret = usb1_host_CtrlTransStart(devadr, Req, Val, Indx, Len, Buf);
|
||||
|
||||
if (ret == DEVDRV_SUCCESS)
|
||||
{
|
||||
if (g_usb1_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if ((g_usb1_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_IDLE)
|
||||
&& (g_usb1_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
} while (1);
|
||||
|
||||
if (g_usb1_host_detach_flag == USB_HOST_YES)
|
||||
{
|
||||
return DEVDRV_USBH_DETACH_ERR;
|
||||
}
|
||||
|
||||
switch (g_usb1_host_pipe_status[USB_HOST_PIPE0])
|
||||
{
|
||||
case USB_HOST_PIPE_DONE:
|
||||
ret = DEVDRV_SUCCESS;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_STALL:
|
||||
ret = DEVDRV_USBH_STALL;
|
||||
break;
|
||||
|
||||
case USB_HOST_PIPE_NORES:
|
||||
ret = DEVDRV_USBH_CTRL_COM_ERR;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = DEVDRV_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_set_endpoint
|
||||
* Description : Sets end point on the information specified in the argument.
|
||||
* Arguments : uint16_t devadr ; device address
|
||||
* : uint8_t *configdescriptor ; device configration descriptor
|
||||
* : USB_HOST_CFG_PIPETBL_t *user_table ; pipe table
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_set_endpoint (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * configdescriptor)
|
||||
{
|
||||
uint16_t ret;
|
||||
uint32_t end_point;
|
||||
uint32_t offset;
|
||||
uint32_t totalLength;
|
||||
USB_HOST_CFG_PIPETBL_t * pipe_table;
|
||||
|
||||
/* End Point Search */
|
||||
end_point = 0;
|
||||
offset = configdescriptor[0];
|
||||
totalLength = (uint16_t)(configdescriptor[2] + ((uint16_t)configdescriptor[3] << 8));
|
||||
|
||||
do
|
||||
{
|
||||
if (configdescriptor[offset + 1] == USB_HOST_ENDPOINT_DESC)
|
||||
{
|
||||
pipe_table = &user_table[end_point];
|
||||
|
||||
if (pipe_table->pipe_number == 0xffff)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
ret = usb1_api_host_SetEndpointTable(devadr, pipe_table, (uint8_t *)&configdescriptor[offset]);
|
||||
|
||||
if ((ret != USB_HOST_PIPE_IN) && (ret != USB_HOST_PIPE_OUT))
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
++end_point;
|
||||
}
|
||||
|
||||
/* Next End Point Search */
|
||||
offset += configdescriptor[offset];
|
||||
|
||||
} while (offset < totalLength);
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_clear_endpoint
|
||||
* Description : Clears the pipe definition table specified in the argument.
|
||||
* Arguments : uint16_t pipe_sel : Pipe Number
|
||||
* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_clear_endpoint (USB_HOST_CFG_PIPETBL_t * user_table)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
|
||||
{
|
||||
if (user_table->pipe_number == 0xffff)
|
||||
{
|
||||
break;
|
||||
}
|
||||
user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
|
||||
user_table->pipe_max_pktsize = 0;
|
||||
user_table->pipe_cycle = 0;
|
||||
|
||||
user_table++;
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_clear_endpoint_pipe
|
||||
* Description : Clears the pipe definition table specified in the argument.
|
||||
* Arguments : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_clear_endpoint_pipe (uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t * user_table)
|
||||
{
|
||||
uint16_t pipe;
|
||||
|
||||
for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
|
||||
{
|
||||
if (user_table->pipe_number == 0xffff)
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
if (user_table->pipe_number == pipe_sel)
|
||||
{
|
||||
user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
|
||||
user_table->pipe_max_pktsize = 0;
|
||||
user_table->pipe_cycle = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
user_table++;
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_SetEndpointTable
|
||||
* Description : Sets the end point on the information specified by the argument.
|
||||
* Arguments : uint16_t devadr : device address
|
||||
* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
|
||||
* : uint8_t *Table : Endpoint descriptor
|
||||
* Return Value : USB_HOST_DIR_H_IN ; IN endpoint
|
||||
* : USB_HOST_DIR_H_OUT ; OUT endpoint
|
||||
* : USB_END_POINT_ERROR ; error
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_api_host_SetEndpointTable (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * Table)
|
||||
{
|
||||
uint16_t PipeCfg;
|
||||
uint16_t PipeMaxp;
|
||||
uint16_t pipe_number;
|
||||
uint16_t ret;
|
||||
uint16_t ret_flag = 0; // avoid warning.
|
||||
|
||||
pipe_number = user_table->pipe_number;
|
||||
|
||||
if (Table[1] != USB_HOST_ENDPOINT_DESC)
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
switch (Table[3] & USB_HOST_EP_TYPE)
|
||||
{
|
||||
case USB_HOST_EP_CNTRL:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
|
||||
case USB_HOST_EP_ISO:
|
||||
if ((pipe_number != USB_HOST_PIPE1) && (pipe_number != USB_HOST_PIPE2))
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
PipeCfg = USB_HOST_ISO;
|
||||
break;
|
||||
|
||||
case USB_HOST_EP_BULK:
|
||||
if ((pipe_number < USB_HOST_PIPE1) || (pipe_number > USB_HOST_PIPE5))
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
PipeCfg = USB_HOST_BULK;
|
||||
break;
|
||||
|
||||
case USB_HOST_EP_INT:
|
||||
if ((pipe_number < USB_HOST_PIPE6) || (pipe_number > USB_HOST_PIPE9))
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
PipeCfg = USB_HOST_INTERRUPT;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == USB_END_POINT_ERROR)
|
||||
{
|
||||
return ret_flag;
|
||||
}
|
||||
|
||||
/* Set pipe configuration table */
|
||||
if ((Table[2] & USB_HOST_EP_DIR_MASK) == USB_HOST_EP_IN) /* IN(receive) */
|
||||
{
|
||||
if (PipeCfg == USB_HOST_ISO)
|
||||
{
|
||||
/* Transfer Type is ISO*/
|
||||
PipeCfg |= USB_HOST_DIR_H_IN;
|
||||
|
||||
switch (user_table->fifo_port)
|
||||
{
|
||||
case USB_HOST_CUSE:
|
||||
case USB_HOST_D0USE:
|
||||
case USB_HOST_D1USE:
|
||||
case USB_HOST_D0DMA:
|
||||
case USB_HOST_D1DMA:
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == USB_END_POINT_ERROR)
|
||||
{
|
||||
return ret_flag;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Transfer Type is BULK or INT */
|
||||
PipeCfg |= (USB_HOST_SHTNAKON | USB_HOST_DIR_H_IN); /* Compulsory SHTNAK */
|
||||
|
||||
switch (user_table->fifo_port)
|
||||
{
|
||||
case USB_HOST_CUSE:
|
||||
case USB_HOST_D0USE:
|
||||
case USB_HOST_D1USE:
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
|
||||
break;
|
||||
|
||||
case USB_HOST_D0DMA:
|
||||
case USB_HOST_D1DMA:
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
|
||||
#ifdef __USB_DMA_BFRE_ENABLE__
|
||||
/* this routine cannnot be perfomred if read operation is executed in buffer size */
|
||||
PipeCfg |= USB_HOST_BFREON;
|
||||
#endif
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == USB_END_POINT_ERROR)
|
||||
{
|
||||
return ret_flag;
|
||||
}
|
||||
}
|
||||
ret = USB_HOST_PIPE_IN;
|
||||
}
|
||||
else /* OUT(send) */
|
||||
{
|
||||
if (PipeCfg == USB_HOST_ISO)
|
||||
{
|
||||
/* Transfer Type is ISO*/
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Transfer Type is BULK or INT */
|
||||
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
|
||||
}
|
||||
PipeCfg |= USB_HOST_DIR_H_OUT;
|
||||
ret = USB_HOST_PIPE_OUT;
|
||||
}
|
||||
|
||||
switch (user_table->fifo_port)
|
||||
{
|
||||
case USB_HOST_CUSE:
|
||||
g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_CFIFO_USE;
|
||||
break;
|
||||
|
||||
case USB_HOST_D0USE:
|
||||
g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_USE;
|
||||
break;
|
||||
|
||||
case USB_HOST_D1USE:
|
||||
g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_USE;
|
||||
break;
|
||||
|
||||
case USB_HOST_D0DMA:
|
||||
g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_DMA;
|
||||
break;
|
||||
|
||||
case USB_HOST_D1DMA:
|
||||
g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_DMA;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = USB_END_POINT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == USB_END_POINT_ERROR)
|
||||
{
|
||||
return ret_flag;
|
||||
}
|
||||
|
||||
/* Endpoint number set */
|
||||
PipeCfg |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
|
||||
g_usb1_host_PipeTbl[pipe_number] |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
|
||||
|
||||
/* Max packet size set */
|
||||
PipeMaxp = (uint16_t)((uint16_t)Table[4] | (uint16_t)((uint16_t)Table[5] << 8));
|
||||
|
||||
if (PipeMaxp == 0u)
|
||||
{
|
||||
return USB_END_POINT_ERROR;
|
||||
}
|
||||
|
||||
/* Set device address */
|
||||
PipeMaxp |= (uint16_t)(devadr << 12);
|
||||
|
||||
user_table->pipe_cfg = PipeCfg;
|
||||
user_table->pipe_max_pktsize = PipeMaxp;
|
||||
|
||||
usb1_host_resetEP(user_table);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_resetEP
|
||||
* Description : Sets the end point on the information specified by the argument.
|
||||
* Arguments : USB_HOST_CFG_PIPETBL_t *tbl : pipe table
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_host_resetEP (USB_HOST_CFG_PIPETBL_t * tbl)
|
||||
{
|
||||
|
||||
uint16_t pipe;
|
||||
|
||||
/* Host pipe */
|
||||
/* The pipe number of pipe definition table is obtained */
|
||||
pipe = (uint16_t)(tbl->pipe_number & USB_HOST_BITCURPIPE); /* Pipe Number */
|
||||
|
||||
/* FIFO port access pipe is set to initial value */
|
||||
/* The connection with FIFO should be cut before setting the pipe */
|
||||
if (RZA_IO_RegRead_16(&USB201.CFIFOSEL,
|
||||
USB_CFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_CFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
usb1_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, USB_HOST_BITMBW_16);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&USB201.D0FIFOSEL,
|
||||
USB_DnFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_DnFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
usb1_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, USB_HOST_BITMBW_16);
|
||||
}
|
||||
|
||||
if (RZA_IO_RegRead_16(&USB201.D1FIFOSEL,
|
||||
USB_DnFIFOSEL_CURPIPE_SHIFT,
|
||||
USB_DnFIFOSEL_CURPIPE) == pipe)
|
||||
{
|
||||
usb1_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, USB_HOST_BITMBW_16);
|
||||
}
|
||||
|
||||
/* Interrupt of pipe set is disabled */
|
||||
usb1_host_disable_brdy_int(pipe);
|
||||
usb1_host_disable_nrdy_int(pipe);
|
||||
usb1_host_disable_bemp_int(pipe);
|
||||
|
||||
/* Pipe to set is set to NAK */
|
||||
usb1_host_set_pid_nak(pipe);
|
||||
|
||||
/* Pipe is set */
|
||||
USB201.PIPESEL = pipe;
|
||||
|
||||
USB201.PIPECFG = tbl->pipe_cfg;
|
||||
USB201.PIPEBUF = tbl->pipe_buf;
|
||||
USB201.PIPEMAXP = tbl->pipe_max_pktsize;
|
||||
USB201.PIPEPERI = tbl->pipe_cycle;
|
||||
|
||||
g_usb1_host_pipecfg[pipe] = tbl->pipe_cfg;
|
||||
g_usb1_host_pipebuf[pipe] = tbl->pipe_buf;
|
||||
g_usb1_host_pipemaxp[pipe] = tbl->pipe_max_pktsize;
|
||||
g_usb1_host_pipeperi[pipe] = tbl->pipe_cycle;
|
||||
|
||||
/* Sequence bit clear */
|
||||
usb1_host_set_sqclr(pipe);
|
||||
|
||||
usb1_host_aclrm(pipe);
|
||||
usb1_host_set_csclr(pipe);
|
||||
|
||||
/* Pipe window selection is set to unused */
|
||||
USB201.PIPESEL = USB_HOST_PIPE0;
|
||||
|
||||
}
|
||||
|
||||
#if(1) /* ohci_wrapp */
|
||||
#else
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_api_host_data_count
|
||||
* Description : Get g_usb0_host_data_count[pipe]
|
||||
* Arguments : uint16_t pipe ; Pipe Number
|
||||
* : uint32_t *data_count ; return g_usb0_data_count[pipe]
|
||||
* Return Value : DEVDRV_SUCCESS ; success
|
||||
* : DEVDRV_ERROR ; error
|
||||
*******************************************************************************/
|
||||
int32_t usb1_api_host_data_count (uint16_t pipe, uint32_t * data_count)
|
||||
{
|
||||
if (pipe > USB_HOST_MAX_PIPE_NO)
|
||||
{
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
*data_count = g_usb1_host_PipeDataSize[pipe];
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,137 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_global.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_host.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
const uint16_t g_usb1_host_bit_set[16] =
|
||||
{
|
||||
0x0001, 0x0002, 0x0004, 0x0008,
|
||||
0x0010, 0x0020, 0x0040, 0x0080,
|
||||
0x0100, 0x0200, 0x0400, 0x0800,
|
||||
0x1000, 0x2000, 0x4000, 0x8000
|
||||
};
|
||||
|
||||
uint32_t g_usb1_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint8_t * g_usb1_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
uint16_t g_usb1_host_PipeIgnore[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_host_PipeTbl[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_host_pipe_status[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint32_t g_usb1_host_PipeDataSize[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
USB_HOST_DMA_t g_usb1_host_DmaInfo[2];
|
||||
|
||||
uint16_t g_usb1_host_DmaPipe[2];
|
||||
uint16_t g_usb1_host_DmaBval[2];
|
||||
uint16_t g_usb1_host_DmaStatus[2];
|
||||
|
||||
uint16_t g_usb1_host_driver_state;
|
||||
uint16_t g_usb1_host_ConfigNum;
|
||||
uint16_t g_usb1_host_CmdStage;
|
||||
uint16_t g_usb1_host_bchg_flag;
|
||||
uint16_t g_usb1_host_detach_flag;
|
||||
uint16_t g_usb1_host_attach_flag;
|
||||
|
||||
uint16_t g_usb1_host_UsbAddress;
|
||||
uint16_t g_usb1_host_setUsbAddress;
|
||||
uint16_t g_usb1_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
|
||||
uint16_t g_usb1_host_UsbDeviceSpeed;
|
||||
uint16_t g_usb1_host_SupportUsbDeviceSpeed;
|
||||
|
||||
uint16_t g_usb1_host_SavReq;
|
||||
uint16_t g_usb1_host_SavVal;
|
||||
uint16_t g_usb1_host_SavIndx;
|
||||
uint16_t g_usb1_host_SavLen;
|
||||
|
||||
uint16_t g_usb1_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
|
||||
uint16_t g_usb1_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_init_pipe_status
|
||||
* Description : Initialize pipe status.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_init_pipe_status (void)
|
||||
{
|
||||
uint16_t loop;
|
||||
|
||||
g_usb1_host_ConfigNum = 0;
|
||||
|
||||
for (loop = 0; loop < (USB_HOST_MAX_PIPE_NO + 1); ++loop)
|
||||
{
|
||||
g_usb1_host_pipe_status[loop] = USB_HOST_PIPE_IDLE;
|
||||
g_usb1_host_PipeDataSize[loop] = 0;
|
||||
|
||||
/* pipe configuration in usb1_host_resetEP() */
|
||||
g_usb1_host_pipecfg[loop] = 0;
|
||||
g_usb1_host_pipebuf[loop] = 0;
|
||||
g_usb1_host_pipemaxp[loop] = 0;
|
||||
g_usb1_host_pipeperi[loop] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,497 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_usbint.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_host.h"
|
||||
#if(1) /* ohci_wrapp */
|
||||
#include "ohci_wrapp_RZ_A1_local.h"
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb1_host_interrupt1(void);
|
||||
static void usb1_host_BRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
|
||||
static void usb1_host_NRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
|
||||
static void usb1_host_BEMPInterrupt(uint16_t Status, uint16_t Int_enbl);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_interrupt
|
||||
* Description : Executes USB interrupt.
|
||||
* : Register this function in the USB interrupt handler.
|
||||
* : Set CFIF0 in the pipe set before the interrupt after executing
|
||||
* : this function.
|
||||
* Arguments : uint32_t int_sense ; Interrupts detection mode
|
||||
* : ; INTC_LEVEL_SENSITIVE : Level sense
|
||||
* : ; INTC_EDGE_TRIGGER : Edge trigger
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_interrupt (uint32_t int_sense)
|
||||
{
|
||||
uint16_t savepipe1;
|
||||
uint16_t savepipe2;
|
||||
uint16_t buffer;
|
||||
|
||||
savepipe1 = USB201.CFIFOSEL;
|
||||
savepipe2 = USB201.PIPESEL;
|
||||
usb1_host_interrupt1();
|
||||
|
||||
/* Control transmission changes ISEL within interruption processing. */
|
||||
/* For this reason, write return of ISEL cannot be performed. */
|
||||
buffer = USB201.CFIFOSEL;
|
||||
buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
|
||||
buffer |= (uint16_t)(savepipe1 & USB_HOST_BITCURPIPE);
|
||||
USB201.CFIFOSEL = buffer;
|
||||
USB201.PIPESEL = savepipe2;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_interrupt1
|
||||
* Description : Execue the USB interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_interrupt1 (void)
|
||||
{
|
||||
uint16_t intsts0;
|
||||
uint16_t intsts1;
|
||||
uint16_t intenb0;
|
||||
uint16_t intenb1;
|
||||
uint16_t brdysts;
|
||||
uint16_t nrdysts;
|
||||
uint16_t bempsts;
|
||||
uint16_t brdyenb;
|
||||
uint16_t nrdyenb;
|
||||
uint16_t bempenb;
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
intsts0 = USB201.INTSTS0;
|
||||
intsts1 = USB201.INTSTS1;
|
||||
intenb0 = USB201.INTENB0;
|
||||
intenb1 = USB201.INTENB1;
|
||||
|
||||
if ((intsts1 & USB_HOST_BITBCHG) && (intenb1 & USB_HOST_BITBCHGE))
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)~USB_HOST_BITBCHG;
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_BCHGE_SHIFT,
|
||||
USB_INTENB1_BCHGE);
|
||||
g_usb1_host_bchg_flag = USB_HOST_YES;
|
||||
}
|
||||
else if ((intsts1 & USB_HOST_BITSACK) && (intenb1 & USB_HOST_BITSACKE))
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)~USB_HOST_BITSACK;
|
||||
#if(1) /* ohci_wrapp */
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
#else
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
#endif
|
||||
}
|
||||
else if ((intsts1 & USB_HOST_BITSIGN) && (intenb1 & USB_HOST_BITSIGNE))
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)~USB_HOST_BITSIGN;
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
|
||||
#else
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_NORES;
|
||||
#endif
|
||||
}
|
||||
else if (((intsts1 & USB_HOST_BITDTCH) == USB_HOST_BITDTCH)
|
||||
&& ((intenb1 & USB_HOST_BITDTCHE) == USB_HOST_BITDTCHE))
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)~USB_HOST_BITDTCH;
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_DTCHE_SHIFT,
|
||||
USB_INTENB1_DTCHE);
|
||||
g_usb1_host_detach_flag = USB_HOST_YES;
|
||||
|
||||
Userdef_USB_usb1_host_detach();
|
||||
|
||||
usb1_host_UsbDetach2();
|
||||
}
|
||||
else if (((intsts1 & USB_HOST_BITATTCH) == USB_HOST_BITATTCH)
|
||||
&& ((intenb1 & USB_HOST_BITATTCHE) == USB_HOST_BITATTCHE))
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)~USB_HOST_BITATTCH;
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_ATTCHE_SHIFT,
|
||||
USB_INTENB1_ATTCHE);
|
||||
g_usb1_host_attach_flag = USB_HOST_YES;
|
||||
|
||||
Userdef_USB_usb1_host_attach();
|
||||
|
||||
usb1_host_UsbAttach();
|
||||
}
|
||||
else if ((intsts0 & intenb0 & (USB_HOST_BITBEMP | USB_HOST_BITNRDY | USB_HOST_BITBRDY)))
|
||||
{
|
||||
brdysts = USB201.BRDYSTS;
|
||||
nrdysts = USB201.NRDYSTS;
|
||||
bempsts = USB201.BEMPSTS;
|
||||
brdyenb = USB201.BRDYENB;
|
||||
nrdyenb = USB201.NRDYENB;
|
||||
bempenb = USB201.BEMPENB;
|
||||
|
||||
if ((intsts0 & USB_HOST_BITBRDY) && (intenb0 & USB_HOST_BITBRDYE) && (brdysts & brdyenb))
|
||||
{
|
||||
usb1_host_BRDYInterrupt(brdysts, brdyenb);
|
||||
}
|
||||
else if ((intsts0 & USB_HOST_BITBEMP) && (intenb0 & USB_HOST_BITBEMPE) && (bempsts & bempenb))
|
||||
{
|
||||
usb1_host_BEMPInterrupt(bempsts, bempenb);
|
||||
}
|
||||
else if ((intsts0 & USB_HOST_BITNRDY) && (intenb0 & USB_HOST_BITNRDYE) && (nrdysts & nrdyenb))
|
||||
{
|
||||
usb1_host_NRDYInterrupt(nrdysts, nrdyenb);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
/* Three dummy read for clearing interrupt requests */
|
||||
dumy_sts = USB201.INTSTS0;
|
||||
dumy_sts = USB201.INTSTS1;
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_BRDYInterrupt
|
||||
* Description : Executes USB BRDY interrupt.
|
||||
* Arguments : uint16_t Status ; BRDYSTS Register Value
|
||||
* : uint16_t Int_enbl ; BRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_BRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
|
||||
{
|
||||
uint16_t buffer;
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
if ((Status & g_usb1_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb1_host_bit_set[USB_HOST_PIPE0]))
|
||||
{
|
||||
USB201.BRDYSTS = (uint16_t)~g_usb1_host_bit_set[USB_HOST_PIPE0];
|
||||
|
||||
#if(1) /* ohci_wrapp */
|
||||
switch ((g_usb1_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
buffer = usb1_host_read_buffer_c(USB_HOST_PIPE0);
|
||||
usb1_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
buffer = usb1_host_read_buffer_c(USB_HOST_PIPE0);
|
||||
switch (buffer)
|
||||
{
|
||||
case USB_HOST_READING: /* Continue of data read */
|
||||
break;
|
||||
|
||||
case USB_HOST_READEND: /* End of data read */
|
||||
case USB_HOST_READSHRT: /* End of data read */
|
||||
usb1_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case USB_HOST_READOVER: /* buffer over */
|
||||
USB201.CFIFOCTR = USB_HOST_BITBCLR;
|
||||
usb1_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#else
|
||||
switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
case (USB_HOST_MODE_NO_DATA | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
buffer = usb1_host_read_buffer_c(USB_HOST_PIPE0);
|
||||
usb1_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
break;
|
||||
|
||||
case (USB_HOST_MODE_READ | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
buffer = usb1_host_read_buffer_c(USB_HOST_PIPE0);
|
||||
|
||||
switch (buffer)
|
||||
{
|
||||
case USB_HOST_READING: /* Continue of data read */
|
||||
break;
|
||||
|
||||
case USB_HOST_READEND: /* End of data read */
|
||||
case USB_HOST_READSHRT: /* End of data read */
|
||||
usb1_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
break;
|
||||
|
||||
case USB_HOST_READOVER: /* buffer over */
|
||||
USB201.CFIFOCTR = USB_HOST_BITBCLR;
|
||||
usb1_host_disable_brdy_int(USB_HOST_PIPE0);
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_brdy_int(Status, Int_enbl);
|
||||
}
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB201.BRDYSTS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_NRDYInterrupt
|
||||
* Description : Executes USB NRDY interrupt.
|
||||
* Arguments : uint16_t Status ; NRDYSTS Register Value
|
||||
* : uint16_t Int_enbl ; NRDYENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_NRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
|
||||
{
|
||||
uint16_t pid;
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
if ((Status & g_usb1_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb1_host_bit_set[USB_HOST_PIPE0]))
|
||||
{
|
||||
USB201.NRDYSTS = (uint16_t)~g_usb1_host_bit_set[USB_HOST_PIPE0];
|
||||
pid = usb1_host_get_pid(USB_HOST_PIPE0);
|
||||
|
||||
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
|
||||
{
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_STALL;
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
|
||||
#endif
|
||||
|
||||
}
|
||||
else if (pid == USB_HOST_PID_NAK)
|
||||
{
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_NORES;
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_nrdy_int(Status, Int_enbl);
|
||||
}
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB201.NRDYSTS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_BEMPInterrupt
|
||||
* Description : Executes USB BEMP interrupt.
|
||||
* Arguments : uint16_t Status ; BEMPSTS Register Value
|
||||
* : uint16_t Int_enbl ; BEMPENB Register Value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_BEMPInterrupt (uint16_t Status, uint16_t Int_enbl)
|
||||
{
|
||||
uint16_t buffer;
|
||||
uint16_t pid;
|
||||
volatile uint16_t dumy_sts;
|
||||
|
||||
if ((Status & g_usb1_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb1_host_bit_set[USB_HOST_PIPE0]))
|
||||
{
|
||||
USB201.BEMPSTS = (uint16_t)~g_usb1_host_bit_set[USB_HOST_PIPE0];
|
||||
pid = usb1_host_get_pid(USB_HOST_PIPE0);
|
||||
|
||||
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
|
||||
{
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_STALL;
|
||||
#if(1) /* ohci_wrapp */
|
||||
g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
switch ((g_usb1_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
buffer = usb1_host_write_buffer(USB_HOST_PIPE0);
|
||||
switch (buffer)
|
||||
{
|
||||
case USB_HOST_WRITING: /* Continue of data write */
|
||||
case USB_HOST_WRITEEND: /* End of data write (zero-length) */
|
||||
break;
|
||||
|
||||
case USB_HOST_WRITESHRT: /* End of data write */
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
/* do nothing */
|
||||
break;
|
||||
}
|
||||
#else
|
||||
switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
|
||||
{
|
||||
case (USB_HOST_MODE_READ | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
|
||||
break;
|
||||
|
||||
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
|
||||
buffer = usb1_host_write_buffer(USB_HOST_PIPE0);
|
||||
switch (buffer)
|
||||
{
|
||||
case USB_HOST_WRITING: /* Continue of data write */
|
||||
case USB_HOST_WRITEEND: /* End of data write (zero-length) */
|
||||
break;
|
||||
|
||||
case USB_HOST_WRITESHRT: /* End of data write */
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
|
||||
break;
|
||||
|
||||
case USB_HOST_FIFOERROR: /* FIFO access error */
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
|
||||
g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
|
||||
g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
|
||||
break;
|
||||
|
||||
default:
|
||||
/* do nothing */
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_bemp_int(Status, Int_enbl);
|
||||
}
|
||||
|
||||
/* Three dummy reads for clearing interrupt requests */
|
||||
dumy_sts = USB201.BEMPSTS;
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,637 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_usbsig.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "usb1_host.h"
|
||||
#include "dev_drv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb1_host_EnableINT_Module(void);
|
||||
static void usb1_host_Enable_AttachINT(void);
|
||||
static void usb1_host_Disable_AttachINT(void);
|
||||
static void usb1_host_Disable_BchgINT(void);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_InitModule
|
||||
* Description : Initializes the USB module in USB host module.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_InitModule (void)
|
||||
{
|
||||
uint16_t buf1;
|
||||
uint16_t buf2;
|
||||
uint16_t buf3;
|
||||
|
||||
usb1_host_init_pipe_status();
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_DCFM_SHIFT,
|
||||
USB_SYSCFG_DCFM); /* HOST mode */
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_DRPD_SHIFT,
|
||||
USB_SYSCFG_DRPD); /* PORT0 D+, D- setting */
|
||||
|
||||
do
|
||||
{
|
||||
buf1 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
Userdef_USB_usb1_host_delay_xms(50);
|
||||
buf2 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
Userdef_USB_usb1_host_delay_xms(50);
|
||||
buf3 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
|
||||
} while ((buf1 != buf2) || (buf1 != buf3));
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_USBE_SHIFT,
|
||||
USB_SYSCFG_USBE);
|
||||
|
||||
USB201.CFIFOSEL = (uint16_t)(USB_HOST_BITRCNT | USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
|
||||
USB201.D0FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
|
||||
USB201.D1FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_CheckAttach
|
||||
* Description : Returns the USB device connection state.
|
||||
* Arguments : none
|
||||
* Return Value : uint16_t ; USB_HOST_ATTACH : Attached
|
||||
* : ; USB_HOST_DETACH : not Attached
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_host_CheckAttach (void)
|
||||
{
|
||||
uint16_t buf1;
|
||||
uint16_t buf2;
|
||||
uint16_t buf3;
|
||||
uint16_t rhst;
|
||||
|
||||
do
|
||||
{
|
||||
buf1 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
Userdef_USB_usb1_host_delay_xms(50);
|
||||
buf2 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
Userdef_USB_usb1_host_delay_xms(50);
|
||||
buf3 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
|
||||
} while ((buf1 != buf2) || (buf1 != buf3));
|
||||
|
||||
rhst = RZA_IO_RegRead_16(&USB201.DVSTCTR0,
|
||||
USB_DVSTCTR0_RHST_SHIFT,
|
||||
USB_DVSTCTR0_RHST);
|
||||
if (rhst == USB_HOST_UNDECID)
|
||||
{
|
||||
if (buf1 == USB_HOST_FS_JSTS)
|
||||
{
|
||||
if (g_usb1_host_SupportUsbDeviceSpeed == USB_HOST_HIGH_SPEED)
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
1,
|
||||
USB_SYSCFG_HSE_SHIFT,
|
||||
USB_SYSCFG_HSE);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_HSE_SHIFT,
|
||||
USB_SYSCFG_HSE);
|
||||
}
|
||||
return USB_HOST_ATTACH;
|
||||
}
|
||||
else if (buf1 == USB_HOST_LS_JSTS)
|
||||
{
|
||||
/* Low Speed Device */
|
||||
RZA_IO_RegWrite_16(&USB201.SYSCFG0,
|
||||
0,
|
||||
USB_SYSCFG_HSE_SHIFT,
|
||||
USB_SYSCFG_HSE);
|
||||
return USB_HOST_ATTACH;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
}
|
||||
else if ((rhst == USB_HOST_HSMODE) || (rhst == USB_HOST_FSMODE))
|
||||
{
|
||||
return USB_HOST_ATTACH;
|
||||
}
|
||||
else if (rhst == USB_HOST_LSMODE)
|
||||
{
|
||||
return USB_HOST_ATTACH;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
return USB_HOST_DETACH;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_UsbAttach
|
||||
* Description : Connects the USB device.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_UsbAttach (void)
|
||||
{
|
||||
usb1_host_EnableINT_Module();
|
||||
usb1_host_Disable_BchgINT();
|
||||
usb1_host_Disable_AttachINT();
|
||||
usb1_host_Enable_DetachINT();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_UsbDetach
|
||||
* Description : Disconnects the USB device.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_UsbDetach (void)
|
||||
{
|
||||
uint16_t pipe;
|
||||
uint16_t devadr;
|
||||
|
||||
g_usb1_host_driver_state = USB_HOST_DRV_DETACHED;
|
||||
|
||||
/* Terminate all the pipes in which communications on port */
|
||||
/* are currently carried out */
|
||||
for (pipe = 0; pipe < (USB_HOST_MAX_PIPE_NO + 1); ++pipe)
|
||||
{
|
||||
if (g_usb1_host_pipe_status[pipe] != USB_HOST_PIPE_IDLE)
|
||||
{
|
||||
if (pipe == USB_HOST_PIPE0)
|
||||
{
|
||||
devadr = RZA_IO_RegRead_16(&USB201.DCPMAXP,
|
||||
USB_DCPMAXP_DEVSEL_SHIFT,
|
||||
USB_DCPMAXP_DEVSEL);
|
||||
}
|
||||
else
|
||||
{
|
||||
devadr = RZA_IO_RegRead_16(&g_usb1_host_pipemaxp[pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL);
|
||||
}
|
||||
|
||||
if (devadr == g_usb1_host_UsbAddress)
|
||||
{
|
||||
usb1_host_stop_transfer(pipe);
|
||||
}
|
||||
|
||||
g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_IDLE;
|
||||
}
|
||||
}
|
||||
|
||||
g_usb1_host_ConfigNum = 0;
|
||||
g_usb1_host_UsbAddress = 0;
|
||||
g_usb1_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
|
||||
|
||||
usb1_host_UsbDetach2();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_UsbDetach2
|
||||
* Description : Disconnects the USB device.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_UsbDetach2 (void)
|
||||
{
|
||||
usb1_host_Disable_DetachINT();
|
||||
usb1_host_Disable_BchgINT();
|
||||
usb1_host_Enable_AttachINT();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_UsbBusReset
|
||||
* Description : Issues the USB bus reset signal.
|
||||
* Arguments : none
|
||||
* Return Value : uint16_t ; RHST
|
||||
*******************************************************************************/
|
||||
uint16_t usb1_host_UsbBusReset (void)
|
||||
{
|
||||
uint16_t buffer;
|
||||
uint16_t loop;
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.DVSTCTR0,
|
||||
1,
|
||||
USB_DVSTCTR0_USBRST_SHIFT,
|
||||
USB_DVSTCTR0_USBRST);
|
||||
RZA_IO_RegWrite_16(&USB201.DVSTCTR0,
|
||||
0,
|
||||
USB_DVSTCTR0_UACT_SHIFT,
|
||||
USB_DVSTCTR0_UACT);
|
||||
|
||||
Userdef_USB_usb1_host_delay_xms(50);
|
||||
|
||||
buffer = USB201.DVSTCTR0;
|
||||
buffer &= (uint16_t)(~(USB_HOST_BITRST));
|
||||
buffer |= USB_HOST_BITUACT;
|
||||
USB201.DVSTCTR0 = buffer;
|
||||
|
||||
Userdef_USB_usb1_host_delay_xms(20);
|
||||
|
||||
for (loop = 0, buffer = USB_HOST_HSPROC; loop < 3; ++loop)
|
||||
{
|
||||
buffer = RZA_IO_RegRead_16(&USB201.DVSTCTR0,
|
||||
USB_DVSTCTR0_RHST_SHIFT,
|
||||
USB_DVSTCTR0_RHST);
|
||||
if (buffer == USB_HOST_HSPROC)
|
||||
{
|
||||
Userdef_USB_usb1_host_delay_xms(10);
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return buffer;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_UsbResume
|
||||
* Description : Issues the USB resume signal.
|
||||
* Arguments : none
|
||||
* Return Value : int32_t ; DEVDRV_SUCCESS
|
||||
* : ; DEVDRV_ERROR
|
||||
*******************************************************************************/
|
||||
int32_t usb1_host_UsbResume (void)
|
||||
{
|
||||
uint16_t buf;
|
||||
|
||||
if ((g_usb1_host_driver_state & USB_HOST_DRV_SUSPEND) == 0)
|
||||
{
|
||||
/* not SUSPEND */
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_BCHGE_SHIFT,
|
||||
USB_INTENB1_BCHGE);
|
||||
RZA_IO_RegWrite_16(&USB201.DVSTCTR0,
|
||||
1,
|
||||
USB_DVSTCTR0_RESUME_SHIFT,
|
||||
USB_DVSTCTR0_RESUME);
|
||||
Userdef_USB_usb1_host_delay_xms(20);
|
||||
|
||||
buf = USB201.DVSTCTR0;
|
||||
buf &= (uint16_t)(~(USB_HOST_BITRESUME));
|
||||
buf |= USB_HOST_BITUACT;
|
||||
USB201.DVSTCTR0 = buf;
|
||||
|
||||
g_usb1_host_driver_state &= (uint16_t)~USB_HOST_DRV_SUSPEND;
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_UsbSuspend
|
||||
* Description : Issues the USB suspend signal.
|
||||
* Arguments : none
|
||||
* Return Value : int32_t ; DEVDRV_SUCCESS :not SUSPEND
|
||||
* : ; DEVDRV_ERROR :SUSPEND
|
||||
*******************************************************************************/
|
||||
int32_t usb1_host_UsbSuspend (void)
|
||||
{
|
||||
uint16_t buf;
|
||||
|
||||
if ((g_usb1_host_driver_state & USB_HOST_DRV_SUSPEND) != 0)
|
||||
{
|
||||
/* SUSPEND */
|
||||
return DEVDRV_ERROR;
|
||||
}
|
||||
|
||||
RZA_IO_RegWrite_16(&USB201.DVSTCTR0,
|
||||
0,
|
||||
USB_DVSTCTR0_UACT_SHIFT,
|
||||
USB_DVSTCTR0_UACT);
|
||||
|
||||
Userdef_USB_usb1_host_delay_xms(5);
|
||||
|
||||
buf = RZA_IO_RegRead_16(&USB201.SYSSTS0,
|
||||
USB_SYSSTS0_LNST_SHIFT,
|
||||
USB_SYSSTS0_LNST);
|
||||
if ((buf != USB_HOST_FS_JSTS) && (buf != USB_HOST_LS_JSTS))
|
||||
{
|
||||
usb1_host_UsbDetach();
|
||||
}
|
||||
else
|
||||
{
|
||||
g_usb1_host_driver_state |= USB_HOST_DRV_SUSPEND;
|
||||
}
|
||||
|
||||
return DEVDRV_SUCCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_Enable_DetachINT
|
||||
* Description : Enables the USB disconnection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_Enable_DetachINT (void)
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
1,
|
||||
USB_INTENB1_DTCHE_SHIFT,
|
||||
USB_INTENB1_DTCHE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_Disable_DetachINT
|
||||
* Description : Disables the USB disconnection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_Disable_DetachINT (void)
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_DTCHE_SHIFT,
|
||||
USB_INTENB1_DTCHE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_Enable_AttachINT
|
||||
* Description : Enables the USB connection detection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_Enable_AttachINT (void)
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
1,
|
||||
USB_INTENB1_ATTCHE_SHIFT,
|
||||
USB_INTENB1_ATTCHE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_Disable_AttachINT
|
||||
* Description : Disables the USB connection detection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_Disable_AttachINT (void)
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_ATTCHE_SHIFT,
|
||||
USB_INTENB1_ATTCHE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_Disable_BchgINT
|
||||
* Description : Disables the USB bus change detection interrupt.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_Disable_BchgINT (void)
|
||||
{
|
||||
USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITBCHG));
|
||||
RZA_IO_RegWrite_16(&USB201.INTENB1,
|
||||
0,
|
||||
USB_INTENB1_BCHGE_SHIFT,
|
||||
USB_INTENB1_BCHGE);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_set_devadd
|
||||
* Description : DEVADDn register is set by specified value
|
||||
* Arguments : uint16_t addr : Device address
|
||||
* : uint16_t *devadd : Set value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_set_devadd (uint16_t addr, uint16_t * devadd)
|
||||
{
|
||||
uint16_t * ptr;
|
||||
uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
|
||||
|
||||
switch (addr)
|
||||
{
|
||||
case USB_HOST_DEVICE_0:
|
||||
ptr = (uint16_t *)&USB201.DEVADD0;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_1:
|
||||
ptr = (uint16_t *)&USB201.DEVADD1;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_2:
|
||||
ptr = (uint16_t *)&USB201.DEVADD2;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_3:
|
||||
ptr = (uint16_t *)&USB201.DEVADD3;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_4:
|
||||
ptr = (uint16_t *)&USB201.DEVADD4;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_5:
|
||||
ptr = (uint16_t *)&USB201.DEVADD5;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_6:
|
||||
ptr = (uint16_t *)&USB201.DEVADD6;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_7:
|
||||
ptr = (uint16_t *)&USB201.DEVADD7;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_8:
|
||||
ptr = (uint16_t *)&USB201.DEVADD8;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_9:
|
||||
ptr = (uint16_t *)&USB201.DEVADD9;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_10:
|
||||
ptr = (uint16_t *)&USB201.DEVADDA;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = DEVDRV_FLAG_OFF;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == DEVDRV_FLAG_ON)
|
||||
{
|
||||
*ptr = (uint16_t)(*devadd & USB_HOST_DEVADD_MASK);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_get_devadd
|
||||
* Description : DEVADDn register is obtained
|
||||
* Arguments : uint16_t addr : Device address
|
||||
* : uint16_t *devadd : USB_HOST_DEVADD register value
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_get_devadd (uint16_t addr, uint16_t * devadd)
|
||||
{
|
||||
uint16_t * ptr;
|
||||
uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
|
||||
|
||||
switch (addr)
|
||||
{
|
||||
case USB_HOST_DEVICE_0:
|
||||
ptr = (uint16_t *)&USB201.DEVADD0;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_1:
|
||||
ptr = (uint16_t *)&USB201.DEVADD1;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_2:
|
||||
ptr = (uint16_t *)&USB201.DEVADD2;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_3:
|
||||
ptr = (uint16_t *)&USB201.DEVADD3;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_4:
|
||||
ptr = (uint16_t *)&USB201.DEVADD4;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_5:
|
||||
ptr = (uint16_t *)&USB201.DEVADD5;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_6:
|
||||
ptr = (uint16_t *)&USB201.DEVADD6;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_7:
|
||||
ptr = (uint16_t *)&USB201.DEVADD7;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_8:
|
||||
ptr = (uint16_t *)&USB201.DEVADD8;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_9:
|
||||
ptr = (uint16_t *)&USB201.DEVADD9;
|
||||
break;
|
||||
|
||||
case USB_HOST_DEVICE_10:
|
||||
ptr = (uint16_t *)&USB201.DEVADDA;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret_flag = DEVDRV_FLAG_OFF;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret_flag == DEVDRV_FLAG_ON)
|
||||
{
|
||||
*devadd = *ptr;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_EnableINT_Module
|
||||
* Description : Enables BEMP/NRDY/BRDY interrupt and SIGN/SACK interrupt.
|
||||
* : Enables NRDY/BEMP interrupt in the pipe0.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_EnableINT_Module (void)
|
||||
{
|
||||
uint16_t buf;
|
||||
|
||||
buf = USB201.INTENB0;
|
||||
buf |= (USB_HOST_BITBEMPE | USB_HOST_BITNRDYE | USB_HOST_BITBRDYE);
|
||||
USB201.INTENB0 = buf;
|
||||
|
||||
buf = USB201.INTENB1;
|
||||
buf |= (USB_HOST_BITSIGNE | USB_HOST_BITSACKE);
|
||||
USB201.INTENB1 = buf;
|
||||
|
||||
usb1_host_enable_nrdy_int(USB_HOST_PIPE0);
|
||||
usb1_host_enable_bemp_int(USB_HOST_PIPE0);
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,698 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_dmacdrv.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include "r_typedefs.h"
|
||||
#include "iodefine.h"
|
||||
#include "rza_io_regrw.h"
|
||||
#include "usb1_host_dmacdrv.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
#define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
|
||||
|
||||
/* ==== Request setting information for on-chip peripheral module ==== */
|
||||
typedef enum dmac_peri_req_reg_type
|
||||
{
|
||||
DMAC_REQ_MID,
|
||||
DMAC_REQ_RID,
|
||||
DMAC_REQ_AM,
|
||||
DMAC_REQ_LVL,
|
||||
DMAC_REQ_REQD
|
||||
} dmac_peri_req_reg_type_t;
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
/* ==== Prototype declaration ==== */
|
||||
|
||||
/* ==== Global variable ==== */
|
||||
/* On-chip peripheral module request setting table */
|
||||
static const uint8_t usb1_host_dmac_peri_req_init_table[8][5] =
|
||||
{
|
||||
/* MID,RID, AM,LVL,REQD */
|
||||
{ 32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
|
||||
{ 32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
|
||||
{ 33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
|
||||
{ 33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
|
||||
{ 34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
|
||||
{ 34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
|
||||
{ 35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
|
||||
{ 35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
|
||||
};
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_DMAC3_PeriReqInit
|
||||
* Description : Sets the register mode for DMA mode and the on-chip peripheral
|
||||
* : module request for transfer request for DMAC channel 3.
|
||||
* : Executes DMAC initial setting using the DMA information
|
||||
* : specified by the argument *trans_info and the enabled/disabled
|
||||
* : continuous transfer specified by the argument continuation.
|
||||
* : Registers DMAC channel 3 interrupt handler function and sets
|
||||
* : the interrupt priority level. Then enables transfer completion
|
||||
* : interrupt.
|
||||
* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
|
||||
* : : register
|
||||
* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
|
||||
* : uint32_t continuation : Set continuous transfer to be valid
|
||||
* : : after DMA transfer has been completed
|
||||
* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
|
||||
* : DMAC_SAMPLE_SINGLE : Do not execute continuous
|
||||
* : : transfer
|
||||
* : uint32_t request_factor : Factor for on-chip peripheral module
|
||||
* : : request
|
||||
* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
|
||||
* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
|
||||
* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
|
||||
* : :
|
||||
* : uint32_t req_direction : Setting value of CHCFG_n register
|
||||
* : : REQD bit
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_DMAC3_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction)
|
||||
{
|
||||
/* ==== Register mode ==== */
|
||||
if (DMAC_MODE_REGISTER == dmamode)
|
||||
{
|
||||
/* ==== Next0 register set ==== */
|
||||
DMAC3.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
|
||||
DMAC3.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
|
||||
DMAC3.N0TB_n = trans_info->count; /* Total transfer byte count */
|
||||
|
||||
/* DAD : Transfer destination address counting direction */
|
||||
/* SAD : Transfer source address counting direction */
|
||||
/* DDS : Transfer destination transfer size */
|
||||
/* SDS : Transfer source transfer size */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
trans_info->daddr_dir,
|
||||
DMAC3_CHCFG_n_DAD_SHIFT,
|
||||
DMAC3_CHCFG_n_DAD);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
trans_info->saddr_dir,
|
||||
DMAC3_CHCFG_n_SAD_SHIFT,
|
||||
DMAC3_CHCFG_n_SAD);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
trans_info->dst_size,
|
||||
DMAC3_CHCFG_n_DDS_SHIFT,
|
||||
DMAC3_CHCFG_n_DDS);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
trans_info->src_size,
|
||||
DMAC3_CHCFG_n_SDS_SHIFT,
|
||||
DMAC3_CHCFG_n_SDS);
|
||||
|
||||
/* DMS : Register mode */
|
||||
/* RSEL : Select Next0 register set */
|
||||
/* SBE : No discharge of buffer data when aborted */
|
||||
/* DEM : No DMA interrupt mask */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_DMS_SHIFT,
|
||||
DMAC3_CHCFG_n_DMS);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_RSEL_SHIFT,
|
||||
DMAC3_CHCFG_n_RSEL);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_SBE_SHIFT,
|
||||
DMAC3_CHCFG_n_SBE);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_DEM_SHIFT,
|
||||
DMAC3_CHCFG_n_DEM);
|
||||
|
||||
/* ---- Continuous transfer ---- */
|
||||
if (DMAC_SAMPLE_CONTINUATION == continuation)
|
||||
{
|
||||
/* REN : Execute continuous transfer */
|
||||
/* RSW : Change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
1,
|
||||
DMAC3_CHCFG_n_REN_SHIFT,
|
||||
DMAC3_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
1,
|
||||
DMAC3_CHCFG_n_RSW_SHIFT,
|
||||
DMAC3_CHCFG_n_RSW);
|
||||
}
|
||||
/* ---- Single transfer ---- */
|
||||
else
|
||||
{
|
||||
/* REN : Do not execute continuous transfer */
|
||||
/* RSW : Do not change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_REN_SHIFT,
|
||||
DMAC3_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_RSW_SHIFT,
|
||||
DMAC3_CHCFG_n_RSW);
|
||||
}
|
||||
|
||||
/* TM : Single transfer */
|
||||
/* SEL : Channel setting */
|
||||
/* HIEN, LOEN : On-chip peripheral module request */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_TM_SHIFT,
|
||||
DMAC3_CHCFG_n_TM);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
3,
|
||||
DMAC3_CHCFG_n_SEL_SHIFT,
|
||||
DMAC3_CHCFG_n_SEL);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
1,
|
||||
DMAC3_CHCFG_n_HIEN_SHIFT,
|
||||
DMAC3_CHCFG_n_HIEN);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
0,
|
||||
DMAC3_CHCFG_n_LOEN_SHIFT,
|
||||
DMAC3_CHCFG_n_LOEN);
|
||||
|
||||
/* ---- Set factor by specified on-chip peripheral module request ---- */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
|
||||
DMAC3_CHCFG_n_AM_SHIFT,
|
||||
DMAC3_CHCFG_n_AM);
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
|
||||
DMAC3_CHCFG_n_LVL_SHIFT,
|
||||
DMAC3_CHCFG_n_LVL);
|
||||
if (usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
|
||||
DMAC3_CHCFG_n_REQD_SHIFT,
|
||||
DMAC3_CHCFG_n_REQD);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
|
||||
req_direction,
|
||||
DMAC3_CHCFG_n_REQD_SHIFT,
|
||||
DMAC3_CHCFG_n_REQD);
|
||||
}
|
||||
RZA_IO_RegWrite_32(&DMAC23.DMARS,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
|
||||
DMAC23_DMARS_CH3_RID_SHIFT,
|
||||
DMAC23_DMARS_CH3_RID);
|
||||
RZA_IO_RegWrite_32(&DMAC23.DMARS,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
|
||||
DMAC23_DMARS_CH3_MID_SHIFT,
|
||||
DMAC23_DMARS_CH3_MID);
|
||||
|
||||
/* PR : Round robin mode */
|
||||
RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
|
||||
1,
|
||||
DMAC07_DCTRL_0_7_PR_SHIFT,
|
||||
DMAC07_DCTRL_0_7_PR);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_DMAC3_Open
|
||||
* Description : Enables DMAC channel 3 transfer.
|
||||
* Arguments : uint32_t req : DMAC request mode
|
||||
* Return Value : 0 : Succeeded in enabling DMA transfer
|
||||
* : -1 : Failed to enable DMA transfer (due to DMA operation)
|
||||
*******************************************************************************/
|
||||
int32_t usb1_host_DMAC3_Open (uint32_t req)
|
||||
{
|
||||
int32_t ret;
|
||||
volatile uint8_t dummy;
|
||||
|
||||
/* Transferable? */
|
||||
if ((0 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_EN_SHIFT,
|
||||
DMAC3_CHSTAT_n_EN)) &&
|
||||
(0 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC3_CHSTAT_n_TACT)))
|
||||
{
|
||||
/* Clear Channel Status Register */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
|
||||
1,
|
||||
DMAC3_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC3_CHCTRL_n_SWRST);
|
||||
dummy = RZA_IO_RegRead_32(&DMAC3.CHCTRL_n,
|
||||
DMAC3_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC3_CHCTRL_n_SWRST);
|
||||
/* Enable DMA transfer */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
|
||||
1,
|
||||
DMAC3_CHCTRL_n_SETEN_SHIFT,
|
||||
DMAC3_CHCTRL_n_SETEN);
|
||||
|
||||
/* ---- Request by software ---- */
|
||||
if (DMAC_REQ_MODE_SOFT == req)
|
||||
{
|
||||
/* DMA transfer Request by software */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
|
||||
1,
|
||||
DMAC3_CHCTRL_n_STG_SHIFT,
|
||||
DMAC3_CHCTRL_n_STG);
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = -1;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_DMAC3_Close
|
||||
* Description : Aborts DMAC channel 3 transfer. Returns the remaining transfer
|
||||
* : byte count at the time of DMA transfer abort to the argument
|
||||
* : *remain.
|
||||
* Arguments : uint32_t * remain : Remaining transfer byte count when
|
||||
* : : DMA transfer is aborted
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_DMAC3_Close (uint32_t * remain)
|
||||
{
|
||||
|
||||
/* ==== Abort transfer ==== */
|
||||
RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
|
||||
1,
|
||||
DMAC3_CHCTRL_n_CLREN_SHIFT,
|
||||
DMAC3_CHCTRL_n_CLREN);
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC3_CHSTAT_n_TACT))
|
||||
{
|
||||
/* Loop until transfer is aborted */
|
||||
}
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_EN_SHIFT,
|
||||
DMAC3_CHSTAT_n_EN))
|
||||
{
|
||||
/* Loop until 0 is set in EN before checking the remaining transfer byte count */
|
||||
}
|
||||
/* ==== Obtain remaining transfer byte count ==== */
|
||||
*remain = DMAC3.CRTB_n;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_DMAC3_Load_Set
|
||||
* Description : Sets the transfer source address, transfer destination
|
||||
* : address, and total transfer byte count respectively
|
||||
* : specified by the argument src_addr, dst_addr, and count to
|
||||
* : DMAC channel 3 as DMA transfer information.
|
||||
* : Sets the register set selected by the CHCFG_n register
|
||||
* : RSEL bit from the Next0 or Next1 register set.
|
||||
* : This function should be called when DMA transfer of DMAC
|
||||
* : channel 3 is aboted.
|
||||
* Arguments : uint32_t src_addr : Transfer source address
|
||||
* : uint32_t dst_addr : Transfer destination address
|
||||
* : uint32_t count : Total transfer byte count
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_DMAC3_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
|
||||
{
|
||||
uint8_t reg_set;
|
||||
|
||||
/* Obtain register set in use */
|
||||
reg_set = RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
|
||||
DMAC3_CHSTAT_n_SR_SHIFT,
|
||||
DMAC3_CHSTAT_n_SR);
|
||||
|
||||
/* ==== Load ==== */
|
||||
if (0 == reg_set)
|
||||
{
|
||||
/* ---- Next0 Register Set ---- */
|
||||
DMAC3.N0SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC3.N0DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC3.N0TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* ---- Next1 Register Set ---- */
|
||||
DMAC3.N1SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC3.N1DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC3.N1TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_DMAC4_PeriReqInit
|
||||
* Description : Sets the register mode for DMA mode and the on-chip peripheral
|
||||
* : module request for transfer request for DMAC channel 4.
|
||||
* : Executes DMAC initial setting using the DMA information
|
||||
* : specified by the argument *trans_info and the enabled/disabled
|
||||
* : continuous transfer specified by the argument continuation.
|
||||
* : Registers DMAC channel 4 interrupt handler function and sets
|
||||
* : the interrupt priority level. Then enables transfer completion
|
||||
* : interrupt.
|
||||
* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
|
||||
* : : register
|
||||
* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
|
||||
* : uint32_t continuation : Set continuous transfer to be valid
|
||||
* : : after DMA transfer has been completed
|
||||
* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
|
||||
* : DMAC_SAMPLE_SINGLE : Do not execute continuous
|
||||
* : : transfer
|
||||
* : uint32_t request_factor : Factor for on-chip peripheral module
|
||||
* : : request
|
||||
* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
|
||||
* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
|
||||
* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
|
||||
* : :
|
||||
* : uint32_t req_direction : Setting value of CHCFG_n register
|
||||
* : : REQD bit
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_DMAC4_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
|
||||
uint32_t request_factor, uint32_t req_direction)
|
||||
{
|
||||
/* ==== Register mode ==== */
|
||||
if (DMAC_MODE_REGISTER == dmamode)
|
||||
{
|
||||
/* ==== Next0 register set ==== */
|
||||
DMAC4.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
|
||||
DMAC4.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
|
||||
DMAC4.N0TB_n = trans_info->count; /* Total transfer byte count */
|
||||
|
||||
/* DAD : Transfer destination address counting direction */
|
||||
/* SAD : Transfer source address counting direction */
|
||||
/* DDS : Transfer destination transfer size */
|
||||
/* SDS : Transfer source transfer size */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
trans_info->daddr_dir,
|
||||
DMAC4_CHCFG_n_DAD_SHIFT,
|
||||
DMAC4_CHCFG_n_DAD);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
trans_info->saddr_dir,
|
||||
DMAC4_CHCFG_n_SAD_SHIFT,
|
||||
DMAC4_CHCFG_n_SAD);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
trans_info->dst_size,
|
||||
DMAC4_CHCFG_n_DDS_SHIFT,
|
||||
DMAC4_CHCFG_n_DDS);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
trans_info->src_size,
|
||||
DMAC4_CHCFG_n_SDS_SHIFT,
|
||||
DMAC4_CHCFG_n_SDS);
|
||||
|
||||
/* DMS : Register mode */
|
||||
/* RSEL : Select Next0 register set */
|
||||
/* SBE : No discharge of buffer data when aborted */
|
||||
/* DEM : No DMA interrupt mask */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_DMS_SHIFT,
|
||||
DMAC4_CHCFG_n_DMS);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_RSEL_SHIFT,
|
||||
DMAC4_CHCFG_n_RSEL);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_SBE_SHIFT,
|
||||
DMAC4_CHCFG_n_SBE);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_DEM_SHIFT,
|
||||
DMAC4_CHCFG_n_DEM);
|
||||
|
||||
/* ---- Continuous transfer ---- */
|
||||
if (DMAC_SAMPLE_CONTINUATION == continuation)
|
||||
{
|
||||
/* REN : Execute continuous transfer */
|
||||
/* RSW : Change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
1,
|
||||
DMAC4_CHCFG_n_REN_SHIFT,
|
||||
DMAC4_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
1,
|
||||
DMAC4_CHCFG_n_RSW_SHIFT,
|
||||
DMAC4_CHCFG_n_RSW);
|
||||
}
|
||||
/* ---- Single transfer ---- */
|
||||
else
|
||||
{
|
||||
/* REN : Do not execute continuous transfer */
|
||||
/* RSW : Do not change register set when DMA transfer is completed. */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_REN_SHIFT,
|
||||
DMAC4_CHCFG_n_REN);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_RSW_SHIFT,
|
||||
DMAC4_CHCFG_n_RSW);
|
||||
}
|
||||
|
||||
/* TM : Single transfer */
|
||||
/* SEL : Channel setting */
|
||||
/* HIEN, LOEN : On-chip peripheral module request */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_TM_SHIFT,
|
||||
DMAC4_CHCFG_n_TM);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
4,
|
||||
DMAC4_CHCFG_n_SEL_SHIFT,
|
||||
DMAC4_CHCFG_n_SEL);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
1,
|
||||
DMAC4_CHCFG_n_HIEN_SHIFT,
|
||||
DMAC4_CHCFG_n_HIEN);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
0,
|
||||
DMAC4_CHCFG_n_LOEN_SHIFT,
|
||||
DMAC4_CHCFG_n_LOEN);
|
||||
|
||||
/* ---- Set factor by specified on-chip peripheral module request ---- */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
|
||||
DMAC4_CHCFG_n_AM_SHIFT,
|
||||
DMAC4_CHCFG_n_AM);
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
|
||||
DMAC4_CHCFG_n_LVL_SHIFT,
|
||||
DMAC4_CHCFG_n_LVL);
|
||||
if (usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
|
||||
DMAC4_CHCFG_n_REQD_SHIFT,
|
||||
DMAC4_CHCFG_n_REQD);
|
||||
}
|
||||
else
|
||||
{
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
|
||||
req_direction,
|
||||
DMAC4_CHCFG_n_REQD_SHIFT,
|
||||
DMAC4_CHCFG_n_REQD);
|
||||
}
|
||||
RZA_IO_RegWrite_32(&DMAC45.DMARS,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
|
||||
DMAC45_DMARS_CH4_RID_SHIFT,
|
||||
DMAC45_DMARS_CH4_RID);
|
||||
RZA_IO_RegWrite_32(&DMAC45.DMARS,
|
||||
usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
|
||||
DMAC45_DMARS_CH4_MID_SHIFT,
|
||||
DMAC45_DMARS_CH4_MID);
|
||||
|
||||
/* PR : Round robin mode */
|
||||
RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
|
||||
1,
|
||||
DMAC07_DCTRL_0_7_PR_SHIFT,
|
||||
DMAC07_DCTRL_0_7_PR);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_DMAC4_Open
|
||||
* Description : Enables DMAC channel 4 transfer.
|
||||
* Arguments : uint32_t req : DMAC request mode
|
||||
* Return Value : 0 : Succeeded in enabling DMA transfer
|
||||
* : -1 : Failed to enable DMA transfer (due to DMA operation)
|
||||
*******************************************************************************/
|
||||
int32_t usb1_host_DMAC4_Open (uint32_t req)
|
||||
{
|
||||
int32_t ret;
|
||||
volatile uint8_t dummy;
|
||||
|
||||
/* Transferable? */
|
||||
if ((0 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_EN_SHIFT,
|
||||
DMAC4_CHSTAT_n_EN)) &&
|
||||
(0 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC4_CHSTAT_n_TACT)))
|
||||
{
|
||||
/* Clear Channel Status Register */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
|
||||
1,
|
||||
DMAC4_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC4_CHCTRL_n_SWRST);
|
||||
dummy = RZA_IO_RegRead_32(&DMAC4.CHCTRL_n,
|
||||
DMAC4_CHCTRL_n_SWRST_SHIFT,
|
||||
DMAC4_CHCTRL_n_SWRST);
|
||||
/* Enable DMA transfer */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
|
||||
1,
|
||||
DMAC4_CHCTRL_n_SETEN_SHIFT,
|
||||
DMAC4_CHCTRL_n_SETEN);
|
||||
|
||||
/* ---- Request by software ---- */
|
||||
if (DMAC_REQ_MODE_SOFT == req)
|
||||
{
|
||||
/* DMA transfer Request by software */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
|
||||
1,
|
||||
DMAC4_CHCTRL_n_STG_SHIFT,
|
||||
DMAC4_CHCTRL_n_STG);
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = -1;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_DMAC4_Close
|
||||
* Description : Aborts DMAC channel 4 transfer. Returns the remaining transfer
|
||||
* : byte count at the time of DMA transfer abort to the argument
|
||||
* : *remain.
|
||||
* Arguments : uint32_t * remain : Remaining transfer byte count when
|
||||
* : : DMA transfer is aborted
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_DMAC4_Close (uint32_t * remain)
|
||||
{
|
||||
|
||||
/* ==== Abort transfer ==== */
|
||||
RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
|
||||
1,
|
||||
DMAC4_CHCTRL_n_CLREN_SHIFT,
|
||||
DMAC4_CHCTRL_n_CLREN);
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_TACT_SHIFT,
|
||||
DMAC4_CHSTAT_n_TACT))
|
||||
{
|
||||
/* Loop until transfer is aborted */
|
||||
}
|
||||
|
||||
while (1 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_EN_SHIFT,
|
||||
DMAC4_CHSTAT_n_EN))
|
||||
{
|
||||
/* Loop until 0 is set in EN before checking the remaining transfer byte count */
|
||||
}
|
||||
/* ==== Obtain remaining transfer byte count ==== */
|
||||
*remain = DMAC4.CRTB_n;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_DMAC4_Load_Set
|
||||
* Description : Sets the transfer source address, transfer destination
|
||||
* : address, and total transfer byte count respectively
|
||||
* : specified by the argument src_addr, dst_addr, and count to
|
||||
* : DMAC channel 4 as DMA transfer information.
|
||||
* : Sets the register set selected by the CHCFG_n register
|
||||
* : RSEL bit from the Next0 or Next1 register set.
|
||||
* : This function should be called when DMA transfer of DMAC
|
||||
* : channel 4 is aboted.
|
||||
* Arguments : uint32_t src_addr : Transfer source address
|
||||
* : uint32_t dst_addr : Transfer destination address
|
||||
* : uint32_t count : Total transfer byte count
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void usb1_host_DMAC4_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
|
||||
{
|
||||
uint8_t reg_set;
|
||||
|
||||
/* Obtain register set in use */
|
||||
reg_set = RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
|
||||
DMAC4_CHSTAT_n_SR_SHIFT,
|
||||
DMAC4_CHSTAT_n_SR);
|
||||
|
||||
/* ==== Load ==== */
|
||||
if (0 == reg_set)
|
||||
{
|
||||
/* ---- Next0 Register Set ---- */
|
||||
DMAC4.N0SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC4.N0DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC4.N0TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* ---- Next1 Register Set ---- */
|
||||
DMAC4.N1SA_n = src_addr; /* Start address of transfer source */
|
||||
DMAC4.N1DA_n = dst_addr; /* Start address of transfer destination */
|
||||
DMAC4.N1TB_n = count; /* Total transfer byte count */
|
||||
}
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,778 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
/*******************************************************************************
|
||||
* File Name : usb1_host_userdef.c
|
||||
* $Rev: 1116 $
|
||||
* $Date:: 2014-07-09 16:29:19 +0900#$
|
||||
* Device(s) : RZ/A1H
|
||||
* Tool-Chain :
|
||||
* OS : None
|
||||
* H/W Platform :
|
||||
* Description : RZ/A1H R7S72100 USB Sample Program
|
||||
* Operation :
|
||||
* Limitations :
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Includes <System Includes> , "Project Includes"
|
||||
*******************************************************************************/
|
||||
#include <stdio.h>
|
||||
#include "cmsis_os.h"
|
||||
#include "r_typedefs.h"
|
||||
#include "iodefine.h"
|
||||
#include "devdrv_usb_host_api.h"
|
||||
#include "usb1_host.h"
|
||||
#include "MBRZA1H.h" /* INTC Driver Header */
|
||||
#include "usb1_host_dmacdrv.h"
|
||||
#include "ohci_wrapp_RZ_A1_local.h"
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Typedef definitions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Macro definitions
|
||||
*******************************************************************************/
|
||||
#define DUMMY_ACCESS OSTM0CNT
|
||||
|
||||
/* #define CACHE_WRITEBACK */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Imported global variables and functions (from other files)
|
||||
*******************************************************************************/
|
||||
extern int32_t io_cwb(unsigned long start, unsigned long end);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Exported global variables and functions (to be accessed by other files)
|
||||
*******************************************************************************/
|
||||
static void usb1_host_enable_dmac0(uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
|
||||
static void usb1_host_enable_dmac1(uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
|
||||
static void Userdef_USB_usb1_host_delay_10us_2(void);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
Private global variables and functions
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_d0fifo_dmaintid
|
||||
* Description : get D0FIFO DMA Interrupt ID
|
||||
* Arguments : none
|
||||
* Return Value : D0FIFO DMA Interrupt ID
|
||||
*******************************************************************************/
|
||||
uint16_t Userdef_USB_usb1_host_d0fifo_dmaintid (void)
|
||||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
return 0xFFFF;
|
||||
#else
|
||||
return DMAINT1_IRQn;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_d1fifo_dmaintid
|
||||
* Description : get D1FIFO DMA Interrupt ID
|
||||
* Arguments : none
|
||||
* Return Value : D1FIFO DMA Interrupt ID
|
||||
*******************************************************************************/
|
||||
uint16_t Userdef_USB_usb1_host_d1fifo_dmaintid (void)
|
||||
{
|
||||
#if(1) /* ohci_wrapp */
|
||||
return 0xFFFF;
|
||||
#else
|
||||
return DMAINT2_IRQn;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_attach
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_attach (void)
|
||||
{
|
||||
// printf("\n");
|
||||
// printf("channel 1 attach device\n");
|
||||
// printf("\n");
|
||||
ohciwrapp_loc_Connect(1);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_detach
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_detach (void)
|
||||
{
|
||||
// printf("\n");
|
||||
// printf("channel 1 detach device\n");
|
||||
// printf("\n");
|
||||
ohciwrapp_loc_Connect(0);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_delay_1ms
|
||||
* Description : Wait for the software of 1ms.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_delay_1ms (void)
|
||||
{
|
||||
osDelay(1);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_delay_xms
|
||||
* Description : Wait for the software in the period of time specified by the
|
||||
* : argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : uint32_t msec ; Wait Time (msec)
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_delay_xms (uint32_t msec)
|
||||
{
|
||||
osDelay(msec);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_delay_10us
|
||||
* Description : Waits for software for the period specified by the argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : uint32_t usec ; Wait Time(x 10usec)
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_delay_10us (uint32_t usec)
|
||||
{
|
||||
volatile int i;
|
||||
|
||||
/* Wait 10us (Please change for your MCU) */
|
||||
for (i = 0; i < usec; ++i)
|
||||
{
|
||||
Userdef_USB_usb1_host_delay_10us_2();
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_delay_10us_2
|
||||
* Description : Waits for software for the period specified by the argument.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void Userdef_USB_usb1_host_delay_10us_2 (void)
|
||||
{
|
||||
volatile int i;
|
||||
volatile unsigned long tmp;
|
||||
|
||||
/* Wait 1us (Please change for your MCU) */
|
||||
for (i = 0; i < 14; ++i)
|
||||
{
|
||||
tmp = DUMMY_ACCESS;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_delay_500ns
|
||||
* Description : Wait for software for 500ns.
|
||||
* : Alter this function according to the user's system.
|
||||
* Arguments : none
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_delay_500ns (void)
|
||||
{
|
||||
volatile int i;
|
||||
volatile unsigned long tmp;
|
||||
|
||||
/* Wait 500ns (Please change for your MCU) */
|
||||
/* Wait 500ns I clock 266MHz */
|
||||
tmp = DUMMY_ACCESS;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_start_dma
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* : Set DMAC register by this function to enable DMA transfer.
|
||||
* : After executing this function, USB module is set to start DMA
|
||||
* : transfer. DMA transfer should not wait for DMA transfer complete.
|
||||
* Arguments : USB_HOST_DMA_t *dma : DMA parameter
|
||||
* : typedef struct{
|
||||
* : uint32_t fifo; FIFO for using
|
||||
* : uint32_t buffer; Start address of transfer source/destination
|
||||
* : uint32_t bytes; Transfer size(Byte)
|
||||
* : uint32_t dir; Transfer direction(0:Buffer->FIFO, 1:FIFO->Buffer)
|
||||
* : uint32_t size; DMA transfer size
|
||||
* : } USB_HOST_DMA_t;
|
||||
* : uint16_t dfacc ; 0 : cycle steal mode
|
||||
* : 1 : 16byte continuous mode
|
||||
* : 2 : 32byte continuous mode
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_start_dma (USB_HOST_DMA_t * dma, uint16_t dfacc)
|
||||
{
|
||||
uint32_t trncount;
|
||||
uint32_t src;
|
||||
uint32_t dst;
|
||||
uint32_t size;
|
||||
uint32_t dir;
|
||||
#ifdef CACHE_WRITEBACK
|
||||
uint32_t ptr;
|
||||
#endif
|
||||
|
||||
trncount = dma->bytes;
|
||||
dir = dma->dir;
|
||||
|
||||
if (dir == USB_HOST_FIFO2BUF)
|
||||
{
|
||||
/* DxFIFO determination */
|
||||
dst = dma->buffer;
|
||||
#ifndef __USB_HOST_DF_ACC_ENABLE__
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
size = dma->size;
|
||||
|
||||
if (size == 0)
|
||||
{
|
||||
src += 3; /* byte access */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
src += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
#else
|
||||
size = dma->size;
|
||||
|
||||
if (size == 2)
|
||||
{
|
||||
/* 32bit access */
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
/* 16bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
src += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 8bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
src = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
src = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
src += 3; /* byte access */
|
||||
}
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/* DxFIFO determination */
|
||||
src = dma->buffer;
|
||||
#ifndef __USB_HOST_DF_ACC_ENABLE__
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
size = dma->size;
|
||||
|
||||
if (size == 0)
|
||||
{
|
||||
dst += 3; /* byte access */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
dst += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
#else
|
||||
size = dma->size;
|
||||
if (size == 2)
|
||||
{
|
||||
/* 32bit access */
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFOB0);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFOB0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
/* 16bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
dst += 2; /* short access */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 8bit access */
|
||||
dfacc = 0; /* force normal access */
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D0FIFO.UINT32);
|
||||
}
|
||||
else
|
||||
{
|
||||
dst = (uint32_t)(&USB201.D1FIFO.UINT32);
|
||||
}
|
||||
dst += 3; /* byte access */
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CACHE_WRITEBACK
|
||||
ptr = (uint32_t)dma->buffer;
|
||||
if ((ptr & 0x20000000ul) == 0)
|
||||
{
|
||||
io_cwb((uint32_t)ptr,(uint32_t)(ptr)+trncount);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dma->fifo == USB_HOST_D0FIFO_DMA)
|
||||
{
|
||||
usb1_host_enable_dmac0(src, dst, trncount, size, dir, dma->fifo, dfacc);
|
||||
}
|
||||
else
|
||||
{
|
||||
usb1_host_enable_dmac1(src, dst, trncount, size, dir, dma->fifo, dfacc);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_enable_dmac0
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* Arguments : uint32_t src : src address
|
||||
* : uint32_t dst : dst address
|
||||
* : uint32_t count : transfer byte
|
||||
* : uint32_t size : transfer size
|
||||
* : uint32_t dir : direction
|
||||
* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
|
||||
* : uint16_t dfacc : 0 : normal access
|
||||
* : : 1 : 16byte access
|
||||
* : : 2 : 32byte access
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_host_enable_dmac0 (uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
|
||||
{
|
||||
dmac_transinfo_t trans_info;
|
||||
uint32_t request_factor = 0;
|
||||
int32_t ret;
|
||||
|
||||
/* ==== Variable setting for DMAC initialization ==== */
|
||||
trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
|
||||
trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
|
||||
trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
|
||||
#ifndef __USB_HOST_DF_ACC_ENABLE__
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("size error!!\n");
|
||||
}
|
||||
#else
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("size error!!\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dir == USB_HOST_FIFO2BUF)
|
||||
{
|
||||
request_factor = DMAC_REQ_USB1_DMA0_RX; /* USB_0 channel 0 receive FIFO full */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else if (dir == USB_HOST_BUF2FIFO)
|
||||
{
|
||||
request_factor = DMAC_REQ_USB1_DMA0_TX; /* USB_0 channel 0 receive FIFO empty */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
/* ==== DMAC initialization ==== */
|
||||
usb1_host_DMAC3_PeriReqInit((const dmac_transinfo_t *)&trans_info,
|
||||
DMAC_MODE_REGISTER,
|
||||
DMAC_SAMPLE_SINGLE,
|
||||
request_factor,
|
||||
0); /* Don't care DMAC_REQ_REQD is setting in usb1_host_DMAC3_PeriReqInit() */
|
||||
|
||||
/* ==== DMAC startup ==== */
|
||||
ret = usb1_host_DMAC3_Open(DMAC_REQ_MODE_PERI);
|
||||
|
||||
if (ret != 0)
|
||||
{
|
||||
// printf("DMAC3 Open error!!\n");
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: usb1_host_enable_dmac1
|
||||
* Description : Enables DMA transfer on the information specified by the argument.
|
||||
* Arguments : uint32_t src : src address
|
||||
* : uint32_t dst : dst address
|
||||
* : uint32_t count : transfer byte
|
||||
* : uint32_t size : transfer size
|
||||
* : uint32_t dir : direction
|
||||
* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
|
||||
* : uint16_t dfacc : 0 : normal access
|
||||
* : : 1 : 16byte access
|
||||
* : : 2 : 32byte access
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
static void usb1_host_enable_dmac1 (uint32_t src, uint32_t dst, uint32_t count,
|
||||
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
|
||||
{
|
||||
dmac_transinfo_t trans_info;
|
||||
uint32_t request_factor = 0;
|
||||
int32_t ret;
|
||||
|
||||
/* ==== Variable setting for DMAC initialization ==== */
|
||||
trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
|
||||
trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
|
||||
trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
|
||||
#ifndef __USB_HOST_DF_ACC_ENABLE__
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("size error!!\n");
|
||||
}
|
||||
#else
|
||||
if (dfacc == 2)
|
||||
{
|
||||
/* 32byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (dfacc == 1)
|
||||
{
|
||||
/* 16byte access */
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* normal access */
|
||||
if (size == 0)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 1)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
|
||||
}
|
||||
else if (size == 2)
|
||||
{
|
||||
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
|
||||
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
|
||||
}
|
||||
else
|
||||
{
|
||||
// printf("size error!!\n");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
if (dir == USB_HOST_FIFO2BUF)
|
||||
{
|
||||
request_factor =DMAC_REQ_USB1_DMA1_RX; /* USB_0 channel 0 receive FIFO full */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else if (dir == USB_HOST_BUF2FIFO)
|
||||
{
|
||||
request_factor =DMAC_REQ_USB1_DMA1_TX; /* USB_0 channel 0 receive FIFO empty */
|
||||
trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
|
||||
trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Do Nothing */
|
||||
}
|
||||
|
||||
/* ==== DMAC initialization ==== */
|
||||
usb1_host_DMAC4_PeriReqInit((const dmac_transinfo_t *)&trans_info,
|
||||
DMAC_MODE_REGISTER,
|
||||
DMAC_SAMPLE_SINGLE,
|
||||
request_factor,
|
||||
0); /* Don't care DMAC_REQ_REQD is setting in usb1_host_DMAC4_PeriReqInit() */
|
||||
|
||||
/* ==== DMAC startup ==== */
|
||||
ret = usb1_host_DMAC4_Open(DMAC_REQ_MODE_PERI);
|
||||
|
||||
if (ret != 0)
|
||||
{
|
||||
// printf("DMAC4 Open error!!\n");
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_stop_dma0
|
||||
* Description : Disables DMA transfer.
|
||||
* Arguments : none
|
||||
* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
|
||||
* : regarding to the bus width.
|
||||
* Notice : This function should be executed to DMAC executed at the time
|
||||
* : of specification of D0_FIF0_DMA in dma->fifo.
|
||||
*******************************************************************************/
|
||||
uint32_t Userdef_USB_usb1_host_stop_dma0 (void)
|
||||
{
|
||||
uint32_t remain;
|
||||
|
||||
/* ==== DMAC release ==== */
|
||||
usb1_host_DMAC3_Close(&remain);
|
||||
|
||||
return remain;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_stop_dma1
|
||||
* Description : Disables DMA transfer.
|
||||
* : This function should be executed to DMAC executed at the time
|
||||
* : of specification of D1_FIF0_DMA in dma->fifo.
|
||||
* Arguments : none
|
||||
* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
|
||||
* : regarding to the bus width.
|
||||
*******************************************************************************/
|
||||
uint32_t Userdef_USB_usb1_host_stop_dma1 (void)
|
||||
{
|
||||
uint32_t remain;
|
||||
|
||||
/* ==== DMAC release ==== */
|
||||
usb1_host_DMAC4_Close(&remain);
|
||||
|
||||
return remain;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_notice
|
||||
* Description : Notice of USER
|
||||
* Arguments : const char *format
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_notice (const char * format)
|
||||
{
|
||||
// printf(format);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Userdef_USB_usb1_host_user_rdy
|
||||
* Description : This function notify a user and wait for trigger
|
||||
* Arguments : const char *format
|
||||
* : uint16_t data
|
||||
* Return Value : none
|
||||
*******************************************************************************/
|
||||
void Userdef_USB_usb1_host_user_rdy (const char * format, uint16_t data)
|
||||
{
|
||||
// printf(format, data);
|
||||
getchar();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/* End of File */
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
/*******************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only
|
||||
* intended for use with Renesas products. No other uses are authorized. This
|
||||
* software is owned by Renesas Electronics Corporation and is protected under
|
||||
* all applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
|
||||
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
|
||||
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
|
||||
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
|
||||
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
|
||||
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
|
||||
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
|
||||
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software
|
||||
* and to discontinue the availability of this software. By using this software,
|
||||
* you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
* Copyright (C) 2014 - 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef USB_HOST_SETTING_H
|
||||
#define USB_HOST_SETTING_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define USB_HOST_CH 0
|
||||
#define USB_HOST_HISPEED 1
|
||||
|
||||
#define INT_TRANS_MAX_NUM 4 /* min:1 max:4 */
|
||||
#define ISO_TRANS_MAX_NUM 0 /* min:0 max:2 */
|
||||
|
||||
#if (USB_HOST_CH == 0)
|
||||
#include "usb0_host.h"
|
||||
#define USB20X USB200
|
||||
#define USBIXUSBIX USBI0_IRQn
|
||||
#define g_usbx_host_SupportUsbDeviceSpeed g_usb0_host_SupportUsbDeviceSpeed
|
||||
#define g_usbx_host_UsbDeviceSpeed g_usb0_host_UsbDeviceSpeed
|
||||
#define g_usbx_host_CmdStage g_usb0_host_CmdStage
|
||||
#define g_usbx_host_pipe_status g_usb0_host_pipe_status
|
||||
#define g_usbx_host_data_pointer g_usb0_host_data_pointer
|
||||
#define g_usbx_host_data_count g_usb0_host_data_count
|
||||
#define usbx_api_host_init usb0_api_host_init
|
||||
#define usbx_host_UsbBusReset usb0_host_UsbBusReset
|
||||
#define usbx_host_get_devadd usb0_host_get_devadd
|
||||
#define usbx_host_set_devadd usb0_host_set_devadd
|
||||
#define usbx_host_SetupStage usb0_host_SetupStage
|
||||
#define usbx_host_CtrlWriteStart usb0_host_CtrlWriteStart
|
||||
#define usbx_host_CtrlReadStart usb0_host_CtrlReadStart
|
||||
#define usbx_api_host_SetEndpointTable usb0_api_host_SetEndpointTable
|
||||
#define usbx_host_start_send_transfer usb0_host_start_send_transfer
|
||||
#define usbx_host_start_receive_transfer usb0_host_start_receive_transfer
|
||||
#define usbx_host_stop_transfer usb0_host_stop_transfer
|
||||
#define usbx_host_set_sqclr usb0_host_set_sqclr
|
||||
#define usbx_host_set_sqset usb0_host_set_sqset
|
||||
#define usbx_host_CheckAttach usb0_host_CheckAttach
|
||||
#define usbx_host_UsbDetach usb0_host_UsbDetach
|
||||
#define usbx_host_UsbAttach usb0_host_UsbAttach
|
||||
#define usbx_host_init_pipe_status usb0_host_init_pipe_status
|
||||
#define usbx_host_get_sqmon usb0_host_get_sqmon
|
||||
#else
|
||||
#include "usb1_host.h"
|
||||
#define USB20X USB201
|
||||
#define USBIXUSBIX USBI1_IRQn
|
||||
#define g_usbx_host_SupportUsbDeviceSpeed g_usb1_host_SupportUsbDeviceSpeed
|
||||
#define g_usbx_host_UsbDeviceSpeed g_usb1_host_UsbDeviceSpeed
|
||||
#define g_usbx_host_CmdStage g_usb1_host_CmdStage
|
||||
#define g_usbx_host_pipe_status g_usb1_host_pipe_status
|
||||
#define g_usbx_host_data_pointer g_usb1_host_data_pointer
|
||||
#define g_usbx_host_data_count g_usb1_host_data_count
|
||||
#define usbx_api_host_init usb1_api_host_init
|
||||
#define usbx_host_UsbBusReset usb1_host_UsbBusReset
|
||||
#define usbx_host_get_devadd usb1_host_get_devadd
|
||||
#define usbx_host_set_devadd usb1_host_set_devadd
|
||||
#define usbx_host_SetupStage usb1_host_SetupStage
|
||||
#define usbx_host_CtrlWriteStart usb1_host_CtrlWriteStart
|
||||
#define usbx_host_CtrlReadStart usb1_host_CtrlReadStart
|
||||
#define usbx_api_host_SetEndpointTable usb1_api_host_SetEndpointTable
|
||||
#define usbx_host_start_send_transfer usb1_host_start_send_transfer
|
||||
#define usbx_host_start_receive_transfer usb1_host_start_receive_transfer
|
||||
#define usbx_host_stop_transfer usb1_host_stop_transfer
|
||||
#define usbx_host_set_sqclr usb1_host_set_sqclr
|
||||
#define usbx_host_set_sqset usb1_host_set_sqset
|
||||
#define usbx_host_CheckAttach usb1_host_CheckAttach
|
||||
#define usbx_host_UsbDetach usb1_host_UsbDetach
|
||||
#define usbx_host_UsbAttach usb1_host_UsbAttach
|
||||
#define usbx_host_init_pipe_status usb1_host_init_pipe_status
|
||||
#define usbx_host_get_sqmon usb1_host_get_sqmon
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* USB_HOST_SETTING_H */
|
||||
|
|
@ -47,7 +47,7 @@ USBHALHost::USBHALHost() {
|
|||
}
|
||||
|
||||
void USBHALHost::init() {
|
||||
ohciwrapp_init(&_usbisr, 1);
|
||||
ohciwrapp_init(&_usbisr);
|
||||
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROL, 1); // HARDWARE RESET
|
||||
ohciwrapp_reg_w(OHCI_REG_CONTROLHEADED, 0); // Initialize Control list head to Zero
|
||||
|
|
@ -266,9 +266,6 @@ void USBHALHost::UsbIrqhandler() {
|
|||
usb_hcca->DoneHead = 0;
|
||||
}
|
||||
|
||||
// wait 200ms to avoid bounce
|
||||
wait_ms(200);
|
||||
|
||||
deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
|
||||
|
||||
if (int_status & OR_INTR_STATUS_WDH) {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,21 @@
|
|||
|
||||
; MAX32610
|
||||
; 256KB FLASH (0x40000) @ 0x000000000
|
||||
; 2KB RAM (0x8000) @ 0x20000000
|
||||
|
||||
|
||||
; MAX32610: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
|
||||
|
||||
LR_IROM1 0x00000000 0x40000 { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; [RAM] Vector table dynamic copy: 79 vectors * 4 bytes = (0x140) - alignment
|
||||
RW_IRAM1 (0x20000000+0x140) (0x8000-0x140) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,256 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
__initial_sp EQU 0x20008000 ; Top of RAM
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp /* Top of Stack */
|
||||
DCD Reset_Handler /* Reset Handler */
|
||||
DCD NMI_Handler /* NMI Handler */
|
||||
DCD HardFault_Handler /* Hard Fault Handler */
|
||||
DCD DefaultIRQ_Handler /* MPU Fault Handler */
|
||||
DCD DefaultIRQ_Handler /* Bus Fault Handler */
|
||||
DCD DefaultIRQ_Handler /* Usage Fault Handler */
|
||||
DCD 0 /* Reserved */
|
||||
DCD 0 /* Reserved */
|
||||
DCD 0 /* Reserved */
|
||||
DCD 0 /* Reserved */
|
||||
DCD DefaultIRQ_Handler /* SVCall Handler */
|
||||
DCD DebugMon_Handler /* Debug Monitor Handler */
|
||||
DCD 0 /* Reserved */
|
||||
DCD DefaultIRQ_Handler /* PendSV Handler */
|
||||
DCD SysTick_IRQHandler /* SysTick Handler */
|
||||
|
||||
/* Maxim 32610 Externals interrupts */
|
||||
DCD UART0_IRQHandler /* 16: 1 UART0 */
|
||||
DCD UART1_IRQHandler /* 17: 2 UART1 */
|
||||
DCD I2CM0_IRQHandler /* 18: 3 I2C Master 0 */
|
||||
DCD I2CS_IRQHandler /* 19: 4 I2C Slave */
|
||||
DCD USB_IRQHandler /* 20: 5 USB */
|
||||
DCD PMU_IRQHandler /* 21: 6 DMA */
|
||||
DCD AFE_IRQHandler /* 22: 7 AFE */
|
||||
DCD MAA_IRQHandler /* 23: 8 MAA */
|
||||
DCD AES_IRQHandler /* 24: 9 AES */
|
||||
DCD SPI0_IRQHandler /* 25:10 SPI0 */
|
||||
DCD SPI1_IRQHandler /* 26:11 SPI1 */
|
||||
DCD SPI2_IRQHandler /* 27:12 SPI2 */
|
||||
DCD TMR0_IRQHandler /* 28:13 Timer32-0 */
|
||||
DCD TMR1_IRQHandler /* 29:14 Timer32-1 */
|
||||
DCD TMR2_IRQHandler /* 30:15 Timer32-1 */
|
||||
DCD TMR3_IRQHandler /* 31:16 Timer32-2 */
|
||||
DCD RSVD0_IRQHandler /* 32:17 RSVD */
|
||||
DCD RSVD1_IRQHandler /* 33:18 RSVD */
|
||||
DCD DAC0_IRQHandler /* 34:19 DAC0 (12-bit DAC) */
|
||||
DCD DAC1_IRQHandler /* 35:20 DAC1 (12-bit DAC) */
|
||||
DCD DAC2_IRQHandler /* 36:21 DAC2 (8-bit DAC) */
|
||||
DCD DAC3_IRQHandler /* 37:22 DAC3 (8-bit DAC) */
|
||||
DCD ADC_IRQHandler /* 38:23 ADC */
|
||||
DCD FLC_IRQHandler /* 39:24 Flash Controller */
|
||||
DCD PWRMAN_IRQHandler /* 40:25 PWRMAN */
|
||||
DCD CLKMAN_IRQHandler /* 41:26 CLKMAN */
|
||||
DCD RTC0_IRQHandler /* 42:27 RTC INT0 */
|
||||
DCD RTC1_IRQHandler /* 43:28 RTC INT1 */
|
||||
DCD RTC2_IRQHandler /* 44:29 RTC INT2 */
|
||||
DCD RTC3_IRQHandler /* 45:30 RTC INT3 */
|
||||
DCD WDT0_IRQHandler /* 46:31 WATCHDOG0 */
|
||||
DCD WDT0_P_IRQHandler /* 47:32 WATCHDOG0 PRE-WINDOW */
|
||||
DCD WDT1_IRQHandler /* 48:33 WATCHDOG1 */
|
||||
DCD WDT1_P_IRQHandler /* 49:34 WATCHDOG1 PRE-WINDOW */
|
||||
DCD GPIO_P0_IRQHandler /* 50:35 GPIO Port 0 */
|
||||
DCD GPIO_P1_IRQHandler /* 51:36 GPIO Port 1 */
|
||||
DCD GPIO_P2_IRQHandler /* 52:37 GPIO Port 2 */
|
||||
DCD GPIO_P3_IRQHandler /* 53:38 GPIO Port 3 */
|
||||
DCD GPIO_P4_IRQHandler /* 54:39 GPIO Port 4 */
|
||||
DCD GPIO_P5_IRQHandler /* 55:40 GPIO Port 5 */
|
||||
DCD GPIO_P6_IRQHandler /* 56:41 GPIO Port 6 */
|
||||
DCD GPIO_P7_IRQHandler /* 57:42 GPIO Port 7 */
|
||||
DCD TMR16_0_IRQHandler /* 58:43 Timer16-s0 */
|
||||
DCD TMR16_1_IRQHandler /* 59:44 Timer16-s1 */
|
||||
DCD TMR16_2_IRQHandler /* 60:45 Timer16-s2 */
|
||||
DCD TMR16_3_IRQHandler /* 61:46 Timer16-s3 */
|
||||
DCD I2CM1_IRQHandler /* 62:47 I2C Master 1 */
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B NMI_Handler
|
||||
ENDP
|
||||
|
||||
HardFault_Handler PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B HardFault_Handler
|
||||
ENDP
|
||||
|
||||
DefaultIRQ_Handler PROC
|
||||
EXPORT DefaultIRQ_Handler [WEAK]
|
||||
B DefaultIRQ_Handler
|
||||
ENDP
|
||||
|
||||
DebugMon_Handler PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B DebugMon_Handler
|
||||
ENDP
|
||||
|
||||
SysTick_IRQHandler PROC
|
||||
EXPORT SysTick_IRQHandler [WEAK]
|
||||
B SysTick_IRQHandler
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT UART0_IRQHandler [WEAK]
|
||||
EXPORT UART1_IRQHandler [WEAK]
|
||||
EXPORT I2CM0_IRQHandler [WEAK]
|
||||
EXPORT I2CS_IRQHandler [WEAK]
|
||||
EXPORT USB_IRQHandler [WEAK]
|
||||
EXPORT PMU_IRQHandler [WEAK]
|
||||
EXPORT AFE_IRQHandler [WEAK]
|
||||
EXPORT MAA_IRQHandler [WEAK]
|
||||
EXPORT AES_IRQHandler [WEAK]
|
||||
EXPORT SPI0_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT TMR0_IRQHandler [WEAK]
|
||||
EXPORT TMR1_IRQHandler [WEAK]
|
||||
EXPORT TMR2_IRQHandler [WEAK]
|
||||
EXPORT TMR3_IRQHandler [WEAK]
|
||||
EXPORT RSVD0_IRQHandler [WEAK]
|
||||
EXPORT RSVD1_IRQHandler [WEAK]
|
||||
EXPORT DAC0_IRQHandler [WEAK]
|
||||
EXPORT DAC1_IRQHandler [WEAK]
|
||||
EXPORT DAC2_IRQHandler [WEAK]
|
||||
EXPORT DAC3_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT FLC_IRQHandler [WEAK]
|
||||
EXPORT PWRMAN_IRQHandler [WEAK]
|
||||
EXPORT CLKMAN_IRQHandler [WEAK]
|
||||
EXPORT RTC0_IRQHandler [WEAK]
|
||||
EXPORT RTC1_IRQHandler [WEAK]
|
||||
EXPORT RTC2_IRQHandler [WEAK]
|
||||
EXPORT RTC3_IRQHandler [WEAK]
|
||||
EXPORT WDT0_IRQHandler [WEAK]
|
||||
EXPORT WDT0_P_IRQHandler [WEAK]
|
||||
EXPORT WDT1_IRQHandler [WEAK]
|
||||
EXPORT WDT1_P_IRQHandler [WEAK]
|
||||
EXPORT GPIO_P0_IRQHandler [WEAK]
|
||||
EXPORT GPIO_P1_IRQHandler [WEAK]
|
||||
EXPORT GPIO_P2_IRQHandler [WEAK]
|
||||
EXPORT GPIO_P3_IRQHandler [WEAK]
|
||||
EXPORT GPIO_P4_IRQHandler [WEAK]
|
||||
EXPORT GPIO_P5_IRQHandler [WEAK]
|
||||
EXPORT GPIO_P6_IRQHandler [WEAK]
|
||||
EXPORT GPIO_P7_IRQHandler [WEAK]
|
||||
EXPORT TMR16_0_IRQHandler [WEAK]
|
||||
EXPORT TMR16_1_IRQHandler [WEAK]
|
||||
EXPORT TMR16_2_IRQHandler [WEAK]
|
||||
EXPORT TMR16_3_IRQHandler [WEAK]
|
||||
EXPORT I2CM1_IRQHandler [WEAK]
|
||||
|
||||
UART0_IRQHandler
|
||||
UART1_IRQHandler
|
||||
I2CM0_IRQHandler
|
||||
I2CS_IRQHandler
|
||||
USB_IRQHandler
|
||||
PMU_IRQHandler
|
||||
AFE_IRQHandler
|
||||
MAA_IRQHandler
|
||||
AES_IRQHandler
|
||||
SPI0_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
TMR0_IRQHandler
|
||||
TMR1_IRQHandler
|
||||
TMR2_IRQHandler
|
||||
TMR3_IRQHandler
|
||||
RSVD0_IRQHandler
|
||||
RSVD1_IRQHandler
|
||||
DAC0_IRQHandler
|
||||
DAC1_IRQHandler
|
||||
DAC2_IRQHandler
|
||||
DAC3_IRQHandler
|
||||
ADC_IRQHandler
|
||||
FLC_IRQHandler
|
||||
PWRMAN_IRQHandler
|
||||
CLKMAN_IRQHandler
|
||||
RTC0_IRQHandler
|
||||
RTC1_IRQHandler
|
||||
RTC2_IRQHandler
|
||||
RTC3_IRQHandler
|
||||
WDT0_IRQHandler
|
||||
WDT0_P_IRQHandler
|
||||
WDT1_IRQHandler
|
||||
WDT1_P_IRQHandler
|
||||
GPIO_P0_IRQHandler
|
||||
GPIO_P1_IRQHandler
|
||||
GPIO_P2_IRQHandler
|
||||
GPIO_P3_IRQHandler
|
||||
GPIO_P4_IRQHandler
|
||||
GPIO_P5_IRQHandler
|
||||
GPIO_P6_IRQHandler
|
||||
GPIO_P7_IRQHandler
|
||||
TMR16_0_IRQHandler
|
||||
TMR16_1_IRQHandler
|
||||
TMR16_2_IRQHandler
|
||||
TMR16_3_IRQHandler
|
||||
I2CM1_IRQHandler
|
||||
|
||||
B .
|
||||
ENDP
|
||||
ALIGN
|
||||
END
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <rt_misc.h>
|
||||
#include <stdint.h>
|
||||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
|
||||
|
||||
struct __initial_stackheap r;
|
||||
r.heap_base = zi_limit;
|
||||
r.heap_limit = sp_limit;
|
||||
return r;
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,182 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Linker configuration file, default ARM Cortex M3 produced by Maxim Integrated Inc.
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 /* start from 0x0, fullsize flash, 256k */
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 /* full-size SRAM, 32k */
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.isr_vector))
|
||||
*(.text*)
|
||||
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
KEEP(*(.eh_frame*))
|
||||
} > FLASH
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
__etext = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
__bss_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.heap :
|
||||
{
|
||||
__end__ = .;
|
||||
end = __end__;
|
||||
*(.heap*)
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy :
|
||||
{
|
||||
*(.stack)
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
|
|
@ -0,0 +1,262 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.arch armv7-m
|
||||
|
||||
/* Memory Model
|
||||
The HEAP starts at the end of the DATA section and grows upward.
|
||||
|
||||
The STACK starts at the end of the RAM and grows downward.
|
||||
|
||||
The HEAP and stack STACK are only checked at compile time:
|
||||
(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
|
||||
|
||||
This is just a check for the bare minimum for the Heap+Stack area before
|
||||
aborting compilation, it is not the run time limit:
|
||||
Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
|
||||
*/
|
||||
.section .stack
|
||||
.align 3
|
||||
#ifdef __STACK_SIZE
|
||||
.equ Stack_Size, __STACK_SIZE
|
||||
#else
|
||||
.equ Stack_Size, 0x00001000
|
||||
#endif
|
||||
.globl __StackTop
|
||||
.globl __StackLimit
|
||||
__StackLimit:
|
||||
.space Stack_Size
|
||||
.size __StackLimit, . - __StackLimit
|
||||
__StackTop:
|
||||
.size __StackTop, . - __StackTop
|
||||
|
||||
.section .heap
|
||||
.align 3
|
||||
#ifdef __HEAP_SIZE
|
||||
.equ Heap_Size, __HEAP_SIZE
|
||||
#else
|
||||
.equ Heap_Size, 0x00000C00
|
||||
#endif
|
||||
.globl __HeapBase
|
||||
.globl __HeapLimit
|
||||
__HeapBase:
|
||||
.space Heap_Size
|
||||
.size __HeapBase, . - __HeapBase
|
||||
__HeapLimit:
|
||||
.size __HeapLimit, . - __HeapLimit
|
||||
|
||||
.section .isr_vector
|
||||
.align 2
|
||||
.globl __isr_vector
|
||||
__isr_vector:
|
||||
.long __StackTop /* Top of Stack */
|
||||
.long Reset_Handler /* Reset Handler */
|
||||
.long NMI_Handler /* NMI Handler */
|
||||
.long HardFault_Handler /* Hard Fault Handler */
|
||||
.long MemManage_Handler /* MPU Fault Handler */
|
||||
.long BusFault_Handler /* Bus Fault Handler */
|
||||
.long UsageFault_Handler /* Usage Fault Handler */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long SVC_Handler /* SVCall Handler */
|
||||
.long DebugMon_Handler /* Debug Monitor Handler */
|
||||
.long 0 /* Reserved */
|
||||
.long PendSV_Handler /* PendSV Handler */
|
||||
.long SysTick_Handler /* SysTick Handler */
|
||||
|
||||
/* Externals interrupts */
|
||||
.long UART0_IRQHandler /* 16: 1 UART0 */
|
||||
.long UART1_IRQHandler /* 17: 2 UART1 */
|
||||
.long I2CM0_IRQHandler /* 18: 3 I2C Master 0 */
|
||||
.long I2CS_IRQHandler /* 19: 4 I2C Slave */
|
||||
.long USB_IRQHandler /* 20: 5 USB */
|
||||
.long PMU_IRQHandler /* 21: 6 DMA */
|
||||
.long AFE_IRQHandler /* 22: 7 AFE */
|
||||
.long MAA_IRQHandler /* 23: 8 MAA */
|
||||
.long AES_IRQHandler /* 24: 9 AES */
|
||||
.long SPI0_IRQHandler /* 25:10 SPI0 */
|
||||
.long SPI1_IRQHandler /* 26:11 SPI1 */
|
||||
.long SPI2_IRQHandler /* 27:12 SPI2 */
|
||||
.long TMR0_IRQHandler /* 28:13 Timer32-0 */
|
||||
.long TMR1_IRQHandler /* 29:14 Timer32-1 */
|
||||
.long TMR2_IRQHandler /* 30:15 Timer32-1 */
|
||||
.long TMR3_IRQHandler /* 31:16 Timer32-2 */
|
||||
.long RSVD0_IRQHandler /* 32:17 RSVD */
|
||||
.long RSVD1_IRQHandler /* 33:18 RSVD */
|
||||
.long DAC0_IRQHandler /* 34:19 DAC0 (12-bit DAC) */
|
||||
.long DAC1_IRQHandler /* 35:20 DAC1 (12-bit DAC) */
|
||||
.long DAC2_IRQHandler /* 36:21 DAC2 (8-bit DAC) */
|
||||
.long DAC3_IRQHandler /* 37:22 DAC3 (8-bit DAC) */
|
||||
.long ADC_IRQHandler /* 38:23 ADC */
|
||||
.long FLC_IRQHandler /* 39:24 Flash Controller */
|
||||
.long PWRMAN_IRQHandler /* 40:25 PWRMAN */
|
||||
.long CLKMAN_IRQHandler /* 41:26 CLKMAN */
|
||||
.long RTC0_IRQHandler /* 42:27 RTC INT0 */
|
||||
.long RTC1_IRQHandler /* 43:28 RTC INT1 */
|
||||
.long RTC2_IRQHandler /* 44:29 RTC INT2 */
|
||||
.long RTC3_IRQHandler /* 45:30 RTC INT3 */
|
||||
.long WDT0_IRQHandler /* 46:31 WATCHDOG0 */
|
||||
.long WDT0_P_IRQHandler /* 47:32 WATCHDOG0 PRE-WINDOW */
|
||||
.long WDT1_IRQHandler /* 48:33 WATCHDOG1 */
|
||||
.long WDT1_P_IRQHandler /* 49:34 WATCHDOG1 PRE-WINDOW */
|
||||
.long GPIO_P0_IRQHandler /* 50:35 GPIO Port 0 */
|
||||
.long GPIO_P1_IRQHandler /* 51:36 GPIO Port 1 */
|
||||
.long GPIO_P2_IRQHandler /* 52:37 GPIO Port 2 */
|
||||
.long GPIO_P3_IRQHandler /* 53:38 GPIO Port 3 */
|
||||
.long GPIO_P4_IRQHandler /* 54:39 GPIO Port 4 */
|
||||
.long GPIO_P5_IRQHandler /* 55:40 GPIO Port 5 */
|
||||
.long GPIO_P6_IRQHandler /* 56:41 GPIO Port 6 */
|
||||
.long GPIO_P7_IRQHandler /* 57:42 GPIO Port 7 */
|
||||
.long TMR16_0_IRQHandler /* 58:43 Timer16-s0 */
|
||||
.long TMR16_1_IRQHandler /* 59:44 Timer16-s1 */
|
||||
.long TMR16_2_IRQHandler /* 60:45 Timer16-s2 */
|
||||
.long TMR16_3_IRQHandler /* 61:46 Timer16-s3 */
|
||||
.long I2CM1_IRQHandler /* 62:47 I2C Master 1 */
|
||||
|
||||
|
||||
.text
|
||||
.thumb
|
||||
.thumb_func
|
||||
.align 2
|
||||
.globl Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
/* Loop to copy data from read only memory to RAM. The ranges
|
||||
* of copy from/to are specified by following symbols evaluated in
|
||||
* linker script.
|
||||
* __etext: End of code section, i.e., begin of data sections to copy from.
|
||||
* __data_start__/__data_end__: RAM address range that data should be
|
||||
* copied to. Both must be aligned to 4 bytes boundary. */
|
||||
|
||||
ldr r1, =__etext
|
||||
ldr r2, =__data_start__
|
||||
ldr r3, =__data_end__
|
||||
|
||||
.Lflash_to_ram_loop:
|
||||
cmp r2, r3
|
||||
ittt lt
|
||||
ldrlt r0, [r1], #4
|
||||
strlt r0, [r2], #4
|
||||
blt .Lflash_to_ram_loop
|
||||
|
||||
.Lflash_to_ram_loop_end:
|
||||
|
||||
ldr r0, =SystemInit
|
||||
blx r0
|
||||
ldr r0, =_start
|
||||
bx r0
|
||||
.pool
|
||||
.size Reset_Handler, . - Reset_Handler
|
||||
|
||||
.text
|
||||
/* Macro to define default handlers. Default handler
|
||||
* will be weak symbol and just dead loops. They can be
|
||||
* overwritten by other handlers */
|
||||
.macro def_default_handler handler_name
|
||||
.align 1
|
||||
.thumb_func
|
||||
.weak \handler_name
|
||||
.type \handler_name, %function
|
||||
\handler_name :
|
||||
b .
|
||||
.size \handler_name, . - \handler_name
|
||||
.endm
|
||||
|
||||
def_default_handler NMI_Handler
|
||||
def_default_handler HardFault_Handler
|
||||
def_default_handler MemManage_Handler
|
||||
def_default_handler BusFault_Handler
|
||||
def_default_handler UsageFault_Handler
|
||||
def_default_handler SVC_Handler
|
||||
def_default_handler DebugMon_Handler
|
||||
def_default_handler PendSV_Handler
|
||||
def_default_handler SysTick_Handler
|
||||
def_default_handler Default_Handler
|
||||
|
||||
.macro def_irq_default_handler handler_name
|
||||
.weak \handler_name
|
||||
.set \handler_name, Default_Handler
|
||||
.endm
|
||||
|
||||
def_irq_default_handler UART0_IRQHandler /* 16: 1 UART0 */
|
||||
def_irq_default_handler UART1_IRQHandler /* 17: 2 UART1 */
|
||||
def_irq_default_handler I2CM0_IRQHandler /* 18: 3 I2C Master 0 */
|
||||
def_irq_default_handler I2CS_IRQHandler /* 19: 4 I2C Slave */
|
||||
def_irq_default_handler USB_IRQHandler /* 20: 5 USB */
|
||||
def_irq_default_handler PMU_IRQHandler /* 21: 6 DMA */
|
||||
def_irq_default_handler AFE_IRQHandler /* 22: 7 AFE */
|
||||
def_irq_default_handler MAA_IRQHandler /* 23: 8 MAA */
|
||||
def_irq_default_handler AES_IRQHandler /* 24: 9 AES */
|
||||
def_irq_default_handler SPI0_IRQHandler /* 25:10 SPI0 */
|
||||
def_irq_default_handler SPI1_IRQHandler /* 26:11 SPI1 */
|
||||
def_irq_default_handler SPI2_IRQHandler /* 27:12 SPI2 */
|
||||
def_irq_default_handler TMR0_IRQHandler /* 28:13 Timer32-0 */
|
||||
def_irq_default_handler TMR1_IRQHandler /* 29:14 Timer32-1 */
|
||||
def_irq_default_handler TMR2_IRQHandler /* 30:15 Timer32-1 */
|
||||
def_irq_default_handler TMR3_IRQHandler /* 31:16 Timer32-2 */
|
||||
def_irq_default_handler RSVD0_IRQHandler /* 32:17 RSVD */
|
||||
def_irq_default_handler RSVD1_IRQHandler /* 33:18 RSVD */
|
||||
def_irq_default_handler DAC0_IRQHandler /* 34:19 DAC0 (12-bit DAC) */
|
||||
def_irq_default_handler DAC1_IRQHandler /* 35:20 DAC1 (12-bit DAC) */
|
||||
def_irq_default_handler DAC2_IRQHandler /* 36:21 DAC2 (8-bit DAC) */
|
||||
def_irq_default_handler DAC3_IRQHandler /* 37:22 DAC3 (8-bit DAC) */
|
||||
def_irq_default_handler ADC_IRQHandler /* 38:23 ADC */
|
||||
def_irq_default_handler FLC_IRQHandler /* 39:24 Flash Controller */
|
||||
def_irq_default_handler PWRMAN_IRQHandler /* 40:25 PWRMAN */
|
||||
def_irq_default_handler CLKMAN_IRQHandler /* 41:26 CLKMAN */
|
||||
def_irq_default_handler RTC0_IRQHandler /* 42:27 RTC INT0 */
|
||||
def_irq_default_handler RTC1_IRQHandler /* 43:28 RTC INT1 */
|
||||
def_irq_default_handler RTC2_IRQHandler /* 44:29 RTC INT2 */
|
||||
def_irq_default_handler RTC3_IRQHandler /* 45:30 RTC INT3 */
|
||||
def_irq_default_handler WDT0_IRQHandler /* 46:31 WATCHDOG0 */
|
||||
def_irq_default_handler WDT0_P_IRQHandler /* 47:32 WATCHDOG0 PRE-WINDOW */
|
||||
def_irq_default_handler WDT1_IRQHandler /* 48:33 WATCHDOG1 */
|
||||
def_irq_default_handler WDT1_P_IRQHandler /* 49:34 WATCHDOG1 PRE-WINDOW */
|
||||
def_irq_default_handler GPIO_P0_IRQHandler /* 50:35 GPIO Port 0 */
|
||||
def_irq_default_handler GPIO_P1_IRQHandler /* 51:36 GPIO Port 1 */
|
||||
def_irq_default_handler GPIO_P2_IRQHandler /* 52:37 GPIO Port 2 */
|
||||
def_irq_default_handler GPIO_P3_IRQHandler /* 53:38 GPIO Port 3 */
|
||||
def_irq_default_handler GPIO_P4_IRQHandler /* 54:39 GPIO Port 4 */
|
||||
def_irq_default_handler GPIO_P5_IRQHandler /* 55:40 GPIO Port 5 */
|
||||
def_irq_default_handler GPIO_P6_IRQHandler /* 56:41 GPIO Port 6 */
|
||||
def_irq_default_handler GPIO_P7_IRQHandler /* 57:42 GPIO Port 7 */
|
||||
def_irq_default_handler TMR16_0_IRQHandler /* 58:43 Timer16-s0 */
|
||||
def_irq_default_handler TMR16_1_IRQHandler /* 59:44 Timer16-s1 */
|
||||
def_irq_default_handler TMR16_2_IRQHandler /* 60:45 Timer16-s2 */
|
||||
def_irq_default_handler TMR16_3_IRQHandler /* 61:46 Timer16-s3 */
|
||||
def_irq_default_handler I2CM1_IRQHandler /* 62:47 I2C Master 1 */
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
/* [ROM] */
|
||||
define symbol __intvec_start__ = 0x0;
|
||||
define symbol __region_ROM_start__ = 0x0;
|
||||
define symbol __region_ROM_end__ = 0x0003FFFF;
|
||||
|
||||
/* [RAM] Vector table dynamic copy: 79 vectors * 4 bytes = 316 bytes (0x13C) */
|
||||
define symbol __NVIC_start__ = 0x00000000;
|
||||
define symbol __NVIC_end__ = 0x00000140; /* to be aligned on 8 bytes */
|
||||
define symbol __region_RAM_start__ = 0x20000000;
|
||||
define symbol __region_RAM_end__ = 0x20007FFF;
|
||||
|
||||
/* Memory regions */
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
|
||||
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
|
||||
|
||||
/* Stack and Heap */
|
||||
define symbol __size_cstack__ = 0x800;
|
||||
define symbol __size_heap__ = 0x800;
|
||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__intvec_start__ { readonly section .intvec };
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
|
|
@ -0,0 +1,383 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table DCD sfe(CSTACK) /* Top of Stack */
|
||||
DCD Reset_Handler /* Reset Handler */
|
||||
DCD NMI_Handler /* NMI Handler */
|
||||
DCD HardFault_Handler /* Hard Fault Handler */
|
||||
DCD DefaultIRQ_Handler /* MPU Fault Handler */
|
||||
DCD DefaultIRQ_Handler /* Bus Fault Handler */
|
||||
DCD DefaultIRQ_Handler /* Usage Fault Handler */
|
||||
DCD 0 /* Reserved */
|
||||
DCD 0 /* Reserved */
|
||||
DCD 0 /* Reserved */
|
||||
DCD 0 /* Reserved */
|
||||
DCD DefaultIRQ_Handler /* SVCall Handler */
|
||||
DCD DebugMon_Handler /* Debug Monitor Handler */
|
||||
DCD 0 /* Reserved */
|
||||
DCD DefaultIRQ_Handler /* PendSV Handler */
|
||||
DCD SysTick_IRQHandler /* SysTick Handler */
|
||||
|
||||
/* Maxim 32610 Externals interrupts */
|
||||
DCD UART0_IRQHandler /* 16: 1 UART0 */
|
||||
DCD UART1_IRQHandler /* 17: 2 UART1 */
|
||||
DCD I2CM0_IRQHandler /* 18: 3 I2C Master 0 */
|
||||
DCD I2CS_IRQHandler /* 19: 4 I2C Slave */
|
||||
DCD USB_IRQHandler /* 20: 5 USB */
|
||||
DCD PMU_IRQHandler /* 21: 6 DMA */
|
||||
DCD AFE_IRQHandler /* 22: 7 AFE */
|
||||
DCD MAA_IRQHandler /* 23: 8 MAA */
|
||||
DCD AES_IRQHandler /* 24: 9 AES */
|
||||
DCD SPI0_IRQHandler /* 25:10 SPI0 */
|
||||
DCD SPI1_IRQHandler /* 26:11 SPI1 */
|
||||
DCD SPI2_IRQHandler /* 27:12 SPI2 */
|
||||
DCD TMR0_IRQHandler /* 28:13 Timer32-0 */
|
||||
DCD TMR1_IRQHandler /* 29:14 Timer32-1 */
|
||||
DCD TMR2_IRQHandler /* 30:15 Timer32-1 */
|
||||
DCD TMR3_IRQHandler /* 31:16 Timer32-2 */
|
||||
DCD RSVD0_IRQHandler /* 32:17 RSVD */
|
||||
DCD RSVD1_IRQHandler /* 33:18 RSVD */
|
||||
DCD DAC0_IRQHandler /* 34:19 DAC0 (12-bit DAC) */
|
||||
DCD DAC1_IRQHandler /* 35:20 DAC1 (12-bit DAC) */
|
||||
DCD DAC2_IRQHandler /* 36:21 DAC2 (8-bit DAC) */
|
||||
DCD DAC3_IRQHandler /* 37:22 DAC3 (8-bit DAC) */
|
||||
DCD ADC_IRQHandler /* 38:23 ADC */
|
||||
DCD FLC_IRQHandler /* 39:24 Flash Controller */
|
||||
DCD PWRMAN_IRQHandler /* 40:25 PWRMAN */
|
||||
DCD CLKMAN_IRQHandler /* 41:26 CLKMAN */
|
||||
DCD RTC0_IRQHandler /* 42:27 RTC INT0 */
|
||||
DCD RTC1_IRQHandler /* 43:28 RTC INT1 */
|
||||
DCD RTC2_IRQHandler /* 44:29 RTC INT2 */
|
||||
DCD RTC3_IRQHandler /* 45:30 RTC INT3 */
|
||||
DCD WDT0_IRQHandler /* 46:31 WATCHDOG0 */
|
||||
DCD WDT0_P_IRQHandler /* 47:32 WATCHDOG0 PRE-WINDOW */
|
||||
DCD WDT1_IRQHandler /* 48:33 WATCHDOG1 */
|
||||
DCD WDT1_P_IRQHandler /* 49:34 WATCHDOG1 PRE-WINDOW */
|
||||
DCD GPIO_P0_IRQHandler /* 50:35 GPIO Port 0 */
|
||||
DCD GPIO_P1_IRQHandler /* 51:36 GPIO Port 1 */
|
||||
DCD GPIO_P2_IRQHandler /* 52:37 GPIO Port 2 */
|
||||
DCD GPIO_P3_IRQHandler /* 53:38 GPIO Port 3 */
|
||||
DCD GPIO_P4_IRQHandler /* 54:39 GPIO Port 4 */
|
||||
DCD GPIO_P5_IRQHandler /* 55:40 GPIO Port 5 */
|
||||
DCD GPIO_P6_IRQHandler /* 56:41 GPIO Port 6 */
|
||||
DCD GPIO_P7_IRQHandler /* 57:42 GPIO Port 7 */
|
||||
DCD TMR16_0_IRQHandler /* 58:43 Timer16-s0 */
|
||||
DCD TMR16_1_IRQHandler /* 59:44 Timer16-s1 */
|
||||
DCD TMR16_2_IRQHandler /* 60:45 Timer16-s2 */
|
||||
DCD TMR16_3_IRQHandler /* 61:46 Timer16-s3 */
|
||||
DCD I2CM1_IRQHandler /* 62:47 I2C Master 1 */
|
||||
|
||||
THUMB
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK DefaultIRQ_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DefaultIRQ_Handler
|
||||
B DefaultIRQ_Handler
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
PUBWEAK SysTick_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_IRQHandler
|
||||
B SysTick_IRQHandler
|
||||
|
||||
PUBWEAK UART0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART0_IRQHandler
|
||||
B UART0_IRQHandler
|
||||
|
||||
PUBWEAK UART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART1_IRQHandler
|
||||
B UART1_IRQHandler
|
||||
|
||||
PUBWEAK I2CM0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2CM0_IRQHandler
|
||||
B I2CM0_IRQHandler
|
||||
|
||||
PUBWEAK I2CS_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2CS_IRQHandler
|
||||
B I2CS_IRQHandler
|
||||
|
||||
PUBWEAK USB_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_IRQHandler
|
||||
B USB_IRQHandler
|
||||
|
||||
PUBWEAK PMU_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PMU_IRQHandler
|
||||
B PMU_IRQHandler
|
||||
|
||||
PUBWEAK AFE_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
AFE_IRQHandler
|
||||
B AFE_IRQHandler
|
||||
|
||||
PUBWEAK MAA_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
MAA_IRQHandler
|
||||
B MAA_IRQHandler
|
||||
|
||||
PUBWEAK AES_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
AES_IRQHandler
|
||||
B AES_IRQHandler
|
||||
|
||||
PUBWEAK SPI0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI0_IRQHandler
|
||||
B SPI0_IRQHandler
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
PUBWEAK TMR0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR0_IRQHandler
|
||||
B TMR0_IRQHandler
|
||||
|
||||
PUBWEAK TMR1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR1_IRQHandler
|
||||
B TMR1_IRQHandler
|
||||
|
||||
PUBWEAK TMR2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR2_IRQHandler
|
||||
B TMR2_IRQHandler
|
||||
|
||||
PUBWEAK TMR3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR3_IRQHandler
|
||||
B TMR3_IRQHandler
|
||||
|
||||
PUBWEAK RSVD0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RSVD0_IRQHandler
|
||||
B RSVD0_IRQHandler
|
||||
|
||||
PUBWEAK RSVD1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RSVD1_IRQHandler
|
||||
B RSVD1_IRQHandler
|
||||
|
||||
PUBWEAK DAC0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DAC0_IRQHandler
|
||||
B DAC0_IRQHandler
|
||||
|
||||
PUBWEAK DAC1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DAC1_IRQHandler
|
||||
B DAC1_IRQHandler
|
||||
|
||||
PUBWEAK DAC2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DAC2_IRQHandler
|
||||
B DAC2_IRQHandler
|
||||
|
||||
PUBWEAK DAC3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DAC3_IRQHandler
|
||||
B DAC3_IRQHandler
|
||||
|
||||
PUBWEAK ADC_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ADC_IRQHandler
|
||||
B ADC_IRQHandler
|
||||
|
||||
PUBWEAK FLC_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
FLC_IRQHandler
|
||||
B FLC_IRQHandler
|
||||
|
||||
PUBWEAK PWRMAN_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PWRMAN_IRQHandler
|
||||
B PWRMAN_IRQHandler
|
||||
|
||||
PUBWEAK CLKMAN_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
CLKMAN_IRQHandler
|
||||
B CLKMAN_IRQHandler
|
||||
|
||||
PUBWEAK RTC0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC0_IRQHandler
|
||||
B RTC0_IRQHandler
|
||||
|
||||
PUBWEAK RTC1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC1_IRQHandler
|
||||
B RTC1_IRQHandler
|
||||
|
||||
PUBWEAK RTC2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC2_IRQHandler
|
||||
B RTC2_IRQHandler
|
||||
|
||||
PUBWEAK RTC3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC3_IRQHandler
|
||||
B RTC3_IRQHandler
|
||||
|
||||
PUBWEAK WDT0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WDT0_IRQHandler
|
||||
B WDT0_IRQHandler
|
||||
|
||||
PUBWEAK WDT0_P_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WDT0_P_IRQHandler
|
||||
B WDT0_P_IRQHandler
|
||||
|
||||
PUBWEAK WDT1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WDT1_IRQHandler
|
||||
B WDT1_IRQHandler
|
||||
|
||||
PUBWEAK WDT1_P_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WDT1_P_IRQHandler
|
||||
B WDT1_P_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_P0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
GPIO_P0_IRQHandler
|
||||
B GPIO_P0_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_P1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
GPIO_P1_IRQHandler
|
||||
B GPIO_P1_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_P2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
GPIO_P2_IRQHandler
|
||||
B GPIO_P2_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_P3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
GPIO_P3_IRQHandler
|
||||
B GPIO_P3_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_P4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
GPIO_P4_IRQHandler
|
||||
B GPIO_P4_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_P5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
GPIO_P5_IRQHandler
|
||||
B GPIO_P5_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_P6_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
GPIO_P6_IRQHandler
|
||||
B GPIO_P6_IRQHandler
|
||||
|
||||
PUBWEAK GPIO_P7_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
GPIO_P7_IRQHandler
|
||||
B GPIO_P7_IRQHandler
|
||||
|
||||
PUBWEAK TMR16_0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR16_0_IRQHandler
|
||||
B TMR16_0_IRQHandler
|
||||
|
||||
PUBWEAK TMR16_1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR16_1_IRQHandler
|
||||
B TMR16_1_IRQHandler
|
||||
|
||||
PUBWEAK TMR16_2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR16_2_IRQHandler
|
||||
B TMR16_2_IRQHandler
|
||||
|
||||
PUBWEAK TMR16_3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TMR16_3_IRQHandler
|
||||
B TMR16_3_IRQHandler
|
||||
|
||||
PUBWEAK I2CM1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2CM1_IRQHandler
|
||||
B I2CM1_IRQHandler
|
||||
|
||||
END
|
||||
|
|
@ -0,0 +1,466 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _MXC_ADC_REGS_H
|
||||
#define _MXC_ADC_REGS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @file adc_regs.h
|
||||
* @addtogroup adc ADC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Defines ADC Modes.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Single Mode Full Rate */
|
||||
MXC_E_ADC_MODE_SMPLCNT_FULL_RATE = 0,
|
||||
/** Single Mode Low Power */
|
||||
MXC_E_ADC_MODE_SMPLCNT_LOW_POWER = 1,
|
||||
/** Continuous Mode Full Rate */
|
||||
MXC_E_ADC_MODE_CONTINUOUS_FULL_RATE = 2,
|
||||
/** Continuous Mode Low Power */
|
||||
MXC_E_ADC_MODE_CONTINUOUS_LOW_POWER = 3,
|
||||
/** Single Mode Full Rate with Scan Enabled */
|
||||
MXC_E_ADC_MODE_SMPLCNT_SCAN_FULL_RATE = 8,
|
||||
/** Single Mode Low Power with Scan Enabled */
|
||||
MXC_E_ADC_MODE_SMPLCNT_SCAN_LOW_POWER = 9,
|
||||
/** Continuous Mode Full Rate with Scan Enabled */
|
||||
MXC_E_ADC_MODE_CONTINUOUS_SCAN_FULL_RATE = 10,
|
||||
/** Continuous Mode Low Power with Scan Enabled */
|
||||
MXC_E_ADC_MODE_CONTINUOUS_SCAN_LOW_POWER = 11
|
||||
} mxc_adc_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Defines ADC Range Control.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Bi-polar Operation (-Vref/2 -> Vref/2) */
|
||||
MXC_E_ADC_RANGE_HALF = 0,
|
||||
/** Bi-polar Operation (-Vref -> Vref) */
|
||||
MXC_E_ADC_RANGE_FULL
|
||||
} mxc_adc_range_t;
|
||||
|
||||
/**
|
||||
* @brief Defines ADC Bipolar operation.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Uni-polar operation (0 -> Vref) */
|
||||
MXC_E_ADC_BI_POL_UNIPOLAR = 0,
|
||||
/** Bi-polar operation see ADC Range Control */
|
||||
MXC_E_ADC_BI_POL_BIPOLAR
|
||||
} mxc_adc_bi_pol_t;
|
||||
|
||||
/**
|
||||
* @brief Defines Decimation Filter Modes.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Decimation Filter ByPassed */
|
||||
MXC_E_ADC_AVG_MODE_FILTER_BYPASS = 0,
|
||||
/** Output Average Only*/
|
||||
MXC_E_ADC_AVG_MODE_FILTER_OUTPUT,
|
||||
/** Output Average and Raw Data (Test Mode Only) */
|
||||
MXC_E_ADC_AVG_MODE_FILTER_OUTPUT_RAW
|
||||
} mxc_adc_avg_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Defines ADC StartMode Modes.
|
||||
*/
|
||||
typedef enum {
|
||||
/** StarMode via Software */
|
||||
MXC_E_ADC_STRT_MODE_SOFTWARE = 0,
|
||||
/** StarMode via PulseTrain */
|
||||
MXC_E_ADC_STRT_MODE_PULSETRAIN
|
||||
} mxc_adc_strt_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Defines Mux Channel Select for the Positive Input to the ADC.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Single Mode Input AIN0+; Diff Mode AIN0+/AIN8- */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN0 = 0,
|
||||
/** Single Mode Input AIN1+; Diff Mode AIN1+/AIN9- */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN1 = 1,
|
||||
/** Single Mode Input AIN2+; Diff Mode AIN2+/AIN10- */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN2 = 2,
|
||||
/** Single Mode Input AIN3+; Diff Mode AIN3+/AIN11- */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN3 = 3,
|
||||
/** Single Mode Input AIN4+; Diff Mode AIN4+/AIN12- */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN4 = 4,
|
||||
/** Single Mode Input AIN5+; Diff Mode AIN5+/AIN13- */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN5 = 5,
|
||||
/** Single Mode Input AIN6+; Diff Mode AIN6+/AIN14- */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN6 = 6,
|
||||
/** Single Mode Input AIN7+; Diff Mode AIN7+/AIN15- */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN7 = 7,
|
||||
/** Single Mode Input AIN8+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN8 = 8,
|
||||
/** Single Mode Input AIN9+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN9 = 9,
|
||||
/** Single Mode Input AIN10+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN10 = 10,
|
||||
/** Single Mode Input AIN11+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN11 = 11,
|
||||
/** Single Mode Input AIN12+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN12 = 12,
|
||||
/** Single Mode Input AIN13+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN13 = 13,
|
||||
/** Single Mode Input AIN14+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN14 = 14,
|
||||
/** Single Mode Input AIN15+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN15 = 15,
|
||||
/** Positive Input VSSADC */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_VSSADC = 16,
|
||||
/** Positive Input TMON_R */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_TMON_R = 17,
|
||||
/** Positive Input VDDA/4 */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_VDDA4 = 18,
|
||||
/** Positive Input PWRMAN_TST */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_PWRMON_TST = 19,
|
||||
/** Positive Input Ain0Div */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_AIN0DIV = 20,
|
||||
/** Positive Input OpAmp OUTA */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_OUTA = 32,
|
||||
/** Positive Input OpAmp OUTB */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_OUTB = 33,
|
||||
/** Positive Input OpAmp OUTC */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_OUTC = 34,
|
||||
/** Positive Input OpAmp OUTD */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_OUTD = 35,
|
||||
/** Positive INA+ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_INAPLUS = 36,
|
||||
/** Positive SNO_or */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_SNO_OR = 37,
|
||||
/** Positive SCM_or */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_SCM_OR = 38,
|
||||
/** Positive TPROBE_sense */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_TPROBE_SENSE = 48,
|
||||
/** Positive VREFDAC */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_VREFDAC = 49,
|
||||
/** Positive VREFADJ */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_VREFADJ = 50,
|
||||
/** Positive Vdd3xtal */
|
||||
MXC_E_ADC_PGA_MUX_CH_SEL_VDD3XTAL = 51
|
||||
} mxc_adc_pga_mux_ch_sel_t;
|
||||
|
||||
/**
|
||||
* @brief Decoded with the MUX Channel Select to enable Differential Mode Input to the ADC.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Differential Mode Disabled */
|
||||
MXC_E_ADC_PGA_MUX_DIFF_DISABLE = 0,
|
||||
/** Differential Mode Enabled */
|
||||
MXC_E_ADC_PGA_MUX_DIFF_ENABLE
|
||||
} mxc_adc_pga_mux_diff_t;
|
||||
|
||||
/**
|
||||
* @brief Defines the PGA Gain Options.
|
||||
*/
|
||||
typedef enum {
|
||||
/** PGA Gain = 1 */
|
||||
MXC_E_ADC_PGA_GAIN_1 = 0,
|
||||
/** PGA Gain = 2 */
|
||||
MXC_E_ADC_PGA_GAIN_2,
|
||||
/** PGA Gain = 4 */
|
||||
MXC_E_ADC_PGA_GAIN_4,
|
||||
/** PGA Gain = 8 */
|
||||
MXC_E_ADC_PGA_GAIN_8,
|
||||
} mxc_adc_pga_gain_t;
|
||||
|
||||
/**
|
||||
* @brief Defines the Switch Control Mode.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Switch Control Mode = Software */
|
||||
MXC_E_ADC_SPST_SW_CTRL_SOFTWARE = 0,
|
||||
/** Switch Control Mode = Pulse Train */
|
||||
MXC_E_ADC_SPST_SW_CTRL_PULSETRAIN
|
||||
} mxc_adc_spst_sw_ctrl_t;
|
||||
|
||||
/**
|
||||
* @brief Defines the number of channels to scan when Scan Mode is enabled.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Number of Channels to Scan = 1 */
|
||||
MXC_E_ADC_SCAN_CNT_1 = 0,
|
||||
/** Number of Channels to Scan = 2 */
|
||||
MXC_E_ADC_SCAN_CNT_2,
|
||||
/** Number of Channels to Scan = 3 */
|
||||
MXC_E_ADC_SCAN_CNT_3,
|
||||
/** Number of Channels to Scan = 4 */
|
||||
MXC_E_ADC_SCAN_CNT_4,
|
||||
/** Number of Channels to Scan = 5 */
|
||||
MXC_E_ADC_SCAN_CNT_5,
|
||||
/** Number of Channels to Scan = 6 */
|
||||
MXC_E_ADC_SCAN_CNT_6,
|
||||
/** Number of Channels to Scan = 7 */
|
||||
MXC_E_ADC_SCAN_CNT_7,
|
||||
/** Number of Channels to Scan = 8 */
|
||||
MXC_E_ADC_SCAN_CNT_8,
|
||||
} mxc_adc_scan_cnt_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== =================================================== */
|
||||
typedef struct {
|
||||
__IO uint32_t ctrl0; /* 0x0000 ADC Control Register 0 */
|
||||
__IO uint32_t pga_ctrl; /* 0x0004 PGA Control Register */
|
||||
__IO uint32_t tg_ctrl0; /* 0x0008 ADC Timing Generator Control 0 */
|
||||
__IO uint32_t tg_ctrl1; /* 0x000C ADC Timing Generator Control 1 */
|
||||
__IO uint32_t limit; /* 0x0010 ADC Limit Settings */
|
||||
__IO uint32_t intr; /* 0x0014 ADC Interrupt Flags and Enable/Disable Controls */
|
||||
__IO uint32_t out; /* 0x0018 ADC Output Register */
|
||||
} mxc_adc_regs_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== =================================================== */
|
||||
typedef struct {
|
||||
__IO uint32_t ctrl1; /* 0x0000 ADC Control Register 1 */
|
||||
__IO uint32_t scan1; /* 0x0004 ADC Auto-Scan Settings 1 */
|
||||
__IO uint32_t scan2; /* 0x0008 ADC Auto-Scan Settings 2 */
|
||||
__IO uint32_t ro_cal0; /* 0x000C ADC Ring Osc Calibration 0 */
|
||||
__IO uint32_t ro_cal1; /* 0x0010 ADC Ring Osc Calibration 1 */
|
||||
} mxc_adccfg_regs_t;
|
||||
|
||||
typedef struct {
|
||||
__IO uint16_t data; /* 0x0000 Read to pull sample data from ADC FIFO */
|
||||
} mxc_adc_fifo_regs_t;
|
||||
|
||||
/*
|
||||
Register offsets for module ADC, ADCCFG, ADC_FIFO
|
||||
*/
|
||||
#define MXC_R_ADC_OFFS_CTRL0 ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_ADC_OFFS_PGA_CTRL ((uint32_t)0x00000004UL)
|
||||
#define MXC_R_ADC_OFFS_TG_CTRL0 ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_ADC_OFFS_TG_CTRL1 ((uint32_t)0x0000000CUL)
|
||||
#define MXC_R_ADC_OFFS_LIMIT ((uint32_t)0x00000010UL)
|
||||
#define MXC_R_ADC_OFFS_INTR ((uint32_t)0x00000014UL)
|
||||
#define MXC_R_ADC_OFFS_OUT ((uint32_t)0x00000018UL)
|
||||
|
||||
#define MXC_R_ADCCFG_OFFS_CTRL1 ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_ADCCFG_OFFS_SCAN1 ((uint32_t)0x00000004UL)
|
||||
#define MXC_R_ADCCFG_OFFS_SCAN2 ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_ADCCFG_OFFS_RO_CAL0 ((uint32_t)0x0000000CUL)
|
||||
#define MXC_R_ADCCFG_OFFS_RO_CAL1 ((uint32_t)0x00000010UL)
|
||||
#define MXC_R_ADC_FIFO_OFFS_DATA ((uint32_t)0x00000000UL)
|
||||
|
||||
/*
|
||||
Field positions and masks for module ADC.
|
||||
*/
|
||||
#define MXC_F_ADC_CTRL0_ADC_WAKE_CNT_POS 0
|
||||
#define MXC_F_ADC_CTRL0_ADC_WAKE_CNT ((uint32_t)(0x0000000FUL << MXC_F_ADC_CTRL0_ADC_WAKE_CNT_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_STRT_MODE_POS 5
|
||||
#define MXC_F_ADC_CTRL0_ADC_STRT_MODE ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_STRT_MODE_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_RANGE_POS 6
|
||||
#define MXC_F_ADC_CTRL0_ADC_RANGE ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_RANGE_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_BI_POL_POS 7
|
||||
#define MXC_F_ADC_CTRL0_ADC_BI_POL ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_BI_POL_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_DV_REG_POS 8
|
||||
#define MXC_F_ADC_CTRL0_ADC_DV_REG ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_DV_REG_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_DV_POS 9
|
||||
#define MXC_F_ADC_CTRL0_ADC_DV ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_DV_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_LMT_DMODE_POS 10
|
||||
#define MXC_F_ADC_CTRL0_ADC_LMT_DMODE ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_LMT_DMODE_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_SMP_EXT_POS 11
|
||||
#define MXC_F_ADC_CTRL0_ADC_SMP_EXT ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_SMP_EXT_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_CLK_EN_POS 12
|
||||
#define MXC_F_ADC_CTRL0_ADC_CLK_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_CLK_EN_POS))
|
||||
#define MXC_F_ADC_CTRL0_CPU_ADC_RST_POS 13
|
||||
#define MXC_F_ADC_CTRL0_CPU_ADC_RST ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_CPU_ADC_RST_POS))
|
||||
#define MXC_F_ADC_CTRL0_CPU_ADC_START_POS 14
|
||||
#define MXC_F_ADC_CTRL0_CPU_ADC_START ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_CPU_ADC_START_POS))
|
||||
#define MXC_F_ADC_CTRL0_CPU_ADC_EN_POS 15
|
||||
#define MXC_F_ADC_CTRL0_CPU_ADC_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_CPU_ADC_EN_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_FIFO_FULL_POS 18
|
||||
#define MXC_F_ADC_CTRL0_ADC_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_FIFO_FULL_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_FIFO_EMPTY_POS 19
|
||||
#define MXC_F_ADC_CTRL0_ADC_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_ADC_FIFO_EMPTY_POS))
|
||||
#define MXC_F_ADC_CTRL0_AVG_MODE_POS 20
|
||||
#define MXC_F_ADC_CTRL0_AVG_MODE ((uint32_t)(0x00000003UL << MXC_F_ADC_CTRL0_AVG_MODE_POS))
|
||||
#define MXC_F_ADC_CTRL0_CPU_DAC_START_POS 22
|
||||
#define MXC_F_ADC_CTRL0_CPU_DAC_START ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL0_CPU_DAC_START_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS 24
|
||||
#define MXC_F_ADC_CTRL0_ADC_CLK_MODE ((uint32_t)(0x00000007UL << MXC_F_ADC_CTRL0_ADC_CLK_MODE_POS))
|
||||
#define MXC_F_ADC_CTRL0_ADC_MODE_POS 28
|
||||
#define MXC_F_ADC_CTRL0_ADC_MODE ((uint32_t)(0x0000000FUL << MXC_F_ADC_CTRL0_ADC_MODE_POS))
|
||||
|
||||
#define MXC_F_ADC_PGA_CTRL_PGA_GAIN_POS 0
|
||||
#define MXC_F_ADC_PGA_CTRL_PGA_GAIN ((uint32_t)(0x00000003UL << MXC_F_ADC_PGA_CTRL_PGA_GAIN_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_CLK_EN_POS 2
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_CLK_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_CLK_EN_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_POS 3
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_RST ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_RST_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_DELAY_POS 4
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_DELAY ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_DELAY_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_POS 5
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_TRK_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_BYPASS_POS 6
|
||||
#define MXC_F_ADC_PGA_CTRL_CPU_PGA_BYPASS ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_CPU_PGA_BYPASS_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_PGA_WAKE_CNT_POS 8
|
||||
#define MXC_F_ADC_PGA_CTRL_PGA_WAKE_CNT ((uint32_t)(0x0000001FUL << MXC_F_ADC_PGA_CTRL_PGA_WAKE_CNT_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_MUX_SW_AIN_POS 13
|
||||
#define MXC_F_ADC_PGA_CTRL_MUX_SW_AIN ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_MUX_SW_AIN_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS 14
|
||||
#define MXC_F_ADC_PGA_CTRL_MUX_DIFF ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_MUX_DIFF_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_MUX_MODE_POS 15
|
||||
#define MXC_F_ADC_PGA_CTRL_MUX_MODE ((uint32_t)(0x00000001UL << MXC_F_ADC_PGA_CTRL_MUX_MODE_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_PGA_RST_CLK_CNT_POS 20
|
||||
#define MXC_F_ADC_PGA_CTRL_PGA_RST_CLK_CNT ((uint32_t)(0x0000000FUL << MXC_F_ADC_PGA_CTRL_PGA_RST_CLK_CNT_POS))
|
||||
#define MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS 24
|
||||
#define MXC_F_ADC_PGA_CTRL_MUX_CH_SEL ((uint32_t)(0x0000003FUL << MXC_F_ADC_PGA_CTRL_MUX_CH_SEL_POS))
|
||||
|
||||
#define MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT_POS 0
|
||||
#define MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_TG_CTRL0_PGA_TRK_CNT_POS))
|
||||
#define MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS 16
|
||||
#define MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_TG_CTRL0_ADC_SMPL_CNT_POS))
|
||||
|
||||
#define MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS 0
|
||||
#define MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT ((uint32_t)(0x0000000FUL << MXC_F_ADC_TG_CTRL1_PGA_ACQ_CNT_POS))
|
||||
#define MXC_F_ADC_TG_CTRL1_FIFO_AF_CNT_POS 4
|
||||
#define MXC_F_ADC_TG_CTRL1_FIFO_AF_CNT ((uint32_t)(0x0000000FUL << MXC_F_ADC_TG_CTRL1_FIFO_AF_CNT_POS))
|
||||
#define MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT_POS 8
|
||||
#define MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT ((uint32_t)(0x00000007UL << MXC_F_ADC_TG_CTRL1_ADC_BRST_CNT_POS))
|
||||
#define MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS 12
|
||||
#define MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT ((uint32_t)(0x0000000FUL << MXC_F_ADC_TG_CTRL1_ADC_ACQ_CNT_POS))
|
||||
#define MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS 16
|
||||
#define MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_TG_CTRL1_ADC_SLP_CNT_POS))
|
||||
|
||||
#define MXC_F_ADC_LIMIT_LO_LIMIT_POS 0
|
||||
#define MXC_F_ADC_LIMIT_LO_LIMIT ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_LIMIT_LO_LIMIT_POS))
|
||||
#define MXC_F_ADC_LIMIT_HI_LIMIT_POS 16
|
||||
#define MXC_F_ADC_LIMIT_HI_LIMIT ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_LIMIT_HI_LIMIT_POS))
|
||||
|
||||
#define MXC_F_ADC_INTR_FIFO_AF_POS 6
|
||||
#define MXC_F_ADC_INTR_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_AF_POS))
|
||||
#define MXC_F_ADC_INTR_OUT_RNG_IF_POS 7
|
||||
#define MXC_F_ADC_INTR_OUT_RNG_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_OUT_RNG_IF_POS))
|
||||
#define MXC_F_ADC_INTR_HI_RNG_IF_POS 8
|
||||
#define MXC_F_ADC_INTR_HI_RNG_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_HI_RNG_IF_POS))
|
||||
#define MXC_F_ADC_INTR_LO_RNG_IF_POS 9
|
||||
#define MXC_F_ADC_INTR_LO_RNG_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_LO_RNG_IF_POS))
|
||||
#define MXC_F_ADC_INTR_DONE_IF_POS 10
|
||||
#define MXC_F_ADC_INTR_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_DONE_IF_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_UF_IF_POS 11
|
||||
#define MXC_F_ADC_INTR_FIFO_UF_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_UF_IF_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_OF_IF_POS 12
|
||||
#define MXC_F_ADC_INTR_FIFO_OF_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_OF_IF_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_3Q_IF_POS 13
|
||||
#define MXC_F_ADC_INTR_FIFO_3Q_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_3Q_IF_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_2Q_IF_POS 14
|
||||
#define MXC_F_ADC_INTR_FIFO_2Q_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_2Q_IF_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_1Q_IF_POS 15
|
||||
#define MXC_F_ADC_INTR_FIFO_1Q_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_1Q_IF_POS))
|
||||
#define MXC_F_ADC_INTR_SPST0_CTRL_MODE_POS 16
|
||||
#define MXC_F_ADC_INTR_SPST0_CTRL_MODE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_SPST0_CTRL_MODE_POS))
|
||||
#define MXC_F_ADC_INTR_SPST1_CTRL_MODE_POS 17
|
||||
#define MXC_F_ADC_INTR_SPST1_CTRL_MODE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_SPST1_CTRL_MODE_POS))
|
||||
#define MXC_F_ADC_INTR_SPST2_CTRL_MODE_POS 18
|
||||
#define MXC_F_ADC_INTR_SPST2_CTRL_MODE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_SPST2_CTRL_MODE_POS))
|
||||
#define MXC_F_ADC_INTR_SPST3_CTRL_MODE_POS 19
|
||||
#define MXC_F_ADC_INTR_SPST3_CTRL_MODE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_SPST3_CTRL_MODE_POS))
|
||||
#define MXC_F_ADC_INTR_OUT_RNG_IE_POS 23
|
||||
#define MXC_F_ADC_INTR_OUT_RNG_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_OUT_RNG_IE_POS))
|
||||
#define MXC_F_ADC_INTR_HI_RNG_IE_POS 24
|
||||
#define MXC_F_ADC_INTR_HI_RNG_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_HI_RNG_IE_POS))
|
||||
#define MXC_F_ADC_INTR_LO_RNG_IE_POS 25
|
||||
#define MXC_F_ADC_INTR_LO_RNG_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_LO_RNG_IE_POS))
|
||||
#define MXC_F_ADC_INTR_DONE_IE_POS 26
|
||||
#define MXC_F_ADC_INTR_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_DONE_IE_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_UF_IE_POS 27
|
||||
#define MXC_F_ADC_INTR_FIFO_UF_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_UF_IE_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_OF_IE_POS 28
|
||||
#define MXC_F_ADC_INTR_FIFO_OF_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_OF_IE_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_3Q_IE_POS 29
|
||||
#define MXC_F_ADC_INTR_FIFO_3Q_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_3Q_IE_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_2Q_IE_POS 30
|
||||
#define MXC_F_ADC_INTR_FIFO_2Q_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_2Q_IE_POS))
|
||||
#define MXC_F_ADC_INTR_FIFO_1Q_IE_POS 31
|
||||
#define MXC_F_ADC_INTR_FIFO_1Q_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_FIFO_1Q_IE_POS))
|
||||
|
||||
#define MXC_F_ADC_OUT_DATA_REG_POS 0
|
||||
#define MXC_F_ADC_OUT_DATA_REG ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_OUT_DATA_REG_POS))
|
||||
|
||||
#define MXC_F_ADC_CTRL1_ADC_SCAN_CNT_POS 16
|
||||
#define MXC_F_ADC_CTRL1_ADC_SCAN_CNT ((uint32_t)(0x00000007UL << MXC_F_ADC_CTRL1_ADC_SCAN_CNT_POS))
|
||||
|
||||
#define MXC_F_ADC_SCAN1_ADC_SCAN0_POS 0
|
||||
#define MXC_F_ADC_SCAN1_ADC_SCAN0 ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN1_ADC_SCAN0_POS))
|
||||
#define MXC_F_ADC_SCAN1_ADC_SCAN1_POS 8
|
||||
#define MXC_F_ADC_SCAN1_ADC_SCAN1 ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN1_ADC_SCAN1_POS))
|
||||
#define MXC_F_ADC_SCAN1_ADC_SCAN2_POS 16
|
||||
#define MXC_F_ADC_SCAN1_ADC_SCAN2 ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN1_ADC_SCAN2_POS))
|
||||
#define MXC_F_ADC_SCAN1_ADC_SCAN3_POS 24
|
||||
#define MXC_F_ADC_SCAN1_ADC_SCAN3 ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN1_ADC_SCAN3_POS))
|
||||
|
||||
#define MXC_F_ADC_SCAN2_ADC_SCAN4_POS 0
|
||||
#define MXC_F_ADC_SCAN2_ADC_SCAN4 ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN2_ADC_SCAN4_POS))
|
||||
#define MXC_F_ADC_SCAN2_ADC_SCAN5_POS 8
|
||||
#define MXC_F_ADC_SCAN2_ADC_SCAN5 ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN2_ADC_SCAN5_POS))
|
||||
#define MXC_F_ADC_SCAN2_ADC_SCAN6_POS 16
|
||||
#define MXC_F_ADC_SCAN2_ADC_SCAN6 ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN2_ADC_SCAN6_POS))
|
||||
#define MXC_F_ADC_SCAN2_ADC_SCAN7_POS 24
|
||||
#define MXC_F_ADC_SCAN2_ADC_SCAN7 ((uint32_t)(0x000000FFUL << MXC_F_ADC_SCAN2_ADC_SCAN7_POS))
|
||||
|
||||
#define MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS 0
|
||||
#define MXC_F_ADC_RO_CAL0_RO_CAL_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS))
|
||||
#define MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS 1
|
||||
#define MXC_F_ADC_RO_CAL0_RO_CAL_RUN ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS))
|
||||
#define MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS 2
|
||||
#define MXC_F_ADC_RO_CAL0_RO_CAL_LOAD ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS))
|
||||
#define MXC_F_ADC_RO_CAL0_TRM_MU_POS 8
|
||||
#define MXC_F_ADC_RO_CAL0_TRM_MU ((uint32_t)(0x00000FFFUL << MXC_F_ADC_RO_CAL0_TRM_MU_POS))
|
||||
#define MXC_F_ADC_RO_CAL0_RO_TRM_POS 23
|
||||
#define MXC_F_ADC_RO_CAL0_RO_TRM ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL0_RO_TRM_POS))
|
||||
|
||||
#define MXC_F_ADC_RO_CAL1_TRM_INIT_POS 0
|
||||
#define MXC_F_ADC_RO_CAL1_TRM_INIT ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_INIT_POS))
|
||||
#define MXC_F_ADC_RO_CAL1_TRM_MIN_POS 10
|
||||
#define MXC_F_ADC_RO_CAL1_TRM_MIN ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_MIN_POS))
|
||||
#define MXC_F_ADC_RO_CAL1_TRM_MAX_POS 20
|
||||
#define MXC_F_ADC_RO_CAL1_TRM_MAX ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_MAX_POS))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _MXC_ADC_REGS_H */
|
||||
|
|
@ -0,0 +1,159 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _MXC_AES_REGS_H_
|
||||
#define _MXC_AES_REGS_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @file aes_regs.h
|
||||
* @addtogroup aes AES
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Settings for AES_CTRL.CRYPT_MODE
|
||||
*/
|
||||
typedef enum {
|
||||
MXC_E_AES_CTRL_ENCRYPT_MODE = 0,
|
||||
MXC_E_AES_CTRL_DECRYPT_MODE = 1
|
||||
} mxc_aes_ctrl_crypt_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Settings for AES_CTRL.EXP_KEY_MODE
|
||||
*/
|
||||
typedef enum {
|
||||
MXC_E_AES_CTRL_CALC_NEW_EXP_KEY = 0,
|
||||
MXC_E_AES_CTRL_USE_LAST_EXP_KEY = 1
|
||||
} mxc_aes_ctrl_exp_key_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Settings for AES_CTRL.KEY_SIZE
|
||||
*/
|
||||
typedef enum {
|
||||
MXC_E_AES_CTRL_KEY_SIZE_128 = 0,
|
||||
MXC_E_AES_CTRL_KEY_SIZE_192 = 1,
|
||||
MXC_E_AES_CTRL_KEY_SIZE_256 = 2
|
||||
} mxc_aes_ctrl_key_size_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== =========================================================== */
|
||||
typedef struct {
|
||||
__IO uint32_t ctrl; /* 0x0000 AES Control and Status */
|
||||
__I uint32_t rsv004; /* 0x0004 */
|
||||
__IO uint32_t erase_all; /* 0x0008 Write to Trigger AES Memory Erase */
|
||||
} mxc_aes_regs_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== =========================================================== */
|
||||
typedef struct {
|
||||
__IO uint32_t inp[4]; /* 0x0000 AES Input 0..3 */
|
||||
__IO uint32_t key[8]; /* 0x0010 AES Key 0..7 */
|
||||
__IO uint32_t out[4]; /* 0x0030 AES Output 0..3 */
|
||||
__IO uint32_t expkey[8]; /* 0x0040 AES Expanded Key Data 0..7 */
|
||||
} mxc_aes_mem_regs_t;
|
||||
|
||||
/*
|
||||
Register offsets for module AES.
|
||||
*/
|
||||
#define MXC_R_AES_OFFS_CTRL ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_AES_OFFS_ERASE_ALL ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_AES_MEM_OFFS_INP0 ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_AES_MEM_OFFS_INP1 ((uint32_t)0x00000004UL)
|
||||
#define MXC_R_AES_MEM_OFFS_INP2 ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_AES_MEM_OFFS_INP3 ((uint32_t)0x0000000CUL)
|
||||
#define MXC_R_AES_MEM_OFFS_KEY0 ((uint32_t)0x00000010UL)
|
||||
#define MXC_R_AES_MEM_OFFS_KEY1 ((uint32_t)0x00000014UL)
|
||||
#define MXC_R_AES_MEM_OFFS_KEY2 ((uint32_t)0x00000018UL)
|
||||
#define MXC_R_AES_MEM_OFFS_KEY3 ((uint32_t)0x0000001CUL)
|
||||
#define MXC_R_AES_MEM_OFFS_KEY4 ((uint32_t)0x00000020UL)
|
||||
#define MXC_R_AES_MEM_OFFS_KEY5 ((uint32_t)0x00000024UL)
|
||||
#define MXC_R_AES_MEM_OFFS_KEY6 ((uint32_t)0x00000028UL)
|
||||
#define MXC_R_AES_MEM_OFFS_KEY7 ((uint32_t)0x0000002CUL)
|
||||
#define MXC_R_AES_MEM_OFFS_OUT0 ((uint32_t)0x00000030UL)
|
||||
#define MXC_R_AES_MEM_OFFS_OUT1 ((uint32_t)0x00000034UL)
|
||||
#define MXC_R_AES_MEM_OFFS_OUT2 ((uint32_t)0x00000038UL)
|
||||
#define MXC_R_AES_MEM_OFFS_OUT3 ((uint32_t)0x0000003CUL)
|
||||
#define MXC_R_AES_MEM_OFFS_EXPKEY0 ((uint32_t)0x00000040UL)
|
||||
#define MXC_R_AES_MEM_OFFS_EXPKEY1 ((uint32_t)0x00000044UL)
|
||||
#define MXC_R_AES_MEM_OFFS_EXPKEY2 ((uint32_t)0x00000048UL)
|
||||
#define MXC_R_AES_MEM_OFFS_EXPKEY3 ((uint32_t)0x0000004CUL)
|
||||
#define MXC_R_AES_MEM_OFFS_EXPKEY4 ((uint32_t)0x00000050UL)
|
||||
#define MXC_R_AES_MEM_OFFS_EXPKEY5 ((uint32_t)0x00000054UL)
|
||||
#define MXC_R_AES_MEM_OFFS_EXPKEY6 ((uint32_t)0x00000058UL)
|
||||
#define MXC_R_AES_MEM_OFFS_EXPKEY7 ((uint32_t)0x0000005CUL)
|
||||
|
||||
#define MXC_F_AES_CTRL_START_POS 0
|
||||
#define MXC_F_AES_CTRL_START ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_START_POS))
|
||||
#define MXC_F_AES_CTRL_CRYPT_MODE_POS 1
|
||||
#define MXC_F_AES_CTRL_CRYPT_MODE ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_CRYPT_MODE_POS))
|
||||
#define MXC_F_AES_CTRL_EXP_KEY_MODE_POS 2
|
||||
#define MXC_F_AES_CTRL_EXP_KEY_MODE ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
|
||||
#define MXC_F_AES_CTRL_KEY_SIZE_POS 3
|
||||
#define MXC_F_AES_CTRL_KEY_SIZE ((uint32_t)(0x00000003UL << MXC_F_AES_CTRL_KEY_SIZE_POS))
|
||||
#define MXC_F_AES_CTRL_INTEN_POS 5
|
||||
#define MXC_F_AES_CTRL_INTEN ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_INTEN_POS))
|
||||
#define MXC_F_AES_CTRL_INTFL_POS 6
|
||||
#define MXC_F_AES_CTRL_INTFL ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_INTFL_POS))
|
||||
|
||||
#define MXC_V_AES_CTRL_ENCRYPT_MODE 0
|
||||
#define MXC_V_AES_CTRL_DECRYPT_MODE 1
|
||||
#define MXC_S_AES_CTRL_ENCRYPT_MODE ((uint32_t)(MXC_V_AES_CTRL_ENCRYPT_MODE << MXC_F_AES_CTRL_CRYPT_MODE_POS))
|
||||
#define MXC_S_AES_CTRL_DECRYPT_MODE ((uint32_t)(MXC_V_AES_CTRL_DECRYPT_MODE << MXC_F_AES_CTRL_CRYPT_MODE_POS))
|
||||
|
||||
#define MXC_V_AES_CTRL_CALC_NEW_EXP_KEY 0
|
||||
#define MXC_V_AES_CTRL_USE_LAST_EXP_KEY 1
|
||||
#define MXC_S_AES_CTRL_CALC_NEW_EXP_KEY ((uint32_t)(MXC_V_AES_CTRL_CALC_NEW_EXP_KEY << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
|
||||
#define MXC_S_AES_CTRL_USE_LAST_EXP_KEY ((uint32_t)(MXC_V_AES_CTRL_USE_LAST_EXP_KEY << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
|
||||
|
||||
#define MXC_V_AES_CTRL_KEY_SIZE_128 0
|
||||
#define MXC_V_AES_CTRL_KEY_SIZE_192 1
|
||||
#define MXC_V_AES_CTRL_KEY_SIZE_256 2
|
||||
#define MXC_S_AES_CTRL_KEY_SIZE_128 ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_128 << MXC_F_AES_CTRL_KEY_SIZE_POS))
|
||||
#define MXC_S_AES_CTRL_KEY_SIZE_192 ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_192 << MXC_F_AES_CTRL_KEY_SIZE_POS))
|
||||
#define MXC_S_AES_CTRL_KEY_SIZE_256 ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_256 << MXC_F_AES_CTRL_KEY_SIZE_POS))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _MXC_AES_REGS_H_ */
|
||||
|
|
@ -0,0 +1,626 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _MXC_AFE_REGS_H
|
||||
#define _MXC_AFE_REGS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @file afe_regs.h
|
||||
* @addtogroup afe AFE
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Defines Configure Options for the LED Ports.
|
||||
*/
|
||||
typedef enum {
|
||||
/** LED Sink Port 0 with OpAmp A, LED Sink Port 1 with OpAmp C */
|
||||
MXC_E_AFE_LED_CFG_PORT_OPAMP_A_C = 0,
|
||||
/** LED Sink Port 0 with OpAmp B, LED Sink Port 1 with OpAmp D */
|
||||
MXC_E_AFE_LED_CFG_PORT_OPAMP_B_D,
|
||||
/** Disable LED Sink Port 0,Disable LED Sink Port 1 */
|
||||
MXC_E_AFE_LED_CFG_PORT_DISABLED,
|
||||
} mxc_afe_led_cfg_port_t;
|
||||
|
||||
/**
|
||||
* @brief Setup of Wake Up Detector for LPCs.
|
||||
*/
|
||||
typedef enum {
|
||||
/** IDLE */
|
||||
MXC_E_AFE_EN_WUD_COMP_IDLE = 0,
|
||||
/** Activate WUD for falling edges */
|
||||
MXC_E_AFE_EN_WUD_COMP_FALLING_EDGE = 2,
|
||||
/** Activate WUD for rising edges */
|
||||
MXC_E_AFE_EN_WUD_COMP_RISING_EDGE = 3
|
||||
} mxc_afe_en_wud_comp_t;
|
||||
|
||||
/**
|
||||
* @brief LPC InMode.
|
||||
*/
|
||||
typedef enum {
|
||||
/** InMode: both Nch and Pch */
|
||||
MXC_E_AFE_IN_MODE_COMP_NCH_PCH = 0,
|
||||
/** InMode: only Nch */
|
||||
MXC_E_AFE_IN_MODE_COMP_NCH,
|
||||
/** InMode: only Pch */
|
||||
MXC_E_AFE_IN_MODE_COMP_PCH,
|
||||
} mxc_afe_in_mode_comp_t;
|
||||
|
||||
/**
|
||||
* @brief LPC Bias.
|
||||
*/
|
||||
typedef enum {
|
||||
/** BIAS 0.52uA Delay 4.0us */
|
||||
MXC_E_AFE_BIAS_MODE_COMP_0 = 0,
|
||||
/** BIAS 1.4uA Delay 1.7us */
|
||||
MXC_E_AFE_BIAS_MODE_COMP_1,
|
||||
/** BIAS 2.8uA Delay 1.1us */
|
||||
MXC_E_AFE_BIAS_MODE_COMP_2,
|
||||
/** BIAS 5.1uA Delay 0.7us */
|
||||
MXC_E_AFE_BIAS_MODE_COMP_3
|
||||
} mxc_afe_bias_mode_comp_t;
|
||||
|
||||
/**
|
||||
* @brief TMON Current Value.
|
||||
*/
|
||||
typedef enum {
|
||||
/** TMON Current 4uA */
|
||||
MXC_E_AFE_TMON_CURRENT_VAL_0 = 0,
|
||||
/** TMON Current 60uA */
|
||||
MXC_E_AFE_TMON_CURRENT_VAL_1,
|
||||
/** TMON Current 64uA */
|
||||
MXC_E_AFE_TMON_CURRENT_VAL_2,
|
||||
/** TMON Current 120uA */
|
||||
MXC_E_AFE_TMON_CURRENT_VAL_3
|
||||
} mxc_afe_tmon_current_t;
|
||||
|
||||
/**
|
||||
* @brief REFADC and REFDAC Voltage Select.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Voltage Reference = 1.024 V */
|
||||
MXC_E_AFE_REF_VOLT_SEL_1024 = 0,
|
||||
/** Voltage Reference = 1.5 V */
|
||||
MXC_E_AFE_REF_VOLT_SEL_1500,
|
||||
/** Voltage Reference = 2.048 V */
|
||||
MXC_E_AFE_REF_VOLT_SEL_2048,
|
||||
/** Voltage Reference = 2.5 V */
|
||||
MXC_E_AFE_REF_VOLT_SEL_2500
|
||||
} mxc_afe_ref_volt_sel_t;
|
||||
|
||||
/**
|
||||
* @brief Selection for DAC VOltage Reference, REFADC or REFDAC.
|
||||
*/
|
||||
typedef enum {
|
||||
/** DAC Voltage Reference = REFADC */
|
||||
MXC_E_AFE_DAC_REF_REFADC = 0,
|
||||
/** DAC Voltage Reference = REFDAC */
|
||||
MXC_E_AFE_DAC_REF_REFDAC
|
||||
} mxc_afe_dac_ref_t;
|
||||
|
||||
/**
|
||||
* @brief Selection for LPC Hysteresis.
|
||||
*/
|
||||
typedef enum {
|
||||
/** LPC Hysteresis = 0 mV */
|
||||
MXC_E_AFE_HYST_COMP_0 = 0,
|
||||
/** LPC Hysteresis = 7.5 mV */
|
||||
MXC_E_AFE_HYST_COMP_1,
|
||||
/** LPC Hysteresis = 15 mV */
|
||||
MXC_E_AFE_HYST_COMP_2,
|
||||
/** LPC Hysteresis = 30 mV */
|
||||
MXC_E_AFE_HYST_COMP_3
|
||||
} mxc_afe_hyst_comp_t;
|
||||
|
||||
/**
|
||||
* @brief Selection for MUX for SCM_or_sel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** SCM_or = HIZ */
|
||||
MXC_E_AFE_SCM_OR_SEL_HIZ = 0,
|
||||
/** SCM_or = SCM0 */
|
||||
MXC_E_AFE_SCM_OR_SEL_SCM0,
|
||||
/** SCM_or = SCM1 */
|
||||
MXC_E_AFE_SCM_OR_SEL_SCM1,
|
||||
/** SCM_or = SCM2 */
|
||||
MXC_E_AFE_SCM_OR_SEL_SCM2,
|
||||
/** SCM_or = SCM3 */
|
||||
MXC_E_AFE_SCM_OR_SEL_SCM3
|
||||
} mxc_afe_scm_or_sel_t;
|
||||
|
||||
/**
|
||||
* @brief Selection for MUX for SNO_or_sel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** SNO_or = HIZ */
|
||||
MXC_E_AFE_SNO_OR_SEL_HIZ = 0,
|
||||
/** SNO_or = SNO0 */
|
||||
MXC_E_AFE_SNO_OR_SEL_SNO0,
|
||||
/** SNO_or = SNO1 */
|
||||
MXC_E_AFE_SNO_OR_SEL_SNO1,
|
||||
/** SNO_or = SNO2 */
|
||||
MXC_E_AFE_SNO_OR_SEL_SNO2,
|
||||
/** SNO_or = SNO3 */
|
||||
MXC_E_AFE_SNO_OR_SEL_SNO3
|
||||
} mxc_afe_sno_or_sel_t;
|
||||
|
||||
/**
|
||||
* @brief Selection for MUX DACx_sel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** dacx = DACOP */
|
||||
MXC_E_AFE_DACX_SEL_P = 0,
|
||||
/** dacx = DACON */
|
||||
MXC_E_AFE_DACX_SEL_N
|
||||
} mxc_afe_dacx_sel_t;
|
||||
|
||||
/**
|
||||
* @brief Selection for state of Switch.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Switch is OPEN */
|
||||
MXC_E_AFE_CLOSE_SPST_SWITCH_OPEN = 0,
|
||||
/** Switch is CLOSED */
|
||||
MXC_E_AFE_CLOSE_SPST_SWITCH_CLOSE
|
||||
} mxc_afe_close_spst_t;
|
||||
|
||||
/**
|
||||
* @brief Switch to Connect Positive Pad to GND.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Positive Pad GND Switch OPEN */
|
||||
MXC_E_AFE_GND_SEL_OPAMP_SWITCH_OPEN = 0,
|
||||
/** Positive Pad GND Switch CLOSED */
|
||||
MXC_E_AFE_GND_SEL_OPAMP_SWITCH_CLOSED
|
||||
} mxc_afe_gnd_sel_opamp_t;
|
||||
|
||||
/**
|
||||
* @brief MUX Selection for OpPsel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** OpPsel = INx+ */
|
||||
MXC_E_AFE_P_IN_SEL_OPAMP_INPLUS = 0,
|
||||
/** OpPsel = DAC_or */
|
||||
MXC_E_AFE_P_IN_SEL_OPAMP_DAC_OR,
|
||||
/** OpPsel = SNO_or */
|
||||
MXC_E_AFE_P_IN_SEL_OPAMP_SNO_OR,
|
||||
/** OpPsel = DAC_or also output on INx+ */
|
||||
MXC_E_AFE_P_IN_SEL_OPAMP_DAC_OR_AND_INPLUS
|
||||
} mxc_afe_p_in_sel_opamp_t;
|
||||
|
||||
/**
|
||||
* @brief MUX Selection for OpNsel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** OpNsel = INx- */
|
||||
MXC_E_AFE_N_IN_SEL_OPAMP_INMINUS = 0,
|
||||
/** OpNsel = OUTx */
|
||||
MXC_E_AFE_N_IN_SEL_OPAMP_OUT,
|
||||
/** OpNsel = SCM_or */
|
||||
MXC_E_AFE_N_IN_SEL_OPAMP_SCM_OR,
|
||||
/**OpNsel = SCM_or also output on INx- */
|
||||
MXC_E_AFE_N_IN_SEL_OPAMP_SCM_OR_AND_INMINUS,
|
||||
} mxc_afe_n_in_sel_opamp_t;
|
||||
|
||||
/**
|
||||
* @brief MUX Selection for DAC_sel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** DAC_or = DAC0 */
|
||||
MXC_E_AFE_DAC_SEL_DAC0 = 0,
|
||||
/** DAC_or = DAC1 */
|
||||
MXC_E_AFE_DAC_SEL_DAC1,
|
||||
/** DAC_or = DAC2P */
|
||||
MXC_E_AFE_DAC_SEL_DAC2P,
|
||||
/** DAC_or = DAC3P */
|
||||
MXC_E_AFE_DAC_SEL_DAC3P
|
||||
} mxc_afe_dac_sel_t;
|
||||
|
||||
/**
|
||||
* @brief MUX Selection for NPAD_sel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** NPAD_Sel = HIZ */
|
||||
MXC_E_AFE_NPAD_SEL_HIZ = 0,
|
||||
/** NPAD_Sel = LED Observe Port */
|
||||
MXC_E_AFE_NPAD_SEL_LED_OBS_PORT,
|
||||
/** NPAD_Sel = DAC_or */
|
||||
MXC_E_AFE_NPAD_SEL_DAC_OR,
|
||||
/** NPAD_Sel = DAC_or and LED Observe Port */
|
||||
MXC_E_AFE_NPAD_SEL_DAC_OR_AND_LED_OBS_PORT
|
||||
} mxc_afe_npad_sel_t;
|
||||
|
||||
/**
|
||||
* @brief MUX Selection for CmpPSel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** CmpPSel = INx+ */
|
||||
MXC_E_AFE_POS_IN_SEL_COMP_INPLUS = 0,
|
||||
/** CmpPSel = SCM */
|
||||
MXC_E_AFE_POS_IN_SEL_COMP_SCM,
|
||||
/** CmpPSel = dac1 */
|
||||
MXC_E_AFE_POS_IN_SEL_COMP_DAC1,
|
||||
/** CmpPSel = DAC3P */
|
||||
MXC_E_AFE_POS_IN_SEL_COMP_DAC3P,
|
||||
/** CmpPSel = LED Observe Port */
|
||||
MXC_E_AFE_POS_IN_SEL_COMP_LED_OBS_PORT,
|
||||
/** CmpPSel = dac1 also output on INx+ */
|
||||
MXC_E_AFE_POS_IN_SEL_COMP_DAC1_AND_INPLUS,
|
||||
/** CmpPSel = DAC3P also output on INx+ */
|
||||
MXC_E_AFE_POS_IN_SEL_COMP_DAC3P_AND_INPLUS,
|
||||
/** CmpPSel = dac1 also output on SCM */
|
||||
MXC_E_AFE_POS_IN_SEL_COMP_DAC1_AND_SCM
|
||||
} mxc_afe_pos_in_sel_comp_t;
|
||||
|
||||
/**
|
||||
* @brief MUX Selection for CmpNSel.
|
||||
*/
|
||||
typedef enum {
|
||||
/** CmpNSel = INx- */
|
||||
MXC_E_AFE_NEG_IN_SEL_COMP_INMINUS = 0,
|
||||
/** CmpNSel = SNO */
|
||||
MXC_E_AFE_NEG_IN_SEL_COMP_SNO,
|
||||
/** CmpNSel = dac0 */
|
||||
MXC_E_AFE_NEG_IN_SEL_COMP_DAC0,
|
||||
/** CmpNSel = DAC2P */
|
||||
MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P,
|
||||
/** CmpNSel = LED Observation Port */
|
||||
MXC_E_AFE_NEG_IN_SEL_COMP_LED_OBS_PORT,
|
||||
/** CmpNSel = dac0 also output on INx- */
|
||||
MXC_E_AFE_NEG_IN_SEL_COMP_DAC0_AND_INMINUS,
|
||||
/** CmpNSel = DAC2 also output on INx- */
|
||||
MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P_AND_INMINUS,
|
||||
/** CmpNSel = DAC2 also output on SNO */
|
||||
MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P_AND_SNO
|
||||
} mxc_afe_neg_in_sel_comp_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== ==================================================== */
|
||||
typedef struct {
|
||||
__IO uint32_t intr; /* 0x0000 Analog Front End Interrupt Flags and Enable/Disable */
|
||||
__IO uint32_t ctrl0; /* 0x0004 Analog Front End Control 0 */
|
||||
__IO uint32_t ctrl1; /* 0x0008 Analog Front End Control 1 */
|
||||
__IO uint32_t ctrl2; /* 0x000C Analog Front End Control 2 */
|
||||
__IO uint32_t ctrl3; /* 0x0010 Analog Front End Control 3 */
|
||||
__IO uint32_t ctrl4; /* 0x0014 Analog Front End Control 4 */
|
||||
__IO uint32_t ctrl5; /* 0x0018 Analog Front End Control 5 */
|
||||
} mxc_afe_regs_t;
|
||||
|
||||
/*
|
||||
Register offsets for module AFE.
|
||||
*/
|
||||
#define MXC_R_AFE_OFFS_INTR ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_AFE_OFFS_CTRL0 ((uint32_t)0x00000004UL)
|
||||
#define MXC_R_AFE_OFFS_CTRL1 ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_AFE_OFFS_CTRL2 ((uint32_t)0x0000000CUL)
|
||||
#define MXC_R_AFE_OFFS_CTRL3 ((uint32_t)0x00000010UL)
|
||||
#define MXC_R_AFE_OFFS_CTRL4 ((uint32_t)0x00000014UL)
|
||||
#define MXC_R_AFE_OFFS_CTRL5 ((uint32_t)0x00000018UL)
|
||||
|
||||
/*
|
||||
Field positions and masks for module AFE.
|
||||
*/
|
||||
#define MXC_F_AFE_INTR_OP_COMP0_IF_POS 0
|
||||
#define MXC_F_AFE_INTR_OP_COMP0_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_IF_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP1_IF_POS 1
|
||||
#define MXC_F_AFE_INTR_OP_COMP1_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_IF_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP2_IF_POS 2
|
||||
#define MXC_F_AFE_INTR_OP_COMP2_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_IF_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP3_IF_POS 3
|
||||
#define MXC_F_AFE_INTR_OP_COMP3_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_IF_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP0_IF_POS 4
|
||||
#define MXC_F_AFE_INTR_LP_COMP0_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_IF_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP1_IF_POS 5
|
||||
#define MXC_F_AFE_INTR_LP_COMP1_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_IF_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP2_IF_POS 6
|
||||
#define MXC_F_AFE_INTR_LP_COMP2_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_IF_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP3_IF_POS 7
|
||||
#define MXC_F_AFE_INTR_LP_COMP3_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_IF_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP0_NMI_PMU_POS 8
|
||||
#define MXC_F_AFE_INTR_OP_COMP0_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_NMI_PMU_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP1_NMI_PMU_POS 9
|
||||
#define MXC_F_AFE_INTR_OP_COMP1_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_NMI_PMU_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP2_NMI_PMU_POS 10
|
||||
#define MXC_F_AFE_INTR_OP_COMP2_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_NMI_PMU_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP3_NMI_PMU_POS 11
|
||||
#define MXC_F_AFE_INTR_OP_COMP3_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_NMI_PMU_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP0_NMI_PMU_POS 12
|
||||
#define MXC_F_AFE_INTR_LP_COMP0_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_NMI_PMU_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP1_NMI_PMU_POS 13
|
||||
#define MXC_F_AFE_INTR_LP_COMP1_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_NMI_PMU_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP2_NMI_PMU_POS 14
|
||||
#define MXC_F_AFE_INTR_LP_COMP2_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_NMI_PMU_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP3_NMI_PMU_POS 15
|
||||
#define MXC_F_AFE_INTR_LP_COMP3_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_NMI_PMU_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP0_POL_POS 16
|
||||
#define MXC_F_AFE_INTR_OP_COMP0_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_POL_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP1_POL_POS 17
|
||||
#define MXC_F_AFE_INTR_OP_COMP1_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_POL_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP2_POL_POS 18
|
||||
#define MXC_F_AFE_INTR_OP_COMP2_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_POL_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP3_POL_POS 19
|
||||
#define MXC_F_AFE_INTR_OP_COMP3_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_POL_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP0_POL_POS 20
|
||||
#define MXC_F_AFE_INTR_LP_COMP0_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_POL_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP1_POL_POS 21
|
||||
#define MXC_F_AFE_INTR_LP_COMP1_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_POL_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP2_POL_POS 22
|
||||
#define MXC_F_AFE_INTR_LP_COMP2_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_POL_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP3_POL_POS 23
|
||||
#define MXC_F_AFE_INTR_LP_COMP3_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_POL_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP0_IE_POS 24
|
||||
#define MXC_F_AFE_INTR_OP_COMP0_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_IE_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP1_IE_POS 25
|
||||
#define MXC_F_AFE_INTR_OP_COMP1_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_IE_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP2_IE_POS 26
|
||||
#define MXC_F_AFE_INTR_OP_COMP2_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_IE_POS))
|
||||
#define MXC_F_AFE_INTR_OP_COMP3_IE_POS 27
|
||||
#define MXC_F_AFE_INTR_OP_COMP3_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_IE_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP0_IE_POS 28
|
||||
#define MXC_F_AFE_INTR_LP_COMP0_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_IE_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP1_IE_POS 29
|
||||
#define MXC_F_AFE_INTR_LP_COMP1_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_IE_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP2_IE_POS 30
|
||||
#define MXC_F_AFE_INTR_LP_COMP2_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_IE_POS))
|
||||
#define MXC_F_AFE_INTR_LP_COMP3_IE_POS 31
|
||||
#define MXC_F_AFE_INTR_LP_COMP3_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_IE_POS))
|
||||
|
||||
#define MXC_F_AFE_CTRL0_LED_CFG_POS 0
|
||||
#define MXC_F_AFE_CTRL0_LED_CFG ((uint32_t)(0x0000000FUL << MXC_F_AFE_CTRL0_LED_CFG_POS))
|
||||
#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0_POS 4
|
||||
#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1_POS 5
|
||||
#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2_POS 6
|
||||
#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3_POS 7
|
||||
#define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3_POS))
|
||||
#define MXC_F_AFE_CTRL0_EN_WUD_COMP0_POS 8
|
||||
#define MXC_F_AFE_CTRL0_EN_WUD_COMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL0_EN_WUD_COMP1_POS 10
|
||||
#define MXC_F_AFE_CTRL0_EN_WUD_COMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL0_EN_WUD_COMP2_POS 12
|
||||
#define MXC_F_AFE_CTRL0_EN_WUD_COMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL0_EN_WUD_COMP3_POS 14
|
||||
#define MXC_F_AFE_CTRL0_EN_WUD_COMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP3_POS))
|
||||
#define MXC_F_AFE_CTRL0_IN_MODE_COMP0_POS 16
|
||||
#define MXC_F_AFE_CTRL0_IN_MODE_COMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL0_IN_MODE_COMP1_POS 18
|
||||
#define MXC_F_AFE_CTRL0_IN_MODE_COMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL0_IN_MODE_COMP2_POS 20
|
||||
#define MXC_F_AFE_CTRL0_IN_MODE_COMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL0_IN_MODE_COMP3_POS 22
|
||||
#define MXC_F_AFE_CTRL0_IN_MODE_COMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP3_POS))
|
||||
#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP0_POS 24
|
||||
#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP1_POS 26
|
||||
#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP2_POS 28
|
||||
#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP3_POS 30
|
||||
#define MXC_F_AFE_CTRL0_BIAS_MODE_COMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP3_POS))
|
||||
|
||||
#define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN_POS 0
|
||||
#define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN_POS))
|
||||
#define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL_POS 1
|
||||
#define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN_POS 3
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN_POS 4
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_BANDGAP_SEL_POS 5
|
||||
#define MXC_F_AFE_CTRL1_REF_BANDGAP_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_BANDGAP_SEL_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS 6
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL_POS 8
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_SEL_POS 10
|
||||
#define MXC_F_AFE_CTRL1_REF_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_SEL_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_POWERUP_POS 11
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_POWERUP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_POWERUP_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_POWERUP_POS 12
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_POWERUP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_POWERUP_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_BLK_POWERUP_POS 13
|
||||
#define MXC_F_AFE_CTRL1_REF_BLK_POWERUP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_BLK_POWERUP_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_COMP_POS 14
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_COMP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_COMP_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_COMP_POS 15
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_COMP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_COMP_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN_POS 16
|
||||
#define MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN_POS))
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN_POS 18
|
||||
#define MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN_POS))
|
||||
#define MXC_F_AFE_CTRL1_ABUS_PAGE_2_0_POS 20
|
||||
#define MXC_F_AFE_CTRL1_ABUS_PAGE_2_0 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL1_ABUS_PAGE_2_0_POS))
|
||||
#define MXC_F_AFE_CTRL1_PLL_TST_EN_POS 23
|
||||
#define MXC_F_AFE_CTRL1_PLL_TST_EN ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_PLL_TST_EN_POS))
|
||||
#define MXC_F_AFE_CTRL1_V1EXTADJ_POS 25
|
||||
#define MXC_F_AFE_CTRL1_V1EXTADJ ((uint32_t)(0x0000001FUL << MXC_F_AFE_CTRL1_V1EXTADJ_POS))
|
||||
#define MXC_F_AFE_CTRL1_TMON_CUR_SEL_POS 30
|
||||
#define MXC_F_AFE_CTRL1_TMON_CUR_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_TMON_CUR_SEL_POS))
|
||||
|
||||
#define MXC_F_AFE_CTRL2_HYST_COMP0_POS 0
|
||||
#define MXC_F_AFE_CTRL2_HYST_COMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL2_HYST_COMP1_POS 2
|
||||
#define MXC_F_AFE_CTRL2_HYST_COMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL2_HYST_COMP2_POS 4
|
||||
#define MXC_F_AFE_CTRL2_HYST_COMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL2_HYST_COMP3_POS 6
|
||||
#define MXC_F_AFE_CTRL2_HYST_COMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP3_POS))
|
||||
#define MXC_F_AFE_CTRL2_HY_POL_COMP0_POS 8
|
||||
#define MXC_F_AFE_CTRL2_HY_POL_COMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL2_HY_POL_COMP1_POS 9
|
||||
#define MXC_F_AFE_CTRL2_HY_POL_COMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL2_HY_POL_COMP2_POS 10
|
||||
#define MXC_F_AFE_CTRL2_HY_POL_COMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL2_HY_POL_COMP3_POS 11
|
||||
#define MXC_F_AFE_CTRL2_HY_POL_COMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP3_POS))
|
||||
#define MXC_F_AFE_CTRL2_POWERUP_COMP0_POS 12
|
||||
#define MXC_F_AFE_CTRL2_POWERUP_COMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL2_POWERUP_COMP1_POS 13
|
||||
#define MXC_F_AFE_CTRL2_POWERUP_COMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL2_POWERUP_COMP2_POS 14
|
||||
#define MXC_F_AFE_CTRL2_POWERUP_COMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL2_POWERUP_COMP3_POS 15
|
||||
#define MXC_F_AFE_CTRL2_POWERUP_COMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP3_POS))
|
||||
#define MXC_F_AFE_CTRL2_DACOUT_EN0_POS 16
|
||||
#define MXC_F_AFE_CTRL2_DACOUT_EN0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN0_POS))
|
||||
#define MXC_F_AFE_CTRL2_DACOUT_EN1_POS 17
|
||||
#define MXC_F_AFE_CTRL2_DACOUT_EN1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN1_POS))
|
||||
#define MXC_F_AFE_CTRL2_DACOUT_EN2_POS 18
|
||||
#define MXC_F_AFE_CTRL2_DACOUT_EN2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN2_POS))
|
||||
#define MXC_F_AFE_CTRL2_DACOUT_EN3_POS 19
|
||||
#define MXC_F_AFE_CTRL2_DACOUT_EN3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN3_POS))
|
||||
#define MXC_F_AFE_CTRL2_SCM_OR_SEL_POS 20
|
||||
#define MXC_F_AFE_CTRL2_SCM_OR_SEL ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL2_SCM_OR_SEL_POS))
|
||||
#define MXC_F_AFE_CTRL2_SNO_OR_SEL_POS 23
|
||||
#define MXC_F_AFE_CTRL2_SNO_OR_SEL ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL2_SNO_OR_SEL_POS))
|
||||
#define MXC_F_AFE_CTRL2_DAC0_SEL_POS 26
|
||||
#define MXC_F_AFE_CTRL2_DAC0_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DAC0_SEL_POS))
|
||||
#define MXC_F_AFE_CTRL2_DAC1_SEL_POS 27
|
||||
#define MXC_F_AFE_CTRL2_DAC1_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DAC1_SEL_POS))
|
||||
|
||||
#define MXC_F_AFE_CTRL3_POWERUP_OPAMP0_POS 12
|
||||
#define MXC_F_AFE_CTRL3_POWERUP_OPAMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP0_POS))
|
||||
#define MXC_F_AFE_CTRL3_POWERUP_OPAMP1_POS 13
|
||||
#define MXC_F_AFE_CTRL3_POWERUP_OPAMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP1_POS))
|
||||
#define MXC_F_AFE_CTRL3_POWERUP_OPAMP2_POS 14
|
||||
#define MXC_F_AFE_CTRL3_POWERUP_OPAMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP2_POS))
|
||||
#define MXC_F_AFE_CTRL3_POWERUP_OPAMP3_POS 15
|
||||
#define MXC_F_AFE_CTRL3_POWERUP_OPAMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP3_POS))
|
||||
#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP0_POS 16
|
||||
#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP0_POS))
|
||||
#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP1_POS 17
|
||||
#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP1_POS))
|
||||
#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP2_POS 18
|
||||
#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP2_POS))
|
||||
#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP3_POS 19
|
||||
#define MXC_F_AFE_CTRL3_GND_SEL_OPAMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP3_POS))
|
||||
#define MXC_F_AFE_CTRL3_CLOSE_SPST0_POS 20
|
||||
#define MXC_F_AFE_CTRL3_CLOSE_SPST0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST0_POS))
|
||||
#define MXC_F_AFE_CTRL3_CLOSE_SPST1_POS 21
|
||||
#define MXC_F_AFE_CTRL3_CLOSE_SPST1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST1_POS))
|
||||
#define MXC_F_AFE_CTRL3_CLOSE_SPST2_POS 22
|
||||
#define MXC_F_AFE_CTRL3_CLOSE_SPST2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST2_POS))
|
||||
#define MXC_F_AFE_CTRL3_CLOSE_SPST3_POS 23
|
||||
#define MXC_F_AFE_CTRL3_CLOSE_SPST3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST3_POS))
|
||||
#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP0_POS 24
|
||||
#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP0_POS))
|
||||
#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP1_POS 25
|
||||
#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP1_POS))
|
||||
#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP2_POS 26
|
||||
#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP2_POS))
|
||||
#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP3_POS 27
|
||||
#define MXC_F_AFE_CTRL3_EN_PCH_OPAMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP3_POS))
|
||||
#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP0_POS 28
|
||||
#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP0_POS))
|
||||
#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP1_POS 29
|
||||
#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP1_POS))
|
||||
#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP2_POS 30
|
||||
#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP2_POS))
|
||||
#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP3_POS 31
|
||||
#define MXC_F_AFE_CTRL3_EN_NCH_OPAMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP3_POS))
|
||||
|
||||
#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS 0
|
||||
#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS))
|
||||
#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS 2
|
||||
#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS))
|
||||
#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS 4
|
||||
#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS))
|
||||
#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS 6
|
||||
#define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS))
|
||||
#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS 8
|
||||
#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS))
|
||||
#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS 10
|
||||
#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS))
|
||||
#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS 12
|
||||
#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS))
|
||||
#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS 14
|
||||
#define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS))
|
||||
#define MXC_F_AFE_CTRL4_DAC_SEL_A_POS 16
|
||||
#define MXC_F_AFE_CTRL4_DAC_SEL_A ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_A_POS))
|
||||
#define MXC_F_AFE_CTRL4_DAC_SEL_B_POS 18
|
||||
#define MXC_F_AFE_CTRL4_DAC_SEL_B ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_B_POS))
|
||||
#define MXC_F_AFE_CTRL4_DAC_SEL_C_POS 20
|
||||
#define MXC_F_AFE_CTRL4_DAC_SEL_C ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_C_POS))
|
||||
#define MXC_F_AFE_CTRL4_DAC_SEL_D_POS 22
|
||||
#define MXC_F_AFE_CTRL4_DAC_SEL_D ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_D_POS))
|
||||
#define MXC_F_AFE_CTRL4_NPAD_SEL_A_POS 24
|
||||
#define MXC_F_AFE_CTRL4_NPAD_SEL_A ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_A_POS))
|
||||
#define MXC_F_AFE_CTRL4_NPAD_SEL_B_POS 26
|
||||
#define MXC_F_AFE_CTRL4_NPAD_SEL_B ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_B_POS))
|
||||
#define MXC_F_AFE_CTRL4_NPAD_SEL_C_POS 28
|
||||
#define MXC_F_AFE_CTRL4_NPAD_SEL_C ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_C_POS))
|
||||
#define MXC_F_AFE_CTRL4_NPAD_SEL_D_POS 30
|
||||
#define MXC_F_AFE_CTRL4_NPAD_SEL_D ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_D_POS))
|
||||
|
||||
#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0_POS 0
|
||||
#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1_POS 3
|
||||
#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2_POS 6
|
||||
#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3_POS 9
|
||||
#define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3_POS))
|
||||
#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0_POS 12
|
||||
#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0_POS))
|
||||
#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1_POS 15
|
||||
#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1_POS))
|
||||
#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2_POS 18
|
||||
#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2_POS))
|
||||
#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3_POS 21
|
||||
#define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3_POS))
|
||||
#define MXC_F_AFE_CTRL5_OP_CMP0_POS 24
|
||||
#define MXC_F_AFE_CTRL5_OP_CMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP0_POS))
|
||||
#define MXC_F_AFE_CTRL5_OP_CMP1_POS 25
|
||||
#define MXC_F_AFE_CTRL5_OP_CMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP1_POS))
|
||||
#define MXC_F_AFE_CTRL5_OP_CMP2_POS 26
|
||||
#define MXC_F_AFE_CTRL5_OP_CMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP2_POS))
|
||||
#define MXC_F_AFE_CTRL5_OP_CMP3_POS 27
|
||||
#define MXC_F_AFE_CTRL5_OP_CMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP3_POS))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _MXC_AFE_REGS_H_ */
|
||||
|
|
@ -0,0 +1,493 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _MXC_CLKMAN_REGS_H_
|
||||
#define _MXC_CLKMAN_REGS_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @file clkman_regs.h
|
||||
* @addtogroup clkman CLKMAN
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Defines clock input selections for the phase locked loop.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Input select for high frequency crystal oscillator */
|
||||
MXC_E_CLKMAN_PLL_INPUT_SELECT_HFX = 0,
|
||||
/** Input select for 24MHz ring oscillator */
|
||||
MXC_E_CLKMAN_PLL_INPUT_SELECT_24MHZ_RO,
|
||||
} mxc_clkman_pll_input_select_t;
|
||||
|
||||
/**
|
||||
* @brief Defines clock input frequency for the phase locked loop.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Input frequency of 24MHz */
|
||||
MXC_E_CLKMAN_PLL_DIVISOR_SELECT_24MHZ = 0,
|
||||
/** Input frequency of 12MHz */
|
||||
MXC_E_CLKMAN_PLL_DIVISOR_SELECT_12MHZ,
|
||||
/** Input frequency of 8MHz */
|
||||
MXC_E_CLKMAN_PLL_DIVISOR_SELECT_8MHZ,
|
||||
} mxc_clkman_pll_divisor_select_t;
|
||||
|
||||
/**
|
||||
* @brief Defines terminal count for PLL stable.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Clock stable after 2^8 = 256 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_8_CLKS = 0,
|
||||
/** Clock stable after 2^9 = 512 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_9_CLKS,
|
||||
/** Clock stable after 2^10 = 1024 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_10_CLKS,
|
||||
/** Clock stable after 2^11 = 2048 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_11_CLKS,
|
||||
/** Clock stable after 2^12 = 4096 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_12_CLKS,
|
||||
/** Clock stable after 2^13 = 8192 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_13_CLKS,
|
||||
/** Clock stable after 2^14 = 16384 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_14_CLKS,
|
||||
/** Clock stable after 2^15 = 32768 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_15_CLKS,
|
||||
/** Clock stable after 2^16 = 65536 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_16_CLKS,
|
||||
/** Clock stable after 2^17 = 131072 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_17_CLKS,
|
||||
/** Clock stable after 2^18 = 262144 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_18_CLKS,
|
||||
/** Clock stable after 2^19 = 524288 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_19_CLKS,
|
||||
/** Clock stable after 2^20 = 1048576 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_20_CLKS,
|
||||
/** Clock stable after 2^21 = 2097152 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_21_CLKS,
|
||||
/** Clock stable after 2^22 = 4194304 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_22_CLKS,
|
||||
/** Clock stable after 2^23 = 8388608 clock cycles */
|
||||
MXC_E_CLKMAN_STABILITY_COUNT_2_23_CLKS
|
||||
} mxc_clkman_stability_count_t;
|
||||
|
||||
/**
|
||||
* @brief Defines clock source selections for system clock.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Clock select for 24MHz ring oscillator divided by 8 (3MHz) */
|
||||
MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO_DIV_8 = 0,
|
||||
/** Clock select for 24MHz ring oscillator */
|
||||
MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO,
|
||||
/** Clock select for high frequency crystal oscillator */
|
||||
MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_HFX,
|
||||
/** Clock select for 48MHz phase locked loop output divided by 2 (24MHz) */
|
||||
MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2
|
||||
} mxc_clkman_system_source_select_t;
|
||||
|
||||
/**
|
||||
* @brief Defines clock source selections for analog to digital converter clock.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Clock select for system clock frequency */
|
||||
MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM = 0,
|
||||
/** Clock select for 8MHz phase locked loop output */
|
||||
MXC_E_CLKMAN_ADC_SOURCE_SELECT_PLL_8MHZ,
|
||||
/** Clock select for high frequency crystal oscillator */
|
||||
MXC_E_CLKMAN_ADC_SOURCE_SELECT_HFX,
|
||||
/** Clock select for 24MHz ring oscillator */
|
||||
MXC_E_CLKMAN_ADC_SOURCE_SELECT_24MHZ_RO,
|
||||
} mxc_clkman_adc_source_select_t;
|
||||
|
||||
/**
|
||||
* @brief Defines clock source selections for watchdog timer clock.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Clock select for system clock frequency */
|
||||
MXC_E_CLKMAN_WDT_SOURCE_SELECT_SYSTEM = 0,
|
||||
/** Clock select for 8MHz phase locked loop output */
|
||||
MXC_E_CLKMAN_WDT_SOURCE_SELECT_RTC,
|
||||
/** Clock select for high frequency crystal oscillator */
|
||||
MXC_E_CLKMAN_WDT_SOURCE_SELECT_24MHZ_RO,
|
||||
/** Clock select for 24MHz ring oscillator */
|
||||
MXC_E_CLKMAN_WDT_SOURCE_SELECT_NANO,
|
||||
} mxc_clkman_wdt_source_select_t;
|
||||
|
||||
/**
|
||||
* @brief Defines clock scales for various clocks.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Clock disabled */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DISABLED = 0,
|
||||
/** Clock enabled */
|
||||
MXC_E_CLKMAN_CLK_SCALE_ENABLED,
|
||||
/** Clock scale for dividing by 2 */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DIV_2,
|
||||
/** Clock scale for dividing by 4 */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DIV_4,
|
||||
/** Clock scale for dividing by 8 */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DIV_8,
|
||||
/** Clock scale for dividing by 16 */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DIV_16,
|
||||
/** Clock scale for dividing by 32 */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DIV_32,
|
||||
/** Clock scale for dividing by 64 */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DIV_64,
|
||||
/** Clock scale for dividing by 128 */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DIV_128,
|
||||
/** Clock scale for dividing by 256 */
|
||||
MXC_E_CLKMAN_CLK_SCALE_DIV_256
|
||||
} mxc_clkman_clk_scale_t;
|
||||
|
||||
/**
|
||||
* @brief Defines Setting of the Clock Gates .
|
||||
*/
|
||||
typedef enum {
|
||||
/** Clock Gater is Off */
|
||||
MXC_E_CLKMAN_CLK_GATE_OFF = 0,
|
||||
/** Clock Gater is Dynamic */
|
||||
MXC_E_CLKMAN_CLK_GATE_DYNAMIC,
|
||||
/** Clock Gater is On */
|
||||
MXC_E_CLKMAN_CLK_GATE_ON
|
||||
} mxc_clkman_clk_gate_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== ===================================================================== */
|
||||
typedef struct {
|
||||
__IO uint32_t clk_config; /* 0x0000 System Clock Configuration */
|
||||
__IO uint32_t clk_ctrl; /* 0x0004 System Clock Controls */
|
||||
__IO uint32_t intfl; /* 0x0008 Interrupt Flags */
|
||||
__IO uint32_t inten; /* 0x000C Interrupt Enable/Disable Controls */
|
||||
__IO uint32_t trim_calc; /* 0x0010 Trim Calculation Controls */
|
||||
__I uint32_t rsv0014[4]; /* 0x0014 */
|
||||
__IO uint32_t i2c_timer_ctrl; /* 0x0024 I2C Timer Control */
|
||||
__I uint32_t rsv0028[6]; /* 0x0028 */
|
||||
__IO uint32_t clk_ctrl_0_system; /* 0x0040 Control Settings for CLK0 - System Clock */
|
||||
__IO uint32_t clk_ctrl_1_gpio; /* 0x0044 Control Settings for CLK1 - GPIO Module Clock */
|
||||
__IO uint32_t clk_ctrl_2_pt; /* 0x0048 Control Settings for CLK2 - Pulse Train Module Clock */
|
||||
__IO uint32_t clk_ctrl_3_spi0; /* 0x004C Control Settings for CLK3 - SPI0 Master Clock */
|
||||
__IO uint32_t clk_ctrl_4_spi1; /* 0x0050 Control Settings for CLK4 - SPI1 Master Clock */
|
||||
__IO uint32_t clk_ctrl_5_spi2; /* 0x0054 Control Settings for CLK5 - SPI2 Master Clock */
|
||||
__IO uint32_t clk_ctrl_6_i2cm; /* 0x0058 Control Settings for CLK6 - Clock for all I2C Masters */
|
||||
__IO uint32_t clk_ctrl_7_i2cs; /* 0x005C Control Settings for CLK7 - I2C Slave Clock */
|
||||
__IO uint32_t clk_ctrl_8_lcd_chpump; /* 0x0060 Control Settings for CLK8 - LCD Charge Pump Clock */
|
||||
__IO uint32_t clk_ctrl_9_puf; /* 0x0064 Control Settings for CLK9 - PUF Clock */
|
||||
__IO uint32_t clk_ctrl_10_prng; /* 0x0068 Control Settings for CLK10 - PRNG Clock */
|
||||
__IO uint32_t clk_ctrl_11_wdt0; /* 0x006C Control Settings for CLK11 - Watchdog Timer 0 ScaledSysClk */
|
||||
__IO uint32_t clk_ctrl_12_wdt1; /* 0x0070 Control Settings for CLK12 - Watchdog Timer 1 ScaledSysClk */
|
||||
__IO uint32_t clk_ctrl_13_rtc_int_sync; /* 0x0074 Control Settings for CLK13 - RTC Interrupt Sync Clock */
|
||||
__IO uint32_t clk_ctrl_14_dac0; /* 0x0078 Control Settings for CLK14 - 12-bit DAC 0 Clock */
|
||||
__IO uint32_t clk_ctrl_15_dac1; /* 0x007C Control Settings for CLK15 - 12-bit DAC 1 Clock */
|
||||
__IO uint32_t clk_ctrl_16_dac2; /* 0x0080 Control Settings for CLK16 - 8-bit DAC 0 Clock */
|
||||
__IO uint32_t clk_ctrl_17_dac3; /* 0x0084 Control Settings for CLK17 - 8-bit DAC 1 Clock */
|
||||
__I uint32_t rsv0088[30]; /* 0x0088 */
|
||||
__IO uint32_t crypt_clk_ctrl_0_aes; /* 0x0100 Control Settings for Crypto Clock 0 - AES */
|
||||
__IO uint32_t crypt_clk_ctrl_1_maa; /* 0x0104 Control Settings for Crypto Clock 1 - MAA */
|
||||
__IO uint32_t crypt_clk_ctrl_2_prng; /* 0x0108 Control Settings for Crypto Clock 2 - PRNG */
|
||||
__I uint32_t rsv010C[13]; /* 0x010C */
|
||||
__IO uint32_t clk_gate_ctrl0; /* 0x0140 Dynamic Clock Gating Control Register 0 */
|
||||
__IO uint32_t clk_gate_ctrl1; /* 0x0144 Dynamic Clock Gating Control Register 1 */
|
||||
__IO uint32_t clk_gate_ctrl2; /* 0x0148 Dynamic Clock Gating Control Register 2 */
|
||||
} mxc_clkman_regs_t;
|
||||
|
||||
/*
|
||||
Register offsets for module CLKMAN.
|
||||
*/
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CONFIG ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL ((uint32_t)0x00000004UL)
|
||||
#define MXC_R_CLKMAN_OFFS_INTFL ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_CLKMAN_OFFS_INTEN ((uint32_t)0x0000000CUL)
|
||||
#define MXC_R_CLKMAN_OFFS_TRIM_CALC ((uint32_t)0x00000010UL)
|
||||
#define MXC_R_CLKMAN_OFFS_I2C_TIMER_CTRL ((uint32_t)0x00000024UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_0_SYSTEM ((uint32_t)0x00000040UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_1_GPIO ((uint32_t)0x00000044UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_2_PT ((uint32_t)0x00000048UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_3_SPI0 ((uint32_t)0x0000004CUL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_4_SPI1 ((uint32_t)0x00000050UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_5_SPI2 ((uint32_t)0x00000054UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_6_I2CM ((uint32_t)0x00000058UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_7_I2CS ((uint32_t)0x0000005CUL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_8_LCD_CHPUMP ((uint32_t)0x00000060UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_9_PUF ((uint32_t)0x00000064UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_10_PRNG ((uint32_t)0x00000068UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_11_WDT0 ((uint32_t)0x0000006CUL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_12_WDT1 ((uint32_t)0x00000070UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_13_RTC_INT_SYNC ((uint32_t)0x00000074UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_14_DAC0 ((uint32_t)0x00000078UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_15_DAC1 ((uint32_t)0x0000007CUL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_16_DAC2 ((uint32_t)0x00000080UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_CTRL_17_DAC3 ((uint32_t)0x00000084UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_0_AES ((uint32_t)0x00000100UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_1_MAA ((uint32_t)0x00000104UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_2_PRNG ((uint32_t)0x00000108UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL0 ((uint32_t)0x00000140UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL1 ((uint32_t)0x00000144UL)
|
||||
#define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL2 ((uint32_t)0x00000148UL)
|
||||
|
||||
/*
|
||||
Field positions and masks for module CLKMAN.
|
||||
*/
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS_POS 1
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE_POS 2
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS 4
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST ((uint32_t)(0x0000001FUL << MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL_POS 9
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL ((uint32_t)(0x00000007UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE_POS 12
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N_POS 13
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS 14
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS 16
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE_POS 18
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS_POS 19
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS 20
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE_POS 24
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N_POS 25
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT_POS 28
|
||||
#define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS 1
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE_POS 3
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N_POS 4
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N_POS 8
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS 9
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N_POS 12
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N_POS 16
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT_POS 17
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N_POS 20
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT_POS 21
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT_POS))
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE_POS 24
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_INTFL_RING_STABLE_POS 0
|
||||
#define MXC_F_CLKMAN_INTFL_RING_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_RING_STABLE_POS))
|
||||
#define MXC_F_CLKMAN_INTFL_PLL_STABLE_POS 1
|
||||
#define MXC_F_CLKMAN_INTFL_PLL_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_PLL_STABLE_POS))
|
||||
#define MXC_F_CLKMAN_INTFL_CRYPTO_STABLE_POS 2
|
||||
#define MXC_F_CLKMAN_INTFL_CRYPTO_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_CRYPTO_STABLE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_INTEN_RING_STABLE_POS 0
|
||||
#define MXC_F_CLKMAN_INTEN_RING_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_RING_STABLE_POS))
|
||||
#define MXC_F_CLKMAN_INTEN_PLL_STABLE_POS 1
|
||||
#define MXC_F_CLKMAN_INTEN_PLL_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_PLL_STABLE_POS))
|
||||
#define MXC_F_CLKMAN_INTEN_CRYPTO_STABLE_POS 2
|
||||
#define MXC_F_CLKMAN_INTEN_CRYPTO_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_CRYPTO_STABLE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL_POS 0
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL_POS))
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START_POS 1
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START_POS))
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED_POS 2
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED_POS))
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE_POS 3
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE_POS))
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS_POS 16
|
||||
#define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS ((uint32_t)(0x000003FFUL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN_POS 0
|
||||
#define MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE_POS 0
|
||||
#define MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER_POS 2
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS 4
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER_POS 6
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER_POS 8
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER_POS 10
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER_POS 12
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER_POS 14
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER_POS 16
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER_POS 18
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER_POS 20
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER_POS 22
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER_POS 24
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER_POS 26
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER_POS 28
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER_POS 30
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER_POS 2
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER_POS 4
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER_POS 6
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER_POS 8
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER_POS 10
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER_POS 12
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER_POS 14
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER_POS 16
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER_POS 18
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER_POS 20
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER_POS 22
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER_POS 24
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER_POS 26
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER_POS 28
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER_POS 30
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER_POS))
|
||||
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER_POS 0
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER_POS 2
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER_POS 4
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER_POS))
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER_POS 6
|
||||
#define MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER_POS))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _MXC_CLKMAN_REGS_H_ */
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef MBED_CMSIS_H
|
||||
#define MBED_CMSIS_H
|
||||
|
||||
#include "max32610.h"
|
||||
#include "cmsis_nvic.h"
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#include "cmsis_nvic.h"
|
||||
|
||||
#if defined(TOOLCHAIN_GCC_ARM) || defined(TOOLCHAIN_ARM_STD)
|
||||
__attribute__((aligned(256)))
|
||||
#endif
|
||||
#if defined(TOOLCHAIN_IAR)
|
||||
#pragma data_alignment=256
|
||||
#endif
|
||||
static void (*ramVectorTable[MXC_IRQ_COUNT])(void);
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
uint32_t i;
|
||||
|
||||
// Copy and switch to dynamic vectors if the first time called
|
||||
if (SCB->VTOR != (uint32_t)ramVectorTable) {
|
||||
uint32_t *old_vectors = (uint32_t*)SCB->VTOR;
|
||||
vectors = (uint32_t*)ramVectorTable;
|
||||
for (i = 0; i < NVIC_NUM_VECTORS; i++) {
|
||||
vectors[i] = old_vectors[i];
|
||||
}
|
||||
SCB->VTOR = (uint32_t)ramVectorTable;
|
||||
}
|
||||
vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
|
||||
}
|
||||
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
|
||||
}
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef MBED_CMSIS_NVIC_H
|
||||
#define MBED_CMSIS_NVIC_H
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#define NVIC_NUM_VECTORS MXC_IRQ_COUNT
|
||||
#define NVIC_USER_IRQ_OFFSET 16
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* MBED_CMSIS_NVIC_H */
|
||||
|
|
@ -0,0 +1,89 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _MXC_CRC_REGS_H_
|
||||
#define _MXC_CRC_REGS_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @file crc_regs.h
|
||||
* @addtogroup crc CRC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Offset Register Description
|
||||
====== ======================================================= */
|
||||
typedef struct {
|
||||
__IO uint32_t reseed; /* 0x0000 CRC-16/CRC-32 Reseed Controls */
|
||||
__IO uint32_t seed16; /* 0x0004 Reseed Value for CRC-16 Calculations */
|
||||
__IO uint32_t seed32; /* 0x0008 Reseed Value for CRC-32 Calculations */
|
||||
} mxc_crc_regs_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== ======================================================= */
|
||||
typedef struct {
|
||||
__IO uint32_t value16[512]; /* 0x0000 Write Next CRC-16 Data Value / Read CRC-16 Result Value */
|
||||
__IO uint32_t value32[512]; /* 0x0800 Write Next CRC-32 Data Value / Read CRC-32 Result Value */
|
||||
} mxc_crc_data_regs_t;
|
||||
|
||||
/*
|
||||
Register offsets for module CRC.
|
||||
*/
|
||||
#define MXC_R_CRC_OFFS_RESEED ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_CRC_OFFS_SEED16 ((uint32_t)0x00000004UL)
|
||||
#define MXC_R_CRC_OFFS_SEED32 ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_CRC_DATA_OFFS_VALUE16 ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_CRC_DATA_OFFS_VALUE32 ((uint32_t)0x00000800UL)
|
||||
|
||||
/*
|
||||
Field positions and masks for module CRC.
|
||||
*/
|
||||
#define MXC_F_CRC_RESEED_CRC16_POS 0
|
||||
#define MXC_F_CRC_RESEED_CRC16 ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_CRC16_POS))
|
||||
#define MXC_F_CRC_RESEED_CRC32_POS 1
|
||||
#define MXC_F_CRC_RESEED_CRC32 ((uint32_t)(0x00000001UL << MXC_F_CRC_RESEED_CRC32_POS))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _MXC_CRC_REGS_H_ */
|
||||
|
|
@ -0,0 +1,180 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _MXC_DAC_REGS_H
|
||||
#define _MXC_DAC_REGS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @file dac_regs.h
|
||||
* @addtogroup dac DAC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Defines the DAC Operational Modes.
|
||||
*/
|
||||
typedef enum {
|
||||
/** DAC OpMode FIFO */
|
||||
MXC_E_DAC_OP_MODE_FIFO = 0,
|
||||
/** DAC OpMode Sample Count */
|
||||
MXC_E_DAC_OP_MODE_DACSMPLCNT,
|
||||
/** DAC OpMode DAC_REG Control */
|
||||
MXC_E_DAC_OP_MODE_DAC_REG,
|
||||
/** DAC OpMode Continuous */
|
||||
MXC_E_DAC_OP_MODE_CONTINUOUS
|
||||
} mxc_dac_op_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Defines the DAC Interpolation Options.
|
||||
*/
|
||||
typedef enum {
|
||||
/** DAC Interpolation is Disabled */
|
||||
MXC_E_DAC_INTERP_MODE_DISABLED = 0,
|
||||
/** DAC Interpolation 2:1 */
|
||||
MXC_E_DAC_INTERP_MODE_2_TO_1,
|
||||
/** DAC Interpolation 4:1 */
|
||||
MXC_E_DAC_INTERP_MODE_4_TO_1,
|
||||
/** DAC Interpolation 8:1 */
|
||||
MXC_E_DAC_INTERP_MODE_8_TO_1
|
||||
} mxc_dac_interp_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Defines the DAC Start Modes.
|
||||
*/
|
||||
typedef enum {
|
||||
/** Start on FIFO Not Empty */
|
||||
MXC_E_DAC_START_MODE_FIFO_NOT_EMPTY = 0,
|
||||
/** Start on ADC generated Start Strobe */
|
||||
MXC_E_DAC_START_MODE_ADC_STROBE,
|
||||
/** Start on DAC generated Start Strobe */
|
||||
MXC_E_DAC_START_MODE_DAC_STROBE
|
||||
} mxc_dac_start_mode_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== ================================================== */
|
||||
typedef struct {
|
||||
__IO uint32_t ctrl0; /* 0x0000 DAC Control Register 0 */
|
||||
__IO uint32_t rate; /* 0x0004 DAC Output Rate Control */
|
||||
__IO uint32_t ctrl1_int; /* 0x0008 DAC Control Register 1, Interrupt Flags and Enable */
|
||||
__IO uint32_t reg; /* 0x000C DAC Data Register */
|
||||
__IO uint32_t trm; /* 0x0010 DAC Trim Register */
|
||||
} mxc_dac_regs_t;
|
||||
|
||||
/* Offset Register Description
|
||||
====== ================================================== */
|
||||
typedef struct {
|
||||
union {
|
||||
__IO uint8_t output_8; /* 0x0000 Write to push values to DAC output FIFO */
|
||||
__IO uint16_t output_16; /* 0x0000 Write to push values to DAC output FIFO */
|
||||
};
|
||||
} mxc_dac_fifo_t;
|
||||
|
||||
/*
|
||||
Register offsets for module DAC12.
|
||||
*/
|
||||
#define MXC_R_DAC_OFFS_CTRL0 ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_DAC_OFFS_RATE ((uint32_t)0x00000004UL)
|
||||
#define MXC_R_DAC_OFFS_CTRL1_INT ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_DAC_FIFO_OFFS_OUTPUT ((uint32_t)0x00000000UL)
|
||||
|
||||
/*
|
||||
Field positions and masks for module DAC.
|
||||
*/
|
||||
#define MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS 0
|
||||
#define MXC_F_DAC_CTRL0_FIFO_AE_CNT ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS))
|
||||
#define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS 5
|
||||
#define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS))
|
||||
#define MXC_F_DAC_CTRL0_FIFO_EMPTY_POS 6
|
||||
#define MXC_F_DAC_CTRL0_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_EMPTY_POS))
|
||||
#define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS 7
|
||||
#define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS))
|
||||
#define MXC_F_DAC_CTRL0_INTERP_MODE_POS 8
|
||||
#define MXC_F_DAC_CTRL0_INTERP_MODE ((uint32_t)(0x00000007UL << MXC_F_DAC_CTRL0_INTERP_MODE_POS))
|
||||
#define MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS 12
|
||||
#define MXC_F_DAC_CTRL0_FIFO_AF_CNT ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS))
|
||||
#define MXC_F_DAC_CTRL0_START_MODE_POS 16
|
||||
#define MXC_F_DAC_CTRL0_START_MODE ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_START_MODE_POS))
|
||||
#define MXC_F_DAC_CTRL0_CPU_START_POS 20
|
||||
#define MXC_F_DAC_CTRL0_CPU_START ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CPU_START_POS))
|
||||
#define MXC_F_DAC_CTRL0_OP_MODE_POS 24
|
||||
#define MXC_F_DAC_CTRL0_OP_MODE ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_OP_MODE_POS))
|
||||
#define MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS 26
|
||||
#define MXC_F_DAC_CTRL0_POWER_MODE_1_0 ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS))
|
||||
#define MXC_F_DAC_CTRL0_POWER_ON_POS 28
|
||||
#define MXC_F_DAC_CTRL0_POWER_ON ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_ON_POS))
|
||||
#define MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS 29
|
||||
#define MXC_F_DAC_CTRL0_CLOCK_GATE_EN ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS))
|
||||
#define MXC_F_DAC_CTRL0_POWER_MODE_2_POS 30
|
||||
#define MXC_F_DAC_CTRL0_POWER_MODE_2 ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_MODE_2_POS))
|
||||
#define MXC_F_DAC_CTRL0_RESET_POS 31
|
||||
#define MXC_F_DAC_CTRL0_RESET ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_RESET_POS))
|
||||
|
||||
#define MXC_F_DAC_RATE_RATE_CNT_POS 0
|
||||
#define MXC_F_DAC_RATE_RATE_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_RATE_CNT_POS))
|
||||
#define MXC_F_DAC_RATE_SAMPLE_CNT_POS 16
|
||||
#define MXC_F_DAC_RATE_SAMPLE_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_SAMPLE_CNT_POS))
|
||||
|
||||
#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS 0
|
||||
#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS))
|
||||
#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS 1
|
||||
#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS))
|
||||
#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS 2
|
||||
#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS))
|
||||
#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS 3
|
||||
#define MXC_F_DAC_CTRL1_INT_UNDERFLOW ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS))
|
||||
#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS 16
|
||||
#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS))
|
||||
#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS 17
|
||||
#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS))
|
||||
#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS 18
|
||||
#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS))
|
||||
#define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS 28
|
||||
#define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS))
|
||||
#define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS 29
|
||||
#define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _DAC12_REGS_H */
|
||||
|
|
@ -0,0 +1,210 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _MXC_FLC_REGS_H
|
||||
#define _MXC_FLC_REGS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @file flc_regs.h
|
||||
* @addtogroup flc FLC
|
||||
* @{
|
||||
*/
|
||||
/* Offset Register Description
|
||||
====== ======================================================= */
|
||||
typedef struct {
|
||||
__IO uint32_t faddr; /* 0x0000 Flash Operation Address */
|
||||
__IO uint32_t fckdiv; /* 0x0004 Flash Clock Rate Divisor */
|
||||
__IO uint32_t ctrl; /* 0x0008 Flash Control Register */
|
||||
__I uint32_t rsv000C[6]; /* 0x000C */
|
||||
__IO uint32_t intr; /* 0x0024 Flash Controller Interrupt Flags and Enable/Disable 0 */
|
||||
__I uint32_t rsv0028[2]; /* 0x0028 */
|
||||
__IO uint32_t fdata; /* 0x0030 Flash Operation Data Register */
|
||||
__I uint32_t rsv0034[7]; /* 0x0034 */
|
||||
__IO uint32_t perform; /* 0x0050 Flash Performance Settings */
|
||||
__I uint32_t rsv0054[11]; /* 0x0054 */
|
||||
__IO uint32_t status; /* 0x0080 Security Status Flags */
|
||||
__I uint32_t rsv0084; /* 0x0084 */
|
||||
__IO uint32_t security; /* 0x0088 Flash Controller Security Settings */
|
||||
__I uint32_t rsv008C[4]; /* 0x008C */
|
||||
__IO uint32_t bypass; /* 0x009C Status Flags for DSB Operations */
|
||||
__IO uint32_t user_option; /* 0x0100 Used to set DSB Access code and Auto-Lock in info block */
|
||||
__I uint32_t rsv0104[15]; /* 0x0104 */
|
||||
__IO uint32_t ctrl2; /* 0x0140 Flash Control Register 2 */
|
||||
__IO uint32_t intfl1; /* 0x0144 Interrupt Flags Register 1 */
|
||||
__IO uint32_t inten1; /* 0x0148 Interrupt Enable/Disable Register 1 */
|
||||
__I uint32_t rsv014C; /* 0x014C */
|
||||
__IO uint32_t disable_xr0; /* 0x0150 Disable Flash Page Exec/Read Register 0 */
|
||||
__IO uint32_t disable_xr1; /* 0x0154 Disable Flash Page Exec/Read Register 1 */
|
||||
__IO uint32_t disable_xr2; /* 0x0158 Disable Flash Page Exec/Read Register 2 */
|
||||
__IO uint32_t disable_xr3; /* 0x015C Disable Flash Page Exec/Read Register 3 */
|
||||
__IO uint32_t disable_we0; /* 0x0160 Disable Flash Page Write/Erase Register 0 */
|
||||
__IO uint32_t disable_we1; /* 0x0164 Disable Flash Page Write/Erase Register 1 */
|
||||
__IO uint32_t disable_we2; /* 0x0168 Disable Flash Page Write/Erase Register 2 */
|
||||
__IO uint32_t disable_we3; /* 0x016C Disable Flash Page Write/Erase Register 3 */
|
||||
} mxc_flc_regs_t;
|
||||
|
||||
/*
|
||||
Register offsets for module FLC.
|
||||
*/
|
||||
#define MXC_R_FLC_OFFS_FADDR ((uint32_t)0x00000000UL)
|
||||
#define MXC_R_FLC_OFFS_FCKDIV ((uint32_t)0x00000004UL)
|
||||
#define MXC_R_FLC_OFFS_CTRL ((uint32_t)0x00000008UL)
|
||||
#define MXC_R_FLC_OFFS_INTR ((uint32_t)0x00000024UL)
|
||||
#define MXC_R_FLC_OFFS_FDATA ((uint32_t)0x00000030UL)
|
||||
#define MXC_R_FLC_OFFS_PERFORM ((uint32_t)0x00000050UL)
|
||||
#define MXC_R_FLC_OFFS_STATUS ((uint32_t)0x00000080UL)
|
||||
#define MXC_R_FLC_OFFS_SECURITY ((uint32_t)0x00000088UL)
|
||||
#define MXC_R_FLC_OFFS_BYPASS ((uint32_t)0x0000009CUL)
|
||||
#define MXC_R_FLC_OFFS_USER_OPTION ((uint32_t)0x00000100UL)
|
||||
#define MXC_R_FLC_OFFS_CTRL2 ((uint32_t)0x00000140UL)
|
||||
#define MXC_R_FLC_OFFS_INTFL1 ((uint32_t)0x00000144UL)
|
||||
#define MXC_R_FLC_OFFS_INTEN1 ((uint32_t)0x00000148UL)
|
||||
#define MXC_R_FLC_OFFS_DISABLE_XR0 ((uint32_t)0x00000150UL)
|
||||
#define MXC_R_FLC_OFFS_DISABLE_XR1 ((uint32_t)0x00000154UL)
|
||||
#define MXC_R_FLC_OFFS_DISABLE_XR2 ((uint32_t)0x00000158UL)
|
||||
#define MXC_R_FLC_OFFS_DISABLE_XR3 ((uint32_t)0x0000015CUL)
|
||||
#define MXC_R_FLC_OFFS_DISABLE_WE0 ((uint32_t)0x00000160UL)
|
||||
#define MXC_R_FLC_OFFS_DISABLE_WE1 ((uint32_t)0x00000164UL)
|
||||
#define MXC_R_FLC_OFFS_DISABLE_WE2 ((uint32_t)0x00000168UL)
|
||||
#define MXC_R_FLC_OFFS_DISABLE_WE3 ((uint32_t)0x0000016CUL)
|
||||
|
||||
#define MXC_V_FLC_ERASE_CODE_PAGE_ERASE ((uint8_t)0x55)
|
||||
#define MXC_V_FLC_ERASE_CODE_MASS_ERASE ((uint8_t)0xAA)
|
||||
|
||||
#define MXC_V_FLC_FLSH_UNLOCK_KEY ((uint8_t)0x2)
|
||||
|
||||
/*
|
||||
Field positions and masks for module FLC.
|
||||
*/
|
||||
#define MXC_F_FLC_FADDR_FADDR_POS 0
|
||||
#define MXC_F_FLC_FADDR_FADDR ((uint32_t)(0x0003FFFFUL << MXC_F_FLC_FADDR_FADDR_POS))
|
||||
|
||||
#define MXC_F_FLC_FCKDIV_FCKDIV_POS 0
|
||||
#define MXC_F_FLC_FCKDIV_FCKDIV ((uint32_t)(0x0000001FUL << MXC_F_FLC_FCKDIV_FCKDIV_POS))
|
||||
|
||||
#define MXC_F_FLC_CTRL_WRITE_POS 0
|
||||
#define MXC_F_FLC_CTRL_WRITE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_POS))
|
||||
#define MXC_F_FLC_CTRL_MASS_ERASE_POS 1
|
||||
#define MXC_F_FLC_CTRL_MASS_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_MASS_ERASE_POS))
|
||||
#define MXC_F_FLC_CTRL_PAGE_ERASE_POS 2
|
||||
#define MXC_F_FLC_CTRL_PAGE_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PAGE_ERASE_POS))
|
||||
#define MXC_F_FLC_CTRL_ERASE_CODE_POS 8
|
||||
#define MXC_F_FLC_CTRL_ERASE_CODE ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL_ERASE_CODE_POS))
|
||||
#define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS 16
|
||||
#define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS))
|
||||
#define MXC_F_FLC_CTRL_WRITE_ENABLE_POS 17
|
||||
#define MXC_F_FLC_CTRL_WRITE_ENABLE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_ENABLE_POS))
|
||||
#define MXC_F_FLC_CTRL_PENDING_POS 24
|
||||
#define MXC_F_FLC_CTRL_PENDING ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PENDING_POS))
|
||||
#define MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS 25
|
||||
#define MXC_F_FLC_CTRL_INFO_BLOCK_VALID ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS))
|
||||
#define MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS 27
|
||||
#define MXC_F_FLC_CTRL_AUTO_INCRE_MODE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS))
|
||||
#define MXC_F_FLC_CTRL_FLSH_UNLOCK_POS 28
|
||||
#define MXC_F_FLC_CTRL_FLSH_UNLOCK ((uint32_t)(0x0000000FUL << MXC_F_FLC_CTRL_FLSH_UNLOCK_POS))
|
||||
|
||||
#define MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS 0
|
||||
#define MXC_F_FLC_INTR_FLASH_OP_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS))
|
||||
#define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS 1
|
||||
#define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS))
|
||||
#define MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS 9
|
||||
#define MXC_F_FLC_INTR_FLASH_OP_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS))
|
||||
#define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS 10
|
||||
#define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS))
|
||||
|
||||
#define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS 8
|
||||
#define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS))
|
||||
#define MXC_F_FLC_PERFORM_DELAY_SE_EN_POS 0
|
||||
#define MXC_F_FLC_PERFORM_DELAY_SE_EN ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_DELAY_SE_EN_POS))
|
||||
|
||||
#define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS 0
|
||||
#define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS))
|
||||
#define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS 1
|
||||
#define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS))
|
||||
#define MXC_F_FLC_STATUS_AUTO_LOCK_POS 3
|
||||
#define MXC_F_FLC_STATUS_AUTO_LOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_AUTO_LOCK_POS))
|
||||
|
||||
#define MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS 0
|
||||
#define MXC_F_FLC_SECURITY_DEBUG_DISABLE ((uint32_t)(0x000000FFUL << MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS))
|
||||
#define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS 8
|
||||
#define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK ((uint32_t)(0x0000000FUL << MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS))
|
||||
#define MXC_F_FLC_SECURITY_SECURITY_LOCK_POS 31
|
||||
#define MXC_F_FLC_SECURITY_SECURITY_LOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_SECURITY_SECURITY_LOCK_POS))
|
||||
|
||||
#define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS 0
|
||||
#define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS))
|
||||
#define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS 1
|
||||
#define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS))
|
||||
#define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS 2
|
||||
#define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS))
|
||||
#define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS 3
|
||||
#define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS))
|
||||
|
||||
#define MXC_F_FLC_CTRL2_FLASH_LVE_POS 0
|
||||
#define MXC_F_FLC_CTRL2_FLASH_LVE ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_FLASH_LVE_POS))
|
||||
#define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS 8
|
||||
#define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS))
|
||||
|
||||
#define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS 0
|
||||
#define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS))
|
||||
#define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS 1
|
||||
#define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS))
|
||||
#define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS 2
|
||||
#define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS))
|
||||
#define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS 3
|
||||
#define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS))
|
||||
|
||||
#define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS 0
|
||||
#define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS))
|
||||
#define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS 1
|
||||
#define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS))
|
||||
#define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS 2
|
||||
#define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS))
|
||||
#define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS 3
|
||||
#define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _MXC_FLC_REGS_H_ */
|
||||
|
|
@ -0,0 +1,477 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
|
||||
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of Maxim Integrated
|
||||
* Products, Inc. shall not be used except as stated in the Maxim Integrated
|
||||
* Products, Inc. Branding Policy.
|
||||
*
|
||||
* The mere transfer of this software does not imply any licenses
|
||||
* of trade secrets, proprietary technology, copyrights, patents,
|
||||
* trademarks, maskwork rights, or any other form of intellectual
|
||||
* property whatsoever. Maxim Integrated Products, Inc. retains all
|
||||
* ownership rights.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _MXC_GPIO_REGS_H_
|
||||
#define _MXC_GPIO_REGS_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* @file gpio_regs.h
|
||||
* @addtogroup gpio GPIO
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Offset Register Description
|
||||
============= ========================================== */
|
||||
typedef struct {
|
||||
__I uint32_t rsv000[16]; /* 0x0000-0x003C */
|
||||
|
||||
__IO uint32_t free[8]; /* 0x0040-0x005C Port P[0..7] Free for GPIO Operation Flags */
|
||||
__I uint32_t rsv060[8]; /* 0x0060-0x007C */
|
||||
|
||||
__IO uint32_t out_mode[8]; /* 0x0080-0x009C Port P[0..7] GPIO Output Drive Mode */
|
||||
__I uint32_t rsv0A0[8]; /* 0x00A0-0x00BC */
|
||||
|
||||
__IO uint32_t out_val[8]; /* 0x00C0-0x00DC Port P[0..7] GPIO Output Value */
|
||||
__I uint32_t rsv0E0[8]; /* 0x00E0-0x00FC */
|
||||
|
||||
__IO uint32_t func_sel[8]; /* 0x0100-0x011C Port P[0..7] GPIO Function Select */
|
||||
__I uint32_t rsv120[8]; /* 0x0120-0x013C */
|
||||
|
||||
__IO uint32_t in_mode[8]; /* 0x0140-0x015C Port P[0..7] GPIO Input Monitoring Mode */
|
||||
__I uint32_t rsv160[8]; /* 0x0160-0x017C */
|
||||
|
||||
__IO uint32_t in_val[8]; /* 0x0180-0x019C Port P[0..7] GPIO Input Value */
|
||||
__I uint32_t rsv1A0[8]; /* 0x01A0-0x01BC */
|
||||
|
||||
__IO uint32_t int_mode[8]; /* 0x01C0-0x01DC Port P[0..7] Interrupt Detection Mode */
|
||||
__I uint32_t rsv1E0[8]; /* 0x01E0-0x01FC */
|
||||
|
||||
__IO uint32_t intfl[8]; /* 0x0200-0x021C Port P[0..7] Interrupt Flags */
|
||||
__I uint32_t rsv220[8]; /* 0x0220-0x023C */
|
||||
|
||||
__IO uint32_t inten[8]; /* 0x0240-0x025C Port P[0..7] Interrupt Enables */
|
||||
} mxc_gpio_regs_t;
|
||||
|
||||
/*
|
||||
Register offsets for module GPIO.
|
||||
*/
|
||||
#define MXC_R_GPIO_OFFS_FREE_P0 ((uint32_t)0x00000040UL)
|
||||
#define MXC_R_GPIO_OFFS_FREE_P1 ((uint32_t)0x00000044UL)
|
||||
#define MXC_R_GPIO_OFFS_FREE_P2 ((uint32_t)0x00000048UL)
|
||||
#define MXC_R_GPIO_OFFS_FREE_P3 ((uint32_t)0x0000004CUL)
|
||||
#define MXC_R_GPIO_OFFS_FREE_P4 ((uint32_t)0x00000050UL)
|
||||
#define MXC_R_GPIO_OFFS_FREE_P5 ((uint32_t)0x00000054UL)
|
||||
#define MXC_R_GPIO_OFFS_FREE_P6 ((uint32_t)0x00000058UL)
|
||||
#define MXC_R_GPIO_OFFS_FREE_P7 ((uint32_t)0x0000005CUL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_MODE_P0 ((uint32_t)0x00000080UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_MODE_P1 ((uint32_t)0x00000084UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_MODE_P2 ((uint32_t)0x00000088UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_MODE_P3 ((uint32_t)0x0000008CUL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_MODE_P4 ((uint32_t)0x00000090UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_MODE_P5 ((uint32_t)0x00000094UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_MODE_P6 ((uint32_t)0x00000098UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_MODE_P7 ((uint32_t)0x0000009CUL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_VAL_P0 ((uint32_t)0x000000C0UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_VAL_P1 ((uint32_t)0x000000C4UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_VAL_P2 ((uint32_t)0x000000C8UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_VAL_P3 ((uint32_t)0x000000CCUL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_VAL_P4 ((uint32_t)0x000000D0UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_VAL_P5 ((uint32_t)0x000000D4UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_VAL_P6 ((uint32_t)0x000000D8UL)
|
||||
#define MXC_R_GPIO_OFFS_OUT_VAL_P7 ((uint32_t)0x000000DCUL)
|
||||
#define MXC_R_GPIO_OFFS_FUNC_SEL_P0 ((uint32_t)0x00000100UL)
|
||||
#define MXC_R_GPIO_OFFS_FUNC_SEL_P1 ((uint32_t)0x00000104UL)
|
||||
#define MXC_R_GPIO_OFFS_FUNC_SEL_P2 ((uint32_t)0x00000108UL)
|
||||
#define MXC_R_GPIO_OFFS_FUNC_SEL_P6 ((uint32_t)0x00000118UL)
|
||||
#define MXC_R_GPIO_OFFS_FUNC_SEL_P7 ((uint32_t)0x0000011CUL)
|
||||
#define MXC_R_GPIO_OFFS_IN_MODE_P0 ((uint32_t)0x00000140UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_MODE_P1 ((uint32_t)0x00000144UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_MODE_P2 ((uint32_t)0x00000148UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_MODE_P3 ((uint32_t)0x0000014CUL)
|
||||
#define MXC_R_GPIO_OFFS_IN_MODE_P4 ((uint32_t)0x00000150UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_MODE_P5 ((uint32_t)0x00000154UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_MODE_P6 ((uint32_t)0x00000158UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_MODE_P7 ((uint32_t)0x0000015CUL)
|
||||
#define MXC_R_GPIO_OFFS_IN_VAL_P0 ((uint32_t)0x00000180UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_VAL_P1 ((uint32_t)0x00000184UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_VAL_P2 ((uint32_t)0x00000188UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_VAL_P3 ((uint32_t)0x0000018CUL)
|
||||
#define MXC_R_GPIO_OFFS_IN_VAL_P4 ((uint32_t)0x00000190UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_VAL_P5 ((uint32_t)0x00000194UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_VAL_P6 ((uint32_t)0x00000198UL)
|
||||
#define MXC_R_GPIO_OFFS_IN_VAL_P7 ((uint32_t)0x0000019CUL)
|
||||
#define MXC_R_GPIO_OFFS_INT_MODE_P0 ((uint32_t)0x000001C0UL)
|
||||
#define MXC_R_GPIO_OFFS_INT_MODE_P1 ((uint32_t)0x000001C4UL)
|
||||
#define MXC_R_GPIO_OFFS_INT_MODE_P2 ((uint32_t)0x000001C8UL)
|
||||
#define MXC_R_GPIO_OFFS_INT_MODE_P3 ((uint32_t)0x000001CCUL)
|
||||
#define MXC_R_GPIO_OFFS_INT_MODE_P4 ((uint32_t)0x000001D0UL)
|
||||
#define MXC_R_GPIO_OFFS_INT_MODE_P5 ((uint32_t)0x000001D4UL)
|
||||
#define MXC_R_GPIO_OFFS_INT_MODE_P6 ((uint32_t)0x000001D8UL)
|
||||
#define MXC_R_GPIO_OFFS_INT_MODE_P7 ((uint32_t)0x000001DCUL)
|
||||
#define MXC_R_GPIO_OFFS_INTFL_P0 ((uint32_t)0x00000200UL)
|
||||
#define MXC_R_GPIO_OFFS_INTFL_P1 ((uint32_t)0x00000204UL)
|
||||
#define MXC_R_GPIO_OFFS_INTFL_P2 ((uint32_t)0x00000208UL)
|
||||
#define MXC_R_GPIO_OFFS_INTFL_P3 ((uint32_t)0x0000020CUL)
|
||||
#define MXC_R_GPIO_OFFS_INTFL_P4 ((uint32_t)0x00000210UL)
|
||||
#define MXC_R_GPIO_OFFS_INTFL_P5 ((uint32_t)0x00000214UL)
|
||||
#define MXC_R_GPIO_OFFS_INTFL_P6 ((uint32_t)0x00000218UL)
|
||||
#define MXC_R_GPIO_OFFS_INTFL_P7 ((uint32_t)0x0000021CUL)
|
||||
#define MXC_R_GPIO_OFFS_INTEN_P0 ((uint32_t)0x00000240UL)
|
||||
#define MXC_R_GPIO_OFFS_INTEN_P1 ((uint32_t)0x00000244UL)
|
||||
#define MXC_R_GPIO_OFFS_INTEN_P2 ((uint32_t)0x00000248UL)
|
||||
#define MXC_R_GPIO_OFFS_INTEN_P3 ((uint32_t)0x0000024CUL)
|
||||
#define MXC_R_GPIO_OFFS_INTEN_P4 ((uint32_t)0x00000250UL)
|
||||
#define MXC_R_GPIO_OFFS_INTEN_P5 ((uint32_t)0x00000254UL)
|
||||
#define MXC_R_GPIO_OFFS_INTEN_P6 ((uint32_t)0x00000258UL)
|
||||
#define MXC_R_GPIO_OFFS_INTEN_P7 ((uint32_t)0x0000025CUL)
|
||||
|
||||
|
||||
/*
|
||||
Field positions and masks for module GPIO.
|
||||
*/
|
||||
#define MXC_F_GPIO_FREE_PIN0_POS 0
|
||||
#define MXC_F_GPIO_FREE_PIN0 ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN0_POS))
|
||||
#define MXC_F_GPIO_FREE_PIN1_POS 1
|
||||
#define MXC_F_GPIO_FREE_PIN1 ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN1_POS))
|
||||
#define MXC_F_GPIO_FREE_PIN2_POS 2
|
||||
#define MXC_F_GPIO_FREE_PIN2 ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN2_POS))
|
||||
#define MXC_F_GPIO_FREE_PIN3_POS 3
|
||||
#define MXC_F_GPIO_FREE_PIN3 ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN3_POS))
|
||||
#define MXC_F_GPIO_FREE_PIN4_POS 4
|
||||
#define MXC_F_GPIO_FREE_PIN4 ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN4_POS))
|
||||
#define MXC_F_GPIO_FREE_PIN5_POS 5
|
||||
#define MXC_F_GPIO_FREE_PIN5 ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN5_POS))
|
||||
#define MXC_F_GPIO_FREE_PIN6_POS 6
|
||||
#define MXC_F_GPIO_FREE_PIN6 ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN6_POS))
|
||||
#define MXC_F_GPIO_FREE_PIN7_POS 7
|
||||
#define MXC_F_GPIO_FREE_PIN7 ((uint32_t)(0x00000001UL << MXC_F_GPIO_FREE_PIN7_POS))
|
||||
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN0_POS 0
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN0 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN1_POS 4
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN1 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN2_POS 8
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN2 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN3_POS 12
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN3 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN4_POS 16
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN4 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN5_POS 20
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN5 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN6_POS 24
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN6 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN7_POS 28
|
||||
#define MXC_F_GPIO_OUT_MODE_PIN7 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN0_POS 0
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN0 ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN0_POS))
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN1_POS 1
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN1 ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN1_POS))
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN2_POS 2
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN2 ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN2_POS))
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN3_POS 3
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN3 ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN3_POS))
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN4_POS 4
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN4 ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN4_POS))
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN5_POS 5
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN5 ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN5_POS))
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN6_POS 6
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN6 ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN6_POS))
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN7_POS 7
|
||||
#define MXC_F_GPIO_OUT_VAL_PIN7 ((uint32_t)(0x00000001UL << MXC_F_GPIO_OUT_VAL_PIN7_POS))
|
||||
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN0_POS 0
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN0 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN0_POS))
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN1_POS 4
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN1 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN1_POS))
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN2_POS 8
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN2 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN2_POS))
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN3_POS 12
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN3 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN3_POS))
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN4_POS 16
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN4 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN4_POS))
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN5_POS 20
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN5 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN5_POS))
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN6_POS 24
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN6 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN6_POS))
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN7_POS 28
|
||||
#define MXC_F_GPIO_FUNC_SEL_PIN7 ((uint32_t)(0x0000000FUL << MXC_F_GPIO_FUNC_SEL_PIN7_POS))
|
||||
|
||||
#define MXC_F_GPIO_IN_MODE_PIN0_POS 0
|
||||
#define MXC_F_GPIO_IN_MODE_PIN0 ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN0_POS))
|
||||
#define MXC_F_GPIO_IN_MODE_PIN1_POS 4
|
||||
#define MXC_F_GPIO_IN_MODE_PIN1 ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN1_POS))
|
||||
#define MXC_F_GPIO_IN_MODE_PIN2_POS 8
|
||||
#define MXC_F_GPIO_IN_MODE_PIN2 ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN2_POS))
|
||||
#define MXC_F_GPIO_IN_MODE_PIN3_POS 12
|
||||
#define MXC_F_GPIO_IN_MODE_PIN3 ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN3_POS))
|
||||
#define MXC_F_GPIO_IN_MODE_PIN4_POS 16
|
||||
#define MXC_F_GPIO_IN_MODE_PIN4 ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN4_POS))
|
||||
#define MXC_F_GPIO_IN_MODE_PIN5_POS 20
|
||||
#define MXC_F_GPIO_IN_MODE_PIN5 ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN5_POS))
|
||||
#define MXC_F_GPIO_IN_MODE_PIN6_POS 24
|
||||
#define MXC_F_GPIO_IN_MODE_PIN6 ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN6_POS))
|
||||
#define MXC_F_GPIO_IN_MODE_PIN7_POS 28
|
||||
#define MXC_F_GPIO_IN_MODE_PIN7 ((uint32_t)(0x00000003UL << MXC_F_GPIO_IN_MODE_PIN7_POS))
|
||||
|
||||
#define MXC_F_GPIO_IN_VAL_PIN0_POS 0
|
||||
#define MXC_F_GPIO_IN_VAL_PIN0 ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN0_POS))
|
||||
#define MXC_F_GPIO_IN_VAL_PIN1_POS 1
|
||||
#define MXC_F_GPIO_IN_VAL_PIN1 ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN1_POS))
|
||||
#define MXC_F_GPIO_IN_VAL_PIN2_POS 2
|
||||
#define MXC_F_GPIO_IN_VAL_PIN2 ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN2_POS))
|
||||
#define MXC_F_GPIO_IN_VAL_PIN3_POS 3
|
||||
#define MXC_F_GPIO_IN_VAL_PIN3 ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN3_POS))
|
||||
#define MXC_F_GPIO_IN_VAL_PIN4_POS 4
|
||||
#define MXC_F_GPIO_IN_VAL_PIN4 ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN4_POS))
|
||||
#define MXC_F_GPIO_IN_VAL_PIN5_POS 5
|
||||
#define MXC_F_GPIO_IN_VAL_PIN5 ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN5_POS))
|
||||
#define MXC_F_GPIO_IN_VAL_PIN6_POS 6
|
||||
#define MXC_F_GPIO_IN_VAL_PIN6 ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN6_POS))
|
||||
#define MXC_F_GPIO_IN_VAL_PIN7_POS 7
|
||||
#define MXC_F_GPIO_IN_VAL_PIN7 ((uint32_t)(0x00000001UL << MXC_F_GPIO_IN_VAL_PIN7_POS))
|
||||
|
||||
#define MXC_F_GPIO_INT_MODE_PIN0_POS 0
|
||||
#define MXC_F_GPIO_INT_MODE_PIN0 ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN0_POS))
|
||||
#define MXC_F_GPIO_INT_MODE_PIN1_POS 4
|
||||
#define MXC_F_GPIO_INT_MODE_PIN1 ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN1_POS))
|
||||
#define MXC_F_GPIO_INT_MODE_PIN2_POS 8
|
||||
#define MXC_F_GPIO_INT_MODE_PIN2 ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN2_POS))
|
||||
#define MXC_F_GPIO_INT_MODE_PIN3_POS 12
|
||||
#define MXC_F_GPIO_INT_MODE_PIN3 ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN3_POS))
|
||||
#define MXC_F_GPIO_INT_MODE_PIN4_POS 16
|
||||
#define MXC_F_GPIO_INT_MODE_PIN4 ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN4_POS))
|
||||
#define MXC_F_GPIO_INT_MODE_PIN5_POS 20
|
||||
#define MXC_F_GPIO_INT_MODE_PIN5 ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN5_POS))
|
||||
#define MXC_F_GPIO_INT_MODE_PIN6_POS 24
|
||||
#define MXC_F_GPIO_INT_MODE_PIN6 ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN6_POS))
|
||||
#define MXC_F_GPIO_INT_MODE_PIN7_POS 28
|
||||
#define MXC_F_GPIO_INT_MODE_PIN7 ((uint32_t)(0x00000007UL << MXC_F_GPIO_INT_MODE_PIN7_POS))
|
||||
|
||||
#define MXC_F_GPIO_INTFL_PIN0_POS 0
|
||||
#define MXC_F_GPIO_INTFL_PIN0 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN0_POS))
|
||||
#define MXC_F_GPIO_INTFL_PIN1_POS 1
|
||||
#define MXC_F_GPIO_INTFL_PIN1 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN1_POS))
|
||||
#define MXC_F_GPIO_INTFL_PIN2_POS 2
|
||||
#define MXC_F_GPIO_INTFL_PIN2 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN2_POS))
|
||||
#define MXC_F_GPIO_INTFL_PIN3_POS 3
|
||||
#define MXC_F_GPIO_INTFL_PIN3 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN3_POS))
|
||||
#define MXC_F_GPIO_INTFL_PIN4_POS 4
|
||||
#define MXC_F_GPIO_INTFL_PIN4 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN4_POS))
|
||||
#define MXC_F_GPIO_INTFL_PIN5_POS 5
|
||||
#define MXC_F_GPIO_INTFL_PIN5 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN5_POS))
|
||||
#define MXC_F_GPIO_INTFL_PIN6_POS 6
|
||||
#define MXC_F_GPIO_INTFL_PIN6 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN6_POS))
|
||||
#define MXC_F_GPIO_INTFL_PIN7_POS 7
|
||||
#define MXC_F_GPIO_INTFL_PIN7 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTFL_PIN7_POS))
|
||||
|
||||
#define MXC_F_GPIO_INTEN_PIN0_POS 0
|
||||
#define MXC_F_GPIO_INTEN_PIN0 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN0_POS))
|
||||
#define MXC_F_GPIO_INTEN_PIN1_POS 1
|
||||
#define MXC_F_GPIO_INTEN_PIN1 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN1_POS))
|
||||
#define MXC_F_GPIO_INTEN_PIN2_POS 2
|
||||
#define MXC_F_GPIO_INTEN_PIN2 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN2_POS))
|
||||
#define MXC_F_GPIO_INTEN_PIN3_POS 3
|
||||
#define MXC_F_GPIO_INTEN_PIN3 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN3_POS))
|
||||
#define MXC_F_GPIO_INTEN_PIN4_POS 4
|
||||
#define MXC_F_GPIO_INTEN_PIN4 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN4_POS))
|
||||
#define MXC_F_GPIO_INTEN_PIN5_POS 5
|
||||
#define MXC_F_GPIO_INTEN_PIN5 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN5_POS))
|
||||
#define MXC_F_GPIO_INTEN_PIN6_POS 6
|
||||
#define MXC_F_GPIO_INTEN_PIN6 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN6_POS))
|
||||
#define MXC_F_GPIO_INTEN_PIN7_POS 7
|
||||
#define MXC_F_GPIO_INTEN_PIN7 ((uint32_t)(0x00000001UL << MXC_F_GPIO_INTEN_PIN7_POS))
|
||||
|
||||
|
||||
/*
|
||||
Field values and shifted values for module GPIO.
|
||||
*/
|
||||
#define MXC_V_GPIO_FREE_PIN0_NOT_AVAILABLE ((uint32_t)(0x0x00000000UL))
|
||||
#define MXC_V_GPIO_FREE_PIN0_AVAILABLE ((uint32_t)(0x0x00000001UL))
|
||||
|
||||
#define MXC_S_GPIO_FREE_PIN0_NOT_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN0_NOT_AVAILABLE << MXC_F_GPIO_FREE_PIN0_POS))
|
||||
#define MXC_S_GPIO_FREE_PIN0_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN0_AVAILABLE << MXC_F_GPIO_FREE_PIN0_POS))
|
||||
|
||||
#define MXC_V_GPIO_FREE_PIN1_NOT_AVAILABLE ((uint32_t)(0x0x00000000UL))
|
||||
#define MXC_V_GPIO_FREE_PIN1_AVAILABLE ((uint32_t)(0x0x00000001UL))
|
||||
|
||||
#define MXC_S_GPIO_FREE_PIN1_NOT_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN1_NOT_AVAILABLE << MXC_F_GPIO_FREE_PIN1_POS))
|
||||
#define MXC_S_GPIO_FREE_PIN1_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN1_AVAILABLE << MXC_F_GPIO_FREE_PIN1_POS))
|
||||
|
||||
#define MXC_V_GPIO_FREE_PIN2_NOT_AVAILABLE ((uint32_t)(0x0x00000000UL))
|
||||
#define MXC_V_GPIO_FREE_PIN2_AVAILABLE ((uint32_t)(0x0x00000001UL))
|
||||
|
||||
#define MXC_S_GPIO_FREE_PIN2_NOT_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN2_NOT_AVAILABLE << MXC_F_GPIO_FREE_PIN2_POS))
|
||||
#define MXC_S_GPIO_FREE_PIN2_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN2_AVAILABLE << MXC_F_GPIO_FREE_PIN2_POS))
|
||||
|
||||
#define MXC_V_GPIO_FREE_PIN3_NOT_AVAILABLE ((uint32_t)(0x0x00000000UL))
|
||||
#define MXC_V_GPIO_FREE_PIN3_AVAILABLE ((uint32_t)(0x0x00000001UL))
|
||||
|
||||
#define MXC_S_GPIO_FREE_PIN3_NOT_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN3_NOT_AVAILABLE << MXC_F_GPIO_FREE_PIN3_POS))
|
||||
#define MXC_S_GPIO_FREE_PIN3_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN3_AVAILABLE << MXC_F_GPIO_FREE_PIN3_POS))
|
||||
|
||||
#define MXC_V_GPIO_FREE_PIN4_NOT_AVAILABLE ((uint32_t)(0x0x00000000UL))
|
||||
#define MXC_V_GPIO_FREE_PIN4_AVAILABLE ((uint32_t)(0x0x00000001UL))
|
||||
|
||||
#define MXC_S_GPIO_FREE_PIN4_NOT_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN4_NOT_AVAILABLE << MXC_F_GPIO_FREE_PIN4_POS))
|
||||
#define MXC_S_GPIO_FREE_PIN4_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN4_AVAILABLE << MXC_F_GPIO_FREE_PIN4_POS))
|
||||
|
||||
#define MXC_V_GPIO_FREE_PIN5_NOT_AVAILABLE ((uint32_t)(0x0x00000000UL))
|
||||
#define MXC_V_GPIO_FREE_PIN5_AVAILABLE ((uint32_t)(0x0x00000001UL))
|
||||
|
||||
#define MXC_S_GPIO_FREE_PIN5_NOT_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN5_NOT_AVAILABLE << MXC_F_GPIO_FREE_PIN5_POS))
|
||||
#define MXC_S_GPIO_FREE_PIN5_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN5_AVAILABLE << MXC_F_GPIO_FREE_PIN5_POS))
|
||||
|
||||
#define MXC_V_GPIO_FREE_PIN6_NOT_AVAILABLE ((uint32_t)(0x0x00000000UL))
|
||||
#define MXC_V_GPIO_FREE_PIN6_AVAILABLE ((uint32_t)(0x0x00000001UL))
|
||||
|
||||
#define MXC_S_GPIO_FREE_PIN6_NOT_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN6_NOT_AVAILABLE << MXC_F_GPIO_FREE_PIN6_POS))
|
||||
#define MXC_S_GPIO_FREE_PIN6_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN6_AVAILABLE << MXC_F_GPIO_FREE_PIN6_POS))
|
||||
|
||||
#define MXC_V_GPIO_FREE_PIN7_NOT_AVAILABLE ((uint32_t)(0x0x00000000UL))
|
||||
#define MXC_V_GPIO_FREE_PIN7_AVAILABLE ((uint32_t)(0x0x00000001UL))
|
||||
|
||||
#define MXC_S_GPIO_FREE_PIN7_NOT_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN7_NOT_AVAILABLE << MXC_F_GPIO_FREE_PIN7_POS))
|
||||
#define MXC_S_GPIO_FREE_PIN7_AVAILABLE ((uint32_t)(MXC_V_GPIO_FREE_PIN7_AVAILABLE << MXC_F_GPIO_FREE_PIN7_POS))
|
||||
|
||||
#define MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP ((uint32_t)(0x00000000UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_OPEN_DRAIN ((uint32_t)(0x00000001UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(0x00000002UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_HIGH_Z ((uint32_t)(0x00000003UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z ((uint32_t)(0x00000004UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE ((uint32_t)(0x00000005UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z ((uint32_t)(0x00000006UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_SLOW_DRIVE ((uint32_t)(0x00000007UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z ((uint32_t)(0x00000008UL))
|
||||
#define MXC_V_GPIO_OUT_MODE_FAST_DRIVE ((uint32_t)(0x00000009UL))
|
||||
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_HIGH_Z_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_OPEN_DRAIN ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_NORMAL_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_NORMAL_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_SLOW_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_SLOW_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN0_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN0_POS))
|
||||
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_HIGH_Z_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_OPEN_DRAIN ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_NORMAL_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_NORMAL_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_SLOW_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_SLOW_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN1_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN1_POS))
|
||||
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_HIGH_Z_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_OPEN_DRAIN ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_NORMAL_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_NORMAL_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_SLOW_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_SLOW_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN2_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN2_POS))
|
||||
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_HIGH_Z_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_OPEN_DRAIN ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_NORMAL_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_NORMAL_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_SLOW_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_SLOW_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN3_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN3_POS))
|
||||
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_HIGH_Z_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_OPEN_DRAIN ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_NORMAL_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_NORMAL_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_SLOW_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_SLOW_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN4_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN4_POS))
|
||||
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_HIGH_Z_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_OPEN_DRAIN ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_NORMAL_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_NORMAL_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_SLOW_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_SLOW_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN5_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN5_POS))
|
||||
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_HIGH_Z_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_OPEN_DRAIN ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_NORMAL_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_NORMAL_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_SLOW_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_SLOW_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN6_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN6_POS))
|
||||
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_HIGH_Z_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_OPEN_DRAIN ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_OPEN_DRAIN_WEAK_PULLUP ((uint32_t)(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_NORMAL_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_NORMAL_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_SLOW_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_SLOW_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_SLOW_DRIVE << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_FAST_HIGH_Z ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_HIGH_Z << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
#define MXC_S_GPIO_OUT_MODE_PIN7_FAST_DRIVE ((uint32_t)(MXC_V_GPIO_OUT_MODE_FAST_DRIVE << MXC_F_GPIO_OUT_MODE_PIN7_POS))
|
||||
|
||||
#define MXC_V_GPIO_INT_MODE_DISABLED ((uint32_t)(0x00000000UL))
|
||||
#define MXC_V_GPIO_INT_MODE_FALLING_EDGE ((uint32_t)(0x00000001UL))
|
||||
#define MXC_V_GPIO_INT_MODE_RISING_EDGE ((uint32_t)(0x00000002UL))
|
||||
#define MXC_V_GPIO_INT_MODE_BOTH_EDGES ((uint32_t)(0x00000003UL))
|
||||
#define MXC_V_GPIO_INT_MODE_LOW_LEVEL ((uint32_t)(0x00000004UL))
|
||||
#define MXC_V_GPIO_INT_MODE_HIGH_LEVEL ((uint32_t)(0x00000005UL))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* _MXC_GPIO_REGS_H_ */
|
||||
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Reference in New Issue