From d7207921917fc127699e469368bca1c0f32f540c Mon Sep 17 00:00:00 2001 From: Tauno Magnusson Date: Fri, 27 Nov 2020 23:28:04 +0100 Subject: [PATCH] G431 only has 1 Flash Bank. Code is written with the assumption all G4 devices has 2 Flash Banks. Fix: Commented out SYSCFG_MEMRMP_FB_MODE since stm32g431KB only has 1 Flash Bank. flash_api.c checks for this #define and if it's set understands it as if the chip has 2 flash banks. STM32G4xx_HAL_Driver/stm32g4xx_hal.c also needs to check for this #define since it has flash bank swapping commands that are called in the startup sequence. Fix: Check for SYSCFG_MEMRMP_FB_MODE in Enable/Disable Flash bank swapping. --- .../TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h | 7 ++++--- .../STM32Cube_FW/STM32G4xx_HAL_Driver/stm32g4xx_hal.c | 4 ++++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h b/targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h index 100406bf34..3d5bb7fa9c 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h +++ b/targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/CMSIS/stm32g431xx.h @@ -9604,9 +9604,10 @@ typedef struct #define SYSCFG_MEMRMP_MEM_MODE_1 (0x2UL << SYSCFG_MEMRMP_MEM_MODE_Pos) /*!< 0x00000002 */ #define SYSCFG_MEMRMP_MEM_MODE_2 (0x4UL << SYSCFG_MEMRMP_MEM_MODE_Pos) /*!< 0x00000004 */ -#define SYSCFG_MEMRMP_FB_MODE_Pos (8U) -#define SYSCFG_MEMRMP_FB_MODE_Msk (0x1UL << SYSCFG_MEMRMP_FB_MODE_Pos) /*!< 0x00000100 */ -#define SYSCFG_MEMRMP_FB_MODE SYSCFG_MEMRMP_FB_MODE_Msk /*!< User Flash Bank mode selection */ +// Commented out because G431KB only has one Flash Bank +// #define SYSCFG_MEMRMP_FB_MODE_Pos (8U) +// #define SYSCFG_MEMRMP_FB_MODE_Msk (0x1UL << SYSCFG_MEMRMP_FB_MODE_Pos) /*!< 0x00000100 */ +// #define SYSCFG_MEMRMP_FB_MODE SYSCFG_MEMRMP_FB_MODE_Msk /*!< User Flash Bank mode selection */ /****************** Bit definition for SYSCFG_CFGR1 register ******************/ #define SYSCFG_CFGR1_BOOSTEN_Pos (8U) diff --git a/targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/STM32G4xx_HAL_Driver/stm32g4xx_hal.c b/targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/STM32G4xx_HAL_Driver/stm32g4xx_hal.c index 304cef8955..5ff8db011a 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/STM32G4xx_HAL_Driver/stm32g4xx_hal.c +++ b/targets/TARGET_STM/TARGET_STM32G4/STM32Cube_FW/STM32G4xx_HAL_Driver/stm32g4xx_hal.c @@ -595,7 +595,9 @@ void HAL_SYSCFG_CCMSRAMErase(void) */ void HAL_SYSCFG_EnableMemorySwappingBank(void) { + #if defined(SYSCFG_MEMRMP_FB_MODE) SET_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE); + #endif } /** @@ -610,7 +612,9 @@ void HAL_SYSCFG_EnableMemorySwappingBank(void) */ void HAL_SYSCFG_DisableMemorySwappingBank(void) { + #if defined(SYSCFG_MEMRMP_FB_MODE) CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE); + #endif } #if defined(VREFBUF)