From d5122c5ea5594318f952d9106d21161e58a4b94c Mon Sep 17 00:00:00 2001 From: Dave Wu Date: Thu, 9 Nov 2017 14:17:15 +1100 Subject: [PATCH] - Removed .mbedignore due to an issue with the eclipse exporter not picking up the ignored files; - Added #includes in BSP data C files so they can be built on their own without mbedignore; --- .../TARGET_ADUCM4050/.mbedignore | 28 ------------------- .../TARGET_ADUCM4050/bsp/adc/adi_adc_data.c | 1 + .../bsp/flash/adi_flash_data.c | 2 +- .../TARGET_ADUCM4050/bsp/i2c/adi_i2c_data.c | 2 +- .../TARGET_ADUCM4050/bsp/rtc/adi_rtc_data.c | 14 ++++++---- .../TARGET_ADUCM4050/bsp/rtc/adi_rtc_def.h | 26 +++++++++-------- .../TARGET_ADUCM4050/bsp/spi/adi_spi_data.c | 9 +++--- .../TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c | 23 ++++++++------- 8 files changed, 41 insertions(+), 64 deletions(-) delete mode 100755 targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/.mbedignore diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/.mbedignore b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/.mbedignore deleted file mode 100755 index 443e114c20..0000000000 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/.mbedignore +++ /dev/null @@ -1,28 +0,0 @@ -bsp/adc/adi_adc_data.c -bsp/adc/adi_adc_data_v1.c -bsp/adc/adi_adc_v1.c -bsp/beep/adi_beep_v1.c -bsp/crc/adi_crc_data.c -bsp/crc/adi_crc_v1.c -bsp/crypto/adi_crypto_v1.c -bsp/dma/adi_dma_pl230_v2.c -bsp/flash/adi_flash_data.c -bsp/flash/adi_flash_v1.c -bsp/gpio/adi_gpio_v1.c -bsp/i2c/adi_i2c_data.c -bsp/i2c/adi_i2c_v1.c -bsp/pwr/adi_pwr_v1.c -bsp/rtc/adi_rtc_data.c -bsp/rtc/adi_rtc_data_v1.c -bsp/rtc/adi_rtc_v1.c -bsp/sport/adi_sport_data_v1.c -bsp/sport/adi_sport_v1.c -bsp/uart/adi_uart_data_v1.c -bsp/uart/adi_uart_v1.c -bsp/spi/adi_spi_data.c -bsp/spi/adi_spi_data_v1.c -bsp/spi/adi_spi_v1.c -bsp/tmr/adi_tmr_data.c -bsp/tmr/adi_tmr_data_v1.c -bsp/tmr/adi_tmr_v1.c -bsp/wdt/adi_wdt_v1.c diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adc/adi_adc_data.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adc/adi_adc_data.c index 9ebc296297..169378ea0f 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adc/adi_adc_data.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/adc/adi_adc_data.c @@ -3,6 +3,7 @@ #include #include +#include #include "adi_adc_def.h" /*! \cond PRIVATE */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/flash/adi_flash_data.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/flash/adi_flash_data.c index 88fe50cf05..d5b6027573 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/flash/adi_flash_data.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/flash/adi_flash_data.c @@ -50,10 +50,10 @@ POSSIBILITY OF SUCH DAMAGE. /*! \cond PRIVATE */ +#include #include "adi_flash_def.h" #include "adi_flash_config.h" - /* Stores the information about the specific device */ static ADI_FEE_DEVICE_INFO fee_device_info [ADI_FEE_NUM_INSTANCES] = { diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/i2c/adi_i2c_data.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/i2c/adi_i2c_data.c index c48264eb24..6d7a63801c 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/i2c/adi_i2c_data.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/i2c/adi_i2c_data.c @@ -49,10 +49,10 @@ POSSIBILITY OF SUCH DAMAGE. /*! \cond PRIVATE */ +#include #include "adi_i2c_def.h" #include "adi_i2c_config.h" - /* Stores the information about the specific device */ static ADI_I2C_DEVICE_INFO i2c_device_info [ADI_I2C_NUM_INSTANCES] = { diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rtc/adi_rtc_data.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rtc/adi_rtc_data.c index 1cd5f0c773..624b8d3030 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rtc/adi_rtc_data.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rtc/adi_rtc_data.c @@ -50,8 +50,10 @@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define ADI_RTC_DATA_C_ #include +#include #include "adi_rtc_def.h" + static ADI_RTC_DEVICE_INFO aRTCDeviceInfo[ADI_RTC_NUM_INSTANCE] = { { @@ -100,7 +102,7 @@ static ADI_RTC_CONFIG aRTCConfig[ADI_RTC_NUM_INSTANCE] = 0, /* CR7SSS */ 0, /* GPMUX0 */ 0 /* GPMUX1 */ - + }, /* RTC-1 */ { @@ -137,7 +139,7 @@ static ADI_RTC_CONFIG aRTCConfig[ADI_RTC_NUM_INSTANCE] = RTC1_CFG_TRIM_INTERVAL << BITP_RTC_TRM_IVL | RTC1_CFG_TRIM_OPERATION << BITP_RTC_TRM_ADD | RTC1_CFG_TRIM_VALUE << BITP_RTC_TRM_VALUE, - + /* CR2IC */ RTC1_CFG_IC0_ENABLE << BITP_RTC_CR2IC_IC0EN | RTC1_CFG_IC2_ENABLE << BITP_RTC_CR2IC_IC2EN | @@ -152,7 +154,7 @@ static ADI_RTC_CONFIG aRTCConfig[ADI_RTC_NUM_INSTANCE] = RTC1_CFG_IC3_EDGE_POLARITY << BITP_RTC_CR2IC_IC3LH | RTC1_CFG_IC4_EDGE_POLARITY << BITP_RTC_CR2IC_IC4LH | RTC1_CFG_IC_OVER_WRITE_ENABLE << BITP_RTC_CR2IC_ICOWUSEN, - + /* CR3SS */ RTC1_CFG_SS1_ENABLE << BITP_RTC_CR3SS_SS1EN | RTC1_CFG_SS2_ENABLE << BITP_RTC_CR3SS_SS2EN | @@ -172,16 +174,16 @@ static ADI_RTC_CONFIG aRTCConfig[ADI_RTC_NUM_INSTANCE] = /* SSMSK */ RTC1_CFG_SS1_MASK_VALUE, - + /* SS1 */ RTC1_CFG_SS1_AUTO_RELOAD_VALUE, - + 0, /* CR5SSS */ /* TODO: Add the following to the static configuration macros */ 0, /* CR6SSS */ 0, /* CR7SSS */ 0x4688, /* GPMUX0 */ 0x01F5, /* GPMUX1 */ - + } }; diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rtc/adi_rtc_def.h b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rtc/adi_rtc_def.h index 4b5afa44ef..a6fca0e37b 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rtc/adi_rtc_def.h +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/rtc/adi_rtc_def.h @@ -1,7 +1,7 @@ /*! ***************************************************************************** * @file: adi_rtc_def.h - * @brief: RTC def file + * @brief: RTC def file * @version: $Revision: 33205 $ * @date: $Date: 2016-01-11 05:46:07 -0500 (Mon, 11 Jan 2016) $ *----------------------------------------------------------------------------- @@ -46,10 +46,12 @@ *****************************************************************************/ #ifndef ADI_RTC_DEF_H__ -#define ADI_RTC_DEF_H__ +#define ADI_RTC_DEF_H__ + +#include /*! \cond PRIVATE */ -#define ADI_RTC_NUM_INSTANCE 2u +#define ADI_RTC_NUM_INSTANCE 2u @@ -100,23 +102,23 @@ #else /* pause on pending writes to CR to avoid data loss */ #define PEND_BEFORE_WRITE(reg,mask) -#define SYNC_AFTER_WRITE(reg,mask) +#define SYNC_AFTER_WRITE(reg,mask) #endif -/* +/* * The following is used for static configuration */ typedef struct { - uint16_t CR0; /*!< CR0 16 bit control register-0 value */ + uint16_t CR0; /*!< CR0 16 bit control register-0 value */ uint16_t CR1; /*!< CR1 16 bit control register-1 value */ uint16_t CNT0; /*!< CNT0 16 bit count register value */ uint16_t CNT1; /*!< CNT1 16 bit count register value */ - + uint16_t ALM0; /*!< ALM0 16 bit integer part of alarm value */ uint16_t ALM1; /*!< ALM1 16 bit integer part of alarm value */ uint16_t ALM2; /*!< ALM2 16 bit integer part of alarm value */ - uint16_t TRIM; /*!< 16 bit trim register value */ + uint16_t TRIM; /*!< 16 bit trim register value */ uint16_t CR2IC; /*!< CR2IC 16 bit control (which controls the input capture ) register-2 value */ uint16_t CR3SS; /*!< CR3SS 16 bit control ( Controls enabling sensor strobe /IRQ etc )register-3 value */ uint16_t CR4SS; /*!< CR4SS 16 bit control ( controls Auto reload and mask for sensor strobe ) register-4 value */ @@ -134,7 +136,7 @@ typedef struct typedef struct _ADI_RTC_DEVICE_INFO { volatile ADI_RTC_TypeDef *pRTCRegs; /* Base address of the SPORT registers */ - const IRQn_Type eIRQn; /* IRQn */ + const IRQn_Type eIRQn; /* IRQn */ ADI_RTC_HANDLE hDevice; /* RTC handle */ }ADI_RTC_DEVICE_INFO; @@ -146,10 +148,10 @@ typedef struct _ADI_RTC_DEVICE ADI_CALLBACK pfCallback; /* Function pointer for callback function. */ void *pCBParam; /* Parameter to callback function. */ - IRQn_Type eIRQn; /* IRQn */ + IRQn_Type eIRQn; /* IRQn */ uint32_t cbWatch; ADI_RTC_DEVICE_INFO *pDeviceInfo; /* Parameter to callback function. */ - + } ADI_RTC_DEVICE; @@ -158,6 +160,6 @@ static void rtc_init(ADI_RTC_DEVICE *pDevice,ADI_RTC_CONFIG *pConfig); #ifdef ADI_DEBUG static ADI_RTC_RESULT ValidateHandle( ADI_RTC_DEVICE *pInDevice); #endif -/*! \endcond */ +/*! \endcond */ #endif /* ADI_RTC_DEF_H__ */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/spi/adi_spi_data.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/spi/adi_spi_data.c index 9d8f001a37..ecbcb00b62 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/spi/adi_spi_data.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/spi/adi_spi_data.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * @file: adi_spi_data.c - * @brief: Data declaration for SPORT Device Driver + * @brief: Data declaration for SPORT Device Driver ***************************************************************************** Copyright (c) 2016 Analog Devices, Inc. @@ -49,6 +49,7 @@ POSSIBILITY OF SUCH DAMAGE. /*! \cond PRIVATE */ +#include #include "adi_spi_def.h" #include "adi_spi_config.h" #include @@ -109,7 +110,7 @@ static const ADI_SPI_CFG_TYPE gSPICfg[ADI_SPI_NUM_INSTANCES] = /**** SPI_DIV buad rate selection register *** */ (((((ADI_CFG_SYSTEM_CLOCK_HZ / (ADI_SPI0_CFG_BIT_RATE)) >>1u)-1u))\ - << BITP_SPI_DIV_VALUE ) + << BITP_SPI_DIV_VALUE ) }, /* Initialize SPI1 Instance configuration. */ { @@ -131,7 +132,7 @@ static const ADI_SPI_CFG_TYPE gSPICfg[ADI_SPI_NUM_INSTANCES] = /**** SPI_DIV buad rate selection register *** */ (((((ADI_CFG_SYSTEM_CLOCK_HZ / (ADI_SPI1_CFG_BIT_RATE)) >>1u)-1u))\ - << BITP_SPI_DIV_VALUE ) + << BITP_SPI_DIV_VALUE ) }, /* Initialize SPI2 Instance configuration. */ { @@ -153,7 +154,7 @@ static const ADI_SPI_CFG_TYPE gSPICfg[ADI_SPI_NUM_INSTANCES] = /**** SPI_DIV buad rate selection register *** */ (((((ADI_CFG_SYSTEM_CLOCK_HZ / (ADI_SPI2_CFG_BIT_RATE)) >>1u)-1u))\ - << BITP_SPI_DIV_VALUE ) + << BITP_SPI_DIV_VALUE ) } }; diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c index 7cf4a8295e..31b2dbe8fc 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr_data.c @@ -46,18 +46,17 @@ POSSIBILITY OF SUCH DAMAGE. #ifndef ADI_TMR_DATA #define ADI_TMR_DATA - +#include #include #include #include - /* CTL register static configuration */ -static uint16_t aTimerCtlConfig[] = +static uint16_t aTimerCtlConfig[] = { (TMR0_CFG_COUNT_UP << BITP_TMR_RGB_CTL_UP) | (TMR0_CFG_MODE << BITP_TMR_RGB_CTL_MODE) | - (TMR0_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | + (TMR0_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | (TMR0_CFG_CLOCK_SOURCE << BITP_TMR_RGB_CTL_CLK) | (TMR0_CFG_ENABLE_RELOADING << BITP_TMR_RGB_CTL_RLD) | (TMR0_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) | @@ -66,7 +65,7 @@ static uint16_t aTimerCtlConfig[] = (TMR1_CFG_COUNT_UP << BITP_TMR_RGB_CTL_UP) | (TMR1_CFG_MODE << BITP_TMR_RGB_CTL_MODE) | - (TMR1_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | + (TMR1_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | (TMR1_CFG_CLOCK_SOURCE << BITP_TMR_RGB_CTL_CLK) | (TMR1_CFG_ENABLE_RELOADING << BITP_TMR_RGB_CTL_RLD) | (TMR1_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) | @@ -75,7 +74,7 @@ static uint16_t aTimerCtlConfig[] = (TMR2_CFG_COUNT_UP << BITP_TMR_RGB_CTL_UP) | (TMR2_CFG_MODE << BITP_TMR_RGB_CTL_MODE) | - (TMR2_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | + (TMR2_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | (TMR2_CFG_CLOCK_SOURCE << BITP_TMR_RGB_CTL_CLK) | (TMR2_CFG_ENABLE_RELOADING << BITP_TMR_RGB_CTL_RLD) | (TMR2_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) | @@ -84,16 +83,16 @@ static uint16_t aTimerCtlConfig[] = (TMR3_CFG_COUNT_UP << BITP_TMR_RGB_CTL_UP) | (TMR3_CFG_MODE << BITP_TMR_RGB_CTL_MODE) | - (TMR3_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | + (TMR3_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) | (TMR3_CFG_CLOCK_SOURCE << BITP_TMR_RGB_CTL_CLK) | (TMR3_CFG_ENABLE_RELOADING << BITP_TMR_RGB_CTL_RLD) | (TMR3_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) | (TMR3_CFG_ENABLE_PRESCALE_RESET << BITP_TMR_RGB_CTL_RSTEN) | - (TMR3_CFG_ENABLE_EVENT_CAPTURE << BITP_TMR_RGB_CTL_EVTEN), + (TMR3_CFG_ENABLE_EVENT_CAPTURE << BITP_TMR_RGB_CTL_EVTEN), }; /* LOAD register static configuration */ -static uint16_t aTimerLoadConfig[] = +static uint16_t aTimerLoadConfig[] = { TMR0_CFG_LOAD_VALUE, TMR1_CFG_LOAD_VALUE, @@ -102,7 +101,7 @@ static uint16_t aTimerLoadConfig[] = }; /* Asynchronous LOAD static configuraton */ -static uint16_t aTimerALoadConfig[] = +static uint16_t aTimerALoadConfig[] = { TMR0_CFG_ASYNC_LOAD_VALUE, TMR1_CFG_ASYNC_LOAD_VALUE, @@ -135,10 +134,10 @@ static uint16_t aTimerPwmCtlConfig[] = (TMR3_CFG_PWM0_MATCH_VALUE << BITP_TMR_RGB_PWM0CTL_MATCH), (TMR3_CFG_PWM1_IDLE_STATE << BITP_TMR_RGB_PWM1CTL_IDLESTATE) | - (TMR3_CFG_PWM1_MATCH_VALUE << BITP_TMR_RGB_PWM1CTL_MATCH), + (TMR3_CFG_PWM1_MATCH_VALUE << BITP_TMR_RGB_PWM1CTL_MATCH), (TMR3_CFG_PWM2_IDLE_STATE << BITP_TMR_RGB_PWM2CTL_IDLESTATE) | - (TMR3_CFG_PWM2_MATCH_VALUE << BITP_TMR_RGB_PWM2CTL_MATCH), + (TMR3_CFG_PWM2_MATCH_VALUE << BITP_TMR_RGB_PWM2CTL_MATCH), }; /* PWM MATCH static configuration */