mirror of https://github.com/ARMmbed/mbed-os.git
QSPI: remove spaces on empty lines
Martin Kojtal
parent
9bff61b939
commit
d4ed1ca05d
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@ -22,7 +22,7 @@
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namespace mbed {
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QSPI* QSPI::_owner = NULL;
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SingletonPtr<PlatformMutex> QSPI::_mutex;
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SingletonPtr<PlatformMutex> QSPI::_mutex;
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QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel) : _qspi()
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{
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@ -42,42 +42,40 @@ QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, Pin
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_mode = 0;
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_hz = ONE_MHZ;
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_initialized = false;
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//Go ahead init the device here with the default config
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_initialize();
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}
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qspi_status_t QSPI::configure_format(qspi_bus_width_t inst_width, qspi_bus_width_t address_width, qspi_address_size_t address_size, qspi_bus_width_t alt_width, qspi_alt_size_t alt_size, qspi_bus_width_t data_width, int dummy_cycles, int mode )
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{
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qspi_status_t ret_status = QSPI_STATUS_OK;
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{ qspi_status_t ret_status = QSPI_STATUS_OK;
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if(mode != 0 && mode != 1)
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return QSPI_STATUS_INVALID_PARAMETER;
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return QSPI_STATUS_INVALID_PARAMETER;
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lock();
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_inst_width = inst_width;
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_address_width = address_width;
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_address_size = address_size;
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_alt_width = alt_width;
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_alt_size = alt_size;
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_data_width = data_width;
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_data_width = data_width;
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_num_dummy_cycles = dummy_cycles;
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_mode = mode;
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//Re-init the device, as the mode might have changed
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if( !_initialize() ) {
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ret_status = QSPI_STATUS_ERROR;
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}
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unlock();
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return ret_status;
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}
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qspi_status_t QSPI::set_frequency(int hz)
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{
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qspi_status_t ret_status = QSPI_STATUS_OK;
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qspi_status_t ret_status = QSPI_STATUS_OK;
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if(_initialized) {
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lock();
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_hz = hz;
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@ -92,16 +90,16 @@ qspi_status_t QSPI::set_frequency(int hz)
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}
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unlock();
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} else {
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ret_status = QSPI_STATUS_ERROR;
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ret_status = QSPI_STATUS_ERROR;
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}
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return ret_status;
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}
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qspi_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_length)
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{
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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if(_initialized) {
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if( (rx_length != NULL) && (rx_buffer != NULL) ) {
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if(*rx_length != 0) {
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@ -109,22 +107,22 @@ qspi_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_lengt
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if( true == _acquire()) {
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_build_qspi_command(-1, address, -1);
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if(QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
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ret_status = QSPI_STATUS_OK;
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ret_status = QSPI_STATUS_OK;
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}
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}
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unlock();
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}
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} else {
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ret_status = QSPI_STATUS_INVALID_PARAMETER;
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ret_status = QSPI_STATUS_INVALID_PARAMETER;
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}
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}
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return ret_status;
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}
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qspi_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *tx_length)
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{
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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if(_initialized) {
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if( (tx_length != NULL) && (tx_buffer != NULL) ) {
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@ -133,23 +131,23 @@ qspi_status_t QSPI::write(unsigned int address, const char *tx_buffer, size_t *t
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if(true == _acquire()) {
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_build_qspi_command(-1, address, -1);
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if(QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) {
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ret_status = QSPI_STATUS_OK;
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ret_status = QSPI_STATUS_OK;
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}
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}
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unlock();
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}
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} else {
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ret_status = QSPI_STATUS_INVALID_PARAMETER;
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ret_status = QSPI_STATUS_INVALID_PARAMETER;
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}
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}
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return ret_status;
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}
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qspi_status_t QSPI::read(unsigned int instruction, unsigned int address, unsigned int alt, char *rx_buffer, size_t *rx_length)
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{
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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if(_initialized) {
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if( (rx_length != NULL) && (rx_buffer != NULL) ) {
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if(*rx_length != 0) {
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@ -157,13 +155,13 @@ qspi_status_t QSPI::read(unsigned int instruction, unsigned int address, unsigne
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if( true == _acquire()) {
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_build_qspi_command(instruction, address, alt);
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if(QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
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ret_status = QSPI_STATUS_OK;
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ret_status = QSPI_STATUS_OK;
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}
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}
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unlock();
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}
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} else {
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ret_status = QSPI_STATUS_INVALID_PARAMETER;
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ret_status = QSPI_STATUS_INVALID_PARAMETER;
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}
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}
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@ -172,7 +170,7 @@ qspi_status_t QSPI::read(unsigned int instruction, unsigned int address, unsigne
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qspi_status_t QSPI::write(unsigned int instruction, unsigned int address, unsigned int alt, const char *tx_buffer, size_t *tx_length)
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{
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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if(_initialized) {
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if( (tx_length != NULL) && (tx_buffer != NULL) ) {
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@ -181,13 +179,13 @@ qspi_status_t QSPI::write(unsigned int instruction, unsigned int address, unsign
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if(true == _acquire()) {
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_build_qspi_command(instruction, address, alt);
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if(QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) {
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ret_status = QSPI_STATUS_OK;
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ret_status = QSPI_STATUS_OK;
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}
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}
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unlock();
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}
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} else {
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ret_status = QSPI_STATUS_INVALID_PARAMETER;
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ret_status = QSPI_STATUS_INVALID_PARAMETER;
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}
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}
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@ -196,14 +194,14 @@ qspi_status_t QSPI::write(unsigned int instruction, unsigned int address, unsign
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qspi_status_t QSPI::command_transfer(unsigned int instruction, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length)
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{
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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qspi_status_t ret_status = QSPI_STATUS_ERROR;
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if(_initialized) {
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lock();
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if(true == _acquire()) {
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_build_qspi_command(instruction, -1, -1); //We just need the command
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if(QSPI_STATUS_OK == qspi_command_transfer(&_qspi, &_qspi_command, (const void *)tx_buffer, tx_length, (void *)rx_buffer, rx_length)) {
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ret_status = QSPI_STATUS_OK;
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ret_status = QSPI_STATUS_OK;
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}
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}
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unlock();
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@ -251,34 +249,34 @@ void QSPI::_build_qspi_command(int instruction, int address, int alt)
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{
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memset( &_qspi_command, 0, sizeof(qspi_command_t) );
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//Set up instruction phase parameters
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_qspi_command.instruction.bus_width = _inst_width;
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_qspi_command.instruction.bus_width = _inst_width;
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if(instruction != -1) {
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_qspi_command.instruction.value = instruction;
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_qspi_command.instruction.value = instruction;
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} else {
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_qspi_command.instruction.value = 0;
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_qspi_command.instruction.value = 0;
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}
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//Set up address phase parameters
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_qspi_command.address.bus_width = _address_width;
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_qspi_command.address.size = _address_size;
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if(address != -1) {
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_qspi_command.address.value = address;
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_qspi_command.address.value = address;
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} else {
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_qspi_command.address.size = QSPI_CFG_ADDR_SIZE_NONE;
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}
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//Set up alt phase parameters
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_qspi_command.alt.bus_width = _alt_width;
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_qspi_command.alt.bus_width = _alt_width;
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_qspi_command.alt.size = _alt_size;
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if(alt != -1) {
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_qspi_command.alt.value = alt;
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_qspi_command.alt.value = alt;
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} else {
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//In the case alt phase is absent, set the alt size to be NONE
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_qspi_command.alt.value = 0;
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_qspi_command.alt.value = 0;
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}
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_qspi_command.dummy_count = _num_dummy_cycles;
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//Set up bus width for data phase
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_qspi_command.data.bus_width = _data_width;
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}
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@ -65,7 +65,7 @@ namespace mbed {
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class QSPI : private NonCopyable<QSPI> {
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public:
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/** Create a QSPI master connected to the specified pins
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*
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* io0-io3 is used to specify the Pins used for Quad SPI mode
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@ -96,7 +96,7 @@ public:
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qspi_address_size_t address_size,
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qspi_bus_width_t alt_width,
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qspi_alt_size_t alt_size,
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qspi_bus_width_t data_width,
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qspi_bus_width_t data_width,
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int dummy_cycles,
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int mode);
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@ -117,8 +117,8 @@ public:
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* @returns
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* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
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*/
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qspi_status_t read(unsigned int address, char *rx_buffer, size_t *rx_length);
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qspi_status_t read(unsigned int address, char *rx_buffer, size_t *rx_length);
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/** Write to QSPI peripheral with the preset write_instruction and alt_value
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*
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* @param address Address to be accessed in QSPI peripheral
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@ -129,7 +129,7 @@ public:
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* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
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*/
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qspi_status_t write(unsigned int address, const char *tx_buffer, size_t *tx_length);
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/** Read from QSPI peripheral using custom read instruction, alt values
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*
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* @param instruction Instruction value to be used in instruction phase
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@ -142,7 +142,7 @@ public:
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* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
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*/
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qspi_status_t read(unsigned int instruction, unsigned int address, unsigned int alt, char *rx_buffer, size_t *rx_length);
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/** Write to QSPI peripheral using custom write instruction, alt values
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*
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* @param instruction Instruction value to be used in instruction phase
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@ -155,7 +155,7 @@ public:
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* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
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*/
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qspi_status_t write(unsigned int instruction, unsigned int address, unsigned int alt, const char *tx_buffer, size_t *tx_length);
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/** Perform a transaction to write to an address(a control register) and get the status results
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*
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* @param instruction Instruction value to be used in instruction phase
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@ -168,7 +168,7 @@ public:
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* Returns QSPI_STATUS_SUCCESS on successful reads and QSPI_STATUS_ERROR on failed reads.
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*/
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qspi_status_t command_transfer(unsigned int instruction, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length);
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/** Acquire exclusive access to this SPI bus
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*/
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virtual void lock(void);
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@ -199,7 +199,7 @@ protected:
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int _mode; //SPI mode
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bool _initialized;
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PinName _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs; //IO lines, clock and chip select
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private:
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/* Private acquire function without locking/unlocking
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* Implemented in order to avoid duplicate locking and boost performance
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