mirror of https://github.com/ARMmbed/mbed-os.git
commit
d3cf5fb999
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@ -202,14 +202,13 @@ class GNUARMEclipse(Exporter):
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print 'Build configuration: {0}'.format(opts['name'])
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print 'Build configuration: {0}'.format(opts['name'])
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profile = profiles[id]
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profile = profiles[id]
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profile_toolchain = profile[self.TOOLCHAIN]
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# A small hack, do not bother with src_path again,
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# A small hack, do not bother with src_path again,
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# pass an empty string to avoid crashing.
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# pass an empty string to avoid crashing.
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src_paths = ['']
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src_paths = ['']
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target_name = self.toolchain.target.name
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target_name = self.toolchain.target.name
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toolchain = prepare_toolchain(
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toolchain = prepare_toolchain(
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src_paths, "", target_name, self.TOOLCHAIN, build_profile=profile_toolchain)
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src_paths, "", target_name, self.TOOLCHAIN, build_profile=[profile])
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# Hack to fill in build_dir
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# Hack to fill in build_dir
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toolchain.build_dir = self.toolchain.build_dir
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toolchain.build_dir = self.toolchain.build_dir
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@ -188,8 +188,5 @@
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"CExtraOptionsCheck": 1,
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"CExtraOptionsCheck": 1,
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"CExtraOptions": "--drv_vector_table_base=0x0",
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"CExtraOptions": "--drv_vector_table_base=0x0",
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"CMSISDAPJtagSpeedList": 10
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"CMSISDAPJtagSpeedList": 10
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},
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"REALTEK_RTL8195AM": {
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"OGChipSelectEditMenu": "REALTEK_RTL8195AM\tRealtek REALTEK_RTL8195AM"
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}
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}
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}
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}
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@ -39,8 +39,7 @@ class Makefile(Exporter):
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"MCU_NRF51Code.binary_hook",
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"MCU_NRF51Code.binary_hook",
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"TEENSY3_1Code.binary_hook",
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"TEENSY3_1Code.binary_hook",
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"LPCTargetCode.lpc_patch",
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"LPCTargetCode.lpc_patch",
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"LPC4088Code.binary_hook",
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"LPC4088Code.binary_hook"
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"RTL8195ACode.binary_hook"
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])
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])
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def generate(self):
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def generate(self):
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@ -209,8 +209,12 @@ class Uvision(Exporter):
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}
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}
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core = ctx['device'].core
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core = ctx['device'].core
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ctx['cputype'] = core.rstrip("FD")
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ctx['cputype'] = core.rstrip("FD")
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# Turn on FPU optimizations if the core has an FPU
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if core.endswith("FD"):
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ctx['fpu_setting'] = 1 if 'F' not in core or 'D' in core else 2
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ctx['fpu_setting'] = 3
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elif core.endswith("F"):
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ctx['fpu_setting'] = 2
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else:
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ctx['fpu_setting'] = 1
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ctx['fputype'] = self.format_fpu(core)
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ctx['fputype'] = self.format_fpu(core)
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ctx.update(self.format_flags())
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ctx.update(self.format_flags())
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self.gen_file('uvision/uvision.tmpl', ctx, self.project_name+".uvprojx")
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self.gen_file('uvision/uvision.tmpl', ctx, self.project_name+".uvprojx")
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