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Merge pull request #14724 from jeromecoutant/PR_G0PWR 

STM32G0: correct voltage scaling control
pull/14741/head
Martin Kojtal 2021-06-02 13:59:10 +02:00 committed by GitHub
parent 0738aabb87 cadc328947
commit d3ba2e1699
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 3 additions and 0 deletions
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1
targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TARGET_NUCLEO_G031K8/system_clock.c
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@ -99,6 +99,7 @@ uint8_t SetSysClock_PLL_HSI(void)
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/

2
targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TARGET_NUCLEO_G071RB/system_clock.c
View File

@ -97,6 +97,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/
@ -139,6 +140,7 @@ uint8_t SetSysClock_PLL_HSI(void)
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/