MIMXRT105x: upgrade linker script to use memory banks, disable SRAM (#411)

* Update MIMXRT105x linker script to use memory banks

* Disable SRAM for now :/

* Add split heap support

platform/mbed_lib.json

@@ -246,6 +246,9 @@
         },
         "MCU_STM32H7": {
             "crash-capture-enabled": true
+        },
+        "MIMXRT105X": {
+            "crash-capture-enabled": true
         }
     }
 }

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld

@@ -112,14 +112,14 @@ SECTIONS
     . = ALIGN(8);
     KEEP(*(.isr_vector))     /* Startup code */
     . = ALIGN(8);
-  } > m_text AT> m_text :text
+  } > m_text :text
 
   /* FCF to absolute address of 0x400, but only if bootloader is not present. */
 #if !IS_BOOTLOADER_PRESENT
   .flash_config FLASH_VTOR_TABLE_SIZE :
   {
     KEEP(*(.FlashConfig))    /* Flash Configuration Field (FCF) */
-  } > m_text AT> m_text :text
+  } > m_text :text
 #else
   /DISCARD/ : {
     *(.FlashConfig)
@@ -140,19 +140,19 @@ SECTIONS
     KEEP (*(.init))
     KEEP (*(.fini))
     . = ALIGN(8);
-  } > m_text AT> m_text :text
+  } > m_text :text
 
   .ARM.extab :
   {
     *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > m_text AT> m_text :text
+  } > m_text :text
 
   .ARM :
   {
     __exidx_start = .;
     *(.ARM.exidx*)
     __exidx_end = .;
-  } > m_text AT> m_text :text
+  } > m_text :text
 
  .ctors :
   {
@@ -176,7 +176,7 @@ SECTIONS
     KEEP (*(SORT(.ctors.*)))
     KEEP (*(.ctors))
     __CTOR_END__ = .;
-  } > m_text AT> m_text :text
+  } > m_text :text
 
   .dtors :
   {
@@ -187,14 +187,14 @@ SECTIONS
     KEEP (*(SORT(.dtors.*)))
     KEEP (*(.dtors))
     __DTOR_END__ = .;
-  } > m_text AT> m_text :text
+  } > m_text :text
 
   .preinit_array :
   {
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array*))
     PROVIDE_HIDDEN (__preinit_array_end = .);
-  } > m_text AT> m_text :text
+  } > m_text :text
 
   .init_array :
   {
@@ -202,7 +202,7 @@ SECTIONS
     KEEP (*(SORT(.init_array.*)))
     KEEP (*(.init_array*))
     PROVIDE_HIDDEN (__init_array_end = .);
-  } > m_text AT> m_text :text
+  } > m_text :text
 
   .fini_array :
   {
@@ -210,7 +210,7 @@ SECTIONS
     KEEP (*(SORT(.fini_array.*)))
     KEEP (*(.fini_array*))
     PROVIDE_HIDDEN (__fini_array_end = .);
-  } > m_text AT> m_text :text
+  } > m_text :text
 
 #if MBED_CONF_PLATFORM_CRASH_CAPTURE_ENABLED
   /* Stick the crash data ram at the start of sram_l */

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/TARGET_1050_EVK/xip/evkbimxrt1050_flexspi_nor_config.c

@@ -39,7 +39,7 @@ const flexspi_nor_config_t hyperflash_config = {
         (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) | (1u << kFlexSpiMiscOffset_DiffClkEnable),
         .sflashPadType = kSerialFlash_8Pads,
         .serialClkFreq = kFlexSpiSerialClk_133MHz,
-        .sflashA1Size = BOARD_FLASH_SIZE,
+        .sflashA1Size = MBED_ROM_BANK_EXT_FLASH_SIZE,
         .dataValidTime = {16u, 16u},
         .lookupTable = {
             // Read LUTs
@@ -68,7 +68,7 @@ const flexspi_nor_config_t qspiflash_config = {
         .sflashPadType = kSerialFlash_4Pads,
         .serialClkFreq = kFlexSpiSerialClk_133MHz,
         .lutCustomSeqEnable = 0u,
-        .sflashA1Size = BOARD_FLASH_SIZE,
+        .sflashA1Size = MBED_ROM_BANK_EXT_FLASH_SIZE,
         .lookupTable = {
             // Fast read sequence
             [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/TARGET_1060_EVK/xip/evkbmimxrt1060_flexspi_nor_config.c

@@ -35,7 +35,7 @@ const flexspi_nor_config_t qspiflash_config = {
             .deviceType           = kFlexSpiDeviceType_SerialNOR,
             .sflashPadType        = kSerialFlash_4Pads,
             .serialClkFreq        = kFlexSpiSerialClk_120MHz,
-            .sflashA1Size         = BOARD_FLASH_SIZE,
+            .sflashA1Size         = MBED_ROM_BANK_EXT_FLASH_SIZE,
             .lookupTable =
                 {
                     // Read LUTs

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/flash_api.c

@@ -655,8 +655,8 @@ int32_t flash_free(flash_t *obj)
 uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
 {
     uint32_t sectorsize = MBED_FLASH_INVALID_SIZE;
-    uint32_t devicesize = BOARD_FLASH_SIZE;
+    uint32_t devicesize = MBED_ROM_BANK_EXT_FLASH_SIZE;
-    uint32_t startaddr = BOARD_FLASH_START_ADDR;
+    uint32_t startaddr = MBED_ROM_BANK_EXT_FLASH_START;
 
     if ((address >= startaddr) && (address < (startaddr + devicesize))) {
         sectorsize = BOARD_FLASH_SECTOR_SIZE;
@@ -672,12 +672,12 @@ uint32_t flash_get_page_size(const flash_t *obj)
 
 uint32_t flash_get_start_address(const flash_t *obj)
 {
-    return BOARD_FLASH_START_ADDR;
+    return MBED_ROM_BANK_EXT_FLASH_START;
 }
 
 uint32_t flash_get_size(const flash_t *obj)
 {
-    return BOARD_FLASH_SIZE;
+    return MBED_ROM_BANK_EXT_FLASH_SIZE;
 }
 
 uint8_t flash_get_erase_value(const flash_t *obj)

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/flash_defines.h

@@ -274,7 +274,7 @@ static uint32_t customLUT[CUSTOM_LUT_LENGTH] = {
 
 flexspi_device_config_t deviceconfig = {
     .flexspiRootClk       = 120000000,
-    .flashSize            = (BOARD_FLASH_SIZE/1024),
+    .flashSize            = (MBED_ROM_BANK_EXT_FLASH_SIZE/1024),
     .CSIntervalUnit       = kFLEXSPI_CsIntervalUnit1SckCycle,
     .CSInterval           = 0,
     .CSHoldTime           = 3,

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/fsl_flexspi_nor_boot.h

@@ -101,7 +101,7 @@ typedef struct _boot_data_ {
   uint32_t placeholder;		/* placehoder to make even 0x10 size */
 }BOOT_DATA_T;
 
-#define FLASH_SIZE            BOARD_FLASH_SIZE
+#define FLASH_SIZE            MBED_ROM_BANK_EXT_FLASH_SIZE
 #define PLUGIN_FLAG           (uint32_t)0
 
 /* External Variables */

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/mimxrt_memory_info.h

@@ -20,28 +20,12 @@
 
 #ifdef HYPERFLASH_BOOT
 /* 64MB HyperFlash */
-#define BOARD_FLASH_SIZE             (0x4000000)
-#define BOARD_FLASH_START_ADDR       (0x60000000)
 #define BOARD_FLASH_PAGE_SIZE        (512)
 #define BOARD_FLASH_SECTOR_SIZE      (262144)
 #else
 /* 8MB QSPI Flash */
-#define BOARD_FLASH_SIZE             (0x800000)
-#define BOARD_FLASH_START_ADDR       (0x60000000)
 #define BOARD_FLASH_PAGE_SIZE        (256)
 #define BOARD_FLASH_SECTOR_SIZE      (4096)
 #endif
 
-// Unless the user overrides it, define the app to use the entire flash space.
-#ifndef MBED_APP_START
-#define MBED_APP_START BOARD_FLASH_START_ADDR
-#endif
-
-#ifndef MBED_APP_SIZE
-#define MBED_APP_SIZE BOARD_FLASH_SIZE
-#endif
-
-#define MIMXRT105X_BOARD_HAS_EXTERNAL_RAM 1
-#define MIMXRT105X_EXTERNAL_RAM_SIZE 0x02000000
-
 #endif //MBED_OS_MIMXRT_MEMORY_INFO_H

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_TEENSY_4X/TARGET_TEENSY_40/mimxrt_memory_info.h

@@ -19,20 +19,7 @@
 #define MBED_OS_MIMXRT_MEMORY_INFO_H
 
 /* 2MB QSPI Flash */
-#define BOARD_FLASH_SIZE             (0x1F0000) // 1984k
-#define BOARD_FLASH_START_ADDR       (0x60000000)
 #define BOARD_FLASH_PAGE_SIZE        (256)
 #define BOARD_FLASH_SECTOR_SIZE      (4096)
 
-// Unless the user overrides it, define the app to use the entire flash space.
-#ifndef MBED_APP_START
-#define MBED_APP_START BOARD_FLASH_START_ADDR
-#endif
-
-#ifndef MBED_APP_SIZE
-#define MBED_APP_SIZE BOARD_FLASH_SIZE
-#endif
-
-#define MIMXRT105X_BOARD_HAS_EXTERNAL_RAM 0
-
 #endif //MBED_OS_MIMXRT_MEMORY_INFO_H

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_TEENSY_4X/TARGET_TEENSY_41/mimxrt_memory_info.h

@@ -19,20 +19,7 @@
 #define MBED_OS_MIMXRT_MEMORY_INFO_H
 
 /* 8MB QSPI Flash */
-#define BOARD_FLASH_SIZE             (0x7C0000) // 7936k
-#define BOARD_FLASH_START_ADDR       (0x60000000)
 #define BOARD_FLASH_PAGE_SIZE        (256)
 #define BOARD_FLASH_SECTOR_SIZE      (4096)
 
-// Unless the user overrides it, define the app to use the entire flash space.
-#ifndef MBED_APP_START
-#define MBED_APP_START BOARD_FLASH_START_ADDR
-#endif
-
-#ifndef MBED_APP_SIZE
-#define MBED_APP_SIZE BOARD_FLASH_SIZE
-#endif
-
-#define MIMXRT105X_BOARD_HAS_EXTERNAL_RAM 0
-
 #endif //MBED_OS_MIMXRT_MEMORY_INFO_H

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld

@@ -25,9 +25,6 @@
 ** ###################################################################
 */
 
-/* Pick up memory info for this specific device */
-#include <mimxrt_memory_info.h>
-
 /* Entry Point */
 ENTRY(Reset_Handler)
 
@@ -42,77 +39,105 @@ __stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
 STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
 M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0;
 
+M_CRASH_DATA_RAM_SIZE = 0x100;
+
+/* If we are not configured to execute out of the start of ROM, then a bootloader is
+ * present.  This tells us whether we need to add the Flash Configuration Field at the start of flash. */
+#if MBED_CONFIGURED_ROM_BANK_EXT_FLASH_START == MBED_ROM_BANK_EXT_FLASH_START
+#define IS_BOOTLOADER_PRESENT 0
+#else
+#define IS_BOOTLOADER_PRESENT 1
+#endif
+
+/* Specify the ELF segments (program headers) */
+PHDRS
+{
+  text PT_LOAD FLAGS(5); /* read + execute */
+  ram_functions PT_LOAD FLAGS(5); /* read + execute */
+  ram_vector_table PT_LOAD FLAGS(6); /* read + write */
+  ram_noinit PT_LOAD FLAGS(6); /* read + write */
+  ram_init PT_LOAD FLAGS(6); /* read + write */
+  dtcm_stack PT_LOAD FLAGS(6); /* read + write */
+  ram_ncache_noinit PT_LOAD FLAGS(6); /* read + write */
+  ram_ncache_init PT_LOAD FLAGS(6); /* read + write */
+  crash_data_ram PT_LOAD FLAGS(6); /* read + write */
+}
+
 /* Specify the memory areas */
 MEMORY
 {
-  m_flash_config        (RX)  : ORIGIN = MBED_APP_START, LENGTH = 0x00001000
+  m_text                (RX)  : ORIGIN = MBED_CONFIGURED_ROM_BANK_EXT_FLASH_START, LENGTH = MBED_CONFIGURED_ROM_BANK_EXT_FLASH_SIZE
-  m_ivt                 (RX)  : ORIGIN = MBED_APP_START + 0x1000, LENGTH = 0x00001000
-  m_interrupts          (RX)  : ORIGIN = MBED_APP_START + 0x2000, LENGTH = 0x00000400
-  m_text                (RX)  : ORIGIN = MBED_APP_START + 0x2400, LENGTH = MBED_APP_SIZE - 0x2400
 
 /* DTCM memory.
      Startup code configures size to 256k (stealing space from OCRAM). */
-  m_dtcm                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00040000
+  m_dtcm                (RW)  : ORIGIN = MBED_RAM_BANK_SRAM_DTC_START, LENGTH = MBED_RAM_BANK_SRAM_DTC_SIZE
 
-#if MIMXRT105X_BOARD_HAS_EXTERNAL_RAM
+#ifdef MBED_RAM_BANK_SDRAM_SIZE
   /* Use the external RAM as main memory */
-  m_data                (RW)  : ORIGIN = 0x80000000, LENGTH = MIMXRT105X_EXTERNAL_RAM_SIZE
+  m_sdram               (RW)  : ORIGIN = MBED_RAM_BANK_SDRAM_START, LENGTH = MBED_RAM_BANK_SDRAM_SIZE
-#else
-  /* No external data memory, store data in DTCM (significantly faster than OCRAM)*/
-#define m_data m_dtcm
 #endif
 
   /* ITCM bank -- used for functions that need to execute from RAM
      (which is faster than having to load them from flash).
      Startup code configures size to 128k. */
-  m_itcm               (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
+  m_itcm               (RX)  : ORIGIN = MBED_RAM_BANK_SRAM_ITC_START, LENGTH = MBED_RAM_BANK_SRAM_ITC_SIZE
 
   /* OCRAM bank -- extra RAM, available for misc storage but slower to access.
      Startup code configures size to 128k.
      Note that address is different on the 105x and the 106x. */
-#if MBED_TARGET_MIMXRT1050
+  m_ocram              (RW)  : ORIGIN = MBED_RAM_BANK_SRAM_OC_START, LENGTH = MBED_RAM_BANK_SRAM_OC_SIZE
-  m_ocram              (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00020000
-#else /* MIMXRT1060 */
-  m_ocram              (RW)  : ORIGIN = 0x20280000, LENGTH = 0x00020000
-#endif
 
-#if MBED_TARGET_MIMXRT1060
+#ifdef MBED_RAM_BANK_SRAM_OC2_START
   /* OCRAM2 bank -- extra RAM, available on MIMXRT106x only. */
-  m_ocram2             (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00080000
+  m_ocram2             (RW)  : ORIGIN = MBED_RAM_BANK_SRAM_OC2_START, LENGTH = MBED_RAM_BANK_SRAM_OC2_SIZE
 #endif
 }
 
 /* Define output sections */
 SECTIONS
 {
-#if !defined(MBED_APP_COMPILE)
+#if !IS_BOOTLOADER_PRESENT
+  /* Flash config goes first, at the start of flash */
   .flash_config :
   {
-    . = ALIGN(8);
     __FLASH_BASE = .;
     KEEP(* (.boot_hdr.conf))     /* flash config section */
-    . = ALIGN(8);
+  } > m_text :text
-  } > m_flash_config
 
-  ivt_begin = ORIGIN(m_flash_config) + LENGTH(m_flash_config);
+  /* Then IVT at offset 0x1000 */
-
+  .ivt MBED_ROM_BANK_EXT_FLASH_START + 0x1000 :
-  .ivt :
   {
-    . = ALIGN(8);
     KEEP(* (.boot_hdr.ivt))           /* ivt section */
     KEEP(* (.boot_hdr.boot_data))     /* boot section */
     KEEP(* (.boot_hdr.dcd_data))      /* dcd section */
-    . = ALIGN(8);
+  } > m_text :text
-  } > m_ivt
+  /* Note that we do not want to use AT> above, because that would result in this section being
+   * placed in flash immediately after .flash_config.  Instead we don't use AT> to set the LMA equal
+   * to the VMA. */
+
+  /* Interrupts go after that */
+  #define INTERRUPT_TABLE_ADDR MBED_ROM_BANK_EXT_FLASH_START + 0x2000
+#else
+  /* We have a bootloader so we don't need the flash config or IVT */
+  /DISCARD/ : {
+    *(.boot_hdr.conf)
+    *(.boot_hdr.ivt)
+    *(.boot_hdr.boot_data)
+    *(.boot_hdr.dcd_data)
+  }
+
+  /* Interrupts go at the start of flash */
+  #define INTERRUPT_TABLE_ADDR MBED_ROM_BANK_EXT_FLASH_START
 #endif
-  /* The startup code goes first into internal RAM */
+
-  .interrupts :
+  /* Now we have the ISR vector */
+  .interrupts INTERRUPT_TABLE_ADDR :
   {
     __VECTOR_TABLE = .;
     . = ALIGN(8);
     KEEP(*(.isr_vector))     /* Startup code */
     . = ALIGN(8);
-  } > m_interrupts
+  } > m_text :text
 
   /* The program code and other data goes into internal RAM */
   .text :
@@ -128,19 +153,19 @@ SECTIONS
     KEEP (*(.init))
     KEEP (*(.fini))
     . = ALIGN(8);
-  } > m_text
+  } > m_text :text
 
   .ARM.extab :
   {
     *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > m_text
+  } > m_text :text
 
   .ARM :
   {
     __exidx_start = .;
     *(.ARM.exidx*)
     __exidx_end = .;
-  } > m_text
+  } > m_text :text
 
  .ctors :
   {
@@ -164,7 +189,7 @@ SECTIONS
     KEEP (*(SORT(.ctors.*)))
     KEEP (*(.ctors))
     __CTOR_END__ = .;
-  } > m_text
+  } > m_text :text
 
   .dtors :
   {
@@ -175,14 +200,14 @@ SECTIONS
     KEEP (*(SORT(.dtors.*)))
     KEEP (*(.dtors))
     __DTOR_END__ = .;
-  } > m_text
+  } > m_text :text
 
   .preinit_array :
   {
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array*))
     PROVIDE_HIDDEN (__preinit_array_end = .);
-  } > m_text
+  } > m_text :text
 
   .init_array :
   {
@@ -190,7 +215,7 @@ SECTIONS
     KEEP (*(SORT(.init_array.*)))
     KEEP (*(.init_array*))
     PROVIDE_HIDDEN (__init_array_end = .);
-  } > m_text
+  } > m_text :text
 
   .fini_array :
   {
@@ -198,7 +223,7 @@ SECTIONS
     KEEP (*(SORT(.fini_array.*)))
     KEEP (*(.fini_array*))
     PROVIDE_HIDDEN (__fini_array_end = .);
-  } > m_text
+  } > m_text :text
 
   __etext = .;    /* define a global symbol at end of code */
   __DATA_ROM = .; /* Symbol is used by startup for data initialization */
@@ -212,7 +237,7 @@ SECTIONS
     . += M_VECTOR_RAM_SIZE;
     . = ALIGN(8);
     __interrupts_ram_end__ = .; /* Define a global symbol at data end */
-  } > m_dtcm
+  } > m_dtcm :ram_vector_table
 
   __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
   __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
@@ -228,7 +253,7 @@ SECTIONS
     KEEP(*(.jcr*))
     . = ALIGN(8);
     __data_end__ = .;        /* define a global symbol at data end */
-  } > m_data AT> m_text
+  } > m_dtcm AT> m_text :ram_init
   __ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
 
   .ram_function :
@@ -238,28 +263,28 @@ SECTIONS
     *(CodeQuickAccess)
     . = ALIGN(128);
     __ram_function_end__ = .;
-  } > m_itcm AT> m_text
+  } > m_itcm AT> m_text :ram_functions
 
   __ram_function_size = SIZEOF(.ram_function);
 
   __NDATA_ROM = __ram_function_flash_start + SIZEOF(.ram_function);
 
   /* Always store noncacheable data (e.g. DMA descriptors) in DTCM, since this memory
-     does not use a cache. */
+     is always cache coherent. */
   .ncache.init :
   {
     __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
     *(NonCacheable.init)
     . = ALIGN(8);
     __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
-  } > m_dtcm AT> m_text
+  } > m_dtcm AT> m_text :ram_ncache_init
   . = __noncachedata_init_end__;
   .ncache :
   {
     *(NonCacheable)
     . = ALIGN(8);
     __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
-  } > m_dtcm
+  } > m_dtcm :ram_ncache_noinit
 
   __TEXT_CSF_ROM = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
 
@@ -269,7 +294,7 @@ SECTIONS
     . = ALIGN(1024);
     KEEP(*(.csf))
     __text_csf_end = .;
-  } > m_text
+  } > m_text :text
 
 
   /* __USED_FLASH_END gives the end of all data written to the flash memory, including code and data
@@ -284,7 +309,7 @@ SECTIONS
   ASSERT(__USED_FLASH_END <= text_end, "Code and data initializers exceed flash size!")
 
   /* Uninitialized data section */
-  .bss :
+  .bss (NOLOAD):
   {
     /* This is used by the startup in order to initialize the .bss section */
     . = ALIGN(8);
@@ -297,32 +322,65 @@ SECTIONS
     . = ALIGN(8);
     __bss_end__ = .;
     __END_BSS = .;
-  } > m_data
+  } > m_dtcm :ram_noinit
 
-  .heap :
+  . = ALIGN(8);
+  __end__ = .;
+  PROVIDE(end = .);
+
+  .heap_0 (NOLOAD):
   {
-    . = ALIGN(8);
+      PROVIDE(__mbed_sbrk_start_0 = .);
-    __end__ = .;
+      . =  ORIGIN(m_dtcm) + LENGTH(m_dtcm) - STACK_SIZE;
-    PROVIDE(end = .);
+      PROVIDE(__mbed_krbs_start_0 = .);
-    __HeapBase = .;
+  } > m_dtcm
-    . =  ORIGIN(m_data) + LENGTH(m_data) - STACK_SIZE;
-    __HeapLimit = .;
-    __heap_limit = .; /* Add for _sbrk */
-  } > m_data
 
   /* Reserve space for stack (even though stack is always at the end of DTCM regardless
      of where this section is located) */
-  .stack :
+  .stack (NOLOAD):
   {
     . = ALIGN(8);
     . += STACK_SIZE;
-  } > m_dtcm
+  } > m_dtcm :dtcm_stack
 
   /* Initializes stack on the end of block */
   __StackTop   = ORIGIN(m_dtcm) + LENGTH(m_dtcm);
   __StackLimit = __StackTop - STACK_SIZE;
   PROVIDE(__stack = __StackTop);
 
+  /* Store crash data RAM at the end of OCRAM (which is otherwise unused).
+     Note that the ROM bootloader clobbers the first part of OCRAM, so we have to put this at the end. */
+  __CRASH_DATA_RAM_START__ = ORIGIN(m_ocram) + LENGTH(m_ocram) - M_CRASH_DATA_RAM_SIZE; /* Create a global symbol at data start */
+
+  /* Second heap region. Use OCRAM2 if available, otherwise use OCRAM.
+   * TODO https://github.com/mbed-ce/mbed-os/issues/413 Use SDRAM once this bug is fixed. */
+#ifdef MBED_RAM_BANK_SRAM_OC2_START
+  .heap (NOLOAD):
+  {
+      PROVIDE(__mbed_sbrk_start = .);
+      . += (ORIGIN(m_ocram2) + LENGTH(m_ocram2));
+      PROVIDE(__mbed_krbs_start = .);
+  } > m_ocram2
+#else
+  .heap (NOLOAD):
+  {
+      PROVIDE(__mbed_sbrk_start = .);
+      . = __CRASH_DATA_RAM_START__;
+      PROVIDE(__mbed_krbs_start = .);
+  } > m_ocram2
+#endif
+
+  .crash_data_ram __CRASH_DATA_RAM_START__ :
+  {
+    . = ALIGN(8);
+    __CRASH_DATA_RAM__ = .;
+    KEEP(*(.keep.crash_data_ram))
+    *(.m_crash_data_ram)     /* This is a user defined section */
+    . += M_CRASH_DATA_RAM_SIZE;
+    . = ALIGN(8);
+    __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
+  } > m_ocram :crash_data_ram
+
   .ARM.attributes 0 : { *(.ARM.attributes) }
 
   /* Teensy model identifier symbol (used by Teensy Loader) */

targets/targets.json5

@@ -5202,7 +5202,8 @@
             "__STARTUP_INITIALIZE_NONCACHEDATA",
             "MBED_MPU_CUSTOM",
             "MBED_TICKLESS",
-            "DATA_SECTION_IS_CACHEABLE=1"
+            "DATA_SECTION_IS_CACHEABLE=1",
+            "MBED_SPLIT_HEAP"
         ],
         "inherits": [
             "Target"
@@ -5365,6 +5366,30 @@
             "console-usb": true,
             "console-uart": false
         },
+
+        // 2MB QSPI flash
+        "memory_banks": {
+            "EXT_FLASH": {
+                "access": {
+                    "execute": true,
+                    "peripheral": false,
+                    "read": true,
+                    "secure": false,
+                    "write": false
+                },
+                "default": true,
+                "size": 0x200000,
+                "start": 0x60000000,
+                "startup": true
+            }
+        },
+
+        // The end of flash is used by the Teensy bootloader
+        "memory_bank_config": {
+            "EXT_FLASH": {
+                "size": 0x1F0000, // 1984k
+            }
+        },
         "device_has_remove": [
             "EMAC"
         ],
@@ -5385,6 +5410,31 @@
             "console-uart": false,
             "network-default-interface-type": "ETHERNET"
         },
+
+        // 8MB QSPI flash
+        "memory_banks": {
+            "EXT_FLASH": {
+                "access": {
+                    "execute": true,
+                    "peripheral": false,
+                    "read": true,
+                    "secure": false,
+                    "write": false
+                },
+                "default": true,
+                "size": 0x800000,
+                "start": 0x60000000,
+                "startup": true
+            }
+        },
+
+        // The end of flash is used by the Teensy bootloader
+        "memory_bank_config": {
+            "EXT_FLASH": {
+                "size": 0x7C0000, // 7936k
+            }
+        },
+
         "device_name": "MIMXRT1062DVL6B",
         "image_url": "https://www.pjrc.com/store/teensy41_4.jpg"
     },