From d18735dd313188ab5bd9ce4c53cccd584322ac58 Mon Sep 17 00:00:00 2001 From: Yuguo Zou Date: Fri, 7 Apr 2017 19:29:38 +0800 Subject: [PATCH] code style fix replace tab with 4 spaces; remove "#ifndef CONFIG_MBED_ENABLED" code; make if else pretty; add comment to PinNames.h; --- .../TARGET_AMEBA/RTWInterface.cpp | 8 +- .../TARGET_AMEBA/TARGET_RTL8195A/PinNames.h | 9 +- .../TARGET_AMEBA/analogin_api.c | 12 +- .../TARGET_AMEBA/analogout_api.c | 12 +- .../TARGET_Realtek/TARGET_AMEBA/flash_api.c | 85 +- .../TARGET_Realtek/TARGET_AMEBA/flash_api.h | 10 +- .../TARGET_AMEBA/gpio_irq_api.c | 75 +- targets/TARGET_Realtek/TARGET_AMEBA/i2c_api.c | 224 +---- .../TARGET_Realtek/TARGET_AMEBA/pwmout_api.c | 3 +- targets/TARGET_Realtek/TARGET_AMEBA/rtc_api.c | 16 +- .../TARGET_Realtek/TARGET_AMEBA/rtw_emac.cpp | 8 +- .../TARGET_Realtek/TARGET_AMEBA/serial_api.c | 86 +- targets/TARGET_Realtek/TARGET_AMEBA/spi_api.c | 824 +----------------- .../TARGET_Realtek/TARGET_AMEBA/timer_api.c | 10 +- .../TARGET_Realtek/TARGET_AMEBA/trng_api.c | 10 +- .../TARGET_Realtek/TARGET_AMEBA/us_ticker.c | 13 +- 16 files changed, 163 insertions(+), 1242 deletions(-) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/RTWInterface.cpp b/targets/TARGET_Realtek/TARGET_AMEBA/RTWInterface.cpp index e11bcd3a85..7dd9badba3 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/RTWInterface.cpp +++ b/targets/TARGET_Realtek/TARGET_AMEBA/RTWInterface.cpp @@ -41,9 +41,9 @@ static rtw_result_t scan_result_handler( rtw_scan_handler_result_t* malloced_sca wifi_scan_hdl *scan_handler = (wifi_scan_hdl *)malloced_scan_result->user_data; if (malloced_scan_result->scan_complete != RTW_TRUE) { if(scan_handler->ap_details && scan_handler->scan_num > scan_handler->ap_num){ - nsapi_wifi_ap_t ap; + nsapi_wifi_ap_t ap; rtw_scan_result_t* record = &malloced_scan_result->ap_details; - record->SSID.val[record->SSID.len] = 0; /* Ensure the SSID is null terminated */ + record->SSID.val[record->SSID.len] = 0; /* Ensure the SSID is null terminated */ memset((void*)&ap, 0x00, sizeof(nsapi_wifi_ap_t)); memcpy(ap.ssid, record->SSID.val, record->SSID.len); memcpy(ap.bssid, record->BSSID.octet, 6); @@ -156,7 +156,7 @@ nsapi_error_t RTWInterface::connect() break; case NSAPI_SECURITY_NONE: sec = RTW_SECURITY_OPEN; - break; + break; default: return NSAPI_ERROR_PARAMETER; } @@ -230,7 +230,7 @@ nsapi_error_t RTWInterface::disconnect() wlan_emac_link_change(false); if(wifi_is_connected_to_ap() != RTW_SUCCESS) return NSAPI_ERROR_NO_CONNECTION; - if(wifi_disconnect()<0){ + if(wifi_disconnect()<0){ return NSAPI_ERROR_DEVICE_ERROR; } while(1){ diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/PinNames.h b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/PinNames.h index c9b9a8f5a2..c8d96ab66f 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/PinNames.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/PinNames.h @@ -109,6 +109,7 @@ typedef enum { PF_3 = (PORT_F<<4|3), PF_4 = (PORT_F<<4|4), PF_5 = (PORT_F<<4|5), + /* unavailable pins */ // PF_6 = (PORT_F<<4|6), // PF_7 = (PORT_F<<4|7), @@ -146,6 +147,7 @@ typedef enum { PJ_4 = (PORT_J<<4|4), PJ_5 = (PORT_J<<4|5), PJ_6 = (PORT_J<<4|6), + /* unavailable pins */ // PJ_7 = (PORT_J<<4|7), PK_0 = (PORT_K<<4|0), @@ -155,6 +157,7 @@ typedef enum { PK_4 = (PORT_K<<4|4), PK_5 = (PORT_K<<4|5), PK_6 = (PORT_K<<4|6), + /* unavailable pins */ // PK_7 = (PORT_K<<4|7), AD_1 = (PORT_V<<4|1), @@ -193,15 +196,15 @@ typedef enum { // Generic signals namings - + /* LED1~4 are defined as alias of GPIO pins, they are not the LEDs on board*/ LED1 = PB_4, LED2 = PB_5, LED3 = PB_6, LED4 = PB_7, SERIAL_TX = PA_7, SERIAL_RX = PA_6, - USBTX = PB_0, //PA_7 - USBRX = PB_1, //PA_6 + USBTX = PB_0, + USBRX = PB_1, I2C_SCL = PC_5, I2C_SDA = PC_4, SPI_MOSI = PC_2, diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c index b9e0852e65..25b5afb0fb 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/analogin_api.c @@ -38,12 +38,12 @@ void analogin_init (analogin_t *obj, PinName pin){ HAL_ADC_INIT_DAT HalADCInitDataTmp; PHAL_ADC_INIT_DAT pHalADCInitDataTmp = &HalADCInitDataTmp; - /* To backup user config first */ - + /* To backup user config first */ + _memset(&(obj->HalADCInitData), 0, sizeof(HAL_ADC_INIT_DAT)); _memcpy(pHalADCInitDataTmp, &(obj->HalADCInitData), sizeof(HAL_ADC_INIT_DAT)); - _memset(obj, 0x00, sizeof(analogin_t)); - + _memset(obj, 0x00, sizeof(analogin_t)); + ConfigDebugErr &= (~(_DBG_ADC_|_DBG_GDMA_)); ConfigDebugInfo&= (~(_DBG_ADC_|_DBG_GDMA_)); @@ -114,12 +114,12 @@ void analogin_init (analogin_t *obj, PinName pin){ /* Load user setting */ if ((pHalADCInitDataTmp->ADCEndian == ADC_DATA_ENDIAN_LITTLE) || (pHalADCInitDataTmp->ADCEndian == ADC_DATA_ENDIAN_BIG)) { - DBG_8195A("K\n"); + DBG_8195A("K\n"); pSalADCHND->pInitDat->ADCEndian = pHalADCInitDataTmp->ADCEndian; } if ((pHalADCInitDataTmp->ADCAudioEn != ADC_FEATURE_DISABLED) && (pHalADCInitDataTmp->ADCAudioEn < 2)) { - DBG_8195A("O\n"); + DBG_8195A("O\n"); pSalADCHND->pInitDat->ADCAudioEn = pHalADCInitDataTmp->ADCAudioEn; } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/analogout_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/analogout_api.c index b52112e931..153e1a26bb 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/analogout_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/analogout_api.c @@ -28,7 +28,7 @@ /** \brief analogout_init:\n - * to initialize DAC + * to initialize DAC * * This function is mainly to initialize a DAC channel. * \para dac_t *: obj @@ -85,7 +85,7 @@ void analogout_init(dac_t *obj, PinName pin) { } /** \brief analogout_free:\n - * to free DAC + * to free DAC * * This function is mainly to free a DAC channel. * \para dac_t *: obj @@ -100,7 +100,7 @@ void analogout_free(dac_t *obj) { } /** \brief analogout_write:\n - * to execute analogout_write + * to execute analogout_write * * This function is mainly to execute analog output and the value is a ratio. * The upper/lower bound of DAC register input value is defined by @@ -139,7 +139,7 @@ void analogout_write(dac_t *obj, float value) { } /** \brief analogout_write_u16:\n - * to execute analogout_write_u16 + * to execute analogout_write_u16 * * The register value of DAC input is a format of 2's complement. * The most maximum value of positive value drives DAC to output a voltage about 3.3V. @@ -159,7 +159,7 @@ void analogout_write_u16(dac_t *obj, uint16_t value) { } /** \brief analogout_read_u16:\n - * to read back analog output value in float format + * to read back analog output value in float format * * This function is NOT available in rtl8195a hardware design. * It always returns a fixed value of 0.0; @@ -170,7 +170,7 @@ float analogout_read(dac_t *obj) { } /** \brief analogout_read_u16:\n - * to read back analog output register value + * to read back analog output register value * * This function is NOT available in rtl8195a hardware design. * It always returns a fixed value of 0xFFFF; diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/flash_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/flash_api.c index 5de3e756c9..7ac02cb035 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/flash_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/flash_api.c @@ -42,7 +42,7 @@ static void flash_turnon(); /** * global data structure */ -//flash_t flash; +//flash_t flash; /** * @brief Control the flash chip write protect enable/disable @@ -66,20 +66,19 @@ void flash_write_protect(flash_t *obj, uint32_t protect) */ void flash_init(flash_t *obj) { - //SPIC_INIT_PARA spic_init_para; + //SPIC_INIT_PARA spic_init_para; - // Init SPI Flash Controller -// DBG_8195A("Initial Spi Flash Controller\n"); - //SPI_FLASH_PIN_FCTRL(ON); + // Init SPI Flash Controller +// DBG_8195A("Initial Spi Flash Controller\n"); + //SPI_FLASH_PIN_FCTRL(ON); - if (!SpicFlashInitRtl8195A(SpicOneBitMode)){ + if (!SpicFlashInitRtl8195A(SpicOneBitMode)){ - DBG_8195A("SPI Init Fail!!!!!!\n"); - HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_DSTBY_INFO3, HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_DSTBY_INFO3)|0xf); - } - else { - isinit = 1; - } + DBG_8195A("SPI Init Fail!!!!!!\n"); + HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_DSTBY_INFO3, HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_DSTBY_INFO3)|0xf); + } else { + isinit = 1; + } flashobj.SpicInitPara.flashtype = SpicInitParaAllClk[0][0].flashtype; //DBG_8195A("Flash ID is = %x %x %x \n",SpicInitParaAllClk[0][0].id[0],SpicInitParaAllClk[0][0].id[1],SpicInitParaAllClk[0][0].id[2]); @@ -128,17 +127,17 @@ void flash_erase_block(flash_t *obj, uint32_t address) */ int flash_read_word(flash_t *obj, uint32_t address, uint32_t * data) { - + flash_turnon(); if(isinit == 0) flash_init(&flashobj); - // Wait flash busy done (wip=0) - SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); + // Wait flash busy done (wip=0) + SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); - * data = HAL_READ32(SPI_FLASH_BASE, address); + * data = HAL_READ32(SPI_FLASH_BASE, address); SpicDisableRtl8195A(); - return 1; + return 1; } /** @@ -159,17 +158,16 @@ int flash_write_word(flash_t *obj, uint32_t address, uint32_t data) flashtype = flashobj.SpicInitPara.flashtype; - //Write word - HAL_WRITE32(SPI_FLASH_BASE, address, data); + //Write word + HAL_WRITE32(SPI_FLASH_BASE, address, data); - // Wait spic busy done - SpicWaitBusyDoneRtl8195A(); - - // Wait flash busy done (wip=0) + // Wait spic busy done + SpicWaitBusyDoneRtl8195A(); + + // Wait flash busy done (wip=0) if(flashtype == FLASH_MICRON){ SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara); - } - else + } else SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); SpicDisableRtl8195A(); @@ -199,7 +197,7 @@ int flash_stream_read(flash_t *obj, uint32_t address, uint32_t len, uint8_t * d flash_init(&flashobj); - // Wait flash busy done (wip=0) + // Wait flash busy done (wip=0) SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); offset_to_align = address & 0x03; @@ -232,8 +230,7 @@ int flash_stream_read(flash_t *obj, uint32_t address, uint32_t len, uint8_t * d address += 4; len -= 4; } - } - else { + } else { while (len >= 4) { *((u32 *)pbuf) = HAL_READ32(SPI_FLASH_BASE, address); pbuf += 4; @@ -301,8 +298,7 @@ int flash_stream_write(flash_t *obj, uint32_t address, uint32_t len, uint8_t * // Wait flash busy done (wip=0) if(flashtype == FLASH_MICRON){ SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara); - } - else + } else SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); @@ -320,16 +316,14 @@ int flash_stream_write(flash_t *obj, uint32_t address, uint32_t len, uint8_t * // Wait flash busy done (wip=0) if(flashtype == FLASH_MICRON){ SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara); - } - else + } else SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); pbuf += 4; address += 4; len -= 4; } - } - else { + } else { while (len >= 4) { //Write word HAL_WRITE32(SPI_FLASH_BASE, address, (u32)*((u32 *)pbuf)); @@ -338,8 +332,7 @@ int flash_stream_write(flash_t *obj, uint32_t address, uint32_t len, uint8_t * // Wait flash busy done (wip=0) if(flashtype == FLASH_MICRON){ SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara); - } - else + } else SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); pbuf += 4; @@ -362,8 +355,7 @@ int flash_stream_write(flash_t *obj, uint32_t address, uint32_t len, uint8_t * // Wait flash busy done (wip=0) if(flashtype == FLASH_MICRON){ SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara); - } - else + } else SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); } @@ -406,10 +398,11 @@ int flash_burst_write(flash_t *obj, uint32_t address ,uint32_t Length, uint8_t * flashtype = flashobj.SpicInitPara.flashtype; OccuSize = address & 0xFF; - if((Length >= PageSize) ||((Length + OccuSize) >= PageSize)) + if((Length >= PageSize) ||((Length + OccuSize) >= PageSize)){ ProgramSize = PageSize - OccuSize; - else + } else { ProgramSize = Length; + } flashobj.Length = Length; while(Length > 0){ @@ -420,16 +413,14 @@ int flash_burst_write(flash_t *obj, uint32_t address ,uint32_t Length, uint8_t * // Wait flash busy done (wip=0) if(flashtype == FLASH_MICRON){ SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara); - } - else + } else SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); address += ProgramSize; data+= ProgramSize; Length -= ProgramSize; OccuSize = 0; - } - else{ + } else{ while((flashobj.Length) >= PageSize){ SpicUserProgramRtl8195A(data, flashobj.SpicInitPara, address, &(flashobj.Length)); // Wait spic busy done @@ -437,8 +428,7 @@ int flash_burst_write(flash_t *obj, uint32_t address ,uint32_t Length, uint8_t * // Wait flash busy done (wip=0) if(flashtype == FLASH_MICRON){ SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara); - } - else + } else SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); address += PageSize; @@ -453,8 +443,7 @@ int flash_burst_write(flash_t *obj, uint32_t address ,uint32_t Length, uint8_t * // Wait flash busy done (wip=0) if(flashtype == FLASH_MICRON){ SpicWaitOperationDoneRtl8195A(flashobj.SpicInitPara); - } - else + } else SpicWaitWipDoneRefinedRtl8195A(flashobj.SpicInitPara); break; diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/flash_api.h b/targets/TARGET_Realtek/TARGET_AMEBA/flash_api.h index 2f0589ddcf..e1223dee9d 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/flash_api.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/flash_api.h @@ -28,18 +28,18 @@ typedef struct flash_s flash_t; /** * global data structure */ -extern flash_t flash; +extern flash_t flash; enum { FLASH_COMPLETE = 0, FLASH_ERROR_2 = 1, }; -//void flash_init (flash_t *obj); -void flash_erase_sector (flash_t *obj, uint32_t address); +//void flash_init (flash_t *obj); +void flash_erase_sector (flash_t *obj, uint32_t address); void flash_erase_block(flash_t * obj, uint32_t address); -int flash_read_word (flash_t *obj, uint32_t address, uint32_t * data); -int flash_write_word (flash_t *obj, uint32_t address, uint32_t data); +int flash_read_word (flash_t *obj, uint32_t address, uint32_t * data); +int flash_write_word (flash_t *obj, uint32_t address, uint32_t data); int flash_stream_read (flash_t *obj, uint32_t address, uint32_t len, uint8_t * data); int flash_stream_write (flash_t *obj, uint32_t address, uint32_t len, uint8_t * data); void flash_write_protect (flash_t *obj, uint32_t protect); diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/gpio_irq_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/gpio_irq_api.c index 445fc14635..8b97503b23 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/gpio_irq_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/gpio_irq_api.c @@ -55,16 +55,6 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) obj->hal_pin.pin_mode = INT_FALLING; break; -#ifndef CONFIG_MBED_ENABLED - case IRQ_LOW: - obj->hal_pin.pin_mode = INT_LOW; - break; - - case IRQ_HIGH: - obj->hal_pin.pin_mode = INT_HIGH; - break; -#endif - case IRQ_NONE: break; @@ -76,10 +66,9 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) HAL_GPIO_IntCtrl(&obj->hal_pin, enable); if(enable){ HAL_GPIO_UnMaskIrq(&obj->hal_pin); - } - else{ + } else{ HAL_GPIO_MaskIrq(&obj->hal_pin); - } + } } void gpio_irq_enable(gpio_irq_t *obj) @@ -91,63 +80,5 @@ void gpio_irq_disable(gpio_irq_t *obj) { HAL_GPIO_MaskIrq(&obj->hal_pin); } -#ifndef CONFIG_MBED_ENABLED -void gpio_irq_deinit(gpio_irq_t *obj) -{ - HAL_GPIO_DeInit(&obj->hal_pin); -} - -void gpio_irq_pull_ctrl(gpio_irq_t *obj, PinMode pull_type) -{ - HAL_GPIO_PullCtrl((u32) obj->pin, (u32)pull_type); -} - -void gpio_irq_set_event(gpio_irq_t *obj, gpio_irq_event event) -{ - uint32_t reg_value; - uint32_t level_edge; - uint32_t polarity; - uint8_t pin_num; - - pin_num = obj->hal_pin_num & 0x1f; // Max 31 - - switch (event) { - case IRQ_LOW: - level_edge = 0; // level trigger - polarity = 0; // active low - break; - - case IRQ_HIGH: - level_edge = 0; // level trigger - polarity = 1; // active high - break; - - case IRQ_FALL: - level_edge = 1; // edge trigger - polarity = 0; // active low - break; - - case IRQ_RISE: - level_edge = 1; // edge trigger - polarity = 1; // active high - break; - - default: - DBG_GPIO_ERR("Unknow Interrupt Trigger Type(%d)\n", event); - return; - } - - // Config Level or Edge trigger - reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_INT_TYPE); - reg_value &= ~(1 << pin_num); - reg_value |= (level_edge << pin_num); - HAL_WRITE32(GPIO_REG_BASE, GPIO_INT_TYPE, reg_value); - - // Config Low active or Gigh active - reg_value = HAL_READ32(GPIO_REG_BASE, GPIO_INT_POLARITY); - reg_value &= ~(1 << pin_num); - reg_value |= (polarity << pin_num); - HAL_WRITE32(GPIO_REG_BASE, GPIO_INT_POLARITY, reg_value); -} -#endif #endif + diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/i2c_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/i2c_api.c index 935e8e265f..4f325b1182 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/i2c_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/i2c_api.c @@ -84,7 +84,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) { // Determine the I2C to use uint32_t i2c_sda = (uint32_t)pinmap_peripheral(sda, PinMap_I2C_SDA); uint32_t i2c_scl = (uint32_t)pinmap_peripheral(scl, PinMap_I2C_SCL); - ConfigDebugErr &= (~(_DBG_I2C_|_DBG_GDMA_)); + ConfigDebugErr &= (~(_DBG_I2C_|_DBG_GDMA_)); ConfigDebugInfo&= (~(_DBG_I2C_|_DBG_GDMA_)); i2c_sel = (uint32_t)pinmap_merge(i2c_sda, i2c_scl); i2c_idx = RTL_GET_PERI_IDX(i2c_sel); @@ -177,7 +177,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) { pSalI2CHND->I2CAckAddr = 0; pSalI2CHND->TimeOut = 300; pSalI2CHND->AddRtyTimeOut = 3000; - pSalI2CHND->I2CExd |= (I2C_EXD_MTR_ADDR_RTY); + pSalI2CHND->I2CExd |= (I2C_EXD_MTR_ADDR_RTY); pSalI2CMngtAdpt->InnerTimeOut = pSalI2CHND->TimeOut; @@ -203,14 +203,11 @@ void i2c_frequency(i2c_t *obj, int hz) { i2c_reset(obj); if (i2c_user_clk <= 100) { pSalI2CHND->I2CSpdMod = I2C_SS_MODE; - } - else if ((i2c_user_clk > 100) && (i2c_user_clk <= 400)) { + } else if ((i2c_user_clk > 100) && (i2c_user_clk <= 400)) { pSalI2CHND->I2CSpdMod = I2C_FS_MODE; - } - else if (i2c_user_clk > 400) { + } else if (i2c_user_clk > 400) { pSalI2CHND->I2CSpdMod = I2C_HS_MODE; - } - else { + } else { pSalI2CHND->I2CSpdMod = I2C_SS_MODE; } @@ -270,8 +267,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { if (RtkI2CReceive(pSalI2CHND) != HAL_OK) { length = length - pSalI2CHND->pRXBuf->DataLen; return ((int)length); - } - else { + } else { //DBG_8195A(">\n"); /* Calculate user time out parameters */ I2CInTOTcnt = 300; @@ -290,8 +286,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { return ((int)(length)); } - } - else { + } else { if (I2CInTOTcnt == 0) { pSalI2CHND->DevSts = I2C_STS_TIMEOUT; pSalI2CHND->ErrType = I2C_ERR_RX_ADD_TO; @@ -300,10 +295,11 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { } } } - if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT) + if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT) { return ((int)(length - pSalI2CHND->pRXBuf->DataLen)); - else + } else { return ((int)(length)); + } } } @@ -340,8 +336,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { if (RtkI2CSend(pSalI2CHND) != HAL_OK) { length = length - pSalI2CHND->pTXBuf->DataLen; return ((int)length); - } - else { + } else { //DBG_8195A("(\n"); /* Calculate user time out parameters */ I2CInTOTcnt = 300; @@ -359,8 +354,7 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { pSalI2CHND->ErrType = I2C_ERR_TX_ADD_TO; return ((int)(length)); } - } - else { + } else { if (I2CInTOTcnt == 0) { pSalI2CHND->DevSts = I2C_STS_TIMEOUT; pSalI2CHND->ErrType = I2C_ERR_TX_ADD_TO; @@ -369,10 +363,11 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { } } - if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT) + if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT) { return ((int)(length - pSalI2CHND->pTXBuf->DataLen)); - else + } else { return ((int)(length)); + } } } @@ -431,129 +426,7 @@ void i2c_reset(i2c_t *obj) { /* Deinit I2C directly */ RtkI2CDeInitForPS(pSalI2CHND); } -#ifndef CONFIG_MBED_ENABLED -void i2c_restart_enable(i2c_t *obj) { - PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL; - PSAL_I2C_HND pSalI2CHND = NULL; - uint32_t i2clocaltmp; - uint8_t i2cen; - pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt); - pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv); - i2cen = pSalI2CHND->pInitDat->I2CEn; - - if (i2cen == I2C_ENABLE) { - pSalI2CHND->pInitDat->I2CEn = I2C_DISABLE; - pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat); - } - - i2clocaltmp = HalI2CRead32(pSalI2CHND->DevNum, REG_DW_I2C_IC_CON); - i2clocaltmp |= BIT_IC_CON_IC_RESTART_EN; - HalI2CWrite32(pSalI2CHND->DevNum, REG_DW_I2C_IC_CON, i2clocaltmp); - - if (i2cen == I2C_ENABLE) { - pSalI2CHND->pInitDat->I2CEn = I2C_ENABLE; - pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat); - } - - pSalI2CHND->pInitDat->I2CReSTR = I2C_ENABLE; - -} - -void i2c_restart_disable(i2c_t *obj) { - PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL; - PSAL_I2C_HND pSalI2CHND = NULL; - uint32_t i2clocaltmp; - uint8_t i2cen; - pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt); - pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv); - - i2cen = pSalI2CHND->pInitDat->I2CEn; - - if (i2cen == I2C_ENABLE) { - pSalI2CHND->pInitDat->I2CEn = I2C_DISABLE; - pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat); - } - - i2clocaltmp = HalI2CRead32(pSalI2CHND->DevNum, REG_DW_I2C_IC_CON); - i2clocaltmp &= (~BIT_IC_CON_IC_RESTART_EN); - HalI2CWrite32(pSalI2CHND->DevNum, REG_DW_I2C_IC_CON, i2clocaltmp); - - if (i2cen == I2C_ENABLE) { - pSalI2CHND->pInitDat->I2CEn = I2C_ENABLE; - pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat); - } - - pSalI2CHND->pInitDat->I2CReSTR = I2C_DISABLE; - -} - -void i2c_set_user_callback(i2c_t *obj, I2CCallback i2ccb, void(*i2c_callback)(void *)) { - - PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL; - PSAL_I2C_HND pSalI2CHND = NULL; - pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt); - pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv); - - if ((i2ccb >= I2C_TX_COMPLETE) && (i2ccb <= I2C_ERR_OCCURRED)) { - switch (i2ccb) { - case I2C_TX_COMPLETE: - pSalI2CHND->pUserCB->pTXCCB->USERCB = i2c_callback; - break; - case I2C_RX_COMPLETE: - pSalI2CHND->pUserCB->pRXCCB->USERCB = i2c_callback; - break; - case I2C_RD_REQ_COMMAND: - pSalI2CHND->pUserCB->pRDREQCB->USERCB = i2c_callback; - break; - case I2C_ERR_OCCURRED: - pSalI2CHND->pUserCB->pERRCB->USERCB = i2c_callback; - break; - default: - break; - } - } -} - - -void i2c_clear_user_callback(i2c_t *obj, I2CCallback i2ccb) { - - PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL; - PSAL_I2C_HND pSalI2CHND = NULL; - pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt); - pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv); - - if ((i2ccb >= I2C_TX_COMPLETE) && (i2ccb <= I2C_ERR_OCCURRED)) { - switch (i2ccb) { - case I2C_TX_COMPLETE: - pSalI2CHND->pUserCB->pTXCCB = NULL; - break; - case I2C_RX_COMPLETE: - pSalI2CHND->pUserCB->pRXCCB = NULL; - break; - case I2C_ERR_OCCURRED: - pSalI2CHND->pUserCB->pERRCB = NULL; - break; - default: - break; - } - } -} - -int i2c_enable_control(i2c_t *obj, int enable) { - PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL; - PSAL_I2C_HND pSalI2CHND = NULL; - pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt); - pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv); - - pSalI2CHND->pInitDat->I2CEn = enable; - - if(pSalI2CMngtAdpt->pHalOp->HalI2CEnable(pSalI2CHND->pInitDat) != HAL_OK) - return 0; // error - else - return 1; -} -#endif #if DEVICE_I2CSLAVE void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) { @@ -630,8 +503,7 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) { if (RtkI2CReceive(pSalI2CHND) != HAL_OK) { return 0; //error - } - else { + } else { /* Calculate user time out parameters */ I2CInTOTcnt = 300; if ((I2CInTOTcnt != 0) && (I2CInTOTcnt != I2C_TIMEOOUT_ENDLESS)) { @@ -648,8 +520,7 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) { pSalI2CHND->ErrType = I2C_ERR_RX_ADD_TO; return ((int)(length)); } - } - else { + } else { if (I2CInTOTcnt == 0) { pSalI2CHND->DevSts = I2C_STS_TIMEOUT; pSalI2CHND->ErrType = I2C_ERR_RX_ADD_TO; @@ -658,10 +529,11 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) { } } - if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT) + if (pSalI2CHND->DevSts != I2C_STS_TIMEOUT) { return ((int)(length - pSalI2CHND->pTXBuf->DataLen)); - else + } else { return ((int)(length)); + } } } @@ -693,62 +565,6 @@ int i2c_slave_write(i2c_t *obj, const char *data, int length) { * read command is sent to it. * \return result */ -#ifndef CONFIG_MBED_ENABLED -int i2c_slave_set_for_rd_req(i2c_t *obj, int set) { - PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL; - PSAL_I2C_HND pSalI2CHND = NULL; - PHAL_I2C_INIT_DAT pHalI2CInitDat = NULL; - PHAL_I2C_OP pHalI2COP = NULL; - u32 I2CLocalTemp; - - pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt); - pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv); - pHalI2CInitDat = pSalI2CMngtAdpt->pHalInitDat; - pHalI2COP = pSalI2CMngtAdpt->pHalOp; - - I2CLocalTemp = pHalI2COP->HalI2CReadReg(pHalI2CInitDat, REG_DW_I2C_IC_INTR_MASK); - - if (set) { - I2CLocalTemp |= BIT_IC_INTR_MASK_M_RD_REQ; - } else { - I2CLocalTemp &= (~BIT_IC_INTR_MASK_M_RD_REQ); - } - - pHalI2CInitDat->I2CIntrMSK = I2CLocalTemp; - pHalI2COP->HalI2CIntrCtrl(pHalI2CInitDat); - - return 1; -} - -/** \brief Description of i2c_slave_set_for_data_nak - * - * i2c_slave_set_for_data_nak is used to set/clear i2c slave NAK or ACK data part in transfer. - * - * \param i2c_t *obj : i2c object - * \param int set : set or clear for data NAK. - * \return result - */ -int i2c_slave_set_for_data_nak(i2c_t *obj, int set_nak) { - PSAL_I2C_MNGT_ADPT pSalI2CMngtAdpt = NULL; - PSAL_I2C_HND pSalI2CHND = NULL; - PHAL_I2C_INIT_DAT pHalI2CInitDat = NULL; - PHAL_I2C_OP pHalI2COP = NULL; - u32 I2CLocalTemp; - - pSalI2CMngtAdpt = &(obj->SalI2CMngtAdpt); - pSalI2CHND = &(pSalI2CMngtAdpt->pSalHndPriv->SalI2CHndPriv); - pHalI2CInitDat = pSalI2CMngtAdpt->pHalInitDat; - pHalI2COP = pSalI2CMngtAdpt->pHalOp; - I2CLocalTemp = pHalI2COP->HalI2CReadReg(pHalI2CInitDat, REG_DW_I2C_IC_STATUS); - - while (BIT_IC_STATUS_SLV_ACTIVITY & I2CLocalTemp) { - I2CLocalTemp = pHalI2COP->HalI2CReadReg(pHalI2CInitDat, REG_DW_I2C_IC_STATUS); - } - - HAL_I2C_WRITE32(pSalI2CHND->DevNum, REG_DW_I2C_IC_SLV_DATA_NACK_ONLY, set_nak); - return 1; -} -#endif #endif // CONFIG_I2C_SLAVE_EN #endif // CONFIG_I2C_EN diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/pwmout_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/pwmout_api.c index 08c27e209e..b56af0543a 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/pwmout_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/pwmout_api.c @@ -88,8 +88,7 @@ void pwmout_write(pwmout_t* obj, float value) { if (value < (float)0.0) { value = 0.0; - } - else if (value > (float)1.0) { + } else if (value > (float)1.0) { value = 1.0; } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/rtc_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/rtc_api.c index 104809b807..a15d1c44bf 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/rtc_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/rtc_api.c @@ -27,21 +27,21 @@ static struct tm rtc_timeinfo; static int sw_rtc_en=0; static const u8 dim[14] = { - 31, 0, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31, 31, 28 }; + 31, 0, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31, 31, 28 }; static inline bool is_leap_year(unsigned int year) { - return (!(year % 4) && (year % 100)) || !(year % 400); + return (!(year % 4) && (year % 100)) || !(year % 400); } - + static u8 days_in_month (u8 month, u8 year) { - u8 ret = dim [ month - 1 ]; - if (ret == 0) - ret = is_leap_year (year) ? 29 : 28; - return ret; -} + u8 ret = dim [ month - 1 ]; + if (ret == 0) + ret = is_leap_year (year) ? 29 : 28; + return ret; +} void sw_rtc_tick_handler(uint32_t id) { diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/rtw_emac.cpp b/targets/TARGET_Realtek/TARGET_AMEBA/rtw_emac.cpp index 3bd0983c18..afdcdab1f4 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/rtw_emac.cpp +++ b/targets/TARGET_Realtek/TARGET_AMEBA/rtw_emac.cpp @@ -56,7 +56,7 @@ static uint8_t wlan_get_hwaddr_size(emac_interface_t *emac) static void wlan_get_hwaddr(emac_interface_t *emac, uint8_t *addr) { - char mac[20]; + char mac[20]; if(RTW_SUCCESS == wifi_get_mac_address(mac)) { if (sscanf(mac, "%x:%x:%x:%x:%x:%x", &addr[0], &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) @@ -68,7 +68,7 @@ static void wlan_get_hwaddr(emac_interface_t *emac, uint8_t *addr) static void wlan_set_hwaddr(emac_interface_t *emac, uint8_t *addr) { - + } @@ -91,7 +91,7 @@ static bool wlan_link_out(emac_interface_t *emac, emac_stack_mem_t *buf) for (; p != NULL && sg_len < MAX_ETH_DRV_SG; p = p->next) { sg_list[sg_len].buf = (uint32_t) p->payload; sg_list[sg_len].len = p->len; - sg_len++; + sg_len++; } if (sg_len) { @@ -190,7 +190,7 @@ void mbed_default_mac_address(char *mac) { void mbed_mac_address(char *mac) { - char hwaddr[20]; + char hwaddr[20]; if(RTW_SUCCESS == wifi_get_mac_address(hwaddr)) { if (sscanf(hwaddr, "%x:%x:%x:%x:%x:%x", &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]) != 6) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/serial_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/serial_api.c index fd56fcc10d..6a8f954c48 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/serial_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/serial_api.c @@ -102,10 +102,10 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) return; } #ifdef CONFIG_MBED_ENABLED - else if(uart_idx == UART_3){ - obj->index = UART_3; - goto init_stdio; - } + else if(uart_idx == UART_3){ + obj->index = UART_3; + goto init_stdio; + } #endif pHalRuartOp = &(obj->hal_uart_op); @@ -148,9 +148,9 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) init_stdio: // For stdio management if (uart_idx == STDIO_UART) { - // default setting to 38400 - if (stdio_uart_inited) return; - log_uart_init(&stdio_uart_log, 38400, 8, ParityNone, 1); + // default setting to 38400 + if (stdio_uart_inited) return; + log_uart_init(&stdio_uart_log, 38400, 8, ParityNone, 1); stdio_uart_inited = 1; memcpy(&stdio_uart, obj, sizeof(serial_t)); } @@ -165,10 +165,10 @@ void serial_free(serial_t *obj) PUART_DMA_CONFIG pHalRuartDmaCfg; #endif #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - log_uart_free(&stdio_uart_log); - return; - } + if(obj->index == UART_3){ + log_uart_free(&stdio_uart_log); + return; + } #endif pHalRuartAdapter = &(obj->hal_uart_adp); @@ -191,9 +191,9 @@ void serial_free(serial_t *obj) void serial_baud(serial_t *obj, int baudrate) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - return; - } + if(obj->index == UART_3){ + return; + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter; @@ -206,10 +206,10 @@ void serial_baud(serial_t *obj, int baudrate) { void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - log_uart_format(&stdio_uart_log, data_bits, parity, stop_bits); - return; - } + if(obj->index == UART_3){ + log_uart_format(&stdio_uart_log, data_bits, parity, stop_bits); + return; + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter; pHalRuartAdapter = &(obj->hal_uart_adp); @@ -337,9 +337,9 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) int serial_getc(serial_t *obj) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - return log_uart_getc(&stdio_uart_log); - } + if(obj->index == UART_3){ + return log_uart_getc(&stdio_uart_log); + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp); u8 uart_idx = pHalRuartAdapter->UartIndex; @@ -351,10 +351,10 @@ int serial_getc(serial_t *obj) void serial_putc(serial_t *obj, int c) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - log_uart_putc(&stdio_uart_log, (char)c); - return; - } + if(obj->index == UART_3){ + log_uart_putc(&stdio_uart_log, (char)c); + return; + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp); u8 uart_idx = pHalRuartAdapter->UartIndex; @@ -372,9 +372,9 @@ void serial_putc(serial_t *obj, int c) int serial_readable(serial_t *obj) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - return log_uart_readable(&stdio_uart_log); - } + if(obj->index == UART_3){ + return log_uart_readable(&stdio_uart_log); + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp); @@ -391,9 +391,9 @@ int serial_readable(serial_t *obj) int serial_writable(serial_t *obj) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - return log_uart_writable(&stdio_uart_log); - } + if(obj->index == UART_3){ + return log_uart_writable(&stdio_uart_log); + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp); @@ -411,10 +411,10 @@ int serial_writable(serial_t *obj) void serial_clear(serial_t *obj) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - log_uart_clear(&stdio_uart_log); - return; - } + if(obj->index == UART_3){ + log_uart_clear(&stdio_uart_log); + return; + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter; @@ -444,10 +444,10 @@ void serial_clear_rx(serial_t *obj) void serial_break_set(serial_t *obj) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - log_uart_break_set(&stdio_uart_log); - return; - } + if(obj->index == UART_3){ + log_uart_break_set(&stdio_uart_log); + return; + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp); @@ -462,10 +462,10 @@ void serial_break_set(serial_t *obj) void serial_break_clear(serial_t *obj) { #ifdef CONFIG_MBED_ENABLED - if(obj->index == UART_3){ - log_uart_break_clear(&stdio_uart_log); - return; - } + if(obj->index == UART_3){ + log_uart_break_clear(&stdio_uart_log); + return; + } #endif PHAL_RUART_ADAPTER pHalRuartAdapter=(PHAL_RUART_ADAPTER)&(obj->hal_uart_adp); diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/spi_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/spi_api.c index 367ff9ca9d..dc1c188d77 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/spi_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/spi_api.c @@ -17,10 +17,6 @@ #include "objects.h" #include "spi_api.h" -#ifndef CONFIG_MBED_ENABLED -#include "spi_ex_api.h" -#endif - #include "PinNames.h" #include "pinmap.h" #include "hal_ssi.h" @@ -125,26 +121,7 @@ void spi_init (spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName sse DBG_SSI_ERR(ANSI_COLOR_RED"spi_init(): SPI %x init fails.\n"ANSI_COLOR_RESET,pHalSsiAdaptor->Index); return; } - -#ifndef CONFIG_MBED_ENABLED - pHalSsiAdaptor->TxCompCallback = spi_tx_done_callback; - pHalSsiAdaptor->TxCompCbPara = (void*)obj; - pHalSsiAdaptor->RxCompCallback = spi_rx_done_callback; - pHalSsiAdaptor->RxCompCbPara = (void*)obj; - pHalSsiAdaptor->TxIdleCallback = spi_bus_tx_done_callback; - pHalSsiAdaptor->TxIdleCbPara = (void*)obj; - -#ifdef CONFIG_GDMA_EN - HalGdmaOpInit((VOID*)&SpiGdmaOp); - pHalSsiAdaptor->DmaConfig.pHalGdmaOp = &SpiGdmaOp; - pHalSsiAdaptor->DmaConfig.pRxHalGdmaAdapter = &obj->spi_gdma_adp_rx; - pHalSsiAdaptor->DmaConfig.pTxHalGdmaAdapter = &obj->spi_gdma_adp_tx; - obj->dma_en = 0; - pHalSsiAdaptor->HaveTxChannel = 0; - pHalSsiAdaptor->HaveRxChannel = 0; -#endif -#endif - osDelay(1); + osDelay(1); } void spi_free (spi_t *obj) @@ -154,18 +131,6 @@ void spi_free (spi_t *obj) HalSsiDeInit(pHalSsiAdaptor); SPI0_MULTI_CS_CTRL(OFF); -#ifndef CONFIG_MBED_ENABLED -#ifdef CONFIG_GDMA_EN - if (obj->dma_en & SPI_DMA_RX_EN) { - HalSsiRxGdmaDeInit(pHalSsiAdaptor); - } - - if (obj->dma_en & SPI_DMA_TX_EN) { - HalSsiTxGdmaDeInit(pHalSsiAdaptor); - } - obj->dma_en = 0; -#endif -#endif } void spi_format (spi_t *obj, int bits, int mode, int slave) @@ -221,13 +186,11 @@ void spi_format (spi_t *obj, int bits, int mode, int slave) pHalSsiAdaptor->Role = SSI_SLAVE; pHalSsiAdaptor->SlaveOutputEnable = SLV_TXD_ENABLE; // <-- Slave only DBG_SSI_INFO("SPI0 is as slave\n"); - } - else { + } else { DBG_SSI_ERR("The SPI%d cannot work as Slave mode, only SPI0 does.\r\n", pHalSsiAdaptor->Index); pHalSsiAdaptor->Role = SSI_MASTER; } - } - else { + } else { pHalSsiAdaptor->Role = SSI_MASTER; } pHalSsiOp->HalSsiSetDeviceRole(pHalSsiAdaptor, pHalSsiAdaptor->Role); @@ -236,8 +199,7 @@ void spi_format (spi_t *obj, int bits, int mode, int slave) if (pHalSsiAdaptor->Role == SSI_SLAVE) { if (pHalSsiAdaptor->SclkPolarity == SCPOL_INACTIVE_IS_LOW) { HAL_GPIO_PullCtrl((u32)obj->sclk, hal_PullDown); - } - else { + } else { HAL_GPIO_PullCtrl((u32)obj->sclk, hal_PullUp); } } @@ -253,117 +215,6 @@ void spi_frequency (spi_t *obj, int hz) HalSsiSetSclk(pHalSsiAdaptor, (u32)hz); } -#ifndef CONFIG_MBED_ENABLED -void spi_slave_select(spi_t *obj, ChipSelect slaveindex) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - u8 Index; - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - Index = pHalSsiAdaptor->Index; - - if((pHalSsiAdaptor->Role == SSI_MASTER) && (Index == 0)){ - pHalSsiOp->HalSsiSetSlaveEnableRegister((VOID*)pHalSsiAdaptor,slaveindex); - if(slaveindex != CS_0){ - SPI0_MULTI_CS_CTRL(ON); - } - } - else{ - DBG_SSI_ERR("Only SPI 0 master mode supports slave selection.\n"); - } -} - -void spi_slave_select_bypin(spi_t *obj, PinName pinname) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - u8 Index; - u8 slaveindex = 8; - u8 pinmux; - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - Index = pHalSsiAdaptor->Index; - pinmux = pHalSsiAdaptor->PinmuxSelect; - - if((pHalSsiAdaptor->Role == SSI_MASTER) && (Index == 0)){ - if(pinmux == S0){ - switch (pinname){ - case PE_0: - slaveindex = CS_0; - break; - case PE_4: - slaveindex = CS_1; - break; - case PE_5: - slaveindex = CS_2; - break; - case PE_6: - slaveindex = CS_3; - break; - case PE_7: - slaveindex = CS_4; - break; - case PE_8: - slaveindex = CS_5; - break; - case PE_9: - slaveindex = CS_6; - break; - case PE_A: - slaveindex = CS_7; - break; - default: - slaveindex = 8; - } - } - - if(pinmux == S1){ - switch (pinname){ - case PC_0: - slaveindex = CS_0; - break; - case PC_4: - slaveindex = CS_1; - break; - case PC_5: - slaveindex = CS_2; - break; - case PC_6: - slaveindex = CS_3; - break; - case PC_7: - slaveindex = CS_4; - break; - case PC_8: - slaveindex = CS_5; - break; - case PC_9: - slaveindex = CS_6; - break; - default: - slaveindex = 8; - } - } - - if(slaveindex != 8){ - pHalSsiOp->HalSsiSetSlaveEnableRegister((VOID*)pHalSsiAdaptor,slaveindex); - if(slaveindex != CS_0){ - SPI0_MULTI_CS_CTRL(ON); - } - } - else - DBG_SSI_ERR("Wrong Chip Seleect Pin.\n"); - - } - else{ - DBG_SSI_ERR("Only SPI 0 master mode supports slave selection.\n"); - } -} -#endif - static inline void ssi_write (spi_t *obj, int value) { PHAL_SSI_ADAPTOR pHalSsiAdaptor; @@ -430,671 +281,4 @@ int spi_busy (spi_t *obj) return (int)pHalSsiOp->HalSsiBusy(pHalSsiAdaptor); } -#ifndef CONFIG_MBED_ENABLED -//Discard data in the rx fifo, SPI bus can observe these data -void spi_flush_rx_fifo (spi_t *obj) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - u32 rx_fifo_level; - u32 i; - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - while(pHalSsiOp->HalSsiReadable(pHalSsiAdaptor)){ - rx_fifo_level = pHalSsiOp->HalSsiGetRxFifoLevel(pHalSsiAdaptor); - for(i=0;iHalSsiRead(pHalSsiAdaptor); - } - } -} - -//This function is only for the slave device to flush tx fifo -//It will discard all data in both tx fifo and rx fifo, then reset the state of slave tx. -//Data in the tx & rx fifo will be dropped without being able to be observed from SPI bus -void spi_slave_flush_fifo(spi_t *obj) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - u8 index; - - pHalSsiAdaptor = &obj->spi_adp; - index = pHalSsiAdaptor->Index; - if(index != 0){ - DBG_SSI_ERR("spi %x is not a slave\n", index); - } - HalSsiClearFIFO(pHalSsiAdaptor); - obj->state &= ~SPI_STATE_TX_BUSY; -} - -// Slave mode read a sequence of data by interrupt mode -int32_t spi_slave_read_stream(spi_t *obj, char *rx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & SPI_STATE_RX_BUSY) { - DBG_SSI_WARN("spi_slave_read_stream: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - obj->state |= SPI_STATE_RX_BUSY; - if ((ret=pHalSsiOp->HalSsiReadInterrupt(pHalSsiAdaptor, rx_buffer, length)) != HAL_OK) { - obj->state &= ~SPI_STATE_RX_BUSY; - } - - return ret; -} - -// Slave mode write a sequence of data by interrupt mode -int32_t spi_slave_write_stream(spi_t *obj, char *tx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & SPI_STATE_TX_BUSY) { - DBG_SSI_WARN("spi_slave_write_stream: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - obj->state |= SPI_STATE_TX_BUSY; - if ((ret=pHalSsiOp->HalSsiWriteInterrupt(pHalSsiAdaptor, (u8 *) tx_buffer, length)) != HAL_OK) { - obj->state &= ~SPI_STATE_TX_BUSY; - } - return ret; -} - -// Master mode read a sequence of data by interrupt mode -// The length unit is byte, for both 16-bits and 8-bits mode -int32_t spi_master_read_stream(spi_t *obj, char *rx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & SPI_STATE_RX_BUSY) { - DBG_SSI_WARN("spi_master_read_stream: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - // wait bus idle - while(pHalSsiOp->HalSsiBusy(pHalSsiAdaptor)); - - obj->state |= SPI_STATE_RX_BUSY; - if ((ret=pHalSsiOp->HalSsiReadInterrupt(pHalSsiAdaptor, rx_buffer, length)) == HAL_OK) { - /* as Master mode, it need to push data to TX FIFO to generate clock out - then the slave can transmit data out */ - // send some dummy data out - if ((ret=pHalSsiOp->HalSsiWriteInterrupt(pHalSsiAdaptor, NULL, length)) != HAL_OK) { - obj->state &= ~SPI_STATE_RX_BUSY; - } - } - else { - obj->state &= ~SPI_STATE_RX_BUSY; - } - - return ret; -} - -// Master mode write a sequence of data by interrupt mode -// The length unit is byte, for both 16-bits and 8-bits mode -int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & SPI_STATE_TX_BUSY) { - DBG_SSI_WARN("spi_master_write_stream: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - obj->state |= SPI_STATE_TX_BUSY; - /* as Master mode, sending data will receive data at sametime, so we need to - drop those received dummy data */ - if ((ret=pHalSsiOp->HalSsiWriteInterrupt(pHalSsiAdaptor, (u8 *) tx_buffer, length)) != HAL_OK) { - obj->state &= ~SPI_STATE_TX_BUSY; - } - return ret; -} - -// Master mode write a sequence of data by interrupt mode -// The length unit is byte, for both 16-bits and 8-bits mode -int32_t spi_master_write_read_stream(spi_t *obj, char *tx_buffer, - char *rx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & (SPI_STATE_RX_BUSY|SPI_STATE_TX_BUSY)) { - DBG_SSI_WARN("spi_master_write_and_read_stream: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - // wait bus idle - while(pHalSsiOp->HalSsiBusy(pHalSsiAdaptor)); - - obj->state |= SPI_STATE_RX_BUSY; - /* as Master mode, sending data will receive data at sametime */ - if ((ret=pHalSsiOp->HalSsiReadInterrupt(pHalSsiAdaptor, rx_buffer, length)) == HAL_OK) { - obj->state |= SPI_STATE_TX_BUSY; - if ((ret=pHalSsiOp->HalSsiWriteInterrupt(pHalSsiAdaptor, (u8 *) tx_buffer, length)) != HAL_OK) { - obj->state &= ~(SPI_STATE_RX_BUSY|SPI_STATE_TX_BUSY); - // Disable RX IRQ - pHalSsiAdaptor->InterruptMask &= ~(BIT_IMR_RXFIM | BIT_IMR_RXOIM | BIT_IMR_RXUIM); - pHalSsiOp->HalSsiSetInterruptMask((VOID*)pHalSsiAdaptor); - } - } - else { - obj->state &= ~(SPI_STATE_RX_BUSY); - } - - return ret; -} - -int32_t spi_slave_read_stream_timeout(spi_t *obj, char *rx_buffer, uint32_t length, uint32_t timeout_ms) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int ret,timeout = 0; - uint32_t StartCount, TimeoutCount = 0; - - if (obj->state & SPI_STATE_RX_BUSY) { - DBG_SSI_WARN("spi_slave_read_stream: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - obj->state |= SPI_STATE_RX_BUSY; - HalSsiEnterCritical(pHalSsiAdaptor); - if ((ret=pHalSsiOp->HalSsiReadInterrupt(pHalSsiAdaptor, rx_buffer, length)) != HAL_OK) { - obj->state &= ~SPI_STATE_RX_BUSY; - } - HalSsiExitCritical(pHalSsiAdaptor); - - if ((ret == HAL_OK) && (timeout_ms > 0)) { - TimeoutCount = (timeout_ms*1000/TIMER_TICK_US); - StartCount = HalTimerOp.HalTimerReadCount(1); - while (obj->state & SPI_STATE_RX_BUSY) { - if (HAL_TIMEOUT == HalSsiTimeout(StartCount, TimeoutCount)) { - ret = HalSsiStopRecv(pHalSsiAdaptor); - obj->state &= ~ SPI_STATE_RX_BUSY; - timeout = 1; - DBG_SSI_INFO("Slave is timeout\n"); - break; - } - } - if ((pHalSsiAdaptor->DataFrameSize+1) > 8){ - pHalSsiAdaptor->RxLength <<= 1; - } - - if(timeout) - return (length - pHalSsiAdaptor->RxLength); - else - return length; - } - else { - return (-ret); - } -} - -int32_t spi_slave_read_stream_terminate(spi_t *obj, char *rx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - volatile u8 csterminate; - int ret; - volatile u32 spistate; - - csterminate = 0; - if (obj->state & SPI_STATE_RX_BUSY) { - DBG_SSI_WARN("spi_slave_read_stream_dma: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - - obj->state |= SPI_STATE_RX_BUSY; - HalSsiEnterCritical(pHalSsiAdaptor); - if ((ret=pHalSsiOp->HalSsiReadInterrupt(pHalSsiAdaptor, rx_buffer, length)) != HAL_OK) { - obj->state &= ~SPI_STATE_RX_BUSY; - } - HalSsiExitCritical(pHalSsiAdaptor); - - - while(obj->state & SPI_STATE_RX_BUSY){ - spistate = pHalSsiOp->HalSsiGetStatus(pHalSsiAdaptor); - while((spistate & 0x1) == 1){ - if((obj->state & SPI_STATE_RX_BUSY) == 0){ - csterminate = 0; - break; - } - spistate = pHalSsiOp->HalSsiGetStatus(pHalSsiAdaptor); - if((spistate & 0x1) == 0){ - ret = HalSsiStopRecv(pHalSsiAdaptor); - goto EndOfCS; - } - } - } -EndOfCS: - if((obj->state & SPI_STATE_RX_BUSY) != 0){ - csterminate = 1; - obj->state &= ~ SPI_STATE_RX_BUSY; - } - - if ((pHalSsiAdaptor->DataFrameSize+1) > 8){ - pHalSsiAdaptor->RxLength <<= 1; - } - - if(csterminate == 1) - return (length - pHalSsiAdaptor->RxLength); - else - return length; - -} - -// Bus Idle: Real TX done, TX FIFO empty and bus shift all data out already -void spi_bus_tx_done_callback(VOID *obj) -{ - spi_t *spi_obj = (spi_t *)obj; - spi_irq_handler handler; - - if (spi_obj->bus_tx_done_handler) { - handler = (spi_irq_handler)spi_obj->bus_tx_done_handler; - handler(spi_obj->bus_tx_done_irq_id, 0); - } -} - -void spi_tx_done_callback(VOID *obj) -{ - spi_t *spi_obj = (spi_t *)obj; - spi_irq_handler handler; - - if (spi_obj->state & SPI_STATE_TX_BUSY) { - spi_obj->state &= ~SPI_STATE_TX_BUSY; - if (spi_obj->irq_handler) { - handler = (spi_irq_handler)spi_obj->irq_handler; - handler(spi_obj->irq_id, SpiTxIrq); - } - } -} - -void spi_rx_done_callback(VOID *obj) -{ - spi_t *spi_obj = (spi_t *)obj; - spi_irq_handler handler; - - spi_obj->state &= ~SPI_STATE_RX_BUSY; - if (spi_obj->irq_handler) { - handler = (spi_irq_handler)spi_obj->irq_handler; - handler(spi_obj->irq_id, SpiRxIrq); - } -} - -void spi_irq_hook(spi_t *obj, spi_irq_handler handler, uint32_t id) -{ - obj->irq_handler = (u32)handler; - obj->irq_id = (u32)id; -} - -void spi_bus_tx_done_irq_hook(spi_t *obj, spi_irq_handler handler, uint32_t id) -{ - obj->bus_tx_done_handler = (u32)handler; - obj->bus_tx_done_irq_id = (u32)id; -} - -void spi_enable(spi_t *obj) -{ - PHAL_SSI_ADAPTOR pHalSsiAdapter; - pHalSsiAdapter = &obj->spi_adp; - - HalSsiEnable((VOID*)pHalSsiAdapter); -} - -void spi_disable(spi_t *obj) -{ - PHAL_SSI_ADAPTOR pHalSsiAdapter; - pHalSsiAdapter = &obj->spi_adp; - - HalSsiDisable((VOID*)pHalSsiAdapter); - -} -#ifdef CONFIG_GDMA_EN -int32_t spi_slave_read_stream_dma(spi_t *obj, char *rx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & SPI_STATE_RX_BUSY) { - DBG_SSI_WARN("spi_slave_read_stream_dma: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - if ((obj->dma_en & SPI_DMA_RX_EN)==0) { - if (HAL_OK == HalSsiRxGdmaInit(pHalSsiOp, pHalSsiAdaptor)) { - obj->dma_en |= SPI_DMA_RX_EN; - } - else { - return HAL_BUSY; - } - } - - obj->state |= SPI_STATE_RX_BUSY; - ret = HalSsiDmaRecv(pHalSsiAdaptor, (u8 *) rx_buffer, length); - if (ret != HAL_OK) { - obj->state &= ~SPI_STATE_RX_BUSY; - } - return (ret); -} - -int32_t spi_slave_write_stream_dma(spi_t *obj, char *tx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & SPI_STATE_TX_BUSY) { - DBG_SSI_WARN("spi_slave_write_stream_dma: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - if ((obj->dma_en & SPI_DMA_TX_EN)==0) { - if (HAL_OK == HalSsiTxGdmaInit(pHalSsiOp, pHalSsiAdaptor)) { - obj->dma_en |= SPI_DMA_TX_EN; - } - else { - return HAL_BUSY; - } - } - obj->state |= SPI_STATE_TX_BUSY; - ret = HalSsiDmaSend(pHalSsiAdaptor, (u8 *) tx_buffer, length); - if (ret != HAL_OK) { - obj->state &= ~SPI_STATE_TX_BUSY; - } - return (ret); -} - -int32_t spi_master_write_read_stream_dma(spi_t *obj, char *tx_buffer, - char *rx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & (SPI_STATE_RX_BUSY|SPI_STATE_TX_BUSY)) { - DBG_SSI_WARN("spi_master_write_and_read_stream: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - if ((obj->dma_en & SPI_DMA_TX_EN)==0) { - if (HAL_OK == HalSsiTxGdmaInit(pHalSsiOp, pHalSsiAdaptor)) { - obj->dma_en |= SPI_DMA_TX_EN; - } - else { - return HAL_BUSY; - } - } - - if ((obj->dma_en & SPI_DMA_RX_EN)==0) { - if (HAL_OK == HalSsiRxGdmaInit(pHalSsiOp, pHalSsiAdaptor)) { - obj->dma_en |= SPI_DMA_RX_EN; - } - else { - return HAL_BUSY; - } - } - - obj->state |= SPI_STATE_RX_BUSY; - /* as Master mode, sending data will receive data at sametime */ - if ((ret=HalSsiDmaRecv(pHalSsiAdaptor, (u8 *) rx_buffer, length)) == HAL_OK) { - obj->state |= SPI_STATE_TX_BUSY; - if ((ret=HalSsiDmaSend(pHalSsiAdaptor, (u8 *) tx_buffer, length)) != HAL_OK) { - obj->state &= ~(SPI_STATE_RX_BUSY|SPI_STATE_TX_BUSY); - } - } - else { - obj->state &= ~(SPI_STATE_RX_BUSY); - } - - return ret; -} - -int32_t spi_master_read_stream_dma(spi_t *obj, char *rx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & SPI_STATE_RX_BUSY) { - DBG_SSI_WARN("spi_master_read_stream_dma: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - if ((obj->dma_en & SPI_DMA_RX_EN)==0) { - if (HAL_OK == HalSsiRxGdmaInit(pHalSsiOp, pHalSsiAdaptor)) { - obj->dma_en |= SPI_DMA_RX_EN; - } - else { - return HAL_BUSY; - } - } - - obj->state |= SPI_STATE_RX_BUSY; - ret = HalSsiDmaRecv(pHalSsiAdaptor, (u8 *) rx_buffer, length); - if (ret != HAL_OK) { - obj->state &= ~SPI_STATE_RX_BUSY; - } - - // for master mode, we need to send data to generate clock out - if (obj->dma_en & SPI_DMA_TX_EN) { - // TX DMA is on already, so use DMA to TX data - // Make the GDMA to use the rx_buffer too - ret = HalSsiDmaSend(pHalSsiAdaptor, (u8 *) rx_buffer, length); - if (ret != HAL_OK) { - obj->state &= ~SPI_STATE_RX_BUSY; - } - } - else { - // TX DMA isn't enabled, so we just use Interrupt mode to TX dummy data - if ((ret=pHalSsiOp->HalSsiWriteInterrupt(pHalSsiAdaptor, NULL, length)) != HAL_OK) { - obj->state &= ~SPI_STATE_RX_BUSY; - } - } - - return ret; -} - -int32_t spi_master_write_stream_dma(spi_t *obj, char *tx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int32_t ret; - - if (obj->state & SPI_STATE_TX_BUSY) { - DBG_SSI_WARN("spi_master_write_stream_dma: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - if ((obj->dma_en & SPI_DMA_TX_EN)==0) { - if (HAL_OK == HalSsiTxGdmaInit(pHalSsiOp, pHalSsiAdaptor)) { - obj->dma_en |= SPI_DMA_TX_EN; - } - else { - return HAL_BUSY; - } - } - - obj->state |= SPI_STATE_TX_BUSY; - ret = HalSsiDmaSend(pHalSsiAdaptor, (u8 *) tx_buffer, length); - if (ret != HAL_OK) { - obj->state &= ~SPI_STATE_TX_BUSY; - } - - return ret; -} - -int32_t spi_slave_read_stream_dma_timeout(spi_t *obj, char *rx_buffer, uint32_t length, uint32_t timeout_ms) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - int ret,timeout = 0; - uint32_t StartCount, TimeoutCount = 0; - - - if (obj->state & SPI_STATE_RX_BUSY) { - DBG_SSI_WARN("spi_slave_read_stream_dma: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - if ((obj->dma_en & SPI_DMA_RX_EN)==0) { - if (HAL_OK == HalSsiRxGdmaInit(pHalSsiOp, pHalSsiAdaptor)) { - obj->dma_en |= SPI_DMA_RX_EN; - } - else { - return HAL_BUSY; - } - } - - obj->state |= SPI_STATE_RX_BUSY; - HalSsiEnterCritical(pHalSsiAdaptor); - ret = HalSsiDmaRecv(pHalSsiAdaptor, (u8 *) rx_buffer, length); - HalSsiExitCritical(pHalSsiAdaptor); - - if ((ret == HAL_OK) && (timeout_ms > 0)) { - TimeoutCount = (timeout_ms*1000/TIMER_TICK_US); - StartCount = HalTimerOp.HalTimerReadCount(1); - while (obj->state & SPI_STATE_RX_BUSY) { - if (HAL_TIMEOUT == HalSsiTimeout(StartCount, TimeoutCount)) { - ret = HalSsiStopRecv(pHalSsiAdaptor); - obj->state &= ~ SPI_STATE_RX_BUSY; - timeout = 1; - DBG_SSI_INFO("Slave is timeout\n"); - break; - } - } - - if(timeout) - return (length - pHalSsiAdaptor->RxLength); - else - return length; - - } - else { - obj->state &= ~ SPI_STATE_RX_BUSY; - return (-ret); - } -} - -int32_t spi_slave_read_stream_dma_terminate(spi_t *obj, char *rx_buffer, uint32_t length) -{ - PHAL_SSI_ADAPTOR pHalSsiAdaptor; - PHAL_SSI_OP pHalSsiOp; - volatile u8 csterminate; - int ret; - volatile u32 spistate; - - csterminate = 0; - if (obj->state & SPI_STATE_RX_BUSY) { - DBG_SSI_WARN("spi_slave_read_stream_dma: state(0x%x) is not ready\r\n", - obj->state); - return HAL_BUSY; - } - - pHalSsiAdaptor = &obj->spi_adp; - pHalSsiOp = &obj->spi_op; - - if ((obj->dma_en & SPI_DMA_RX_EN)==0) { - if (HAL_OK == HalSsiRxGdmaInit(pHalSsiOp, pHalSsiAdaptor)) { - obj->dma_en |= SPI_DMA_RX_EN; - } - else { - return HAL_BUSY; - } - } - - - obj->state |= SPI_STATE_RX_BUSY; - HalSsiEnterCritical(pHalSsiAdaptor); - ret = HalSsiDmaRecv(pHalSsiAdaptor, (u8 *) rx_buffer, length); - HalSsiExitCritical(pHalSsiAdaptor); - - while(obj->state & SPI_STATE_RX_BUSY){ - spistate = pHalSsiOp->HalSsiGetStatus(pHalSsiAdaptor); - while((spistate & 0x1) == 1){ - if((obj->state & SPI_STATE_RX_BUSY) == 0){ - csterminate = 0; - break; - } - spistate = pHalSsiOp->HalSsiGetStatus(pHalSsiAdaptor); - if((spistate & 0x1) == 0){ - ret = HalSsiStopRecv(pHalSsiAdaptor); - goto EndOfDMACS; - } - } - } -EndOfDMACS: - if((obj->state & SPI_STATE_RX_BUSY) != 0){ - csterminate = 1; - obj->state &= ~ SPI_STATE_RX_BUSY; - } - - if(csterminate == 1) - return (length - pHalSsiAdaptor->RxLength); - else - return length; - -} -#endif - -#endif // end of "#ifdef CONFIG_GDMA_EN" diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/timer_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/timer_api.c index dc1e41428d..a82fe441e8 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/timer_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/timer_api.c @@ -52,23 +52,23 @@ void gtimer_init (gtimer_t *obj, uint32_t tid) PTIMER_ADAPTER pTimerAdapter = &(obj->hal_gtimer_adp); if ((tid == 1) || (tid == 6) || (tid == 7)) { - DBG_TIMER_ERR("gtimer_init: This timer is reserved for HAL driver\r\n", tid); + DBG_TIMER_ERR("gtimer_init: This timer is reserved for HAL driver\r\n", tid); return; } if (tid > GTIMER_MAX) { - DBG_TIMER_ERR("gtimer_init: Invalid TimerId=%d\r\n", tid); + DBG_TIMER_ERR("gtimer_init: Invalid TimerId=%d\r\n", tid); return; } pTimerAdapter->IrqDis = 0; // Enable Irq @ initial pTimerAdapter->IrqHandle.IrqFun = (IRQ_FUN) gtimer_timeout_handler; - if(tid == 0) { + if(tid == 0) { pTimerAdapter->IrqHandle.IrqNum = TIMER0_IRQ; } else if(tid == 1) { - pTimerAdapter->IrqHandle.IrqNum = TIMER1_IRQ; + pTimerAdapter->IrqHandle.IrqNum = TIMER1_IRQ; } else { - pTimerAdapter->IrqHandle.IrqNum = TIMER2_7_IRQ; + pTimerAdapter->IrqHandle.IrqNum = TIMER2_7_IRQ; } pTimerAdapter->IrqHandle.Priority = 0; pTimerAdapter->IrqHandle.Data = (u32)obj; diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/trng_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/trng_api.c index 99d98ea1bd..06d795220e 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/trng_api.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/trng_api.c @@ -22,7 +22,7 @@ void trng_init(trng_t *obj) { - _memset((void *)obj, 0, sizeof(trng_t)); + _memset((void *)obj, 0, sizeof(trng_t)); analogin_init(&obj->tradcng, ADC0); obj->inited = 1; } @@ -32,7 +32,7 @@ void trng_free(trng_t *obj) if (!obj->inited) { return; } - + obj->inited = 0; analogin_deinit(&obj->tradcng); } @@ -41,7 +41,7 @@ static void trng_get_byte(trng_t *obj, unsigned char *byte) { size_t bit; uint32_t adc[2]; - + PSAL_ADC_MNGT_ADPT pSalADCMngtAdpt = NULL; PSAL_ADC_HND pSalADCHND = NULL; @@ -50,7 +50,7 @@ static void trng_get_byte(trng_t *obj, unsigned char *byte) *byte = 0; for (bit = 0; bit < 8; bit++) { - RtkADCRxManualRotate(pSalADCHND, adc); + RtkADCRxManualRotate(pSalADCHND, adc); *byte |= (adc[0] & 0x01) << bit; } } @@ -58,7 +58,7 @@ static void trng_get_byte(trng_t *obj, unsigned char *byte) int trng_get_bytes(trng_t *obj, uint8_t *buf, size_t len, size_t *output_len) { size_t i; - + if (!obj->inited) { return -1; } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/us_ticker.c b/targets/TARGET_Realtek/TARGET_AMEBA/us_ticker.c index c1be51a8b2..d0f343a28a 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/us_ticker.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/us_ticker.c @@ -39,7 +39,7 @@ void us_ticker_init(void) if (us_ticker_inited) return; us_ticker_inited = 1; - + // Initial a G-Timer TimerAdapter.IrqDis = 0; // Enable Irq @ initial @@ -83,18 +83,17 @@ void us_ticker_set_interrupt(timestamp_t timestamp) cur_time_us = us_ticker_read(); if ((uint32_t)timestamp >= cur_time_us) { time_def = (uint32_t)timestamp - cur_time_us; - } - else { + } else { time_def = 0xffffffff - cur_time_us + (uint32_t)timestamp; } if (time_def < TIMER_TICK_US) { time_def = TIMER_TICK_US; // at least 1 tick } - HalTimerOp.HalTimerDis((u32)TimerAdapter.TimerId); - HalTimerOpExt.HalTimerReLoad((u32)TimerAdapter.TimerId, time_def); - HalTimerOpExt.HalTimerIrqEn((u32)TimerAdapter.TimerId); - HalTimerOp.HalTimerEn((u32)TimerAdapter.TimerId); + HalTimerOp.HalTimerDis((u32)TimerAdapter.TimerId); + HalTimerOpExt.HalTimerReLoad((u32)TimerAdapter.TimerId, time_def); + HalTimerOpExt.HalTimerIrqEn((u32)TimerAdapter.TimerId); + HalTimerOp.HalTimerEn((u32)TimerAdapter.TimerId); }