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reformat to following codeing style rules

pull/8668/head
Qinghao Shi 2018-11-12 13:54:11 +00:00
parent 25e8f89567
commit d157e59267
4 changed files with 76 additions and 88 deletions
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61
features/netsocket/emac-drivers/TARGET_ARM_FM/COMPONENT_LAN91C111/fvp_emac.cpp
View File

@ -43,7 +43,7 @@
#define PHY_TASK_PERIOD_MS 200 #define PHY_TASK_PERIOD_MS 200
fvp_EMAC::fvp_EMAC() : _thread(THREAD_PRIORITY,THREAD_STACKSIZE,NULL,"fvp_emac_thread") fvp_EMAC::fvp_EMAC() : _thread(THREAD_PRIORITY, THREAD_STACKSIZE, NULL, "fvp_emac_thread")
{ {
} }
@ -51,16 +51,15 @@ fvp_EMAC::fvp_EMAC() : _thread(THREAD_PRIORITY,THREAD_STACKSIZE,NULL,"fvp_emac_t
void fvp_EMAC::ethernet_callback(lan91_event_t event, void *param) void fvp_EMAC::ethernet_callback(lan91_event_t event, void *param)
{ {
fvp_EMAC *enet = static_cast<fvp_EMAC *>(param); fvp_EMAC *enet = static_cast<fvp_EMAC *>(param);
switch (event) switch (event) {
{ case LAN91_RxEvent:
case LAN91_RxEvent: enet->rx_isr();
enet->rx_isr(); break;
break; case LAN91_TxEvent:
case LAN91_TxEvent: enet->tx_isr();
enet->tx_isr(); break;
break; default:
default: break;
break;
} }
} }
@ -90,12 +89,12 @@ bool fvp_EMAC::low_level_init_successful()
* *
* \param[in] pvParameters pointer to the interface data * \param[in] pvParameters pointer to the interface data
*/ */
void fvp_EMAC::thread_function(void* pvParameters) void fvp_EMAC::thread_function(void *pvParameters)
{ {
struct fvp_EMAC *fvp_enet = static_cast<fvp_EMAC *>(pvParameters); struct fvp_EMAC *fvp_enet = static_cast<fvp_EMAC *>(pvParameters);
for (;;) { for (;;) {
uint32_t flags = ThisThread::flags_wait_any(FLAG_RX|FLAG_TX); uint32_t flags = ThisThread::flags_wait_any(FLAG_RX | FLAG_TX);
if (flags & FLAG_RX) { if (flags & FLAG_RX) {
fvp_enet->packet_rx(); fvp_enet->packet_rx();
} }
@ -110,8 +109,7 @@ void fvp_EMAC::thread_function(void* pvParameters)
*/ */
void fvp_EMAC::packet_rx() void fvp_EMAC::packet_rx()
{ {
while(!LAN91_RxFIFOEmpty()) while (!LAN91_RxFIFOEmpty()) {
{
emac_mem_buf_t *temp_rxbuf = NULL; emac_mem_buf_t *temp_rxbuf = NULL;
uint32_t *rx_payload_ptr; uint32_t *rx_payload_ptr;
uint32_t rx_length = 0; uint32_t rx_length = 0;
@ -121,26 +119,23 @@ void fvp_EMAC::packet_rx()
/* no memory been allocated*/ /* no memory been allocated*/
if (NULL != temp_rxbuf) { if (NULL != temp_rxbuf) {
rx_payload_ptr = (uint32_t*)_memory_manager->get_ptr(temp_rxbuf); rx_payload_ptr = (uint32_t *)_memory_manager->get_ptr(temp_rxbuf);
rx_length = _memory_manager->get_len(temp_rxbuf); rx_length = _memory_manager->get_len(temp_rxbuf);
bool state; bool state;
#ifdef LOCK_RX_THREAD #ifdef LOCK_RX_THREAD
/* Get exclusive access */ /* Get exclusive access */
_TXLockMutex.lock(); _TXLockMutex.lock();
#endif #endif
state = LAN91_receive_frame(rx_payload_ptr, &rx_length); state = LAN91_receive_frame(rx_payload_ptr, &rx_length);
#ifdef LOCK_RX_THREAD #ifdef LOCK_RX_THREAD
_TXLockMutex.unlock(); _TXLockMutex.unlock();
#endif #endif
if(!state) if (!state) {
{
_memory_manager->free(temp_rxbuf); _memory_manager->free(temp_rxbuf);
continue; continue;
} } else {
else
{
_memory_manager->set_len(temp_rxbuf, rx_length); _memory_manager->set_len(temp_rxbuf, rx_length);
} }
_emac_link_input_cb(temp_rxbuf); _emac_link_input_cb(temp_rxbuf);
@ -161,7 +156,7 @@ bool fvp_EMAC::link_out(emac_mem_buf_t *buf)
{ {
// If buffer is chained or not aligned then make a contiguous aligned copy of it // If buffer is chained or not aligned then make a contiguous aligned copy of it
if (_memory_manager->get_next(buf) || if (_memory_manager->get_next(buf) ||
reinterpret_cast<uint32_t>(_memory_manager->get_ptr(buf)) % LAN91_BUFF_ALIGNMENT) { reinterpret_cast<uint32_t>(_memory_manager->get_ptr(buf)) % LAN91_BUFF_ALIGNMENT) {
emac_mem_buf_t *copy_buf; emac_mem_buf_t *copy_buf;
copy_buf = _memory_manager->alloc_heap(_memory_manager->get_total_len(buf), LAN91_BUFF_ALIGNMENT); copy_buf = _memory_manager->alloc_heap(_memory_manager->get_total_len(buf), LAN91_BUFF_ALIGNMENT);
if (NULL == copy_buf) { if (NULL == copy_buf) {
@ -176,7 +171,7 @@ bool fvp_EMAC::link_out(emac_mem_buf_t *buf)
} }
/* Save the buffer so that it can be freed when transmit is done */ /* Save the buffer so that it can be freed when transmit is done */
uint32_t * buffer; uint32_t *buffer;
uint32_t tx_length = 0; uint32_t tx_length = 0;
bool state; bool state;
buffer = (uint32_t *)(_memory_manager->get_ptr(buf)); buffer = (uint32_t *)(_memory_manager->get_ptr(buf));
@ -186,17 +181,17 @@ bool fvp_EMAC::link_out(emac_mem_buf_t *buf)
_TXLockMutex.lock(); _TXLockMutex.lock();
/* Setup transfers */ /* Setup transfers */
state = LAN91_send_frame(buffer,&tx_length); state = LAN91_send_frame(buffer, &tx_length);
_TXLockMutex.unlock(); _TXLockMutex.unlock();
/* Restore access */ /* Restore access */
if(!state){ if (!state) {
return false; return false;
} }
/* Free the buffer */ /* Free the buffer */
_memory_manager->free(buf); _memory_manager->free(buf);
return true; return true;
} }
@ -306,13 +301,15 @@ void fvp_EMAC::set_memory_manager(EMACMemoryManager &mem_mngr)
} }
fvp_EMAC &fvp_EMAC::get_instance() { fvp_EMAC &fvp_EMAC::get_instance()
{
static fvp_EMAC emac; static fvp_EMAC emac;
return emac; return emac;
} }
// Weak so a module can override // Weak so a module can override
MBED_WEAK EMAC &EMAC::get_default_instance() { MBED_WEAK EMAC &EMAC::get_default_instance()
{
return fvp_EMAC::get_instance(); return fvp_EMAC::get_instance();
} }

6
features/netsocket/emac-drivers/TARGET_ARM_FM/COMPONENT_LAN91C111/fvp_emac.h
View File

@ -159,9 +159,9 @@ private:
void rx_isr(); void rx_isr();
void tx_isr(); void tx_isr();
void packet_rx(); void packet_rx();
static void thread_function(void* pvParameters); static void thread_function(void *pvParameters);
void phy_task(); void phy_task();
static void ethernet_callback(lan91_event_t event, void *param); static void ethernet_callback(lan91_event_t event, void *param);
Thread _thread; /* Processing thread */ Thread _thread; /* Processing thread */
rtos::Mutex _TXLockMutex; /* TX critical section mutex */ rtos::Mutex _TXLockMutex; /* TX critical section mutex */
@ -169,7 +169,7 @@ private:
emac_link_input_cb_t _emac_link_input_cb; /* Callback for incoming data */ emac_link_input_cb_t _emac_link_input_cb; /* Callback for incoming data */
emac_link_state_change_cb_t _emac_link_state_cb; /* Link state change callback */ emac_link_state_change_cb_t _emac_link_state_cb; /* Link state change callback */
EMACMemoryManager * _memory_manager; /* Memory manager */ EMACMemoryManager *_memory_manager; /* Memory manager */
int _phy_task_handle; /* Handle for phy task event */ int _phy_task_handle; /* Handle for phy task event */
lan91_phy_status_t _prev_state; lan91_phy_status_t _prev_state;

43
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/drivers/lan91c111.c
View File

@ -39,7 +39,7 @@ void LAN91_init(void)
/* Reset the PHY*/ /* Reset the PHY*/
write_PHY(0, 0x8000); write_PHY(0, 0x8000);
/* clear phy 18 status */ /* clear phy 18 status */
read_PHY(18); read_PHY(18);
@ -75,21 +75,21 @@ void LAN91_init(void)
void read_MACaddr(uint8_t *addr) void read_MACaddr(uint8_t *addr)
{ {
int i; int i;
LAN91_SelectBank(1);
i = LREG(uint16_t, B1_IAR0); LAN91_SelectBank(1);
addr[0] = (uint8_t)i;
addr[1] = (uint8_t)(i >> 8);
i = LREG(uint16_t, B1_IAR2); i = LREG(uint16_t, B1_IAR0);
addr[2] = (uint8_t)i; addr[0] = (uint8_t)i;
addr[3] = (uint8_t)(i >> 8); addr[1] = (uint8_t)(i >> 8);
i = LREG(uint16_t, B1_IAR4); i = LREG(uint16_t, B1_IAR2);
addr[4] = (uint8_t)i; addr[2] = (uint8_t)i;
addr[5] = (uint8_t)(i >> 8); addr[3] = (uint8_t)(i >> 8);
i = LREG(uint16_t, B1_IAR4);
addr[4] = (uint8_t)i;
addr[5] = (uint8_t)(i >> 8);
} }
void LAN91_SetCallback(lan91_callback_t callback, void *userData) void LAN91_SetCallback(lan91_callback_t callback, void *userData)
@ -113,8 +113,7 @@ bool LAN91_send_frame(uint32_t *buff, uint32_t *size)
LREG(uint16_t, B2_MMUCR) = MMU_ALLOC_TX; LREG(uint16_t, B2_MMUCR) = MMU_ALLOC_TX;
/* Check if Interrupt Status Register been set for MMU Allocate Ready */ /* Check if Interrupt Status Register been set for MMU Allocate Ready */
if (!(LREG(uint16_t, B2_IST) & IST_ALLOC_INT)) if (!(LREG(uint16_t, B2_IST) & IST_ALLOC_INT)) {
{
/* Failed, Reset MMU */ /* Failed, Reset MMU */
LREG(uint16_t, B2_MMUCR) = MMU_RESET; LREG(uint16_t, B2_MMUCR) = MMU_RESET;
while (LREG(uint16_t, B2_MMUCR) & MMUCR_BUSY); while (LREG(uint16_t, B2_MMUCR) & MMUCR_BUSY);
@ -172,7 +171,7 @@ bool LAN91_receive_frame(uint32_t *buff, uint32_t *size)
} }
/* Pointer Register set to RCV + Auto Increase + Read access /* Pointer Register set to RCV + Auto Increase + Read access
So that Data Register is use RX FIFO*/ So that Data Register is use RX FIFO*/
LREG(uint16_t, B2_PTR) = PTR_RCV | PTR_AUTO_INCR | PTR_READ; LREG(uint16_t, B2_PTR) = PTR_RCV | PTR_AUTO_INCR | PTR_READ;
@ -180,7 +179,7 @@ bool LAN91_receive_frame(uint32_t *buff, uint32_t *size)
val = LREG(uint32_t, B2_DATA); val = LREG(uint32_t, B2_DATA);
State = val & 0xFFFF; State = val & 0xFFFF;
/* Raw Data Size = Total - STATUS WORD - BYTE COUNT - CONTROL BYTE - LAST BYTE */ /* Raw Data Size = Total - STATUS WORD - BYTE COUNT - CONTROL BYTE - LAST BYTE */
RxLen = (val >> 16) - 6; RxLen = (val >> 16) - 6;
/* Check State word if Odd number of bytes in a frame. */ /* Check State word if Odd number of bytes in a frame. */
if (State & RFS_ODDFRM) { if (State & RFS_ODDFRM) {
@ -214,8 +213,7 @@ bool LAN91_receive_frame(uint32_t *buff, uint32_t *size)
void ETHERNET_Handler(void) void ETHERNET_Handler(void)
{ {
LAN91_SelectBank(2); LAN91_SelectBank(2);
if((LREG(uint8_t, B2_IST) & IST_RCV) !=0) if ((LREG(uint8_t, B2_IST) & IST_RCV) != 0) {
{
LREG(uint8_t, B2_MSK) = 0; LREG(uint8_t, B2_MSK) = 0;
/* Callback function. */ /* Callback function. */
if (lan91c111_handle->callback) { if (lan91c111_handle->callback) {
@ -227,12 +225,9 @@ void ETHERNET_Handler(void)
lan91_phy_status_t LAN91_GetLinkStatus(void) lan91_phy_status_t LAN91_GetLinkStatus(void)
{ {
if (read_PHY(0x2u) & 0x4u) if (read_PHY(0x2u) & 0x4u) {
{
return STATE_LINK_UP; return STATE_LINK_UP;
} } else {
else
{
return STATE_LINK_DOWN; return STATE_LINK_DOWN;
} }
} }

54
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/drivers/lan91c111.h
View File

@ -27,7 +27,7 @@ extern "C" {
#include "PeripheralNames.h" #include "PeripheralNames.h"
/* LAN91C111 base address used IO mode. */ /* LAN91C111 base address used IO mode. */
#define ADROFS 0x40200000 #define ADROFS 0x40200000
/* LAN91C111 Ethernet buffer alignment. */ /* LAN91C111 Ethernet buffer alignment. */
#define LAN91_BUFF_ALIGNMENT 16U #define LAN91_BUFF_ALIGNMENT 16U
@ -259,16 +259,14 @@ extern "C" {
* members. Members usually map to interrupt enable bits in one or more * members. Members usually map to interrupt enable bits in one or more
* peripheral registers. * peripheral registers.
*/ */
typedef enum _lan91_phy_status typedef enum _lan91_phy_status {
{
STATE_UNKNOWN = (-1), /* PHY MI Register 18 change status interrupt*/ STATE_UNKNOWN = (-1), /* PHY MI Register 18 change status interrupt*/
STATE_LINK_DOWN = (0), /* EPH Type interrupt */ STATE_LINK_DOWN = (0), /* EPH Type interrupt */
STATE_LINK_UP = (1) /* Receive Overrun interrupt */ STATE_LINK_UP = (1) /* Receive Overrun interrupt */
} lan91_phy_status_t; } lan91_phy_status_t;
/*! @brief Defines the common interrupt event for callback use. */ /*! @brief Defines the common interrupt event for callback use. */
typedef enum _lan91_event typedef enum _lan91_event {
{
LAN91_RxEvent, /*!< Receive event. */ LAN91_RxEvent, /*!< Receive event. */
LAN91_TxEvent, /*!< Transmit event. */ LAN91_TxEvent, /*!< Transmit event. */
LAN91_ErrEvent /*!< Error event: BABR/BABT/EBERR/LC/RL/UN/PLR . */ LAN91_ErrEvent /*!< Error event: BABR/BABT/EBERR/LC/RL/UN/PLR . */
@ -281,12 +279,11 @@ typedef struct _lan91_handle lan91_handle_t;
/*! @brief ENET callback function. */ /*! @brief ENET callback function. */
typedef void (*lan91_callback_t)( lan91_event_t event, void *userData); typedef void (*lan91_callback_t)(lan91_event_t event, void *userData);
/*! @brief Defines the ENET handler structure. */ /*! @brief Defines the ENET handler structure. */
struct _lan91_handle struct _lan91_handle {
{
lan91_callback_t callback; /*!< Callback function. */ lan91_callback_t callback; /*!< Callback function. */
void *userData; /*!< Callback function parameter.*/ void *userData; /*!< Callback function parameter.*/
}; };
@ -297,7 +294,7 @@ struct _lan91_handle
******************************************************************************/ ******************************************************************************/
/** @brief Initialize the Lan91C111 ethernet controller. */ /** @brief Initialize the Lan91C111 ethernet controller. */
void LAN91_init (void); void LAN91_init(void);
/** @brief Read MAC address stored to external EEPROM. */ /** @brief Read MAC address stored to external EEPROM. */
void read_MACaddr(uint8_t *addr); void read_MACaddr(uint8_t *addr);
@ -310,10 +307,10 @@ void read_MACaddr(uint8_t *addr);
void LAN91_SetCallback(lan91_callback_t callback, void *userData); void LAN91_SetCallback(lan91_callback_t callback, void *userData);
/** @brief Send frame from given data buffer to Lan91C111 ethernet controller. */ /** @brief Send frame from given data buffer to Lan91C111 ethernet controller. */
bool LAN91_send_frame (uint32_t *buff, uint32_t *size ); bool LAN91_send_frame(uint32_t *buff, uint32_t *size);
/** @brief Receive frame from Lan91C111 ethernet controller to a given data buffer. */ /** @brief Receive frame from Lan91C111 ethernet controller to a given data buffer. */
bool LAN91_receive_frame (uint32_t *buff, uint32_t *size ); bool LAN91_receive_frame(uint32_t *buff, uint32_t *size);
/** @brief Ethernet interrupt handler. */ /** @brief Ethernet interrupt handler. */
void ETHERNET_Handler(void); void ETHERNET_Handler(void);
@ -322,16 +319,16 @@ void ETHERNET_Handler(void);
lan91_phy_status_t LAN91_GetLinkStatus(void); lan91_phy_status_t LAN91_GetLinkStatus(void);
/** @brief Output a bit value to the MII PHY management interface. */ /** @brief Output a bit value to the MII PHY management interface. */
static void output_MDO (int bit_value); static void output_MDO(int bit_value);
/** @brief Input a bit value from the MII PHY management interface. */ /** @brief Input a bit value from the MII PHY management interface. */
static int input_MDI (void); static int input_MDI(void);
/** @brief Write a data value to PHY register. */ /** @brief Write a data value to PHY register. */
static void write_PHY (uint32_t PhyReg, int Value); static void write_PHY(uint32_t PhyReg, int Value);
/** @brief Read a PHY register. */ /** @brief Read a PHY register. */
static uint16_t read_PHY (uint32_t PhyReg); static uint16_t read_PHY(uint32_t PhyReg);
/******************************************************************************* /*******************************************************************************
@ -341,43 +338,42 @@ static uint16_t read_PHY (uint32_t PhyReg);
/** @brief Select Bank Register of LAN91C111 controller. */ /** @brief Select Bank Register of LAN91C111 controller. */
static inline void LAN91_SelectBank(uint8_t bank) static inline void LAN91_SelectBank(uint8_t bank)
{ {
uint16_t current_bank = ( LREG (uint16_t, BSR) & BSR_MASK ); uint16_t current_bank = (LREG(uint16_t, BSR) & BSR_MASK);
if ( (bank & BSR_MASK) != current_bank ) if ((bank & BSR_MASK) != current_bank) {
{ LREG(uint16_t, BSR) = (bank & BSR_MASK);
LREG (uint16_t, BSR) = (bank & BSR_MASK);
} }
} }
/** @brief Resets the LAN91C111 controller. */ /** @brief Resets the LAN91C111 controller. */
static inline void LAN91_Reset(void) static inline void LAN91_Reset(void)
{ {
LAN91_SelectBank(0); LAN91_SelectBank(0);
LREG (uint16_t, B0_RCR) = RCR_SOFT_RST; LREG(uint16_t, B0_RCR) = RCR_SOFT_RST;
} }
/** @brief Gets the LAN91C111 interrupt status flag. */ /** @brief Gets the LAN91C111 interrupt status flag. */
static inline uint8_t LAN91_GetInterruptStatus(void) static inline uint8_t LAN91_GetInterruptStatus(void)
{ {
LAN91_SelectBank(2); LAN91_SelectBank(2);
return LREG (uint8_t, B2_IST); return LREG(uint8_t, B2_IST);
} }
/** @brief Get FIFO status if RxFIFO is empty. /** @brief Get FIFO status if RxFIFO is empty.
* @return ture for RxFIFO is empty, false for RxFIFO it not empty. */ * @return ture for RxFIFO is empty, false for RxFIFO it not empty. */
static inline bool LAN91_RxFIFOEmpty(void) static inline bool LAN91_RxFIFOEmpty(void)
{ {
LAN91_SelectBank(2); LAN91_SelectBank(2);
return (( LREG(uint8_t, B2_IST) & IST_RCV ) == 0); return ((LREG(uint8_t, B2_IST) & IST_RCV) == 0);
//return (( LREG (uint16_t, B2_FIFO) & FIFO_REMPTY ) == 1); //return (( LREG (uint16_t, B2_FIFO) & FIFO_REMPTY ) == 1);
} }
/** @brief Get FIFO status if TxFIFO is empty. /** @brief Get FIFO status if TxFIFO is empty.
* @return ture for TxFIFO is empty, false for TxFIFO it not empty. */ * @return ture for TxFIFO is empty, false for TxFIFO it not empty. */
static inline bool LAN91_TxFIFOEmpty(void) static inline bool LAN91_TxFIFOEmpty(void)
{ {
LAN91_SelectBank(2); LAN91_SelectBank(2);
return (( LREG(uint8_t, B2_IST) & IST_TX_INT ) == 0); return ((LREG(uint8_t, B2_IST) & IST_TX_INT) == 0);
} }
/** @brief Clears the Ethernet interrupt status flag. */ /** @brief Clears the Ethernet interrupt status flag. */
@ -385,21 +381,21 @@ static inline void LAN91_ClearInterruptMasks(void)
{ {
/* Mask off all interrupts */ /* Mask off all interrupts */
LAN91_SelectBank(2); LAN91_SelectBank(2);
LREG (uint8_t, B2_MSK) = 0; LREG(uint8_t, B2_MSK) = 0;
} }
static inline void LAN91_SetInterruptMasks(const uint8_t mask) static inline void LAN91_SetInterruptMasks(const uint8_t mask)
{ {
/* Mask off all interrupts */ /* Mask off all interrupts */
LAN91_SelectBank(2); LAN91_SelectBank(2);
LREG (uint8_t, B2_MSK) = mask; LREG(uint8_t, B2_MSK) = mask;
} }
static inline uint8_t LAN91_GetInterruptMasks(void) static inline uint8_t LAN91_GetInterruptMasks(void)
{ {
/* Mask off all interrupts */ /* Mask off all interrupts */
LAN91_SelectBank(2); LAN91_SelectBank(2);
return (LREG (uint8_t, B2_MSK)); return (LREG(uint8_t, B2_MSK));
} }
/** @brief Enable Ethernet interrupt handler. */ /** @brief Enable Ethernet interrupt handler. */