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IAR export for LPC11XX and 11CXX

pull/721/head
GustavWi 2014-11-18 15:49:23 +01:00
parent b3656be310
commit d13714fb07
8 changed files with 1629 additions and 4 deletions
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34
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00007FFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x10001FDF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x800;
/**** End of ICF editor section. ###ICF###*/
define symbol __CRP_start__ = 0x000002FC;
define symbol __CRP_end__ = 0x000002FF;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__] - mem:[from __CRP_start__ to __CRP_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };
place in CRP_region { section .crp };

299
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_IAR/TARGET_LPC11CXX/startup_LPC11xx.s Normal file
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/**************************************************
*
* Part one of the system initialization code, contains low-level
* initialization, plain thumb variant.
*
* Copyright 2012 IAR Systems. All rights reserved.
*
* $Revision: 28 $
*
**************************************************/
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
PUBLIC __vector_table_0x1c
DATA
__vector_table
DCD sfe(CSTACK) ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
__vector_table_0x1c
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD SLWU_INT0_IRQHandler ; Start logic wake-up interrupt 0
DCD SLWU_INT1_IRQHandler ; Start logic wake-up interrupt 1
DCD SLWU_INT2_IRQHandler ; Start logic wake-up interrupt 2
DCD SLWU_INT3_IRQHandler ; Start logic wake-up interrupt 3
DCD SLWU_INT4_IRQHandler ; Start logic wake-up interrupt 4
DCD SLWU_INT5_IRQHandler ; Start logic wake-up interrupt 5
DCD SLWU_INT6_IRQHandler ; Start logic wake-up interrupt 6
DCD SLWU_INT7_IRQHandler ; Start logic wake-up interrupt 7
DCD SLWU_INT8_IRQHandler ; Start logic wake-up interrupt 8
DCD SLWU_INT9_IRQHandler ; Start logic wake-up interrupt 9
DCD SLWU_INT10_IRQHandler ; Start logic wake-up interrupt 10
DCD SLWU_INT11_IRQHandler ; Start logic wake-up interrupt 11
DCD SLWU_INT12_IRQHandler ; Start logic wake-up interrupt 12
DCD C_CAN_IRQHandler ; C_CAN
DCD SSP1_IRQHandler ; SSP1
DCD I2C_IRQHandler ; I2C
DCD TIMER16_0_IRQHandler ; 16-bit Timer0
DCD TIMER16_1_IRQHandler ; 16-bit Timer1
DCD TIMER32_0_IRQHandler ; 32-bit Timer0
DCD TIMER32_1_IRQHandler ; 32-bit Timer1
DCD SSP0_IRQHandler ; SSP0
DCD UART_IRQHandler ; UART
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler ; Reserved
DCD ADC_IRQHandler ; A/D Converter
DCD WDT_IRQHandler ; Watchdog timer
DCD BOD_IRQHandler ; Brown Out Detect
DCD Reserved_IRQHandler ; Reserved
DCD PIO_3_IRQHandler ; GPIO interrupt status of port 3
DCD PIO_2_IRQHandler ; GPIO interrupt status of port 2
DCD PIO_1_IRQHandler ; GPIO interrupt status of port 1
DCD PIO_0_IRQHandler ; GPIO interrupt status of port 0
;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:NOROOT:REORDER(2)
Reset_Handler
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
PUBWEAK HardFault_Handler
PUBWEAK SVC_Handler
PUBWEAK PendSV_Handler
PUBWEAK SysTick_Handler
PUBWEAK Reserved_IRQHandler
PUBWEAK SLWU_INT0_IRQHandler
PUBWEAK SLWU_INT1_IRQHandler
PUBWEAK SLWU_INT2_IRQHandler
PUBWEAK SLWU_INT3_IRQHandler
PUBWEAK SLWU_INT4_IRQHandler
PUBWEAK SLWU_INT5_IRQHandler
PUBWEAK SLWU_INT6_IRQHandler
PUBWEAK SLWU_INT7_IRQHandler
PUBWEAK SLWU_INT8_IRQHandler
PUBWEAK SLWU_INT9_IRQHandler
PUBWEAK SLWU_INT10_IRQHandler
PUBWEAK SLWU_INT11_IRQHandler
PUBWEAK SLWU_INT12_IRQHandler
PUBWEAK C_CAN_IRQHandler
PUBWEAK SSP1_IRQHandler
PUBWEAK I2C_IRQHandler
PUBWEAK TIMER16_0_IRQHandler
PUBWEAK TIMER16_1_IRQHandler
PUBWEAK TIMER32_0_IRQHandler
PUBWEAK TIMER32_1_IRQHandler
PUBWEAK SSP0_IRQHandler
PUBWEAK UART_IRQHandler
PUBWEAK ADC_IRQHandler
PUBWEAK WDT_IRQHandler
PUBWEAK BOD_IRQHandler
PUBWEAK PIO_3_IRQHandler
PUBWEAK PIO_2_IRQHandler
PUBWEAK PIO_1_IRQHandler
PUBWEAK PIO_0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
THUMB
NMI_Handler
HardFault_Handler
SVC_Handler
PendSV_Handler
SysTick_Handler
Reserved_IRQHandler
SLWU_INT0_IRQHandler
SLWU_INT1_IRQHandler
SLWU_INT2_IRQHandler
SLWU_INT3_IRQHandler
SLWU_INT4_IRQHandler
SLWU_INT5_IRQHandler
SLWU_INT6_IRQHandler
SLWU_INT7_IRQHandler
SLWU_INT8_IRQHandler
SLWU_INT9_IRQHandler
SLWU_INT10_IRQHandler
SLWU_INT11_IRQHandler
SLWU_INT12_IRQHandler
C_CAN_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
TIMER16_1_IRQHandler
TIMER32_0_IRQHandler
TIMER32_1_IRQHandler
SSP0_IRQHandler
UART_IRQHandler
ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
PIO_3_IRQHandler
PIO_2_IRQHandler
PIO_1_IRQHandler
PIO_0_IRQHandler
Default_Handler
B Default_Handler
SECTION .crp:CODE:ROOT(2)
DATA
/* Code Read Protection
NO_ISP 0x4E697370 - Prevents sampling of pin PIO0_1 for entering ISP mode
CRP1 0x12345678 - Write to RAM command cannot access RAM below 0x10000300.
- Copy RAM to flash command can not write to Sector 0.
- Erase command can erase Sector 0 only when all sectors
are selected for erase.
- Compare command is disabled.
- Read Memory command is disabled.
CRP2 0x87654321 - Read Memory is disabled.
- Write to RAM is disabled.
- "Go" command is disabled.
- Copy RAM to flash is disabled.
- Compare is disabled.
CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
by pulling PIO0_1 LOW is disabled if a valid user code is
present in flash sector 0.
Caution: If CRP3 is selected, no future factory testing can be
performed on the device.
*/
DCD 0xFFFFFFFF
END

34
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf Normal file
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/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00007FFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x10000FDF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
define symbol __CRP_start__ = 0x000002FC;
define symbol __CRP_end__ = 0x000002FF;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__] - mem:[from __CRP_start__ to __CRP_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };
place in CRP_region { section .crp };

299
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_IAR/TARGET_LPC11XX/startup_LPC11xx.s Normal file
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@ -0,0 +1,299 @@
/**************************************************
*
* Part one of the system initialization code, contains low-level
* initialization, plain thumb variant.
*
* Copyright 2012 IAR Systems. All rights reserved.
*
* $Revision: 28 $
*
**************************************************/
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
PUBLIC __vector_table_0x1c
DATA
__vector_table
DCD sfe(CSTACK) ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
__vector_table_0x1c
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD SLWU_INT0_IRQHandler ; Start logic wake-up interrupt 0
DCD SLWU_INT1_IRQHandler ; Start logic wake-up interrupt 1
DCD SLWU_INT2_IRQHandler ; Start logic wake-up interrupt 2
DCD SLWU_INT3_IRQHandler ; Start logic wake-up interrupt 3
DCD SLWU_INT4_IRQHandler ; Start logic wake-up interrupt 4
DCD SLWU_INT5_IRQHandler ; Start logic wake-up interrupt 5
DCD SLWU_INT6_IRQHandler ; Start logic wake-up interrupt 6
DCD SLWU_INT7_IRQHandler ; Start logic wake-up interrupt 7
DCD SLWU_INT8_IRQHandler ; Start logic wake-up interrupt 8
DCD SLWU_INT9_IRQHandler ; Start logic wake-up interrupt 9
DCD SLWU_INT10_IRQHandler ; Start logic wake-up interrupt 10
DCD SLWU_INT11_IRQHandler ; Start logic wake-up interrupt 11
DCD SLWU_INT12_IRQHandler ; Start logic wake-up interrupt 12
DCD C_CAN_IRQHandler ; C_CAN
DCD SSP1_IRQHandler ; SSP1
DCD I2C_IRQHandler ; I2C
DCD TIMER16_0_IRQHandler ; 16-bit Timer0
DCD TIMER16_1_IRQHandler ; 16-bit Timer1
DCD TIMER32_0_IRQHandler ; 32-bit Timer0
DCD TIMER32_1_IRQHandler ; 32-bit Timer1
DCD SSP0_IRQHandler ; SSP0
DCD UART_IRQHandler ; UART
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler ; Reserved
DCD ADC_IRQHandler ; A/D Converter
DCD WDT_IRQHandler ; Watchdog timer
DCD BOD_IRQHandler ; Brown Out Detect
DCD Reserved_IRQHandler ; Reserved
DCD PIO_3_IRQHandler ; GPIO interrupt status of port 3
DCD PIO_2_IRQHandler ; GPIO interrupt status of port 2
DCD PIO_1_IRQHandler ; GPIO interrupt status of port 1
DCD PIO_0_IRQHandler ; GPIO interrupt status of port 0
;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:NOROOT:REORDER(2)
Reset_Handler
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
PUBWEAK HardFault_Handler
PUBWEAK SVC_Handler
PUBWEAK PendSV_Handler
PUBWEAK SysTick_Handler
PUBWEAK Reserved_IRQHandler
PUBWEAK SLWU_INT0_IRQHandler
PUBWEAK SLWU_INT1_IRQHandler
PUBWEAK SLWU_INT2_IRQHandler
PUBWEAK SLWU_INT3_IRQHandler
PUBWEAK SLWU_INT4_IRQHandler
PUBWEAK SLWU_INT5_IRQHandler
PUBWEAK SLWU_INT6_IRQHandler
PUBWEAK SLWU_INT7_IRQHandler
PUBWEAK SLWU_INT8_IRQHandler
PUBWEAK SLWU_INT9_IRQHandler
PUBWEAK SLWU_INT10_IRQHandler
PUBWEAK SLWU_INT11_IRQHandler
PUBWEAK SLWU_INT12_IRQHandler
PUBWEAK C_CAN_IRQHandler
PUBWEAK SSP1_IRQHandler
PUBWEAK I2C_IRQHandler
PUBWEAK TIMER16_0_IRQHandler
PUBWEAK TIMER16_1_IRQHandler
PUBWEAK TIMER32_0_IRQHandler
PUBWEAK TIMER32_1_IRQHandler
PUBWEAK SSP0_IRQHandler
PUBWEAK UART_IRQHandler
PUBWEAK ADC_IRQHandler
PUBWEAK WDT_IRQHandler
PUBWEAK BOD_IRQHandler
PUBWEAK PIO_3_IRQHandler
PUBWEAK PIO_2_IRQHandler
PUBWEAK PIO_1_IRQHandler
PUBWEAK PIO_0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
THUMB
NMI_Handler
HardFault_Handler
SVC_Handler
PendSV_Handler
SysTick_Handler
Reserved_IRQHandler
SLWU_INT0_IRQHandler
SLWU_INT1_IRQHandler
SLWU_INT2_IRQHandler
SLWU_INT3_IRQHandler
SLWU_INT4_IRQHandler
SLWU_INT5_IRQHandler
SLWU_INT6_IRQHandler
SLWU_INT7_IRQHandler
SLWU_INT8_IRQHandler
SLWU_INT9_IRQHandler
SLWU_INT10_IRQHandler
SLWU_INT11_IRQHandler
SLWU_INT12_IRQHandler
C_CAN_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
TIMER16_1_IRQHandler
TIMER32_0_IRQHandler
TIMER32_1_IRQHandler
SSP0_IRQHandler
UART_IRQHandler
ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
PIO_3_IRQHandler
PIO_2_IRQHandler
PIO_1_IRQHandler
PIO_0_IRQHandler
Default_Handler
B Default_Handler
SECTION .crp:CODE:ROOT(2)
DATA
/* Code Read Protection
NO_ISP 0x4E697370 - Prevents sampling of pin PIO0_1 for entering ISP mode
CRP1 0x12345678 - Write to RAM command cannot access RAM below 0x10000300.
- Copy RAM to flash command can not write to Sector 0.
- Erase command can erase Sector 0 only when all sectors
are selected for erase.
- Compare command is disabled.
- Read Memory command is disabled.
CRP2 0x87654321 - Read Memory is disabled.
- Write to RAM is disabled.
- "Go" command is disabled.
- Copy RAM to flash is disabled.
- Compare is disabled.
CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
by pulling PIO0_1 LOW is disabled if a valid user code is
present in flash sector 0.
Caution: If CRP3 is selected, no future factory testing can be
performed on the device.
*/
DCD 0xFFFFFFFF
END

2
workspace_tools/build_release.py
View File

@ -37,7 +37,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
('SSCI824', ('uARM',)),
('LPC1347', ('ARM','IAR')),
('LPC4088', ('ARM', 'GCC_ARM', 'GCC_CR')),
('LPC1114', ('uARM','GCC_ARM')),
('LPC1114', ('uARM','GCC_ARM', 'IAR')),
('LPC11U35_401', ('ARM', 'uARM','GCC_ARM','GCC_CR', 'IAR')),
('LPC11U35_501', ('ARM', 'uARM','GCC_ARM','GCC_CR', 'IAR')),
('LPC1549', ('uARM','GCC_ARM','GCC_CR')),

3
workspace_tools/export/iar.py
View File

@ -27,7 +27,8 @@ class IAREmbeddedWorkbench(Exporter):
'LPC11U24',
'LPC11U35_401',
'LPC11U35_501',
'LPCCAPPUCCINO',
'LPCCAPPUCCINO',
'LPC1114',
'UBLOX_C027',
'ARCH_PRO',
'K20D50M',

958
workspace_tools/export/iar_lpc1114.ewp.tmpl Normal file
View File

@ -0,0 +1,958 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<project>
<fileVersion>2</fileVersion>
<configuration>
<name>Debug</name>
<toolchain>
<name>ARM</name>
</toolchain>
<debug>1</debug>
<settings>
<name>General</name>
<archiveVersion>3</archiveVersion>
<data>
<version>22</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>ExePath</name>
<state>Debug\Exe</state>
</option>
<option>
<name>ObjPath</name>
<state>Debug\Obj</state>
</option>
<option>
<name>ListPath</name>
<state>Debug\List</state>
</option>
<option>
<name>Variant</name>
<version>20</version>
<state>34</state>
</option>
<option>
<name>GEndianMode</name>
<state>0</state>
</option>
<option>
<name>Input variant</name>
<version>3</version>
<state>1</state>
</option>
<option>
<name>Input description</name>
<state>Full formatting.</state>
</option>
<option>
<name>Output variant</name>
<version>2</version>
<state>1</state>
</option>
<option>
<name>Output description</name>
<state>Full formatting.</state>
</option>
<option>
<name>GOutputBinary</name>
<state>0</state>
</option>
<option>
<name>FPU</name>
<version>2</version>
<state>0</state>
</option>
<option>
<name>OGCoreOrChip</name>
<state>1</state>
</option>
<option>
<name>GRuntimeLibSelect</name>
<version>0</version>
<state>2</state>
</option>
<option>
<name>GRuntimeLibSelectSlave</name>
<version>0</version>
<state>2</state>
</option>
<option>
<name>RTDescription</name>
<state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
</option>
<option>
<name>OGProductVersion</name>
<state>7.10.1.6733</state>
</option>
<option>
<name>OGLastSavedByProductVersion</name>
<state>7.10.1.6733</state>
</option>
<option>
<name>GeneralEnableMisra</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraVerbose</name>
<state>0</state>
</option>
<option>
<name>OGChipSelectEditMenu</name>
<state>LPC1114FN28_102 NXP LPC1114FN28_102</state>
</option>
<option>
<name>GenLowLevelInterface</name>
<state>1</state>
</option>
<option>
<name>GEndianModeBE</name>
<state>1</state>
</option>
<option>
<name>OGBufferedTerminalOutput</name>
<state>0</state>
</option>
<option>
<name>GenStdoutInterface</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraRules98</name>
<version>0</version>
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
</option>
<option>
<name>GeneralMisraVer</name>
<state>0</state>
</option>
<option>
<name>GeneralMisraRules04</name>
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>RTConfigPath2</name>
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
</option>
<option>
<name>GFPUCoreSlave</name>
<version>20</version>
<state>34</state>
</option>
<option>
<name>GBECoreSlave</name>
<version>20</version>
<state>34</state>
</option>
<option>
<name>OGUseCmsis</name>
<state>0</state>
</option>
<option>
<name>OGUseCmsisDspLib</name>
<state>0</state>
</option>
<option>
<name>GRuntimeLibThreads</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>ICCARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>30</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>CCDefines</name>
{% for s in symbols %}
<state>{{s}}</state>
{% endfor %}
</option>
<option>
<name>CCPreprocFile</name>
<state>0</state>
</option>
<option>
<name>CCPreprocComments</name>
<state>0</state>
</option>
<option>
<name>CCPreprocLine</name>
<state>0</state>
</option>
<option>
<name>CCListCFile</name>
<state>0</state>
</option>
<option>
<name>CCListCMnemonics</name>
<state>0</state>
</option>
<option>
<name>CCListCMessages</name>
<state>0</state>
</option>
<option>
<name>CCListAssFile</name>
<state>1</state>
</option>
<option>
<name>CCListAssSource</name>
<state>0</state>
</option>
<option>
<name>CCEnableRemarks</name>
<state>0</state>
</option>
<option>
<name>CCDiagSuppress</name>
<state>Pa050,Pa084,Pa093,Pa082</state>
</option>
<option>
<name>CCDiagRemark</name>
<state></state>
</option>
<option>
<name>CCDiagWarning</name>
<state></state>
</option>
<option>
<name>CCDiagError</name>
<state></state>
</option>
<option>
<name>CCObjPrefix</name>
<state>1</state>
</option>
<option>
<name>CCAllowList</name>
<version>1</version>
<state>00000000</state>
</option>
<option>
<name>CCDebugInfo</name>
<state>1</state>
</option>
<option>
<name>IEndianMode</name>
<state>1</state>
</option>
<option>
<name>IProcessor</name>
<state>1</state>
</option>
<option>
<name>IExtraOptionsCheck</name>
<state>0</state>
</option>
<option>
<name>IExtraOptions</name>
<state></state>
</option>
<option>
<name>CCLangConformance</name>
<state>0</state>
</option>
<option>
<name>CCSignedPlainChar</name>
<state>1</state>
</option>
<option>
<name>CCRequirePrototypes</name>
<state>0</state>
</option>
<option>
<name>CCMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>CCDiagWarnAreErr</name>
<state>0</state>
</option>
<option>
<name>CCCompilerRuntimeInfo</name>
<state>0</state>
</option>
<option>
<name>IFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>OutputFile</name>
<state>$FILE_BNAME$.o</state>
</option>
<option>
<name>CCLibConfigHeader</name>
<state>1</state>
</option>
<option>
<name>PreInclude</name>
<state></state>
</option>
<option>
<name>CompilerMisraOverride</name>
<state>0</state>
</option>
<option>
<name>CCIncludePath2</name>
{% for path in include_paths %}
<state>$PROJ_DIR$\{{path}}</state>
{% endfor %}
</option>
<option>
<name>CCStdIncCheck</name>
<state>0</state>
</option>
<option>
<name>CCCodeSection</name>
<state>.text</state>
</option>
<option>
<name>IInterwork2</name>
<state>0</state>
</option>
<option>
<name>IProcessorMode2</name>
<state>1</state>
</option>
<option>
<name>CCOptLevel</name>
<state>0</state>
</option>
<option>
<name>CCOptStrategy</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CCOptLevelSlave</name>
<state>0</state>
</option>
<option>
<name>CompilerMisraRules98</name>
<version>0</version>
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
</option>
<option>
<name>CompilerMisraRules04</name>
<version>0</version>
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
</option>
<option>
<name>CCPosIndRopi</name>
<state>0</state>
</option>
<option>
<name>CCPosIndRwpi</name>
<state>0</state>
</option>
<option>
<name>CCPosIndNoDynInit</name>
<state>0</state>
</option>
<option>
<name>IccLang</name>
<state>1</state>
</option>
<option>
<name>IccCDialect</name>
<state>1</state>
</option>
<option>
<name>IccAllowVLA</name>
<state>0</state>
</option>
<option>
<name>IccCppDialect</name>
<state>2</state>
</option>
<option>
<name>IccExceptions</name>
<state>0</state>
</option>
<option>
<name>IccRTTI</name>
<state>0</state>
</option>
<option>
<name>IccStaticDestr</name>
<state>1</state>
</option>
<option>
<name>IccCppInlineSemantics</name>
<state>0</state>
</option>
<option>
<name>IccCmsis</name>
<state>1</state>
</option>
<option>
<name>IccFloatSemantics</name>
<state>0</state>
</option>
<option>
<name>CCOptimizationNoSizeConstraints</name>
<state>0</state>
</option>
<option>
<name>CCNoLiteralPool</name>
<state>0</state>
</option>
<option>
<name>CCOptStrategySlave</name>
<version>0</version>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>AARM</name>
<archiveVersion>2</archiveVersion>
<data>
<version>9</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>AObjPrefix</name>
<state>1</state>
</option>
<option>
<name>AEndian</name>
<state>1</state>
</option>
<option>
<name>ACaseSensitivity</name>
<state>1</state>
</option>
<option>
<name>MacroChars</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>AWarnEnable</name>
<state>0</state>
</option>
<option>
<name>AWarnWhat</name>
<state>0</state>
</option>
<option>
<name>AWarnOne</name>
<state></state>
</option>
<option>
<name>AWarnRange1</name>
<state></state>
</option>
<option>
<name>AWarnRange2</name>
<state></state>
</option>
<option>
<name>ADebug</name>
<state>1</state>
</option>
<option>
<name>AltRegisterNames</name>
<state>0</state>
</option>
<option>
<name>ADefines</name>
<state></state>
</option>
<option>
<name>AList</name>
<state>0</state>
</option>
<option>
<name>AListHeader</name>
<state>1</state>
</option>
<option>
<name>AListing</name>
<state>1</state>
</option>
<option>
<name>Includes</name>
<state>0</state>
</option>
<option>
<name>MacDefs</name>
<state>0</state>
</option>
<option>
<name>MacExps</name>
<state>1</state>
</option>
<option>
<name>MacExec</name>
<state>0</state>
</option>
<option>
<name>OnlyAssed</name>
<state>0</state>
</option>
<option>
<name>MultiLine</name>
<state>0</state>
</option>
<option>
<name>PageLengthCheck</name>
<state>0</state>
</option>
<option>
<name>PageLength</name>
<state>80</state>
</option>
<option>
<name>TabSpacing</name>
<state>8</state>
</option>
<option>
<name>AXRef</name>
<state>0</state>
</option>
<option>
<name>AXRefDefines</name>
<state>0</state>
</option>
<option>
<name>AXRefInternal</name>
<state>0</state>
</option>
<option>
<name>AXRefDual</name>
<state>0</state>
</option>
<option>
<name>AProcessor</name>
<state>1</state>
</option>
<option>
<name>AFpuProcessor</name>
<state>1</state>
</option>
<option>
<name>AOutputFile</name>
<state>$FILE_BNAME$.o</state>
</option>
<option>
<name>AMultibyteSupport</name>
<state>0</state>
</option>
<option>
<name>ALimitErrorsCheck</name>
<state>0</state>
</option>
<option>
<name>ALimitErrorsEdit</name>
<state>100</state>
</option>
<option>
<name>AIgnoreStdInclude</name>
<state>0</state>
</option>
<option>
<name>AUserIncludes</name>
<state></state>
</option>
<option>
<name>AExtraOptionsCheckV2</name>
<state>0</state>
</option>
<option>
<name>AExtraOptionsV2</name>
<state></state>
</option>
<option>
<name>AsmNoLiteralPool</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>OBJCOPY</name>
<archiveVersion>0</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>OOCOutputFormat</name>
<version>2</version>
<state>2</state>
</option>
<option>
<name>OCOutputOverride</name>
<state>0</state>
</option>
<option>
<name>OOCOutputFile</name>
<state>{{name}}.bin</state>
</option>
<option>
<name>OOCCommandLineProducer</name>
<state>1</state>
</option>
<option>
<name>OOCObjCopyEnable</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>CUSTOM</name>
<archiveVersion>3</archiveVersion>
<data>
<extensions></extensions>
<cmdline></cmdline>
</data>
</settings>
<settings>
<name>BICOMP</name>
<archiveVersion>0</archiveVersion>
<data/>
</settings>
<settings>
<name>BUILDACTION</name>
<archiveVersion>1</archiveVersion>
<data>
<prebuild></prebuild>
<postbuild></postbuild>
</data>
</settings>
<settings>
<name>ILINK</name>
<archiveVersion>0</archiveVersion>
<data>
<version>16</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>IlinkLibIOConfig</name>
<state>1</state>
</option>
<option>
<name>XLinkMisraHandler</name>
<state>0</state>
</option>
<option>
<name>IlinkInputFileSlave</name>
<state>0</state>
</option>
<option>
<name>IlinkOutputFile</name>
<state>{{name}}.out</state>
</option>
<option>
<name>IlinkDebugInfoEnable</name>
<state>1</state>
</option>
<option>
<name>IlinkKeepSymbols</name>
<state></state>
</option>
<option>
<name>IlinkRawBinaryFile</name>
<state></state>
</option>
<option>
<name>IlinkRawBinarySymbol</name>
<state></state>
</option>
<option>
<name>IlinkRawBinarySegment</name>
<state></state>
</option>
<option>
<name>IlinkRawBinaryAlign</name>
<state></state>
</option>
<option>
<name>IlinkDefines</name>
<state></state>
</option>
<option>
<name>IlinkConfigDefines</name>
<state></state>
</option>
<option>
<name>IlinkMapFile</name>
<state>0</state>
</option>
<option>
<name>IlinkLogFile</name>
<state>0</state>
</option>
<option>
<name>IlinkLogInitialization</name>
<state>0</state>
</option>
<option>
<name>IlinkLogModule</name>
<state>0</state>
</option>
<option>
<name>IlinkLogSection</name>
<state>0</state>
</option>
<option>
<name>IlinkLogVeneer</name>
<state>0</state>
</option>
<option>
<name>IlinkIcfOverride</name>
<state>0</state>
</option>
<option>
<name>IlinkIcfFile</name>
<state>$TOOLKIT_DIR$\config\linker\NXP\LPC11U24FBD64_401.icf</state>
</option>
<option>
<name>IlinkIcfFileSlave</name>
<state></state>
</option>
<option>
<name>IlinkEnableRemarks</name>
<state>0</state>
</option>
<option>
<name>IlinkSuppressDiags</name>
<state></state>
</option>
<option>
<name>IlinkTreatAsRem</name>
<state></state>
</option>
<option>
<name>IlinkTreatAsWarn</name>
<state></state>
</option>
<option>
<name>IlinkTreatAsErr</name>
<state></state>
</option>
<option>
<name>IlinkWarningsAreErrors</name>
<state>0</state>
</option>
<option>
<name>IlinkUseExtraOptions</name>
<state>0</state>
</option>
<option>
<name>IlinkExtraOptions</name>
<state></state>
</option>
<option>
<name>IlinkLowLevelInterfaceSlave</name>
<state>1</state>
</option>
<option>
<name>IlinkAutoLibEnable</name>
<state>1</state>
</option>
<option>
<name>IlinkAdditionalLibs</name>
{% for library in libraries %}
<state>$PROJ_DIR$\{{library}}</state>
{% endfor %}
{% for object in object_files %}
<state>$PROJ_DIR$\{{object}}</state>
{% endfor %}
</option>
<option>
<name>IlinkOverrideProgramEntryLabel</name>
<state>0</state>
</option>
<option>
<name>IlinkProgramEntryLabelSelect</name>
<state>0</state>
</option>
<option>
<name>IlinkProgramEntryLabel</name>
<state>__iar_program_start</state>
</option>
<option>
<name>DoFill</name>
<state>0</state>
</option>
<option>
<name>FillerByte</name>
<state>0xFF</state>
</option>
<option>
<name>FillerStart</name>
<state>0x0</state>
</option>
<option>
<name>FillerEnd</name>
<state>0x0</state>
</option>
<option>
<name>CrcSize</name>
<version>0</version>
<state>1</state>
</option>
<option>
<name>CrcAlign</name>
<state>1</state>
</option>
<option>
<name>CrcPoly</name>
<state>0x11021</state>
</option>
<option>
<name>CrcCompl</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CrcBitOrder</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>CrcInitialValue</name>
<state>0x0</state>
</option>
<option>
<name>DoCrc</name>
<state>0</state>
</option>
<option>
<name>IlinkBE8Slave</name>
<state>1</state>
</option>
<option>
<name>IlinkBufferedTerminalOutput</name>
<state>1</state>
</option>
<option>
<name>IlinkStdoutInterfaceSlave</name>
<state>1</state>
</option>
<option>
<name>CrcFullSize</name>
<state>0</state>
</option>
<option>
<name>IlinkIElfToolPostProcess</name>
<state>0</state>
</option>
<option>
<name>IlinkLogAutoLibSelect</name>
<state>0</state>
</option>
<option>
<name>IlinkLogRedirSymbols</name>
<state>0</state>
</option>
<option>
<name>IlinkLogUnusedFragments</name>
<state>0</state>
</option>
<option>
<name>IlinkCrcReverseByteOrder</name>
<state>0</state>
</option>
<option>
<name>IlinkCrcUseAsInput</name>
<state>1</state>
</option>
<option>
<name>IlinkOptInline</name>
<state>0</state>
</option>
<option>
<name>IlinkOptExceptionsAllow</name>
<state>1</state>
</option>
<option>
<name>IlinkOptExceptionsForce</name>
<state>0</state>
</option>
<option>
<name>IlinkCmsis</name>
<state>1</state>
</option>
<option>
<name>IlinkOptMergeDuplSections</name>
<state>0</state>
</option>
<option>
<name>IlinkOptUseVfe</name>
<state>1</state>
</option>
<option>
<name>IlinkOptForceVfe</name>
<state>0</state>
</option>
<option>
<name>IlinkStackAnalysisEnable</name>
<state>0</state>
</option>
<option>
<name>IlinkStackControlFile</name>
<state></state>
</option>
<option>
<name>IlinkStackCallGraphFile</name>
<state></state>
</option>
<option>
<name>CrcAlgorithm</name>
<version>0</version>
<state>1</state>
</option>
<option>
<name>CrcUnitSize</name>
<version>0</version>
<state>0</state>
</option>
<option>
<name>IlinkThreadsSlave</name>
<state>1</state>
</option>
</data>
</settings>
<settings>
<name>IARCHIVE</name>
<archiveVersion>0</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>IarchiveInputs</name>
<state></state>
</option>
<option>
<name>IarchiveOverride</name>
<state>0</state>
</option>
<option>
<name>IarchiveOutput</name>
<state>###Unitialized###</state>
</option>
</data>
</settings>
<settings>
<name>BILINK</name>
<archiveVersion>0</archiveVersion>
<data/>
</settings>
</configuration>
{% for files in source_files %}
<file>
<name>$PROJ_DIR$\{{files}}</name>
</file>
{% endfor %}
</project>

4
workspace_tools/targets.py
View File

@ -84,14 +84,14 @@ class LPC11C24(LPCTarget):
LPCTarget.__init__(self)
self.core = "Cortex-M0"
self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11CXX']
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
class LPC1114(LPCTarget):
def __init__(self):
LPCTarget.__init__(self)
self.core = "Cortex-M0"
self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11XX']
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR"]
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"]
self.default_toolchain = "uARM"
class LPC11U24(LPCTarget):