diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.html b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.html deleted file mode 100644 index d19459b6ce..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.html +++ /dev/null @@ -1,1133 +0,0 @@ - - - - - - -Release Notes for STM32L0xx HAL Drivers - - - - - - - - -
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Back to Release page

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Release -Notes for STM32L0xx HAL Drivers

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Copyright -2014 STMicroelectronics

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Update History

V1.1.0 -/ 18-June-2014

Main -Changes

-
  • - - - - - - - -

    HAL generic update

    -
  • -
      -
    • Fix flag clear procedure: use atomic write operation "=" instead of ready-modify-write operation "|=" or "&="
    • -
    • Fix -on Timeout management, Timeout value set to 0 passed to API -automatically exits the function after checking the flag without any -wait
      -
    • -
    • Common update for the following communication peripherals: SPI, UART, USART and IRDA
    • -
        -
      • Add DMA circular mode support
        -
      • -
      -
        -
      • Remove lock from recursive process
        -
      • -
      -
    • Add -new macro __HAL_RESET_HANDLE_STATE to reset a given handle state
    • -
    -
      -
    • When USE_RTOS == 1 (in stm32l0xx_hal_conf.h), the __HAL_LOCK() is not defined instead of being defined empty
    • -
    • Use “__IO const” instead of -“__I”, to avoid any compilation issue when __cplusplus switch is defined
    • -
    • Add new functions for the DBGMCU module
    • -
        -
      • HAL_EnableDBGSleepMode()
      • -
      • HAL_DisableDBGSleepMode()
      • -
      • HAL_EnableDBGStopMode()
      • -
      • HAL_DisableDBGStopMode()
      • -
      • HAL_EnableDBGStandbyMode()
      • -
      • HAL_DisableDBGStandbyMode()
      • -
      -
    • Miscellaneous comments update
    • -
    -
  • - -

    HAL FLASH update

    - - - - - -
    • Add -new functions: HAL_FLASHEx_OB_SelectPCROP() and HAL_FLASHEx_OB_DeSelectPCROP()
    • -
    • Some functions was renamed and moved to the extension files (stm32l0xx_hal_flash_ex.h/.c)
      -
    • -
        -
      • Rename - FLASH_HalfPageProgram() into HAL_FLASHEx_HalfPageProgram()
      • -
      -
        -
      • Rename - FLASH_EnableRunPowerDown() into HAL_FLASHEx_EnableRunPowerDown()
      • -
      -
        -
      • Rename - FLASH_DisableRunPowerDown() into HAL_FLASHEx_DisableRunPowerDown()
      • -
      -
        -
      • Rename -all HAL_DATA_EEPROMEx_xxx() functions into HAL_FLASHEx_DATAEEPROM_xxx()
      • -
      -
        -
      • Note: aliases has been added to keep compatibility with previous version
      • -
      -

    -
  • -
  • HAL GPIO update
  • -
      -
    • Remove - IS_GET_GPIO_PIN macro
    • -
    • Add -a new function HAL_GPIO_LockPin()
    • -
    • Private Macro __HAL_GET_GPIO_SOURCE renamed into GET_GPIO_SOURCE
      -
    • -
    -
  • -

    HAL DMA update

    -
  • -
      -
    • Fix in HAL_DMA_PollForTransfer() to set error code HAL_DMA_ERROR_TE in case of HAL_ERROR status
    • -
    -

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    -
  • HAL PWR update
    -
  • -
      -
    • HAL_PWR_PVDConfig(): add clear of the EXTI trigger before new configuration
      -
    • -
    • Fix in HAL_PWR_EnterSTANDBYMode() to not clear Wakeup flag (WUF), which need to be cleared at application level before to call this function
      -
    • -
    -
  • -

    HAL RCC update

    -
  • -
      -
    • Allow to calibrate the HSI when it is used as system clock source
      -
    • -
    • Fix implementation of IS_RCC_OSCILLATORTYPE() macro
      -
    • -
    -
  • -

    HAL ADC update

    -
  • -
      -
    • Update ADC internal channels mapping: TEMPSENSOR connected to ADC_CHANNEL_18 and VLCD mapped to ADC_CHANNEL_16
      -
    • -
    • Skip polling for ADRDY flag when Low Power Auto Off mode is enabled
      -
    • -
    -
  • -

    HAL COMP update

    -
    • Add - LPTIMConnection field in the COMP_InitTypeDef structure.
    • Add -new defines: COMP_LPTIMCONNECTION_DISABLED, COMP_LPTIMCONNECTION_ENABLED
    • Add -new macro IS_COMP_LPTIMCONNECTION
  • -
  • -

    HAL LPTIM update

    - -
  • -
      -
    • Add - CKPOL configuration for encoder mode
    • -
    -
  • -

    HAL WWDG update

    - -
  • -
      -
    • Miscellaneous minor update on the source code
    • -
    -
  • -

    HAL IWDG update

    - -
  • -
      -
    • Miscellaneous minor update on the source code
    • -
    -
  • -

    HAL CRC update

    -
    • Some functions was renamed and moved to the extension files (stm32l0xx_hal_crc_ex.h/.c)
    • -
        -
      • HAL_CRC_Input_Data_Reverse() renamed into HAL_CRCEx_Input_Data_Reverse()
      • -
      -
        -
      • HAL_CRC_Output_Data_Reverse() renamed into HAL_CRCEx_Output_Data_Reverse()
      • -
      -
        -
      • Note: aliases has been added to keep compatibility with previous version
      • -
      -
  • -
  • - - - -

    HAL CRYP update

      -
    • HAL_CRYP_ComputationCpltCallback() renamed into HAL_CRYPEx_ComputationCpltCallback() and moved to the extension files (stm32l0xx_hal_cryp_ex.h/.c)
    • -
    • Note: alias has been added to keep compatibility with previous version
    • -
  • -
  • -

    HAL I2C update

    -
  • -
      -
    • Add -management of NACK event in Master transmitter mode and Slave -transmitter/receiver modes (only in polling mode), in that case the -current transfer is stopped.
    • -
    -
  • -

    HAL SMBUS update

    - - - - - - - - - - - -
  • -
      -
    • Add -a new function: HAL_SMBUS_DisableListen_IT()
      -
    • -
    • Add aliases for the following functions
      -
    • -
        -
      • #define -HAL_SMBUS_Slave_Listen_IT             -HAL_SMBUS_EnableListen_IT
      • -
      • #define HAL_SMBUS_SlaveAddrCallback         HAL_SMBUS_AddrCallback
      • -
      • #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
      • -
      -
    • Add alias HAL_SMBUS_STATE_SLAVE_LISTEN for the constant HAL_SMBUS_STATE_LISTEN
    • -
    -
  • -

    HAL UART update

    - - - - -
      -
    • HAL_UART_WakeupCallback() renamed into HAL_UART_WakeupCallback() and moved to the extension files (stm32l0xx_hal_cryp_ex.h/.c)
    • -
    • Add -new macros to control CTS and RTS
      -
    • -
    • Add specific macros to manage the - flags cleared only by a software sequence
    • -
        -
      • __HAL_UART_CLEAR_PEFLAG()
      • -
      -
        -
      • __HAL_UART_CLEAR_FEFLAG()
      • -
      -
        -
      • __HAL_UART_CLEAR_NEFLAG()
      • -
      -
        -
      • __HAL_UART_CLEAR_OREFLAG()
      • -
      • __HAL_UART_CLEAR_IDLEFLAG()
      • -
      -
    • Add several enhancements without - affecting the driver functionalities
    • -
        -
      • Remove the check on RXNE set - after reading the Data in the DR register
      • -
      -
        -
      • Update the transmit processes to - use TXE instead of TC
      • -
      • Update HAL_UART_Transmit_IT() to enable UART_IT_TXE instead of UART_IT_TC
      • -
      -
    -
  • -
  • - - - - - - - -

    HAL USART update

  • -
      -
    • Add specific macros to manage the - flags cleared only by a software sequence
    • -
        -
      • __HAL_USART_CLEAR_PEFLAG()
      • -
      -
        -
      • __HAL_USART_CLEAR_FEFLAG()
      • -
      -
        -
      • __HAL_USART_CLEAR_NEFLAG()
      • -
      -
        -
      • __HAL_USART_CLEAR_OREFLAG()
      • -
      -
        -
      • __HAL_USART_CLEAR_IDLEFLAG()
      • -
      -
    • Update HAL_USART_Transmit_IT() to enable USART_IT_TXE instead of USART_IT_TC
    • -
    -
  • -

    HAL IRDA update

    -
      -
    • Add specific macros to manage the - flags cleared only by a software sequence
    • -
        -
      • __HAL_IRDA_CLEAR_PEFLAG()
      • __HAL_ IRDA _CLEAR_FEFLAG()
      • __HAL_ IRDA _CLEAR_NEFLAG()
      • __HAL_ IRDA _CLEAR_OREFLAG()
      • __HAL_ IRDA _CLEAR_IDLEFLAG()
      • -
      -
    • Add several enhancements without - affecting the driver functionalities
    • -
        -
      • Remove the check on RXNE set - after reading the Data in the DR register
        -
      • -
      • Update HAL_IRDA_Transmit_IT() to enable IRDA_IT_TXE instead of IRDA_IT_TC
      • -
      -
    • Add the following APIs used within - DMA process
    • -
        -
      • HAL_StatusTypeDef - HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
      • -
      -
        -
      • HAL_StatusTypeDef - HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
      • -
      • HAL_StatusTypeDef - HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
      • -
      • void - HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
      • -
      • void - HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
      • -
      -
  • -
  • - - - - - - - -

    HAL SMARTCARD update

  • -
      -
    • Add specific macros to manage the - flags cleared only by a software sequence
    • -
        -
      • __HAL_SMARTCARD_CLEAR_PEFLAG()
      • -
      -
        -
      • __HAL_SMARTCARD_CLEAR_FEFLAG()
      • -
      -
        -
      • __HAL_SMARTCARD_CLEAR_NEFLAG()
      • -
      -
        -
      • __HAL_SMARTCARD_CLEAR_OREFLAG()
      • -
      -
        -
      • __HAL_SMARTCARD_CLEAR_IDLEFLAG()
      • -
      -
    • Add several enhancements without - affecting the driver functionalities
    • -
        -
      • Add a new state - HAL_SMARTCARD_STATE_BUSY_TX_RX and all processes has been updated - accordingly
      • -
      -
        -
      • Update HAL_SMARTCARD_Transmit_IT() to enable SMARTCARD_IT_TXE instead of SMARTCARD_IT_TC
      • -
      -
    -
-
-
-
    -
  • HAL SPI update
  • -
      -
    • Bugs fix
    • -
        -
      • SPI interface is used in synchronous polling mode: at high clock rates like SPI prescaler 2 and 4, calling
        -HAL_SPI_TransmitReceive() returns with error HAL_TIMEOUT
      • -
      • HAL_SPI_TransmitReceive_DMA() does not clean up the TX DMA, so any subsequent SPI calls return the DMA error
      • -
      • HAL_SPI_Transmit_DMA() is failing when data size is equal to 1 byte
      • -
      -
    • Add the following APIs used within the DMA process
    • -
    -
      -
      • HAL_StatusTypeDef - HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
      • HAL_StatusTypeDef - HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
      • HAL_StatusTypeDef - HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
      • void - HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
      • void - HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
      • void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef - *hspi);
      -
    -
  • -

    HAL TSC update

    -
  • -
      -
    • -

      Fix value of the constant TSC_ACQ_MODE_SYNCHRO

      -
    • -
    -
  • -

    HAL PCD update

    -
  • -
      -
    • -

      Add new macro __HAL_USB_EXTI_GENERATE_SWIT()

      -
    • -
    -
-

V1.0.0 -/ 22-April-2014

Main -Changes

-First official release.
- - -

License

-
-
Redistribution -and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met:
-
-
    -
  1. Redistributions -of source code must retain the above copyright notice, this list of -conditions and the following disclaimer.
  2. -
  3. Redistributions -in binary form must reproduce the above copyright notice, this list of -conditions and the following disclaimer in the -documentation and/or other materials provided with the distribution.
  4. -
  5. Neither the -name of STMicroelectronics nor the names of its contributors may be -used to endorse or promote products derived
    -
  6. -
-       -from this software without specific prior written permission.
-
-THIS -SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, -INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -MERCHANTABILITY AND FITNESS FOR A PARTICULAR -PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR -CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR -BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -THE POSSIBILITY OF SUCH DAMAGE.
-
- -
-
-
-

For -complete documentation on STM32 Microcontrollers visit www.st.com/STM32

-
-

-
-
-

 

-
- \ No newline at end of file diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.txt b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.txt new file mode 100644 index 0000000000..71072b3119 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/Release_Notes_stm32l0xx_hal.txt @@ -0,0 +1,180 @@ +Release Notes for STM32L0xx HAL Drivers +Copyright 2014 STMicroelectronics + + +Changes for MBED +* Replace NULL by HAL_NULL to allow IAR compilation + + +V1.1.0 / 18-June-2014 + +Main Changes + +* HAL generic update +* Fix flag clear procedure: use atomic write operation "=" instead of ready-modify-write operation "|=" or "&=" +* Fix on Timeout management, Timeout value set to 0 passed to API automatically exits the function after checking the flag without any wait +* Common update for the following communication peripherals: SPI, UART, USART and IRDA +* Add DMA circular mode support +* Remove lock from recursive process +* Add new macro __HAL_RESET_HANDLE_STATE to reset a given handle state +* When USE_RTOS == 1 (in stm32l0xx_hal_conf.h), the __HAL_LOCK() is not defined instead of being defined empty +* Use “__IO const” instead of “__I”, to avoid any compilation issue when __cplusplus switch is defined +* Add new functions for the DBGMCU module +* HAL_EnableDBGSleepMode() +* HAL_DisableDBGSleepMode() +* HAL_EnableDBGStopMode() +* HAL_DisableDBGStopMode() +* HAL_EnableDBGStandbyMode() +* HAL_DisableDBGStandbyMode() +* Miscellaneous comments update + +* HAL FLASH update +* Add new functions: HAL_FLASHEx_OB_SelectPCROP() and HAL_FLASHEx_OB_DeSelectPCROP() +* Some functions was renamed and moved to the extension files (stm32l0xx_hal_flash_ex.h/.c) +* Rename FLASH_HalfPageProgram() into HAL_FLASHEx_HalfPageProgram() +* Rename FLASH_EnableRunPowerDown() into HAL_FLASHEx_EnableRunPowerDown() +* Rename FLASH_DisableRunPowerDown() into HAL_FLASHEx_DisableRunPowerDown() +* Rename all HAL_DATA_EEPROMEx_xxx() functions into HAL_FLASHEx_DATAEEPROM_xxx() +* Note: aliases has been added to keep compatibility with previous version + +* HAL GPIO update +* Remove IS_GET_GPIO_PIN macro +* Add a new function HAL_GPIO_LockPin() +* Private Macro __HAL_GET_GPIO_SOURCE renamed into GET_GPIO_SOURCE + +* HAL DMA update +* Fix in HAL_DMA_PollForTransfer() to set error code HAL_DMA_ERROR_TE in case of HAL_ERROR status +* HAL PWR update +* HAL_PWR_PVDConfig(): add clear of the EXTI trigger before new configuration +* Fix in HAL_PWR_EnterSTANDBYMode() to not clear Wakeup flag (WUF), which need to be cleared at application level before to call this function + +* HAL RCC update +* Allow to calibrate the HSI when it is used as system clock source +* Fix implementation of IS_RCC_OSCILLATORTYPE() macro + +* HAL ADC update +* Update ADC internal channels mapping: TEMPSENSOR connected to ADC_CHANNEL_18 and VLCD mapped to ADC_CHANNEL_16 +* Skip polling for ADRDY flag when Low Power Auto Off mode is enabled + +* HAL COMP update +* Add LPTIMConnection field in the COMP_InitTypeDef structure. +* Add new defines: COMP_LPTIMCONNECTION_DISABLED, COMP_LPTIMCONNECTION_ENABLED +* Add new macro IS_COMP_LPTIMCONNECTION + +* HAL LPTIM update +* Add CKPOL configuration for encoder mode + +* HAL WWDG update +* Miscellaneous minor update on the source code + +* HAL IWDG update +* Miscellaneous minor update on the source code + +* HAL CRC update +* Some functions was renamed and moved to the extension files (stm32l0xx_hal_crc_ex.h/.c) +* HAL_CRC_Input_Data_Reverse() renamed into HAL_CRCEx_Input_Data_Reverse() +* HAL_CRC_Output_Data_Reverse() renamed into HAL_CRCEx_Output_Data_Reverse() +* Note: aliases has been added to keep compatibility with previous version + +* HAL CRYP update +* HAL_CRYP_ComputationCpltCallback() renamed into HAL_CRYPEx_ComputationCpltCallback() and moved to the extension files (stm32l0xx_hal_cryp_ex.h/.c) +* Note: alias has been added to keep compatibility with previous version + +* HAL I2C update +* Add management of NACK event in Master transmitter mode and Slave transmitter/receiver modes (only in polling mode), in that case the current transfer is stopped. + +* HAL SMBUS update +* Add a new function: HAL_SMBUS_DisableListen_IT() +* Add aliases for the following functions +* #define HAL_SMBUS_Slave_Listen_IT             HAL_SMBUS_EnableListen_IT +* #define HAL_SMBUS_SlaveAddrCallback         HAL_SMBUS_AddrCallback +* #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback +* Add alias HAL_SMBUS_STATE_SLAVE_LISTEN for the constant HAL_SMBUS_STATE_LISTEN + +* HAL UART update +* HAL_UART_WakeupCallback() renamed into HAL_UART_WakeupCallback() and moved to the extension files (stm32l0xx_hal_cryp_ex.h/.c) +* Add new macros to control CTS and RTS +* Add specific macros to manage the flags cleared only by a software sequence +* __HAL_UART_CLEAR_PEFLAG() +* __HAL_UART_CLEAR_FEFLAG() +* __HAL_UART_CLEAR_NEFLAG() +* __HAL_UART_CLEAR_OREFLAG() +* __HAL_UART_CLEAR_IDLEFLAG() +* Add several enhancements without affecting the driver functionalities +* Remove the check on RXNE set after reading the Data in the DR register +* Update the transmit processes to use TXE instead of TC +* Update HAL_UART_Transmit_IT() to enable UART_IT_TXE instead of UART_IT_TC + +* HAL USART update +* Add specific macros to manage the flags cleared only by a software sequence +* __HAL_USART_CLEAR_PEFLAG() +* __HAL_USART_CLEAR_FEFLAG() +* __HAL_USART_CLEAR_NEFLAG() +* __HAL_USART_CLEAR_OREFLAG() +* __HAL_USART_CLEAR_IDLEFLAG() +* Update HAL_USART_Transmit_IT() to enable USART_IT_TXE instead of USART_IT_TC + +* HAL IRDA update +* Add specific macros to manage the flags cleared only by a software sequence +* __HAL_IRDA_CLEAR_PEFLAG() +* __HAL_ IRDA _CLEAR_FEFLAG() +* __HAL_ IRDA _CLEAR_NEFLAG() +* __HAL_ IRDA _CLEAR_OREFLAG() +* __HAL_ IRDA _CLEAR_IDLEFLAG() +* Add several enhancements without affecting the driver functionalities +o Remove the check on RXNE set after reading the Data in the DR register +o Update HAL_IRDA_Transmit_IT() to enable IRDA_IT_TXE instead of IRDA_IT_TC +* Add the following APIs used within DMA process +o HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda); +o HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda); +o HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda); +o void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda); +o void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda); + +* HAL SMARTCARD update +* Add specific macros to manage the flags cleared only by a software sequence +o __HAL_SMARTCARD_CLEAR_PEFLAG() +o __HAL_SMARTCARD_CLEAR_FEFLAG() +o __HAL_SMARTCARD_CLEAR_NEFLAG() +o __HAL_SMARTCARD_CLEAR_OREFLAG() +o __HAL_SMARTCARD_CLEAR_IDLEFLAG() +* Add several enhancements without affecting the driver functionalities +o Add a new state HAL_SMARTCARD_STATE_BUSY_TX_RX and all processes has been updated accordingly +o Update HAL_SMARTCARD_Transmit_IT() to enable SMARTCARD_IT_TXE instead of SMARTCARD_IT_TC + +* HAL SPI update +* Bugs fix +* SPI interface is used in synchronous polling mode: at high clock rates like SPI prescaler 2 and 4, calling +HAL_SPI_TransmitReceive() returns with error HAL_TIMEOUT +* HAL_SPI_TransmitReceive_DMA() does not clean up the TX DMA, so any subsequent SPI calls return the DMA error +* HAL_SPI_Transmit_DMA() is failing when data size is equal to 1 byte +* Add the following APIs used within the DMA process +* HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); +* HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); +* HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); +* void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); +* void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); +* void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); + +* HAL TSC update +o Fix value of the constant TSC_ACQ_MODE_SYNCHRO + +* HAL PCD update +o Add new macro __HAL_USB_EXTI_GENERATE_SWIT() + + +V1.0.0 / 22-April-2014 + +Main Changes +First official release. + +License +Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: +1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. +2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. +3. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived +       from this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +For complete documentation on STM32 Microcontrollers visit www.st.com/STM32 \ No newline at end of file diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_IAR/startup_stm32l053xx.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_IAR/startup_stm32l053xx.s new file mode 100644 index 0000000000..20869b07f1 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_IAR/startup_stm32l053xx.s @@ -0,0 +1,332 @@ +;/******************** (C) COPYRIGHT 2014 STMicroelectronics ******************** +;* File Name : startup_stm32l053xx.s +;* Author : MCD Application Team +;* Version : V1.1.0 +;* Date : 18-June-2014 +;* Description : STM32L053xx Ultra Low Power Devices vector +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == _iar_program_start, +;* - Set the vector table entries with the exceptions ISR +;* address. +;* - Configure the system clock +;* - Branches to main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M0+ processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;******************************************************************************** +;* +;* Redistribution and use in source and binary forms, with or without modification, +;* are permitted provided that the following conditions are met: +;* 1. Redistributions of source code must retain the above copyright notice, +;* this list of conditions and the following disclaimer. +;* 2. Redistributions in binary form must reproduce the above copyright notice, +;* this list of conditions and the following disclaimer in the documentation +;* and/or other materials provided with the distribution. +;* 3. Neither the name of STMicroelectronics nor the names of its contributors +;* may be used to endorse or promote products derived from this software +;* without specific prior written permission. +;* +;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +;* +;*******************************************************************************/ +; +; +; The modules in this file are included in the libraries, and may be replaced +; by any user-defined modules that define the PUBLIC symbol _program_start or +; a user defined start symbol. +; To override the cstartup defined in the library, simply add your modified +; version to the workbench project. +; +; The vector table is normally located at address 0. +; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. +; The name "__vector_table" has special meaning for C-SPY: +; it is where the SP start value is found, and the NVIC vector +; table register (VTOR) is initialized to this address if != 0. +; +; Cortex-M version +; + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start + EXTERN SystemInit + PUBLIC __vector_table + + DATA +__vector_table + DCD sfe(CSTACK) + DCD Reset_Handler ; Reset Handler + + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD PVD_IRQHandler ; PVD through EXTI Line detect + DCD RTC_IRQHandler ; RTC through EXTI Line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_CRS_IRQHandler ; RCC_CRS + DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 + DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 + DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 + DCD TSC_IRQHandler ; TSC + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 + DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 + DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2 + DCD LPTIM1_IRQHandler ; LPTIM1 + DCD 0 ; Reserved + DCD TIM2_IRQHandler ; TIM2 + DCD 0 ; Reserved + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD TIM21_IRQHandler ; TIM21 + DCD 0 ; Reserved + DCD TIM22_IRQHandler ; TIM22 + DCD I2C1_IRQHandler ; I2C1 + DCD I2C2_IRQHandler ; I2C2 + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1 + DCD LCD_IRQHandler ; LCD + DCD USB_IRQHandler ; USB + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + PUBWEAK Reset_Handler + SECTION .text:CODE:NOROOT:REORDER(2) +Reset_Handler + LDR R0, =SystemInit + BLX R0 + LDR R0, =__iar_program_start + BX R0 + + PUBWEAK NMI_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +NMI_Handler + B NMI_Handler + + + PUBWEAK HardFault_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +HardFault_Handler + B HardFault_Handler + + + PUBWEAK SVC_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SVC_Handler + B SVC_Handler + + + PUBWEAK DebugMon_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +DebugMon_Handler + B DebugMon_Handler + + + PUBWEAK PendSV_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +PendSV_Handler + B PendSV_Handler + + + PUBWEAK SysTick_Handler + SECTION .text:CODE:NOROOT:REORDER(1) +SysTick_Handler + B SysTick_Handler + + + PUBWEAK WWDG_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +WWDG_IRQHandler + B WWDG_IRQHandler + + + PUBWEAK PVD_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +PVD_IRQHandler + B PVD_IRQHandler + + + PUBWEAK RTC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RTC_IRQHandler + B RTC_IRQHandler + + + PUBWEAK FLASH_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +FLASH_IRQHandler + B FLASH_IRQHandler + + + PUBWEAK RCC_CRS_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RCC_CRS_IRQHandler + B RCC_CRS_IRQHandler + + + PUBWEAK EXTI0_1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +EXTI0_1_IRQHandler + B EXTI0_1_IRQHandler + + + PUBWEAK EXTI2_3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +EXTI2_3_IRQHandler + B EXTI2_3_IRQHandler + + + PUBWEAK EXTI4_15_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +EXTI4_15_IRQHandler + B EXTI4_15_IRQHandler + + + PUBWEAK TSC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TSC_IRQHandler + B TSC_IRQHandler + + + PUBWEAK DMA1_Channel1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA1_Channel1_IRQHandler + B DMA1_Channel1_IRQHandler + + + PUBWEAK DMA1_Channel2_3_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA1_Channel2_3_IRQHandler + B DMA1_Channel2_3_IRQHandler + + + PUBWEAK DMA1_Channel4_5_6_7_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +DMA1_Channel4_5_6_7_IRQHandler + B DMA1_Channel4_5_6_7_IRQHandler + + + PUBWEAK ADC1_COMP_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +ADC1_COMP_IRQHandler + B ADC1_COMP_IRQHandler + + + PUBWEAK LPTIM1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LPTIM1_IRQHandler + B LPTIM1_IRQHandler + + + PUBWEAK TIM2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM2_IRQHandler + B TIM2_IRQHandler + + + PUBWEAK TIM6_DAC_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM6_DAC_IRQHandler + B TIM6_DAC_IRQHandler + + PUBWEAK TIM21_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM21_IRQHandler + B TIM21_IRQHandler + + PUBWEAK TIM22_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +TIM22_IRQHandler + B TIM22_IRQHandler + + + PUBWEAK I2C1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +I2C1_IRQHandler + B I2C1_IRQHandler + + + PUBWEAK I2C2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +I2C2_IRQHandler + B I2C2_IRQHandler + + + PUBWEAK SPI1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI1_IRQHandler + B SPI1_IRQHandler + + + PUBWEAK SPI2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +SPI2_IRQHandler + B SPI2_IRQHandler + + + PUBWEAK USART1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +USART1_IRQHandler + B USART1_IRQHandler + + + PUBWEAK USART2_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +USART2_IRQHandler + B USART2_IRQHandler + + + PUBWEAK RNG_LPUART1_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +RNG_LPUART1_IRQHandler + B RNG_LPUART1_IRQHandler + + + PUBWEAK LCD_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +LCD_IRQHandler + B LCD_IRQHandler + + PUBWEAK USB_IRQHandler + SECTION .text:CODE:NOROOT:REORDER(1) +USB_IRQHandler + B USB_IRQHandler + + END +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_IAR/stm32l053xx.icf b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_IAR/stm32l053xx.icf new file mode 100644 index 0000000000..c2b0c61455 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/TOOLCHAIN_IAR/stm32l053xx.icf @@ -0,0 +1,30 @@ +/* [ROM = 64kb = 0x10000] */ +define symbol __intvec_start__ = 0x08000000; +define symbol __region_ROM_start__ = 0x08000000; +define symbol __region_ROM_end__ = 0x0800FFFF; + +/* [RAM = 8kb = 0x2000] Vector table dynamic copy: 48 vectors = 192 bytes (0xC0) to be reserved in RAM */ +define symbol __NVIC_start__ = 0x20000000; +define symbol __NVIC_end__ = 0x200000BF; /* Aligned on 8 bytes */ +define symbol __region_RAM_start__ = 0x200000C0; +define symbol __region_RAM_end__ = 0x20001FFF; + +/* Memory regions */ +define memory mem with size = 4G; +define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; +define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; + +/* Stack and Heap */ +define symbol __size_cstack__ = 0x400; +define symbol __size_heap__ = 0x400; +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; +define block STACKHEAP with fixed order { block HEAP, block CSTACK }; + +initialize by copy with packing = zeros { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, block STACKHEAP }; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_adc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_adc.c index 082ce3324f..fb22a91ab6 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_adc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_adc.c @@ -204,7 +204,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) uint32_t tickstart = 0x00; /* Check ADC handle */ - if(hadc == NULL) + if(hadc == HAL_NULL) { return HAL_ERROR; } @@ -407,7 +407,7 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) uint32_t tickstart = 0; /* Check ADC handle */ - if(hadc == NULL) + if(hadc == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_comp.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_comp.c index 416f20a1f0..72f4c95d7c 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_comp.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_comp.c @@ -184,7 +184,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) HAL_StatusTypeDef status = HAL_OK; /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) + if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) { status = HAL_ERROR; } @@ -250,7 +250,7 @@ HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp) HAL_StatusTypeDef status = HAL_OK; /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) + if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) { status = HAL_ERROR; } @@ -327,7 +327,7 @@ HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp) HAL_StatusTypeDef status = HAL_OK; /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) + if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) { status = HAL_ERROR; } @@ -362,7 +362,7 @@ HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp) HAL_StatusTypeDef status = HAL_OK; /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) + if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) { status = HAL_ERROR; } @@ -500,7 +500,7 @@ HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp) HAL_StatusTypeDef status = HAL_OK; /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) + if((hcomp == HAL_NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != 0x00)) { status = HAL_ERROR; } @@ -584,7 +584,7 @@ __weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp) HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp) { /* Check the COMP handle allocation */ - if(hcomp == NULL) + if(hcomp == HAL_NULL) { return HAL_COMP_STATE_RESET; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_crc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_crc.c index 2659064b17..b662a88c4a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_crc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_crc.c @@ -125,7 +125,7 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3 HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) { /* Check the CRC handle allocation */ - if(hcrc == NULL) + if(hcrc == HAL_NULL) { return HAL_ERROR; } @@ -199,7 +199,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc) { /* Check the CRC handle allocation */ - if(hcrc == NULL) + if(hcrc == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_cryp.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_cryp.c index e2db99c44b..c1aa51c721 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_cryp.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_cryp.c @@ -159,7 +159,7 @@ static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uin HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp) { /* Check the CRYP handle allocation */ - if(hcryp == NULL) + if(hcryp == HAL_NULL) { return HAL_ERROR; } @@ -202,7 +202,7 @@ HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp) HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp) { /* Check the CRYP handle allocation */ - if(hcryp == NULL) + if(hcryp == HAL_NULL) { return HAL_ERROR; } @@ -1802,27 +1802,27 @@ void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp) switch(AES->CR & CRYP_CR_ALGOMODE_DIRECTION) { case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT: - HAL_CRYP_AESECB_Encrypt_IT(hcryp, NULL, 0, NULL); + HAL_CRYP_AESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); break; case CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT: - HAL_CRYP_AESECB_Decrypt_IT(hcryp, NULL, 0, NULL); + HAL_CRYP_AESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); break; case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT: - HAL_CRYP_AESCBC_Encrypt_IT(hcryp, NULL, 0, NULL); + HAL_CRYP_AESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); break; case CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT: - HAL_CRYP_AESCBC_Decrypt_IT(hcryp, NULL, 0, NULL); + HAL_CRYP_AESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); break; case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT: - HAL_CRYP_AESCTR_Encrypt_IT(hcryp, NULL, 0, NULL); + HAL_CRYP_AESCTR_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); break; case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT: - HAL_CRYP_AESCTR_Decrypt_IT(hcryp, NULL, 0, NULL); + HAL_CRYP_AESCTR_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL); break; default: diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dac.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dac.c index d171e88edb..034664a26a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dac.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dac.c @@ -184,7 +184,7 @@ static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) { /* Check DAC handle */ - if(hdac == NULL) + if(hdac == HAL_NULL) { return HAL_ERROR; } @@ -219,7 +219,7 @@ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac) { /* Check DAC handle */ - if(hdac == NULL) + if(hdac == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_def.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_def.h index 6835f36164..d123124347 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_def.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_def.h @@ -70,8 +70,8 @@ typedef enum } HAL_LockTypeDef; /* Exported macro ------------------------------------------------------------*/ -#ifndef NULL - #define NULL (void *) 0 +#ifndef HAL_NULL + #define HAL_NULL (void *) 0 #endif #define HAL_MAX_DELAY 0xFFFFFFFF diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dma.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dma.c index 9a5867d573..9d9ca5b185 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dma.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dma.c @@ -141,7 +141,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) uint32_t tmp = 0; /* Check the DMA peripheral state */ - if(hdma == NULL) + if(hdma == HAL_NULL) { return HAL_ERROR; } @@ -250,7 +250,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) { /* Check the DMA peripheral state */ - if(hdma == NULL) + if(hdma == HAL_NULL) { return HAL_ERROR; } @@ -591,7 +591,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if (hdma->XferErrorCallback != NULL) + if (hdma->XferErrorCallback != HAL_NULL) { /* Transfer error callback */ hdma->XferErrorCallback(hdma); @@ -616,7 +616,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_READY_HALF; - if(hdma->XferHalfCpltCallback != NULL) + if(hdma->XferHalfCpltCallback != HAL_NULL) { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); @@ -646,7 +646,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferCpltCallback != NULL) + if(hdma->XferCpltCallback != HAL_NULL) { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_i2c.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_i2c.c index e61ba63159..faac2d09a8 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_i2c.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_i2c.c @@ -279,7 +279,7 @@ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, ui HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { /* Check the I2C handle allocation */ - if(hi2c == NULL) + if(hi2c == HAL_NULL) { return HAL_ERROR; } @@ -359,7 +359,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) { /* Check the I2C handle allocation */ - if(hi2c == NULL) + if(hi2c == HAL_NULL) { return HAL_ERROR; } @@ -489,7 +489,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -609,7 +609,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -720,7 +720,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -849,7 +849,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -961,7 +961,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1033,7 +1033,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1103,7 +1103,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pD { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1153,7 +1153,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1204,7 +1204,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1295,7 +1295,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1375,7 +1375,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1461,7 +1461,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pD { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1540,7 +1540,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1683,7 +1683,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1817,7 +1817,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1910,7 +1910,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -2001,7 +2001,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -2110,7 +2110,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_i2s.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_i2s.c index 29569340a5..fd16faa4bb 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_i2s.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_i2s.c @@ -196,7 +196,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) uint32_t tmp = 0, i2sclk = 0; /* Check the I2S handle allocation */ - if(hi2s == NULL) + if(hi2s == HAL_NULL) { return HAL_ERROR; } @@ -300,7 +300,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) { /* Check the I2S handle allocation */ - if(hi2s == NULL) + if(hi2s == HAL_NULL) { return HAL_ERROR; } @@ -410,7 +410,7 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tmp1 = 0, tmp2 = 0; - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -493,7 +493,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tmp1 = 0, tmp2 = 0; - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -579,7 +579,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t tmp1 = 0, tmp2 = 0; if(hi2s->State == HAL_I2S_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -648,7 +648,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u uint32_t tmp1 = 0, tmp2 = 0; if(hi2s->State == HAL_I2S_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -714,7 +714,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t *tmp; uint32_t tmp1 = 0, tmp2 = 0; - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -799,7 +799,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t *tmp; uint32_t tmp1 = 0, tmp2 = 0; - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -951,12 +951,12 @@ HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) hi2s->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_RXDMAEN); /* Abort the I2S DMA Stream tx */ - if(hi2s->hdmatx != NULL) + if(hi2s->hdmatx != HAL_NULL) { HAL_DMA_Abort(hi2s->hdmatx); } /* Abort the I2S DMA Stream rx */ - if(hi2s->hdmarx != NULL) + if(hi2s->hdmarx != HAL_NULL) { HAL_DMA_Abort(hi2s->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_irda.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_irda.c index 9ee49d9d71..99a7097853 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_irda.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_irda.c @@ -222,7 +222,7 @@ static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda); HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda) { /* Check the IRDA handle allocation */ - if(hirda == NULL) + if(hirda == HAL_NULL) { return HAL_ERROR; } @@ -268,7 +268,7 @@ HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda) HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda) { /* Check the IRDA handle allocation */ - if(hirda == NULL) + if(hirda == HAL_NULL) { return HAL_ERROR; } @@ -382,7 +382,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, u if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -462,7 +462,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, ui if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -540,7 +540,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData { if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -590,7 +590,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, { if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -649,7 +649,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pDat if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -715,7 +715,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData if ((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -857,12 +857,12 @@ HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda) hirda->Instance->CR3 &= ~USART_CR3_DMAR; /* Abort the UART DMA tx channel */ - if(hirda->hdmatx != NULL) + if(hirda->hdmatx != HAL_NULL) { HAL_DMA_Abort(hirda->hdmatx); } /* Abort the UART DMA rx channel */ - if(hirda->hdmarx != NULL) + if(hirda->hdmarx != HAL_NULL) { HAL_DMA_Abort(hirda->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_iwdg.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_iwdg.c index 8f860e4667..fddf4299ae 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_iwdg.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_iwdg.c @@ -165,7 +165,7 @@ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) uint32_t tickstart = 0; /* Check the IWDG handle allocation */ - if(hiwdg == NULL) + if(hiwdg == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lcd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lcd.c index 86aae5cf6a..8a7e4c6830 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lcd.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lcd.c @@ -140,7 +140,7 @@ HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd) { /* Check the LCD handle allocation */ - if(hlcd == NULL) + if(hlcd == HAL_NULL) { return HAL_ERROR; } @@ -175,7 +175,7 @@ HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd) uint8_t counter = 0; /* Check the LCD handle allocation */ - if(hlcd == NULL) + if(hlcd == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lptim.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lptim.c index c058f553e7..9fb54814ad 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lptim.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lptim.c @@ -174,7 +174,7 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim) uint32_t tmpcfgr = 0; /* Check the LPTIM handle allocation */ - if(hlptim == NULL) + if(hlptim == HAL_NULL) { return HAL_ERROR; } @@ -263,7 +263,7 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim) HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim) { /* Check the LPTIM handle allocation */ - if(hlptim == NULL) + if(hlptim == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pcd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pcd.c index 3b5cd22972..6c9ff157c3 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pcd.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pcd.c @@ -127,7 +127,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) uint32_t wInterrupt_Mask = 0; /* Check the PCD handle allocation */ - if(hpcd == NULL) + if(hpcd == HAL_NULL) { return HAL_ERROR; } @@ -198,7 +198,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd) { /* Check the PCD handle allocation */ - if(hpcd == NULL) + if(hpcd == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc_ex.c index 05030c5db1..aa3898d8fd 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc_ex.c @@ -402,7 +402,7 @@ void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void) void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo) { /* Check the parameter */ - assert_param(pSynchroInfo != NULL); + assert_param(pSynchroInfo != HAL_NULL); /* Get the reload value */ pSynchroInfo->ReloadValue = (uint32_t)(CRS->CFGR & CRS_CFGR_RELOAD); diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rng.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rng.c index f403753296..29803b81ce 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rng.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rng.c @@ -110,7 +110,7 @@ HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng) { /* Check the RNG handle allocation */ - if(hrng == NULL) + if(hrng == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rtc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rtc.c index 576d4664f1..a9a1a978f2 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rtc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rtc.c @@ -249,7 +249,7 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { /* Check the RTC peripheral state */ - if(hrtc == NULL) + if(hrtc == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_smartcard.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_smartcard.c index 7e2101e357..dd1005334d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_smartcard.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_smartcard.c @@ -181,7 +181,7 @@ static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsc); HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsc) { /* Check the SMARTCARD handle allocation */ - if(hsc == NULL) + if(hsc == HAL_NULL) { return HAL_ERROR; } @@ -232,7 +232,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsc) HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsc) { /* Check the SMARTCARD handle allocation */ - if(hsc == NULL) + if(hsc == HAL_NULL) { return HAL_ERROR; } @@ -340,7 +340,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsc, uint8_t * { if((hsc->State == HAL_SMARTCARD_STATE_READY) || (hsc->State == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -406,7 +406,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsc, uint8_t *p { if((hsc->State == HAL_SMARTCARD_STATE_READY) || (hsc->State == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -470,7 +470,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, uint8_ { if((hsc->State == HAL_SMARTCARD_STATE_READY) || (hsc->State == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -521,7 +521,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t { if((hsc->State == HAL_SMARTCARD_STATE_READY) || (hsc->State == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -577,7 +577,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, uint8 if((hsc->State == HAL_SMARTCARD_STATE_READY) || (hsc->State == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -640,7 +640,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_ if((hsc->State == HAL_SMARTCARD_STATE_READY) || (hsc->State == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_smbus.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_smbus.c index b32d79f00f..8cfa28c182 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_smbus.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_smbus.c @@ -218,7 +218,7 @@ static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddre HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus) { /* Check the SMBUS handle allocation */ - if(hsmbus == NULL) + if(hsmbus == HAL_NULL) { return HAL_ERROR; } @@ -314,7 +314,7 @@ HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus) HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus) { /* Check the SMBUS handle allocation */ - if(hsmbus == NULL) + if(hsmbus == HAL_NULL) { return HAL_ERROR; } @@ -441,7 +441,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint /* In case of Quick command, remove autoend mode */ /* Manage the stop generation by software */ - if(hsmbus->pBuffPtr == NULL) + if(hsmbus->pBuffPtr == HAL_NULL) { hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE; } @@ -530,7 +530,7 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint1 /* In case of Quick command, remove autoend mode */ /* Manage the stop generation by software */ - if(hsmbus->pBuffPtr == NULL) + if(hsmbus->pBuffPtr == HAL_NULL) { hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE; } @@ -657,7 +657,7 @@ HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -728,7 +728,7 @@ HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_ if(hsmbus->State == HAL_SMBUS_STATE_LISTEN) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1393,7 +1393,7 @@ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus) if(hsmbus->XferCount == 0) { /* Specific use case for Quick command */ - if(hsmbus->pBuffPtr == NULL) + if(hsmbus->pBuffPtr == HAL_NULL) { /* Generate a Stop command */ hsmbus->Instance->CR2 |= I2C_CR2_STOP; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_spi.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_spi.c index 44b1ead71b..f3a0681b44 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_spi.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_spi.c @@ -200,7 +200,7 @@ static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uin HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { /* Check the SPI handle allocation */ - if(hspi == NULL) + if(hspi == HAL_NULL) { return HAL_ERROR; } @@ -261,7 +261,7 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi) { /* Check the SPI handle allocation */ - if(hspi == NULL) + if(hspi == HAL_NULL) { return HAL_ERROR; } @@ -378,7 +378,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -525,7 +525,7 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -701,7 +701,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD tmpstate = hspi->State; if((tmpstate == HAL_SPI_STATE_READY) || (tmpstate == HAL_SPI_STATE_BUSY_RX)) { - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -948,7 +948,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1023,7 +1023,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1107,7 +1107,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p if((tmpstate == HAL_SPI_STATE_READY) || \ ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX))) { - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1176,7 +1176,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1259,7 +1259,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1351,7 +1351,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * if((tmpstate == HAL_SPI_STATE_READY) || ((hspi->Init.Mode == SPI_MODE_MASTER) && \ (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX))) { - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1414,9 +1414,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Enable Rx DMA Request */ hspi->Instance->CR2 |= SPI_CR2_RXDMAEN; - /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing + /* Set the SPI Tx DMA transfer complete callback as HAL_NULL because the communication closing is performed in DMA reception complete callback */ - hspi->hdmatx->XferCpltCallback = NULL; + hspi->hdmatx->XferCpltCallback = HAL_NULL; /* Set the DMA error callback */ hspi->hdmatx->XferErrorCallback = SPI_DMAError; @@ -1502,12 +1502,12 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) */ /* Abort the SPI DMA tx Stream */ - if(hspi->hdmatx != NULL) + if(hspi->hdmatx != HAL_NULL) { HAL_DMA_Abort(hspi->hdmatx); } /* Abort the SPI DMA rx Stream */ - if(hspi->hdmarx != NULL) + if(hspi->hdmarx != HAL_NULL) { HAL_DMA_Abort(hspi->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim.c index 7e21322cd3..0079450af1 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim.c @@ -185,7 +185,7 @@ static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -222,7 +222,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -258,7 +258,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim) HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -295,7 +295,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -336,7 +336,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -384,7 +384,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_Ini uint32_t tmpccer = 0; /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tsc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tsc.c index d016e0976f..60b09f064c 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tsc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tsc.c @@ -157,7 +157,7 @@ static uint32_t TSC_extract_groups(uint32_t iomask); HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc) { /* Check TSC handle allocation */ - if (htsc == NULL) + if (htsc == HAL_NULL) { return HAL_ERROR; } @@ -240,7 +240,7 @@ HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc) HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef* htsc) { /* Check TSC handle allocation */ - if (htsc == NULL) + if (htsc == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart.c index 447bb9002f..f3632e7e64 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart.c @@ -255,7 +255,7 @@ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart); HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -312,7 +312,7 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -363,7 +363,7 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -433,7 +433,7 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -490,7 +490,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -616,7 +616,7 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -695,7 +695,7 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -772,7 +772,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData { if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -826,7 +826,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, { if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -885,7 +885,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -950,7 +950,7 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1092,12 +1092,12 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) huart->Instance->CR3 &= ~USART_CR3_DMAR; /* Abort the UART DMA tx channel */ - if(huart->hdmatx != NULL) + if(huart->hdmatx != HAL_NULL) { HAL_DMA_Abort(huart->hdmatx); } /* Abort the UART DMA rx channel */ - if(huart->hdmarx != NULL) + if(huart->hdmarx != HAL_NULL) { HAL_DMA_Abort(huart->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart_ex.c index 6a8dbf301b..fd12d9debd 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_uart_ex.c @@ -124,7 +124,7 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t temp = 0x0; /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -372,7 +372,7 @@ HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huar HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_usart.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_usart.c index 88b969981a..27ab7d5e8e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_usart.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_usart.c @@ -175,7 +175,7 @@ static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart); HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) { /* Check the USART handle allocation */ - if(husart == NULL) + if(husart == HAL_NULL) { return HAL_ERROR; } @@ -218,7 +218,7 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart) { /* Check the USART handle allocation */ - if(husart == NULL) + if(husart == HAL_NULL) { return HAL_ERROR; } @@ -344,7 +344,7 @@ HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxDa if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -412,7 +412,7 @@ HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxDat if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == NULL) || (Size == 0)) + if((pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -491,7 +491,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -574,7 +574,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pT { if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -621,7 +621,7 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx { if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == NULL ) || (Size == 0)) + if((pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -679,7 +679,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint { if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -735,7 +735,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *p if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -793,7 +793,7 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == NULL ) || (Size == 0)) + if((pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -866,7 +866,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -981,12 +981,12 @@ HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart) */ /* Abort the USART DMA tx Stream */ - if(husart->hdmatx != NULL) + if(husart->hdmatx != HAL_NULL) { HAL_DMA_Abort(husart->hdmatx); } /* Abort the USART DMA rx Stream */ - if(husart->hdmarx != NULL) + if(husart->hdmarx != HAL_NULL) { HAL_DMA_Abort(husart->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_wwdg.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_wwdg.c index 43efb7c2df..4bc1ef1726 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_wwdg.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_wwdg.c @@ -148,7 +148,7 @@ HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg) uint32_t tmp = 0; /* Check the WWDG handle allocation */ - if(hwwdg == NULL) + if(hwwdg == HAL_NULL) { return HAL_ERROR; } diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py index 233bdc6cdf..7b92af962c 100755 --- a/workspace_tools/build_release.py +++ b/workspace_tools/build_release.py @@ -61,7 +61,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = ( ('NUCLEO_F334R8', ('ARM', 'uARM', 'IAR', 'GCC_ARM')), ('NUCLEO_F401RE', ('ARM', 'uARM', 'IAR', 'GCC_ARM')), ('NUCLEO_F411RE', ('ARM', 'uARM', 'IAR', 'GCC_ARM')), - ('NUCLEO_L053R8', ('ARM', 'uARM')), + ('NUCLEO_L053R8', ('ARM', 'uARM', 'IAR')), ('NUCLEO_L152RE', ('ARM', 'uARM', 'IAR')), ('ARCH_MAX', ('ARM', 'GCC_ARM')), diff --git a/workspace_tools/export/iar.py b/workspace_tools/export/iar.py index 5b45f3eecc..b2a2da506c 100644 --- a/workspace_tools/export/iar.py +++ b/workspace_tools/export/iar.py @@ -36,6 +36,7 @@ class IAREmbeddedWorkbench(Exporter): 'NUCLEO_F334R8', 'NUCLEO_F401RE', 'NUCLEO_F411RE', + 'NUCLEO_L053R8', 'NUCLEO_L152RE', 'STM32F407' ] diff --git a/workspace_tools/export/iar_nucleo_l053r8.ewp.tmpl b/workspace_tools/export/iar_nucleo_l053r8.ewp.tmpl new file mode 100644 index 0000000000..5a89088aea --- /dev/null +++ b/workspace_tools/export/iar_nucleo_l053r8.ewp.tmpl @@ -0,0 +1,1903 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 22 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 22 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + {% for files in source_files %} + + $PROJ_DIR$\{{files}} + + {% endfor %} + + + diff --git a/workspace_tools/export_test.py b/workspace_tools/export_test.py index 81ce8fbb31..4d141cea77 100755 --- a/workspace_tools/export_test.py +++ b/workspace_tools/export_test.py @@ -165,6 +165,7 @@ if __name__ == '__main__': ('iar', 'NUCLEO_F334R8'), ('iar', 'NUCLEO_F401RE'), ('iar', 'NUCLEO_F411RE'), + ('iar', 'NUCLEO_L053R8'), ('iar', 'NUCLEO_L152RE'), ('iar', 'STM32F407'), diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index cf1dbfa9b4..9c5da82a59 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -495,7 +495,7 @@ class NUCLEO_L053R8(Target): Target.__init__(self) self.core = "Cortex-M0+" self.extra_labels = ['STM', 'STM32L0', 'STM32L053R8'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"] self.default_toolchain = "uARM" self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0715"