mirror of https://github.com/ARMmbed/mbed-os.git
STM32H7 astyle
parent
9cadad3dcf
commit
cfd86882d3
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@ -61,8 +61,7 @@
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void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
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{
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GPIO_InitTypeDef GPIO_InitStruct;
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if(heth->Instance == ETH)
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{
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if (heth->Instance == ETH) {
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enableEthPowerSupply();
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#if !(defined(DUAL_CORE) && defined(CORE_CM4))
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@ -146,8 +145,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
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*/
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void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
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{
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if(heth->Instance == ETH)
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{
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if (heth->Instance == ETH) {
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/* Peripheral clock disable */
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__HAL_RCC_ETH1MAC_CLK_DISABLE();
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__HAL_RCC_ETH1TX_CLK_DISABLE();
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@ -95,11 +95,13 @@ void SetSysClock(void)
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}
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static const uint32_t _keep;
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bool isBootloader() {
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bool isBootloader()
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{
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return ((uint32_t)&_keep < 0x8040000);
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}
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bool isBetaBoard() {
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bool isBetaBoard()
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{
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uint8_t *bootloader_data = (uint8_t *)(0x801F000);
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if (bootloader_data[0] != 0xA0 || bootloader_data[1] < 14) {
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return true;
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@ -122,8 +124,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass, bool lowspeed)
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if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) {
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_CSI;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
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{
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
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return 0;
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}
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}
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@ -203,12 +204,14 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass, bool lowspeed)
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
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if (lowspeed) {
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
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return 0; // FAIL
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}
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} else {
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
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return 0; // FAIL
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}
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}
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// HAL_RCCEx_EnableBootCore(RCC_BOOT_C2);
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