diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c index ee1703bbd1..8d1915a88d 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.c @@ -1042,6 +1042,28 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); return HAL_OK; } +/** + * @brief Abort a transaction. + * @param hpcd: PCD handle + * @param ep_addr: endpoint address + * @param pBuf: pointer to the transmission buffer + * @param len: amount of data to be sent + * @retval HAL status + */ +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +{ + HAL_StatusTypeDef ret; + USB_OTG_EPTypeDef *ep; + + ep = &hpcd->IN_ep[ep_addr & 0x7F]; + + /*setup and start the Xfer */ + __HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); + ret = USB_EPStopXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); + + __HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); + return ret; +} /** * @brief Set a STALL condition over an endpoint. diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h index f617e6d8de..610c8456e9 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pcd.h @@ -271,6 +271,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); +HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c index b4799572c4..02b936b592 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.c @@ -745,6 +745,61 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD } return HAL_OK; } +/** + * @brief USB_EPStoptXfer : setup and starts a transfer over an EP + * @param USBx : Selected device + * @param ep: pointer to endpoint structure + * @param dma: USB dma enabled or disabled + * This parameter can be one of these values: + * 0 : DMA feature not used + * 1 : DMA feature used + * @retval HAL status + */ +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) +{ + HAL_StatusTypeDef ret = HAL_OK; + /* IN endpoint */ + if (ep->is_in == 1U) + { + + /* EP enable, IN data in FIFO */ + if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + { + volatile uint32_t loop=0; + USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); + while(((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) + {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised + to consider the endpoint as disable */ + /* fix me loop for test only */ + loop++; + if (loop > 10000L) { + ret =HAL_ERROR; + break; + } + } + } + } + else /* OUT endpoint */ + { + if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + { + volatile uint32_t loop=0; + USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); + while(((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) + {/* data sheet say that EPDISD: Endpoint disabled interrupt must be raised + to consider the endpoint as disable */ + /* Fix me loop for test only */ + loop++; + if (loop > 10000L) { + ret =HAL_ERROR; + break; + } + } + } + } + return ret; +} + /** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h index ebbb598761..ac6cc496df 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_usb.h @@ -404,6 +404,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); +HAL_StatusTypeDef USB_EPStopXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); diff --git a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp index 4a9c0b09b8..472b2021f5 100644 --- a/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp +++ b/usb/device/targets/TARGET_STM/USBPhy_STM32.cpp @@ -471,6 +471,10 @@ bool USBPhyHw::endpoint_write(usb_ep_t endpoint, uint8_t *data, uint32_t size) void USBPhyHw::endpoint_abort(usb_ep_t endpoint) { // TODO - stop the current transfer on this endpoint and don't call the IN or OUT callback + HAL_StatusTypeDef ret; + ret = HAL_PCD_EP_Abort(&hpcd, endpoint); + MBED_ASSERT(ret!=HAL_OK); + return; } void USBPhyHw::process()