From ca24745e28610641bc32dc94a79e729fd5ba37e9 Mon Sep 17 00:00:00 2001 From: Mike Fiore Date: Thu, 12 Jan 2017 10:25:46 -0600 Subject: [PATCH] [MTS_DRAGONFLY_F411RE] use LSI for RTC since LSE is no longer populated by default --- targets/targets.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/targets/targets.json b/targets/targets.json index e01c1672ce..51e469ac66 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1269,7 +1269,7 @@ "core": "Cortex-M4F", "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"], "extra_labels": ["STM", "STM32F4", "STM32F411RE"], - "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2"], + "macros": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000","TRANSACTION_QUEUE_SIZE_SPI=2", "RTC_LSI=1"], "post_binary_hook": { "function": "MTSCode.combine_bins_mts_dragonfly", "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO"]