diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld index 90ed1d7999..d731f9c076 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a.ld @@ -14,667 +14,20 @@ * limitations under the License. */ - -ENTRY(Reset_Handler) - -/*INCLUDE "mbed-os/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/export-rom_v02.txt"*/ -SECTIONS -{ - __vectors_table = 0x0; - Reset_Handler = 0x101; - NMI_Handler = 0x109; - HardFault_Handler = 0x10d; - MemManage_Handler = 0x121; - BusFault_Handler = 0x125; - UsageFault_Handler = 0x129; - HalLogUartInit = 0x201; - HalSerialGetcRtl8195a = 0x309; - HalSerialGetIsrEnRegRtl8195a = 0x329; - HalSerialSetIrqEnRegRtl8195a = 0x335; - HalCpuClkConfig = 0x341; - HalGetCpuClk = 0x355; - HalRomInfo = 0x39d; - HalGetRomInfo = 0x3b5; - HalResetVsr = 0x3c5; - HalDelayUs = 0x899; - HalNMIHandler = 0x8e1; - HalHardFaultHandler = 0x911; - HalMemManageHandler = 0xc09; - HalBusFaultHandler = 0xc39; - HalUsageFaultHandler = 0xc69; - HalUart0PinCtrlRtl8195A = 0xcfd; - HalUart1PinCtrlRtl8195A = 0xdc9; - HalUart2PinCtrlRtl8195A = 0xe9d; - HalSPI0PinCtrlRtl8195A = 0xf75; - HalSPI1PinCtrlRtl8195A = 0x1015; - HalSPI2PinCtrlRtl8195A = 0x10e5; - HalSPI0MCSPinCtrlRtl8195A = 0x11b5; - HalI2C0PinCtrlRtl8195A = 0x1275; - HalI2C1PinCtrlRtl8195A = 0x1381; - HalI2C2PinCtrlRtl8195A = 0x1459; - HalI2C3PinCtrlRtl8195A = 0x1529; - HalI2S0PinCtrlRtl8195A = 0x1639; - HalI2S1PinCtrlRtl8195A = 0x176d; - HalPCM0PinCtrlRtl8195A = 0x1845; - HalPCM1PinCtrlRtl8195A = 0x1949; - HalSDIODPinCtrlRtl8195A = 0x1a1d; - HalSDIOHPinCtrlRtl8195A = 0x1a6d; - HalMIIPinCtrlRtl8195A = 0x1ab9; - HalWLLEDPinCtrlRtl8195A = 0x1b51; - HalWLANT0PinCtrlRtl8195A = 0x1c0d; - HalWLANT1PinCtrlRtl8195A = 0x1c61; - HalWLBTCOEXPinCtrlRtl8195A = 0x1cb5; - HalWLBTCMDPinCtrlRtl8195A = 0x1d05; - HalNFCPinCtrlRtl8195A = 0x1d59; - HalPWM0PinCtrlRtl8195A = 0x1da9; - HalPWM1PinCtrlRtl8195A = 0x1ead; - HalPWM2PinCtrlRtl8195A = 0x1fb5; - HalPWM3PinCtrlRtl8195A = 0x20b1; - HalETE0PinCtrlRtl8195A = 0x21b9; - HalETE1PinCtrlRtl8195A = 0x22c1; - HalETE2PinCtrlRtl8195A = 0x23c9; - HalETE3PinCtrlRtl8195A = 0x24d1; - HalEGTIMPinCtrlRtl8195A = 0x25d9; - HalSPIFlashPinCtrlRtl8195A = 0x2679; - HalSDRPinCtrlRtl8195A = 0x2725; - HalJTAGPinCtrlRtl8195A = 0x280d; - HalTRACEPinCtrlRtl8195A = 0x2861; - HalLOGUartPinCtrlRtl8195A = 0x28b9; - HalLOGUartIRPinCtrlRtl8195A = 0x291d; - HalSICPinCtrlRtl8195A = 0x2981; - HalEEPROMPinCtrlRtl8195A = 0x29d9; - HalDEBUGPinCtrlRtl8195A = 0x2a31; - HalPinCtrlRtl8195A = 0x2b39; - SpicRxCmdRtl8195A = 0x2e5d; - SpicWaitBusyDoneRtl8195A = 0x2ea5; - SpicGetFlashStatusRtl8195A = 0x2eb5; - SpicWaitWipDoneRtl8195A = 0x2f55; - SpicTxCmdRtl8195A = 0x2f6d; - SpicSetFlashStatusRtl8195A = 0x2fc1; - SpicCmpDataForCalibrationRtl8195A = 0x3049; - SpicLoadInitParaFromClockRtl8195A = 0x3081; - SpicInitRtl8195A = 0x30e5; - SpicEraseFlashRtl8195A = 0x31bd; - SpiFlashApp = 0x3279; - HalPeripheralIntrHandle = 0x33b5; - HalSysOnIntrHandle = 0x3439; - HalWdgIntrHandle = 0x3485; - HalTimer0IntrHandle = 0x34d5; - HalTimer1IntrHandle = 0x3525; - HalI2C3IntrHandle = 0x3575; - HalTimer2To7IntrHandle = 0x35c5; - HalSpi0IntrHandle = 0x3615; - HalGpioIntrHandle = 0x3665; - HalUart0IntrHandle = 0x36b5; - HalSpiFlashIntrHandle = 0x3705; - HalUsbOtgIntrHandle = 0x3755; - HalSdioHostIntrHandle = 0x37a5; - HalI2s0OrPcm0IntrHandle = 0x37f5; - HalI2s1OrPcm1IntrHandle = 0x3845; - HalWlDmaIntrHandle = 0x3895; - HalWlProtocolIntrHandle = 0x38e5; - HalCryptoIntrHandle = 0x3935; - HalGmacIntrHandle = 0x3985; - HalGdma0Ch0IntrHandle = 0x39d5; - HalGdma0Ch1IntrHandle = 0x3a25; - HalGdma0Ch2IntrHandle = 0x3a75; - HalGdma0Ch3IntrHandle = 0x3ac5; - HalGdma0Ch4IntrHandle = 0x3b15; - HalGdma0Ch5IntrHandle = 0x3b65; - HalGdma1Ch0IntrHandle = 0x3bb5; - HalGdma1Ch1IntrHandle = 0x3c05; - HalGdma1Ch2IntrHandle = 0x3c55; - HalGdma1Ch3IntrHandle = 0x3ca5; - HalGdma1Ch4IntrHandle = 0x3cf5; - HalGdma1Ch5IntrHandle = 0x3d45; - HalSdioDeviceIntrHandle = 0x3d95; - VectorTableInitRtl8195A = 0x3de5; - VectorTableInitForOSRtl8195A = 0x4019; - VectorIrqRegisterRtl8195A = 0x4029; - VectorIrqUnRegisterRtl8195A = 0x4091; - VectorIrqEnRtl8195A = 0x40f1; - VectorIrqDisRtl8195A = 0x418d; - _UartRxDmaIrqHandle = 0x422d; - HalRuartPutCRtl8195a = 0x4281; - HalRuartGetCRtl8195a = 0x429d; - HalRuartRTSCtrlRtl8195a = 0x42bd; - HalRuartGetDebugValueRtl8195a = 0x42e1; - HalRuartGetIMRRtl8195a = 0x43e1; - HalRuartSetIMRRtl8195a = 0x442d; - _UartIrqHandle = 0x4465; - HalRuartDmaInitRtl8195a = 0x4681; - HalRuartIntDisableRtl8195a = 0x4845; - HalRuartDeInitRtl8195a = 0x4855; - HalRuartIntEnableRtl8195a = 0x4985; - _UartTxDmaIrqHandle = 0x4995; - HalRuartRegIrqRtl8195a = 0x49d1; - HalRuartAdapterLoadDefRtl8195a = 0x4a4d; - HalRuartTxGdmaLoadDefRtl8195a = 0x4add; - HalRuartRxGdmaLoadDefRtl8195a = 0x4bc9; - RuartLock = 0x4cc9; - RuartUnLock = 0x4ced; - HalRuartIntSendRtl8195a = 0x4d09; - HalRuartDmaSendRtl8195a = 0x4e35; - HalRuartStopSendRtl8195a = 0x4f89; - HalRuartIntRecvRtl8195a = 0x504d; - HalRuartDmaRecvRtl8195a = 0x51ad; - HalRuartStopRecvRtl8195a = 0x52cd; - RuartIsTimeout = 0x5385; - HalRuartSendRtl8195a = 0x53b1; - HalRuartRecvRtl8195a = 0x5599; - RuartResetRxFifoRtl8195a = 0x5751; - HalRuartResetRxFifoRtl8195a = 0x5775; - HalRuartInitRtl8195a = 0x5829; - HalGdmaOnOffRtl8195a = 0x5df1; - HalGdmaChIsrEnAndDisRtl8195a = 0x5e0d; - HalGdmaChEnRtl8195a = 0x5e51; - HalGdmaChDisRtl8195a = 0x5e6d; - HalGdamChInitRtl8195a = 0x5e91; - HalGdmaChSetingRtl8195a = 0x5ebd; - HalGdmaChBlockSetingRtl8195a = 0x000060dd; - HalGdmaChIsrCleanRtl8195a = 0x6419; - HalGdmaChCleanAutoSrcRtl8195a = 0x64a1; - HalGdmaChCleanAutoDstRtl8195a = 0x6501; - HalEFUSEPowerSwitch8195AROM = 0x6561; - HALEFUSEOneByteReadROM = 0x65f9; - HALEFUSEOneByteWriteROM = 0x6699; - __rtl_memcmpb_v1_00 = 0x681d; - __rtl_random_v1_00 = 0x6861; - __rtl_align_to_be32_v1_00 = 0x6881; - __rtl_memsetw_v1_00 = 0x6899; - __rtl_memsetb_v1_00 = 0x68ad; - __rtl_memcpyw_v1_00 = 0x68bd; - __rtl_memcpyb_v1_00 = 0x68dd; - __rtl_memDump_v1_00 = 0x68f5; - __rtl_AES_set_encrypt_key = 0x6901; - __rtl_cryptoEngine_AES_set_decrypt_key = 0x6c11; - __rtl_cryptoEngine_set_security_mode_v1_00 = 0x6c95; - __rtl_cryptoEngine_init_v1_00 = 0x6ea9; - __rtl_cryptoEngine_exit_v1_00 = 0x7055; - __rtl_cryptoEngine_reset_v1_00 = 0x70b1; - __rtl_cryptoEngine_v1_00 = 0x70ed; - __rtl_crypto_cipher_init_v1_00 = 0x7c69; - __rtl_crypto_cipher_encrypt_v1_00 = 0x7c89; - __rtl_crypto_cipher_decrypt_v1_00 = 0x7cad; - HalSsiPinmuxEnableRtl8195a = 0x7cd5; - HalSsiEnableRtl8195a = 0x7e45; - HalSsiDisableRtl8195a = 0x7ef9; - HalSsiLoadSettingRtl8195a = 0x7fad; - HalSsiSetInterruptMaskRtl8195a = 0x8521; - HalSsiGetInterruptMaskRtl8195a = 0x85c9; - HalSsiSetSclkPolarityRtl8195a = 0x863d; - HalSsiSetSclkPhaseRtl8195a = 0x8715; - HalSsiWriteRtl8195a = 0x87e9; - HalSsiSetDeviceRoleRtl8195a = 0x8861; - HalSsiSetRxFifoThresholdLevelRtl8195a = 0x88c9; - HalSsiSetTxFifoThresholdLevelRtl8195a = 0x8941; - HalSsiReadRtl8195a = 0x89b9; - HalSsiGetRxFifoLevelRtl8195a = 0x8a2d; - HalSsiGetTxFifoLevelRtl8195a = 0x8aa5; - HalSsiGetStatusRtl8195a = 0x8b1d; - HalSsiWriteableRtl8195a = 0x8b91; - HalSsiReadableRtl8195a = 0x8c09; - HalSsiBusyRtl8195a = 0x8c81; - HalSsiReadInterruptRtl8195a = 0x8cf9; - HalSsiWriteInterruptRtl8195a = 0x8efd; - HalSsiSetSlaveEnableRegisterRtl8195a = 0x9009; - HalSsiGetInterruptStatusRtl8195a = 0x90d9; - HalSsiInterruptEnableRtl8195a = 0x914d; - HalSsiInterruptDisableRtl8195a = 0x9299; - HalSsiGetRawInterruptStatusRtl8195a = 0x93e9; - HalSsiGetSlaveEnableRegisterRtl8195a = 0x945d; - HalSsiInitRtl8195a = 0x94d1; - _SsiReadInterrupt = 0x9ba5; - _SsiWriteInterrupt = 0x9db1; - _SsiIrqHandle = 0x9eb1; - HalI2CWrite32 = 0xa061; - HalI2CRead32 = 0xa09d; - HalI2CDeInit8195a = 0xa0dd; - HalI2CSendRtl8195a = 0xa1f1; - HalI2CReceiveRtl8195a = 0xa25d; - HalI2CEnableRtl8195a = 0xa271; - HalI2CIntrCtrl8195a = 0xa389; - HalI2CReadRegRtl8195a = 0xa3a1; - HalI2CWriteRegRtl8195a = 0xa3b1; - HalI2CSetCLKRtl8195a = 0xa3c5; - HalI2CMassSendRtl8195a = 0xa6e9; - HalI2CClrIntrRtl8195a = 0xa749; - HalI2CClrAllIntrRtl8195a = 0xa761; - HalI2CInit8195a = 0xa775; - HalI2CDMACtrl8195a = 0xaa31; - RtkI2CIoCtrl = 0xaa61; - RtkI2CPowerCtrl = 0xaa65; - HalI2COpInit = 0xaa69; - I2CIsTimeout = 0xac65; - I2CTXGDMAISRHandle = 0xb435; - I2CRXGDMAISRHandle = 0xb4c1; - RtkI2CIrqInit = 0xb54d; - RtkI2CIrqDeInit = 0xb611; - RtkI2CPinMuxInit = 0xb675; - RtkI2CPinMuxDeInit = 0xb7c9; - RtkI2CDMAInit = 0xb955; - RtkI2CInit = 0xbc95; - RtkI2CDMADeInit = 0xbdad; - RtkI2CDeInit = 0xbe4d; - RtkI2CSendUserAddr = 0xbee5; - RtkI2CSend = 0xc07d; - RtkI2CLoadDefault = 0xce51; - RtkSalI2COpInit = 0xcf21; - HalI2SWrite32 = 0xcf65; - HalI2SRead32 = 0xcf85; - HalI2SDeInitRtl8195a = 0xcfa9; - HalI2STxRtl8195a = 0xcfc9; - HalI2SRxRtl8195a = 0xd011; - HalI2SEnableRtl8195a = 0xd05d; - HalI2SIntrCtrlRtl8195a = 0xd0b1; - HalI2SReadRegRtl8195a = 0xd0d1; - HalI2SClrIntrRtl8195a = 0xd0dd; - HalI2SClrAllIntrRtl8195a = 0xd0fd; - HalI2SInitRtl8195a = 0xd11d; - GPIO_GetIPPinName_8195a = 0xd2e5; - GPIO_GetChipPinName_8195a = 0xd331; - GPIO_PullCtrl_8195a = 0xd39d; - GPIO_FuncOn_8195a = 0xd421; - GPIO_FuncOff_8195a = 0xd481; - GPIO_Int_Mask_8195a = 0xd4e9; - GPIO_Int_SetType_8195a = 0xd511; - HAL_GPIO_IrqHandler_8195a = 0xd5fd; - HAL_GPIO_MbedIrqHandler_8195a = 0xd645; - HAL_GPIO_UserIrqHandler_8195a = 0xd6a1; - HAL_GPIO_IntCtrl_8195a = 0xd6cd; - HAL_GPIO_Init_8195a = 0xd805; - HAL_GPIO_DeInit_8195a = 0xdac1; - HAL_GPIO_ReadPin_8195a = 0xdbd1; - HAL_GPIO_WritePin_8195a = 0xdc91; - HAL_GPIO_RegIrq_8195a = 0xddad; - HAL_GPIO_UnRegIrq_8195a = 0xddf5; - HAL_GPIO_UserRegIrq_8195a = 0xde15; - HAL_GPIO_UserUnRegIrq_8195a = 0xdef9; - HAL_GPIO_MaskIrq_8195a = 0xdfc1; - HAL_GPIO_UnMaskIrq_8195a = 0xe061; - HAL_GPIO_IntDebounce_8195a = 0xe101; - HAL_GPIO_GetIPPinName_8195a = 0xe1c1; - HAL_GPIO_PullCtrl_8195a = 0xe1c9; - DumpForOneBytes = 0xe259; - CmdRomHelp = 0xe419; - CmdWriteWord = 0xe491; - CmdDumpHelfWord = 0xe505; - CmdDumpWord = 0xe5f1; - CmdDumpByte = 0xe6f5; - CmdSpiFlashTool = 0xe751; - GetRomCmdNum = 0xe7a9; - CmdWriteByte = 0xe7ad; - Isspace = 0xe7ed; - Strtoul = 0xe801; - ArrayInitialize = 0xe8b1; - GetArgc = 0xe8c9; - GetArgv = 0xe8f9; - UartLogCmdExecute = 0xe95d; - UartLogShowBackSpace = 0xe9fd; - UartLogRecallOldCmd = 0xea39; - UartLogHistoryCmd = 0xea71; - UartLogCmdChk = 0xeadd; - UartLogIrqHandle = 0xebf5; - RtlConsolInit = 0xecc5; - RtlConsolTaskRom = 0xed49; - RtlExitConsol = 0xed79; - RtlConsolRom = 0xedcd; - HalTimerOpInit = 0xee0d; - HalTimerIrq2To7Handle = 0xee59; - HalGetTimerIdRtl8195a = 0xef09; - HalTimerInitRtl8195a = 0xef3d; - HalTimerDisRtl8195a = 0xf069; - HalTimerEnRtl8195a = 0xf089; - HalTimerReadCountRtl8195a = 0xf0a9; - HalTimerIrqClearRtl8195a = 0xf0bd; - HalTimerDumpRegRtl8195a = 0xf0d1; - VSprintf = 0xf129; - DiagPrintf = 0xf39d; - DiagSPrintf = 0xf3b9; - DiagSnPrintf = 0xf3d1; - prvDiagPrintf = 0xf3ed; - prvDiagSPrintf = 0xf40d; - _memcmp = 0xf429; - _memcpy = 0xf465; - _memset = 0xf511; - Rand = 0xf585; - _strncpy = 0xf60d; - _strcpy = 0xf629; - prvStrCpy = 0xf639; - _strlen = 0xf651; - _strnlen = 0xf669; - prvStrLen = 0xf699; - _strcmp = 0xf6b1; - _strncmp = 0xf6d1; - prvStrCmp = 0xf719; - StrUpr = 0xf749; - prvAtoi = 0xf769; - prvStrStr = 0xf7bd; - _strsep = 0xf7d5; - skip_spaces = 0xf815; - skip_atoi = 0xf831; - _parse_integer_fixup_radix = 0xf869; - _parse_integer = 0xf8bd; - simple_strtoull = 0xf915; - simple_strtoll = 0xf945; - simple_strtoul = 0xf965; - simple_strtol = 0xf96d; - _vsscanf = 0xf985; - _sscanf = 0xff71; - div_u64 = 0xff91; - div_s64 = 0xff99; - div_u64_rem = 0xffa1; - div_s64_rem = 0xffb1; - _strpbrk = 0xffc1; - _strchr = 0xffed; - aes_set_key = 0x10005; - aes_encrypt = 0x103d1; - aes_decrypt = 0x114a5; - AES_WRAP = 0x125c9; - AES_UnWRAP = 0x12701; - crc32_get = 0x12861; - arc4_byte = 0x12895; - rt_arc4_init = 0x128bd; - rt_arc4_crypt = 0x12901; - rt_md5_init = 0x131c1; - rt_md5_append = 0x131f5; - rt_md5_final = 0x1327d; - rt_md5_hmac = 0x132d5; - rtw_get_bit_value_from_ieee_value = 0x13449; - rtw_is_cckrates_included = 0x13475; - rtw_is_cckratesonly_included = 0x134b5; - rtw_check_network_type = 0x134dd; - rtw_set_fixed_ie = 0x1350d; - rtw_set_ie = 0x1352d; - rtw_get_ie = 0x1355d; - rtw_set_supported_rate = 0x13591; - rtw_get_rateset_len = 0x13611; - rtw_get_wpa_ie = 0x1362d; - rtw_get_wpa2_ie = 0x136c9; - rtw_get_wpa_cipher_suite = 0x13701; - rtw_get_wpa2_cipher_suite = 0x13769; - rtw_parse_wpa_ie = 0x137d1; - rtw_parse_wpa2_ie = 0x138ad; - rtw_get_sec_ie = 0x13965; - rtw_get_wps_ie = 0x13a15; - rtw_get_wps_attr = 0x13a99; - rtw_get_wps_attr_content = 0x13b49; - rtw_ieee802_11_parse_elems = 0x13b91; - str_2char2num = 0x13d9d; - key_2char2num = 0x13db9; - convert_ip_addr = 0x13dd1; - rom_psk_PasswordHash = 0x13e9d; - rom_psk_CalcGTK = 0x13ed5; - rom_psk_CalcPTK = 0x13f69; - wep_80211_encrypt = 0x14295; - wep_80211_decrypt = 0x142f5; - tkip_micappendbyte = 0x14389; - rtw_secmicsetkey = 0x143d9; - rtw_secmicappend = 0x14419; - rtw_secgetmic = 0x14435; - rtw_seccalctkipmic = 0x1449d; - tkip_phase1 = 0x145a5; - tkip_phase2 = 0x14725; - tkip_80211_encrypt = 0x14941; - tkip_80211_decrypt = 0x149d5; - aes1_encrypt = 0x14a8d; - aesccmp_construct_mic_iv = 0x14c65; - aesccmp_construct_mic_header1 = 0x14ccd; - aesccmp_construct_mic_header2 = 0x14d21; - aesccmp_construct_ctr_preload = 0x14db5; - aes_80211_encrypt = 0x14e29; - aes_80211_decrypt = 0x151ad; - _sha1_process_message_block = 0x155b9; - _sha1_pad_message = 0x15749; - rt_sha1_init = 0x157e5; - rt_sha1_update = 0x15831; - rt_sha1_finish = 0x158a9; - rt_hmac_sha1 = 0x15909; - rom_aes_128_cbc_encrypt = 0x15a65; - rom_aes_128_cbc_decrypt = 0x15ae1; - rom_rijndaelKeySetupEnc = 0x15b5d; - rom_aes_decrypt_init = 0x15c39; - rom_aes_internal_decrypt = 0x15d15; - rom_aes_decrypt_deinit = 0x16071; - rom_aes_encrypt_init = 0x16085; - rom_aes_internal_encrypt = 0x1609d; - rom_aes_encrypt_deinit = 0x16451; - bignum_init = 0x17b35; - bignum_deinit = 0x17b61; - bignum_get_unsigned_bin_len = 0x17b81; - bignum_get_unsigned_bin = 0x17b85; - bignum_set_unsigned_bin = 0x17c21; - bignum_cmp = 0x17cd1; - bignum_cmp_d = 0x17cd5; - bignum_add = 0x17cfd; - bignum_sub = 0x17d0d; - bignum_mul = 0x17d1d; - bignum_exptmod = 0x17d2d; - WPS_realloc = 0x17d51; - os_zalloc = 0x17d99; - rom_hmac_sha256_vector = 0x17dc1; - rom_hmac_sha256 = 0x17ebd; - rom_sha256_vector = 0x18009; - phy_CalculateBitShift = 0x18221; - PHY_SetBBReg_8195A = 0x18239; - PHY_QueryBBReg_8195A = 0x18279; - ROM_odm_QueryRxPwrPercentage = 0x1829d; - ROM_odm_EVMdbToPercentage = 0x182bd; - ROM_odm_SignalScaleMapping_8195A = 0x182e5; - ROM_odm_FalseAlarmCounterStatistics = 0x183cd; - ROM_odm_SetEDCCAThreshold = 0x18721; - ROM_odm_SetTRxMux = 0x18749; - ROM_odm_SetCrystalCap = 0x18771; - ROM_odm_GetDefaultCrytaltalCap = 0x187d5; - ROM_ODM_CfoTrackingReset = 0x187e9; - ROM_odm_CfoTrackingFlow = 0x18811; - curve25519_donna = 0x1965d; - aes_test_alignment_detection = 0x1a391; - aes_mode_reset = 0x1a3ed; - aes_ecb_encrypt = 0x1a3f9; - aes_ecb_decrypt = 0x1a431; - aes_cbc_encrypt = 0x1a469; - aes_cbc_decrypt = 0x1a579; - aes_cfb_encrypt = 0x1a701; - aes_cfb_decrypt = 0x1a9e5; - aes_ofb_crypt = 0x1acc9; - aes_ctr_crypt = 0x1af7d; - aes_encrypt_key128 = 0x1b289; - aes_encrypt_key192 = 0x1b2a5; - aes_encrypt_key256 = 0x1b2c1; - aes_encrypt_key = 0x1b2e1; - aes_decrypt_key128 = 0x1b351; - aes_decrypt_key192 = 0x1b36d; - aes_decrypt_key256 = 0x1b389; - aes_decrypt_key = 0x1b3a9; - aes_init = 0x1b419; - CRYPTO_chacha_20 = 0x1b41d; - CRYPTO_poly1305_init = 0x1bc25; - CRYPTO_poly1305_update = 0x1bd09; - CRYPTO_poly1305_finish = 0x1bd8d; - rom_sha512_starts = 0x1ceb5; - rom_sha512_update = 0x1d009; - rom_sha512_finish = 0x1d011; - rom_sha512 = 0x1d261; - rom_sha512_hmac_starts = 0x1d299; - rom_sha512_hmac_update = 0x1d35d; - rom_sha512_hmac_finish = 0x1d365; - rom_sha512_hmac_reset = 0x1d3b5; - rom_sha512_hmac = 0x1d3d1; - rom_sha512_hkdf = 0x1d40d; - rom_ed25519_gen_keypair = 0x1d501; - rom_ed25519_gen_signature = 0x1d505; - rom_ed25519_verify_signature = 0x1d51d; - rom_ed25519_crypto_sign_seed_keypair = 0x1d521; - rom_ed25519_crypto_sign_detached = 0x1d579; - rom_ed25519_crypto_sign_verify_detached = 0x1d655; - rom_ed25519_ge_double_scalarmult_vartime = 0x1f86d; - rom_ed25519_ge_frombytes_negate_vartime = 0x1fc35; - rom_ed25519_ge_p3_tobytes = 0x207d5; - rom_ed25519_ge_scalarmult_base = 0x20821; - rom_ed25519_ge_tobytes = 0x209e1; - rom_ed25519_sc_muladd = 0x20a2d; - rom_ed25519_sc_reduce = 0x2603d; - __rtl_memchr_v1_00 = 0x28a4d; - __rtl_memcmp_v1_00 = 0x28ae1; - __rtl_memcpy_v1_00 = 0x28b49; - __rtl_memmove_v1_00 = 0x28bed; - __rtl_memset_v1_00 = 0x28cb5; - __rtl_strcat_v1_00 = 0x28d49; - __rtl_strchr_v1_00 = 0x28d91; - __rtl_strcmp_v1_00 = 0x28e55; - __rtl_strcpy_v1_00 = 0x28ec9; - __rtl_strlen_v1_00 = 0x28f15; - __rtl_strncat_v1_00 = 0x28f69; - __rtl_strncmp_v1_00 = 0x28fc5; - __rtl_strncpy_v1_00 = 0x2907d; - __rtl_strstr_v1_00 = 0x293cd; - __rtl_strsep_v1_00 = 0x2960d; - __rtl_strtok_v1_00 = 0x29619; - __rtl__strtok_r_v1_00 = 0x2962d; - __rtl_strtok_r_v1_00 = 0x29691; - __rtl_close_v1_00 = 0x29699; - __rtl_fstat_v1_00 = 0x296ad; - __rtl_isatty_v1_00 = 0x296c1; - __rtl_lseek_v1_00 = 0x296d5; - __rtl_open_v1_00 = 0x296e9; - __rtl_read_v1_00 = 0x296fd; - __rtl_write_v1_00 = 0x29711; - __rtl_sbrk_v1_00 = 0x29725; - __rtl_ltoa_v1_00 = 0x297bd; - __rtl_ultoa_v1_00 = 0x29855; - __rtl_dtoi_v1_00 = 0x298c5; - __rtl_dtoi64_v1_00 = 0x29945; - __rtl_dtoui_v1_00 = 0x299dd; - __rtl_ftol_v1_00 = 0x299e5; - __rtl_itof_v1_00 = 0x29a51; - __rtl_itod_v1_00 = 0x29ae9; - __rtl_i64tod_v1_00 = 0x29b79; - __rtl_uitod_v1_00 = 0x29c55; - __rtl_ftod_v1_00 = 0x29d2d; - __rtl_dtof_v1_00 = 0x29de9; - __rtl_uitof_v1_00 = 0x29e89; - __rtl_fadd_v1_00 = 0x29f65; - __rtl_fsub_v1_00 = 0x2a261; - __rtl_fmul_v1_00 = 0x2a559; - __rtl_fdiv_v1_00 = 0x2a695; - __rtl_dadd_v1_00 = 0x2a825; - __rtl_dsub_v1_00 = 0x2aed9; - __rtl_dmul_v1_00 = 0x2b555; - __rtl_ddiv_v1_00 = 0x2b8ad; - __rtl_dcmpeq_v1_00 = 0x2be4d; - __rtl_dcmplt_v1_00 = 0x2bebd; - __rtl_dcmpgt_v1_00 = 0x2bf51; - __rtl_dcmple_v1_00 = 0x2c049; - __rtl_fcmplt_v1_00 = 0x2c139; - __rtl_fcmpgt_v1_00 = 0x2c195; - __rtl_cos_f32_v1_00 = 0x2c229; - __rtl_sin_f32_v1_00 = 0x2c435; - __rtl_fabs_v1_00 = 0x2c639; - __rtl_fabsf_v1_00 = 0x2c641; - __rtl_dtoa_r_v1_00 = 0x2c77d; - __rom_mallocr_init_v1_00 = 0x2d7d1; - __rtl_free_r_v1_00 = 0x2d841; - __rtl_malloc_r_v1_00 = 0x2da31; - __rtl_realloc_r_v1_00 = 0x2df55; - __rtl_memalign_r_v1_00 = 0x2e331; - __rtl_valloc_r_v1_00 = 0x2e421; - __rtl_pvalloc_r_v1_00 = 0x2e42d; - __rtl_calloc_r_v1_00 = 0x2e441; - __rtl_cfree_r_v1_00 = 0x2e4a9; - __rtl_Balloc_v1_00 = 0x2e515; - __rtl_Bfree_v1_00 = 0x2e571; - __rtl_i2b_v1_00 = 0x2e585; - __rtl_multadd_v1_00 = 0x2e599; - __rtl_mult_v1_00 = 0x2e629; - __rtl_pow5mult_v1_00 = 0x2e769; - __rtl_hi0bits_v1_00 = 0x2e809; - __rtl_d2b_v1_00 = 0x2e845; - __rtl_lshift_v1_00 = 0x2e901; - __rtl_cmp_v1_00 = 0x2e9bd; - __rtl_diff_v1_00 = 0x2ea01; - __rtl_sread_v1_00 = 0x2eae9; - __rtl_seofread_v1_00 = 0x2eb39; - __rtl_swrite_v1_00 = 0x2eb3d; - __rtl_sseek_v1_00 = 0x2ebc1; - __rtl_sclose_v1_00 = 0x2ec11; - __rtl_sbrk_r_v1_00 = 0x2ec41; - __rtl_fflush_r_v1_00 = 0x2ef8d; - __rtl_vfprintf_r_v1_00 = 0x2f661; - __rtl_fpclassifyd = 0x30c15; - CpkClkTbl = 0x30c68; - ROM_IMG1_VALID_PATTEN = 0x30c80; - SpicCalibrationPattern = 0x30c88; - SpicInitCPUCLK = 0x30c98; - BAUDRATE = 0x30ca8; - OVSR = 0x30d1c; - DIV = 0x30d90; - OVSR_ADJ = 0x30e04; - __AES_rcon = 0x30e78; - __AES_Te4 = 0x30ea0; - I2CDmaChNo = 0x312a0; - UartLogRomCmdTable = 0x316a0; - _HalRuartOp = 0x31700; - _HalGdmaOp = 0x31760; - RTW_WPA_OUI_TYPE = 0x3540c; - WPA_CIPHER_SUITE_NONE = 0x35410; - WPA_CIPHER_SUITE_WEP40 = 0x35414; - WPA_CIPHER_SUITE_TKIP = 0x35418; - WPA_CIPHER_SUITE_CCMP = 0x3541c; - WPA_CIPHER_SUITE_WEP104 = 0x35420; - RSN_CIPHER_SUITE_NONE = 0x35424; - RSN_CIPHER_SUITE_WEP40 = 0x35428; - RSN_CIPHER_SUITE_TKIP = 0x3542c; - RSN_CIPHER_SUITE_CCMP = 0x35430; - RSN_CIPHER_SUITE_WEP104 = 0x35434; - RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X = 0x35444; - RSN_AUTH_KEY_MGMT_UNSPEC_802_1X = 0x35448; - RSN_VERSION_BSD = 0x3544c; - rom_wps_Te0 = 0x35988; - rom_wps_rcons = 0x35d88; - rom_wps_Td4s = 0x35d94; - rom_wps_Td0 = 0x35e94; - NewVectorTable = 0x10000000; - UserIrqFunTable = 0x10000100; - UserIrqDataTable = 0x10000200; - __rom_bss_start__ = 0x10000300; - CfgSysDebugWarn = 0x10000300; - CfgSysDebugInfo = 0x10000304; - CfgSysDebugErr = 0x10000308; - ConfigDebugWarn = 0x1000030c; - ConfigDebugInfo = 0x10000310; - ConfigDebugErr = 0x10000314; - HalTimerOp = 0x10000318; - GPIOState = 0x10000334; - gTimerRecord = 0x1000034c; - SSI_DBG_CONFIG = 0x10000350; - _pHAL_Gpio_Adapter = 0x10000354; - Timer2To7VectorTable = 0x10000358; - pUartLogCtl = 0x10000384; - UartLogBuf = 0x10000388; - UartLogCtl = 0x10000408; - UartLogHistoryBuf = 0x10000430; - ArgvArray = 0x100006ac; - rom_wlan_ram_map = 0x100006d4; - FalseAlmCnt = 0x100006e0; - ROMInfo = 0x10000720; - DM_CfoTrack = 0x10000738; - rom_libgloss_ram_map = 0x10000760; - __rtl_errno = 0x10000bc4; - _rtl_impure_ptr = 0x10001c60; -} - +INCLUDE "mbed-os/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h" /* DATA_RAM: We cannot put Code(.text) in DATA_RAM, this region is reserved for Image1(boot loader). But we can put .data/.bss of Image2 in this region */ MEMORY { TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000 - ROM_USED_RAM (rwx) : ORIGIN = 0x10000bc8, LENGTH = 0x10006000-0x10000bc8 - DATA_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 0x10006000 - 0x10002100 - BD_RAM (rwx) : ORIGIN = 0x10006000, LENGTH = 0x10070000 - 0x10006000 - SD_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M + DATA_RAM (rwx) : ORIGIN = 0x10002100, LENGTH = 0x10007000 - 0x10002100 + SRAM1 (rwx) : ORIGIN = 0x10007000, LENGTH = 0x10070000 - 0x10007000 + SRAM2 (rwx) : ORIGIN = 0x30000000, LENGTH = 2M } +/* Stack sizes: */ +StackSize = 0x1000; + /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: @@ -705,32 +58,28 @@ ENTRY(Reset_Handler) SECTIONS { - __rom_bss_start__ = 0x10000300; - __rom_bss_end__ = 0x10000bc8; - __ram_table_start__ = 0x10000bc8; -/* - .ram.start.table : - { - - } > ROM_USED_RAM -*/ .image2.table : { - __image2_start__ = .; - __image2_entry_func__ = .; KEEP(*(SORT(.image2.ram.data*))) - __image2_validate_code__ = .; KEEP(*(.image2.validate.rodata*)) - } > BD_RAM + } > SRAM2 - .text : + .text.sram1 : + { + . = ALIGN(4); + *rtl8195a_crypto.o (.text* .rodata*) + *mbedtls*.o (.text* .rodata*) + *libc.a: (.text* .rodata*) + } > SRAM1 + + .text.sram2 : { . = ALIGN(4); - *(.infra.ram.start*) *(.mon.ram.text*) *(.hal.flash.text*) *(.hal.sdrc.text*) *(.hal.gpio.text*) + *(.text*) KEEP(*(.init)) KEEP(*(.fini)) @@ -748,14 +97,26 @@ SECTIONS *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) *(SORT(.dtors.*)) *(.dtors) - *(.rodata*) + + *(.rodata*) + KEEP(*(.eh_frame*)) - } > BD_RAM + } > SRAM2 __etext = .; - __data_start__ = .; - .data : + + .data.sram1 : + { + . = ALIGN(4); + __sdram_data_start__ = .; + *rtl8195a_crypto*.o (.data*) + *mbedtls*.o (.data*) + *(.sdram.data*) + __sdram_data_end__ = .; + } > SRAM1 + + .data.sram2 : { *(vtable) *(.data*) @@ -783,79 +144,74 @@ SECTIONS . = ALIGN(4); /* All data end */ - } > BD_RAM + } > SRAM2 __data_end__ = .; __image2_end__ = .; .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) - } > BD_RAM + } > SRAM2 __exidx_start = .; .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > BD_RAM + } > SRAM2 __exidx_end = .; - .bss : + .bss.sram1 (NOLOAD) : + { + __bss_sram1_start__ = .; + *rtl8195a_crypto.o (.bss* COMMON) + *mbedtls*.o (.bss* COMMON) + *(.bss.thread_stack_main) + __bss_sram1_end__ = .; + } > SRAM1 + + .bss.sram2 (NOLOAD) : { __bss_start__ = .; + __bss_sram2_start__ = .; *(.bss*) - *(.bdsram.data*) *(COMMON) + *(.bdsram.data*) + __bss_sram2_end__ = .; __bss_end__ = .; - } > BD_RAM - + } > SRAM2 .bf_data : { __buffer_data_start__ = .; *(.bfsram.data*) __buffer_data_end__ = .; - } > BD_RAM + } > SRAM2 - .heap : + .heap (NOLOAD): { __end__ = .; end = __end__; *(.heap*) + . = ORIGIN(SRAM1) + LENGTH(SRAM1) - StackSize; __HeapLimit = .; - } > BD_RAM + } > SRAM1 - .TCM_overlay : - { - *lwip_mem.o (.bss*) - *lwip_memp.o (.bss*) - *(.tcm.heap*) - } > TCM - /* .stack_dummy section doesn't contains any symbols. It is only * used for linker to calculate size of stack sections, and assign * values to stack symbols later */ - .stack_dummy : + .stack_dummy (NOLOAD): { + __StackLimit = .; *(.stack) - } > BD_RAM - - .sdr_all : - { - __sdram_data_start__ = .; - *(.text*) - __sdram_data_end__ = .; - __sdram_bss_start__ = .; - __sdram_bss_end__ = .; - } > SD_RAM + . += StackSize - (. - __StackLimit); + } > SRAM1 /* Set stack top to end of RAM, and stack limit move down by * size of stack_dummy section */ - __StackTop = ORIGIN(BD_RAM) + LENGTH(BD_RAM); + __StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); __StackLimit = __StackTop - SIZEOF(.stack_dummy); PROVIDE(__stack = __StackTop); /* Check if data + heap + stack exceeds RAM limit */ ASSERT(__StackLimit >= __HeapLimit, "region RAM exceeds ram limit") - } - diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h new file mode 100644 index 0000000000..e9a2754ff8 --- /dev/null +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_GCC_ARM/rtl8195a_rom.h @@ -0,0 +1,759 @@ +/* + * Copyright (c) 2013-2016 Realtek Semiconductor Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +SECTIONS +{ + __vectors_table = 0x0; + Reset_Handler = 0x101; + NMI_Handler = 0x109; + HardFault_Handler = 0x10d; + MemManage_Handler = 0x121; + BusFault_Handler = 0x125; + UsageFault_Handler = 0x129; + HalLogUartInit = 0x201; + HalSerialPutcRtl8195a = 0x2d9; + HalSerialGetcRtl8195a = 0x309; + HalSerialGetIsrEnRegRtl8195a = 0x329; + HalSerialSetIrqEnRegRtl8195a = 0x335; + HalCpuClkConfig = 0x341; + HalGetCpuClk = 0x355; + HalRomInfo = 0x39d; + HalGetRomInfo = 0x3b5; + HalResetVsr = 0x3c5; + HalDelayUs = 0x899; + HalNMIHandler = 0x8e1; + HalHardFaultHandler = 0x911; + HalMemManageHandler = 0xc09; + HalBusFaultHandler = 0xc39; + HalUsageFaultHandler = 0xc69; + HalUart0PinCtrlRtl8195A = 0xcfd; + HalUart1PinCtrlRtl8195A = 0xdc9; + HalUart2PinCtrlRtl8195A = 0xe9d; + HalSPI0PinCtrlRtl8195A = 0xf75; + HalSPI1PinCtrlRtl8195A = 0x1015; + HalSPI2PinCtrlRtl8195A = 0x10e5; + HalSPI0MCSPinCtrlRtl8195A = 0x11b5; + HalI2C0PinCtrlRtl8195A = 0x1275; + HalI2C1PinCtrlRtl8195A = 0x1381; + HalI2C2PinCtrlRtl8195A = 0x1459; + HalI2C3PinCtrlRtl8195A = 0x1529; + HalI2S0PinCtrlRtl8195A = 0x1639; + HalI2S1PinCtrlRtl8195A = 0x176d; + HalPCM0PinCtrlRtl8195A = 0x1845; + HalPCM1PinCtrlRtl8195A = 0x1949; + HalSDIODPinCtrlRtl8195A = 0x1a1d; + HalSDIOHPinCtrlRtl8195A = 0x1a6d; + HalMIIPinCtrlRtl8195A = 0x1ab9; + HalWLLEDPinCtrlRtl8195A = 0x1b51; + HalWLANT0PinCtrlRtl8195A = 0x1c0d; + HalWLANT1PinCtrlRtl8195A = 0x1c61; + HalWLBTCOEXPinCtrlRtl8195A = 0x1cb5; + HalWLBTCMDPinCtrlRtl8195A = 0x1d05; + HalNFCPinCtrlRtl8195A = 0x1d59; + HalPWM0PinCtrlRtl8195A = 0x1da9; + HalPWM1PinCtrlRtl8195A = 0x1ead; + HalPWM2PinCtrlRtl8195A = 0x1fb5; + HalPWM3PinCtrlRtl8195A = 0x20b1; + HalETE0PinCtrlRtl8195A = 0x21b9; + HalETE1PinCtrlRtl8195A = 0x22c1; + HalETE2PinCtrlRtl8195A = 0x23c9; + HalETE3PinCtrlRtl8195A = 0x24d1; + HalEGTIMPinCtrlRtl8195A = 0x25d9; + HalSPIFlashPinCtrlRtl8195A = 0x2679; + HalSDRPinCtrlRtl8195A = 0x2725; + HalJTAGPinCtrlRtl8195A = 0x280d; + HalTRACEPinCtrlRtl8195A = 0x2861; + HalLOGUartPinCtrlRtl8195A = 0x28b9; + HalLOGUartIRPinCtrlRtl8195A = 0x291d; + HalSICPinCtrlRtl8195A = 0x2981; + HalEEPROMPinCtrlRtl8195A = 0x29d9; + HalDEBUGPinCtrlRtl8195A = 0x2a31; + HalPinCtrlRtl8195A = 0x2b39; + SpicRxCmdRtl8195A = 0x2e5d; + SpicWaitBusyDoneRtl8195A = 0x2ea5; + SpicGetFlashStatusRtl8195A = 0x2eb5; + SpicWaitWipDoneRtl8195A = 0x2f55; + SpicTxCmdRtl8195A = 0x2f6d; + SpicSetFlashStatusRtl8195A = 0x2fc1; + SpicCmpDataForCalibrationRtl8195A = 0x3049; + SpicLoadInitParaFromClockRtl8195A = 0x3081; + SpicInitRtl8195A = 0x30e5; + SpicEraseFlashRtl8195A = 0x31bd; + SpiFlashApp = 0x3279; + HalPeripheralIntrHandle = 0x33b5; + HalSysOnIntrHandle = 0x3439; + HalWdgIntrHandle = 0x3485; + HalTimer0IntrHandle = 0x34d5; + HalTimer1IntrHandle = 0x3525; + HalI2C3IntrHandle = 0x3575; + HalTimer2To7IntrHandle = 0x35c5; + HalSpi0IntrHandle = 0x3615; + HalGpioIntrHandle = 0x3665; + HalUart0IntrHandle = 0x36b5; + HalSpiFlashIntrHandle = 0x3705; + HalUsbOtgIntrHandle = 0x3755; + HalSdioHostIntrHandle = 0x37a5; + HalI2s0OrPcm0IntrHandle = 0x37f5; + HalI2s1OrPcm1IntrHandle = 0x3845; + HalWlDmaIntrHandle = 0x3895; + HalWlProtocolIntrHandle = 0x38e5; + HalCryptoIntrHandle = 0x3935; + HalGmacIntrHandle = 0x3985; + HalGdma0Ch0IntrHandle = 0x39d5; + HalGdma0Ch1IntrHandle = 0x3a25; + HalGdma0Ch2IntrHandle = 0x3a75; + HalGdma0Ch3IntrHandle = 0x3ac5; + HalGdma0Ch4IntrHandle = 0x3b15; + HalGdma0Ch5IntrHandle = 0x3b65; + HalGdma1Ch0IntrHandle = 0x3bb5; + HalGdma1Ch1IntrHandle = 0x3c05; + HalGdma1Ch2IntrHandle = 0x3c55; + HalGdma1Ch3IntrHandle = 0x3ca5; + HalGdma1Ch4IntrHandle = 0x3cf5; + HalGdma1Ch5IntrHandle = 0x3d45; + HalSdioDeviceIntrHandle = 0x3d95; + VectorTableInitRtl8195A = 0x3de5; + VectorTableInitForOSRtl8195A = 0x4019; + VectorIrqRegisterRtl8195A = 0x4029; + VectorIrqUnRegisterRtl8195A = 0x4091; + VectorIrqEnRtl8195A = 0x40f1; + VectorIrqDisRtl8195A = 0x418d; + _UartRxDmaIrqHandle = 0x422d; + HalRuartPutCRtl8195a = 0x4281; + HalRuartGetCRtl8195a = 0x429d; + HalRuartRTSCtrlRtl8195a = 0x42bd; + HalRuartGetDebugValueRtl8195a = 0x42e1; + HalRuartGetIMRRtl8195a = 0x43e1; + HalRuartSetIMRRtl8195a = 0x442d; + _UartIrqHandle = 0x4465; + HalRuartDmaInitRtl8195a = 0x4681; + HalRuartIntDisableRtl8195a = 0x4845; + HalRuartDeInitRtl8195a = 0x4855; + HalRuartIntEnableRtl8195a = 0x4985; + _UartTxDmaIrqHandle = 0x4995; + HalRuartRegIrqRtl8195a = 0x49d1; + HalRuartAdapterLoadDefRtl8195a = 0x4a4d; + HalRuartTxGdmaLoadDefRtl8195a = 0x4add; + HalRuartRxGdmaLoadDefRtl8195a = 0x4bc9; + RuartLock = 0x4cc9; + RuartUnLock = 0x4ced; + HalRuartIntSendRtl8195a = 0x4d09; + HalRuartDmaSendRtl8195a = 0x4e35; + HalRuartStopSendRtl8195a = 0x4f89; + HalRuartIntRecvRtl8195a = 0x504d; + HalRuartDmaRecvRtl8195a = 0x51ad; + HalRuartStopRecvRtl8195a = 0x52cd; + RuartIsTimeout = 0x5385; + HalRuartSendRtl8195a = 0x53b1; + HalRuartRecvRtl8195a = 0x5599; + RuartResetRxFifoRtl8195a = 0x5751; + HalRuartResetRxFifoRtl8195a = 0x5775; + HalRuartInitRtl8195a = 0x5829; + HalGdmaOnOffRtl8195a = 0x5df1; + HalGdmaChIsrEnAndDisRtl8195a = 0x5e0d; + HalGdmaChEnRtl8195a = 0x5e51; + HalGdmaChDisRtl8195a = 0x5e6d; + HalGdamChInitRtl8195a = 0x5e91; + HalGdmaChSetingRtl8195a = 0x5ebd; + HalGdmaChBlockSetingRtl8195a = 0x60dd; + HalGdmaChIsrCleanRtl8195a = 0x6419; + HalGdmaChCleanAutoSrcRtl8195a = 0x64a1; + HalGdmaChCleanAutoDstRtl8195a = 0x6501; + HalEFUSEPowerSwitch8195AROM = 0x6561; + HALEFUSEOneByteReadROM = 0x65f9; + HALEFUSEOneByteWriteROM = 0x6699; + __rtl_memcmpb_v1_00 = 0x681d; + __rtl_random_v1_00 = 0x6861; + __rtl_align_to_be32_v1_00 = 0x6881; + __rtl_memsetw_v1_00 = 0x6899; + __rtl_memsetb_v1_00 = 0x68ad; + __rtl_memcpyw_v1_00 = 0x68bd; + __rtl_memcpyb_v1_00 = 0x68dd; + __rtl_memDump_v1_00 = 0x68f5; + __rtl_AES_set_encrypt_key = 0x6901; + __rtl_cryptoEngine_AES_set_decrypt_key = 0x6c11; + __rtl_cryptoEngine_set_security_mode_v1_00 = 0x6c95; + __rtl_cryptoEngine_init_v1_00 = 0x6ea9; + __rtl_cryptoEngine_exit_v1_00 = 0x7055; + __rtl_cryptoEngine_reset_v1_00 = 0x70b1; + __rtl_cryptoEngine_v1_00 = 0x70ed; + __rtl_crypto_cipher_init_v1_00 = 0x7c69; + __rtl_crypto_cipher_encrypt_v1_00 = 0x7c89; + __rtl_crypto_cipher_decrypt_v1_00 = 0x7cad; + HalSsiPinmuxEnableRtl8195a = 0x7cd5; + HalSsiEnableRtl8195a = 0x7e45; + HalSsiDisableRtl8195a = 0x7ef9; + HalSsiLoadSettingRtl8195a = 0x7fad; + HalSsiSetInterruptMaskRtl8195a = 0x8521; + HalSsiGetInterruptMaskRtl8195a = 0x85c9; + HalSsiSetSclkPolarityRtl8195a = 0x863d; + HalSsiSetSclkPhaseRtl8195a = 0x8715; + HalSsiWriteRtl8195a = 0x87e9; + HalSsiSetDeviceRoleRtl8195a = 0x8861; + HalSsiSetRxFifoThresholdLevelRtl8195a = 0x88c9; + HalSsiSetTxFifoThresholdLevelRtl8195a = 0x8941; + HalSsiReadRtl8195a = 0x89b9; + HalSsiGetRxFifoLevelRtl8195a = 0x8a2d; + HalSsiGetTxFifoLevelRtl8195a = 0x8aa5; + HalSsiGetStatusRtl8195a = 0x8b1d; + HalSsiWriteableRtl8195a = 0x8b91; + HalSsiReadableRtl8195a = 0x8c09; + HalSsiBusyRtl8195a = 0x8c81; + HalSsiReadInterruptRtl8195a = 0x8cf9; + HalSsiWriteInterruptRtl8195a = 0x8efd; + HalSsiSetSlaveEnableRegisterRtl8195a = 0x9009; + HalSsiGetInterruptStatusRtl8195a = 0x90d9; + HalSsiInterruptEnableRtl8195a = 0x914d; + HalSsiInterruptDisableRtl8195a = 0x9299; + HalSsiGetRawInterruptStatusRtl8195a = 0x93e9; + HalSsiGetSlaveEnableRegisterRtl8195a = 0x945d; + HalSsiInitRtl8195a = 0x94d1; + _SsiReadInterrupt = 0x9ba5; + _SsiWriteInterrupt = 0x9db1; + _SsiIrqHandle = 0x9eb1; + HalI2CWrite32 = 0xa061; + HalI2CRead32 = 0xa09d; + HalI2CDeInit8195a = 0xa0dd; + HalI2CSendRtl8195a = 0xa1f1; + HalI2CReceiveRtl8195a = 0xa25d; + HalI2CEnableRtl8195a = 0xa271; + HalI2CIntrCtrl8195a = 0xa389; + HalI2CReadRegRtl8195a = 0xa3a1; + HalI2CWriteRegRtl8195a = 0xa3b1; + HalI2CSetCLKRtl8195a = 0xa3c5; + HalI2CMassSendRtl8195a = 0xa6e9; + HalI2CClrIntrRtl8195a = 0xa749; + HalI2CClrAllIntrRtl8195a = 0xa761; + HalI2CInit8195a = 0xa775; + HalI2CDMACtrl8195a = 0xaa31; + RtkI2CIoCtrl = 0xaa61; + RtkI2CPowerCtrl = 0xaa65; + HalI2COpInit = 0xaa69; + I2CIsTimeout = 0xac65; + I2CTXGDMAISRHandle = 0xb435; + I2CRXGDMAISRHandle = 0xb4c1; + RtkI2CIrqInit = 0xb54d; + RtkI2CIrqDeInit = 0xb611; + RtkI2CPinMuxInit = 0xb675; + RtkI2CPinMuxDeInit = 0xb7c9; + RtkI2CDMAInit = 0xb955; + RtkI2CInit = 0xbc95; + RtkI2CDMADeInit = 0xbdad; + RtkI2CDeInit = 0xbe4d; + RtkI2CSendUserAddr = 0xbee5; + RtkI2CSend = 0xc07d; + RtkI2CLoadDefault = 0xce51; + RtkSalI2COpInit = 0xcf21; + HalI2SWrite32 = 0xcf65; + HalI2SRead32 = 0xcf85; + HalI2SDeInitRtl8195a = 0xcfa9; + HalI2STxRtl8195a = 0xcfc9; + HalI2SRxRtl8195a = 0xd011; + HalI2SEnableRtl8195a = 0xd05d; + HalI2SIntrCtrlRtl8195a = 0xd0b1; + HalI2SReadRegRtl8195a = 0xd0d1; + HalI2SClrIntrRtl8195a = 0xd0dd; + HalI2SClrAllIntrRtl8195a = 0xd0fd; + HalI2SInitRtl8195a = 0xd11d; + GPIO_GetIPPinName_8195a = 0xd2e5; + GPIO_GetChipPinName_8195a = 0xd331; + GPIO_PullCtrl_8195a = 0xd39d; + GPIO_FuncOn_8195a = 0xd421; + GPIO_FuncOff_8195a = 0xd481; + GPIO_Int_Mask_8195a = 0xd4e9; + GPIO_Int_SetType_8195a = 0xd511; + HAL_GPIO_IrqHandler_8195a = 0xd5fd; + HAL_GPIO_MbedIrqHandler_8195a = 0xd645; + HAL_GPIO_UserIrqHandler_8195a = 0xd6a1; + HAL_GPIO_IntCtrl_8195a = 0xd6cd; + HAL_GPIO_Init_8195a = 0xd805; + HAL_GPIO_DeInit_8195a = 0xdac1; + HAL_GPIO_ReadPin_8195a = 0xdbd1; + HAL_GPIO_WritePin_8195a = 0xdc91; + HAL_GPIO_RegIrq_8195a = 0xddad; + HAL_GPIO_UnRegIrq_8195a = 0xddf5; + HAL_GPIO_UserRegIrq_8195a = 0xde15; + HAL_GPIO_UserUnRegIrq_8195a = 0xdef9; + HAL_GPIO_MaskIrq_8195a = 0xdfc1; + HAL_GPIO_UnMaskIrq_8195a = 0xe061; + HAL_GPIO_IntDebounce_8195a = 0xe101; + HAL_GPIO_GetIPPinName_8195a = 0xe1c1; + HAL_GPIO_PullCtrl_8195a = 0xe1c9; + DumpForOneBytes = 0xe259; + CmdRomHelp = 0xe419; + CmdWriteWord = 0xe491; + CmdDumpHelfWord = 0xe505; + CmdDumpWord = 0xe5f1; + CmdDumpByte = 0xe6f5; + CmdSpiFlashTool = 0xe751; + GetRomCmdNum = 0xe7a9; + CmdWriteByte = 0xe7ad; + Isspace = 0xe7ed; + Strtoul = 0xe801; + ArrayInitialize = 0xe8b1; + GetArgc = 0xe8c9; + GetArgv = 0xe8f9; + UartLogCmdExecute = 0xe95d; + UartLogShowBackSpace = 0xe9fd; + UartLogRecallOldCmd = 0xea39; + UartLogHistoryCmd = 0xea71; + UartLogCmdChk = 0xeadd; + UartLogIrqHandle = 0xebf5; + RtlConsolInit = 0xecc5; + RtlConsolTaskRom = 0xed49; + RtlExitConsol = 0xed79; + RtlConsolRom = 0xedcd; + HalTimerOpInit = 0xee0d; + HalTimerIrq2To7Handle = 0xee59; + HalGetTimerIdRtl8195a = 0xef09; + HalTimerInitRtl8195a = 0xef3d; + HalTimerDisRtl8195a = 0xf069; + HalTimerEnRtl8195a = 0xf089; + HalTimerReadCountRtl8195a = 0xf0a9; + HalTimerIrqClearRtl8195a = 0xf0bd; + HalTimerDumpRegRtl8195a = 0xf0d1; + VSprintf = 0xf129; + DiagPrintf = 0xf39d; + DiagSPrintf = 0xf3b9; + DiagSnPrintf = 0xf3d1; + prvDiagPrintf = 0xf3ed; + prvDiagSPrintf = 0xf40d; + _memcmp = 0xf429; + _memcpy = 0xf465; + _memset = 0xf511; + __memcmp = 0xf429; + __memcpy = 0xf465; + __memset = 0xf511; + Rand = 0xf585; + _strncpy = 0xf60d; + _strcpy = 0xf629; + __strncpy = 0xf60d; + __strcpy = 0xf629; + prvStrCpy = 0xf639; + _strlen = 0xf651; + _strnlen = 0xf669; + __strlen = 0xf651; + __strnlen = 0xf669; + prvStrLen = 0xf699; + _strcmp = 0xf6b1; + _strncmp = 0xf6d1; + __strcmp = 0xf6b1; + __strncmp = 0xf6d1; + prvStrCmp = 0xf719; + StrUpr = 0xf749; + prvAtoi = 0xf769; + prvStrStr = 0xf7bd; + _strsep = 0xf7d5; + __strsep = 0xf7d5; + skip_spaces = 0xf815; + skip_atoi = 0xf831; + _parse_integer_fixup_radix = 0xf869; + _parse_integer = 0xf8bd; + simple_strtoull = 0xf915; + simple_strtoll = 0xf945; + simple_strtoul = 0xf965; + simple_strtol = 0xf96d; + _vsscanf = 0xf985; + _sscanf = 0xff71; + div_u64 = 0xff91; + div_s64 = 0xff99; + div_u64_rem = 0xffa1; + div_s64_rem = 0xffb1; + __strpbrk = 0xffc1; + __strchr = 0xffed; + aes_set_key = 0x10005; + aes_encrypt = 0x103d1; + aes_decrypt = 0x114a5; + AES_WRAP = 0x125c9; + AES_UnWRAP = 0x12701; + crc32_get = 0x12861; + arc4_byte = 0x12895; + rt_arc4_init = 0x128bd; + rt_arc4_crypt = 0x12901; + rt_md5_init = 0x131c1; + rt_md5_append = 0x131f5; + rt_md5_final = 0x1327d; + rt_md5_hmac = 0x132d5; + rtw_get_bit_value_from_ieee_value = 0x13449; + rtw_is_cckrates_included = 0x13475; + rtw_is_cckratesonly_included = 0x134b5; + rtw_check_network_type = 0x134dd; + rtw_set_fixed_ie = 0x1350d; + rtw_set_ie = 0x1352d; + rtw_get_ie = 0x1355d; + rtw_set_supported_rate = 0x13591; + rtw_get_rateset_len = 0x13611; + rtw_get_wpa_ie = 0x1362d; + rtw_get_wpa2_ie = 0x136c9; + rtw_get_wpa_cipher_suite = 0x13701; + rtw_get_wpa2_cipher_suite = 0x13769; + rtw_parse_wpa_ie = 0x137d1; + rtw_parse_wpa2_ie = 0x138ad; + rtw_get_sec_ie = 0x13965; + rtw_get_wps_ie = 0x13a15; + rtw_get_wps_attr = 0x13a99; + rtw_get_wps_attr_content = 0x13b49; + rtw_ieee802_11_parse_elems = 0x13b91; + str_2char2num = 0x13d9d; + key_2char2num = 0x13db9; + convert_ip_addr = 0x13dd1; + rom_psk_PasswordHash = 0x13e9d; + rom_psk_CalcGTK = 0x13ed5; + rom_psk_CalcPTK = 0x13f69; + wep_80211_encrypt = 0x14295; + wep_80211_decrypt = 0x142f5; + tkip_micappendbyte = 0x14389; + rtw_secmicsetkey = 0x143d9; + rtw_secmicappend = 0x14419; + rtw_secgetmic = 0x14435; + rtw_seccalctkipmic = 0x1449d; + tkip_phase1 = 0x145a5; + tkip_phase2 = 0x14725; + tkip_80211_encrypt = 0x14941; + tkip_80211_decrypt = 0x149d5; + aes1_encrypt = 0x14a8d; + aesccmp_construct_mic_iv = 0x14c65; + aesccmp_construct_mic_header1 = 0x14ccd; + aesccmp_construct_mic_header2 = 0x14d21; + aesccmp_construct_ctr_preload = 0x14db5; + aes_80211_encrypt = 0x14e29; + aes_80211_decrypt = 0x151ad; + _sha1_process_message_block = 0x155b9; + _sha1_pad_message = 0x15749; + rt_sha1_init = 0x157e5; + rt_sha1_update = 0x15831; + rt_sha1_finish = 0x158a9; + rt_hmac_sha1 = 0x15909; + rom_aes_128_cbc_encrypt = 0x15a65; + rom_aes_128_cbc_decrypt = 0x15ae1; + rom_rijndaelKeySetupEnc = 0x15b5d; + rom_aes_decrypt_init = 0x15c39; + rom_aes_internal_decrypt = 0x15d15; + rom_aes_decrypt_deinit = 0x16071; + rom_aes_encrypt_init = 0x16085; + rom_aes_internal_encrypt = 0x1609d; + rom_aes_encrypt_deinit = 0x16451; + bignum_init = 0x17b35; + bignum_deinit = 0x17b61; + bignum_get_unsigned_bin_len = 0x17b81; + bignum_get_unsigned_bin = 0x17b85; + bignum_set_unsigned_bin = 0x17c21; + bignum_cmp = 0x17cd1; + bignum_cmp_d = 0x17cd5; + bignum_add = 0x17cfd; + bignum_sub = 0x17d0d; + bignum_mul = 0x17d1d; + bignum_exptmod = 0x17d2d; + WPS_realloc = 0x17d51; + os_zalloc = 0x17d99; + rom_hmac_sha256_vector = 0x17dc1; + rom_hmac_sha256 = 0x17ebd; + rom_sha256_vector = 0x18009; + phy_CalculateBitShift = 0x18221; + PHY_SetBBReg_8195A = 0x18239; + PHY_QueryBBReg_8195A = 0x18279; + ROM_odm_QueryRxPwrPercentage = 0x1829d; + ROM_odm_EVMdbToPercentage = 0x182bd; + ROM_odm_SignalScaleMapping_8195A = 0x182e5; + ROM_odm_FalseAlarmCounterStatistics = 0x183cd; + ROM_odm_SetEDCCAThreshold = 0x18721; + ROM_odm_SetTRxMux = 0x18749; + ROM_odm_SetCrystalCap = 0x18771; + ROM_odm_GetDefaultCrytaltalCap = 0x187d5; + ROM_ODM_CfoTrackingReset = 0x187e9; + ROM_odm_CfoTrackingFlow = 0x18811; + curve25519_donna = 0x1965d; + aes_test_alignment_detection = 0x1a391; + aes_mode_reset = 0x1a3ed; + aes_ecb_encrypt = 0x1a3f9; + aes_ecb_decrypt = 0x1a431; + aes_cbc_encrypt = 0x1a469; + aes_cbc_decrypt = 0x1a579; + aes_cfb_encrypt = 0x1a701; + aes_cfb_decrypt = 0x1a9e5; + aes_ofb_crypt = 0x1acc9; + aes_ctr_crypt = 0x1af7d; + aes_encrypt_key128 = 0x1b289; + aes_encrypt_key192 = 0x1b2a5; + aes_encrypt_key256 = 0x1b2c1; + aes_encrypt_key = 0x1b2e1; + aes_decrypt_key128 = 0x1b351; + aes_decrypt_key192 = 0x1b36d; + aes_decrypt_key256 = 0x1b389; + aes_decrypt_key = 0x1b3a9; + aes_init = 0x1b419; + CRYPTO_chacha_20 = 0x1b41d; + CRYPTO_poly1305_init = 0x1bc25; + CRYPTO_poly1305_update = 0x1bd09; + CRYPTO_poly1305_finish = 0x1bd8d; + rom_sha512_starts = 0x1ceb5; + rom_sha512_update = 0x1d009; + rom_sha512_finish = 0x1d011; + rom_sha512 = 0x1d261; + rom_sha512_hmac_starts = 0x1d299; + rom_sha512_hmac_update = 0x1d35d; + rom_sha512_hmac_finish = 0x1d365; + rom_sha512_hmac_reset = 0x1d3b5; + rom_sha512_hmac = 0x1d3d1; + rom_sha512_hkdf = 0x1d40d; + rom_ed25519_gen_keypair = 0x1d501; + rom_ed25519_gen_signature = 0x1d505; + rom_ed25519_verify_signature = 0x1d51d; + rom_ed25519_crypto_sign_seed_keypair = 0x1d521; + rom_ed25519_crypto_sign_detached = 0x1d579; + rom_ed25519_crypto_sign_verify_detached = 0x1d655; + rom_ed25519_ge_double_scalarmult_vartime = 0x1f86d; + rom_ed25519_ge_frombytes_negate_vartime = 0x1fc35; + rom_ed25519_ge_p3_tobytes = 0x207d5; + rom_ed25519_ge_scalarmult_base = 0x20821; + rom_ed25519_ge_tobytes = 0x209e1; + rom_ed25519_sc_muladd = 0x20a2d; + rom_ed25519_sc_reduce = 0x2603d; + __rtl_memchr_v1_00 = 0x28a4d; + __rtl_memcmp_v1_00 = 0x28ae1; + __rtl_memcpy_v1_00 = 0x28b49; + __rtl_memmove_v1_00 = 0x28bed; + __rtl_memset_v1_00 = 0x28cb5; + __rtl_strcat_v1_00 = 0x28d49; + __rtl_strchr_v1_00 = 0x28d91; + __rtl_strcmp_v1_00 = 0x28e55; + __rtl_strcpy_v1_00 = 0x28ec9; + __rtl_strlen_v1_00 = 0x28f15; + __rtl_strncat_v1_00 = 0x28f69; + __rtl_strncmp_v1_00 = 0x28fc5; + __rtl_strncpy_v1_00 = 0x2907d; + __rtl_strstr_v1_00 = 0x293cd; + __rtl_strsep_v1_00 = 0x2960d; + __rtl_strtok_v1_00 = 0x29619; + __rtl__strtok_r_v1_00 = 0x2962d; + __rtl_strtok_r_v1_00 = 0x29691; + __rtl_close_v1_00 = 0x29699; + __rtl_fstat_v1_00 = 0x296ad; + __rtl_isatty_v1_00 = 0x296c1; + __rtl_lseek_v1_00 = 0x296d5; + __rtl_open_v1_00 = 0x296e9; + __rtl_read_v1_00 = 0x296fd; + __rtl_write_v1_00 = 0x29711; + __rtl_sbrk_v1_00 = 0x29725; + __rtl_ltoa_v1_00 = 0x297bd; + __rtl_ultoa_v1_00 = 0x29855; + __rtl_dtoi_v1_00 = 0x298c5; + __rtl_dtoi64_v1_00 = 0x29945; + __rtl_dtoui_v1_00 = 0x299dd; + __rtl_ftol_v1_00 = 0x299e5; + __rtl_itof_v1_00 = 0x29a51; + __rtl_itod_v1_00 = 0x29ae9; + __rtl_i64tod_v1_00 = 0x29b79; + __rtl_uitod_v1_00 = 0x29c55; + __rtl_ftod_v1_00 = 0x29d2d; + __rtl_dtof_v1_00 = 0x29de9; + __rtl_uitof_v1_00 = 0x29e89; + __rtl_fadd_v1_00 = 0x29f65; + __rtl_fsub_v1_00 = 0x2a261; + __rtl_fmul_v1_00 = 0x2a559; + __rtl_fdiv_v1_00 = 0x2a695; + __rtl_dadd_v1_00 = 0x2a825; + __rtl_dsub_v1_00 = 0x2aed9; + __rtl_dmul_v1_00 = 0x2b555; + __rtl_ddiv_v1_00 = 0x2b8ad; + __rtl_dcmpeq_v1_00 = 0x2be4d; + __rtl_dcmplt_v1_00 = 0x2bebd; + __rtl_dcmpgt_v1_00 = 0x2bf51; + __rtl_dcmple_v1_00 = 0x2c049; + __rtl_fcmplt_v1_00 = 0x2c139; + __rtl_fcmpgt_v1_00 = 0x2c195; + __rtl_cos_f32_v1_00 = 0x2c229; + __rtl_sin_f32_v1_00 = 0x2c435; + __rtl_fabs_v1_00 = 0x2c639; + __rtl_fabsf_v1_00 = 0x2c641; + __rtl_dtoa_r_v1_00 = 0x2c77d; + __rom_mallocr_init_v1_00 = 0x2d7d1; + __rtl_free_r_v1_00 = 0x2d841; + __rtl_malloc_r_v1_00 = 0x2da31; + __rtl_realloc_r_v1_00 = 0x2df55; + __rtl_memalign_r_v1_00 = 0x2e331; + __rtl_valloc_r_v1_00 = 0x2e421; + __rtl_pvalloc_r_v1_00 = 0x2e42d; + __rtl_calloc_r_v1_00 = 0x2e441; + __rtl_cfree_r_v1_00 = 0x2e4a9; + __rtl_Balloc_v1_00 = 0x2e515; + __rtl_Bfree_v1_00 = 0x2e571; + __rtl_i2b_v1_00 = 0x2e585; + __rtl_multadd_v1_00 = 0x2e599; + __rtl_mult_v1_00 = 0x2e629; + __rtl_pow5mult_v1_00 = 0x2e769; + __rtl_hi0bits_v1_00 = 0x2e809; + __rtl_d2b_v1_00 = 0x2e845; + __rtl_lshift_v1_00 = 0x2e901; + __rtl_cmp_v1_00 = 0x2e9bd; + __rtl_diff_v1_00 = 0x2ea01; + __rtl_sread_v1_00 = 0x2eae9; + __rtl_seofread_v1_00 = 0x2eb39; + __rtl_swrite_v1_00 = 0x2eb3d; + __rtl_sseek_v1_00 = 0x2ebc1; + __rtl_sclose_v1_00 = 0x2ec11; + __rtl_sbrk_r_v1_00 = 0x2ec41; + __rtl_fflush_r_v1_00 = 0x2ef8d; + __rtl_vfprintf_r_v1_00 = 0x2f661; + __rtl_fpclassifyd = 0x30c15; + CpkClkTbl = 0x30c68; + ROM_IMG1_VALID_PATTEN = 0x30c80; + SpicCalibrationPattern = 0x30c88; + SpicInitCPUCLK = 0x30c98; + BAUDRATE = 0x30ca8; + OVSR = 0x30d1c; + DIV = 0x30d90; + OVSR_ADJ = 0x30e04; + __AES_rcon = 0x30e78; + __AES_Te4 = 0x30ea0; + I2CDmaChNo = 0x312a0; + _GPIO_PinMap_Chip2IP_8195a = 0x312b4; + _GPIO_PinMap_PullCtrl_8195a = 0x3136c; + _GPIO_SWPORT_DDR_TBL = 0x31594; + _GPIO_EXT_PORT_TBL = 0x31598; + _GPIO_SWPORT_DR_TBL = 0x3159c; + UartLogRomCmdTable = 0x316a0; + _HalRuartOp = 0x31700; + _HalGdmaOp = 0x31760; + RTW_WPA_OUI_TYPE = 0x3540c; + WPA_CIPHER_SUITE_NONE = 0x35410; + WPA_CIPHER_SUITE_WEP40 = 0x35414; + WPA_CIPHER_SUITE_TKIP = 0x35418; + WPA_CIPHER_SUITE_CCMP = 0x3541c; + WPA_CIPHER_SUITE_WEP104 = 0x35420; + RSN_CIPHER_SUITE_NONE = 0x35424; + RSN_CIPHER_SUITE_WEP40 = 0x35428; + RSN_CIPHER_SUITE_TKIP = 0x3542c; + RSN_CIPHER_SUITE_CCMP = 0x35430; + RSN_CIPHER_SUITE_WEP104 = 0x35434; + RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X = 0x35444; + RSN_AUTH_KEY_MGMT_UNSPEC_802_1X = 0x35448; + RSN_VERSION_BSD = 0x3544c; + rom_wps_Te0 = 0x35988; + rom_wps_rcons = 0x35d88; + rom_wps_Td4s = 0x35d94; + rom_wps_Td0 = 0x35e94; + __rom_b_cut_end__ = 0x4467c; + __rom_c_cut_text_start__ = 0x4467c; + HalInitPlatformLogUartV02 = 0x4467d; + HalReInitPlatformLogUartV02 = 0x4471d; + HalInitPlatformTimerV02 = 0x44755; + HalShowBuildInfoV02 = 0x447cd; + SpicReleaseDeepPowerDownFlashRtl8195A = 0x44831; + HalSpiInitV02 = 0x4488d; + HalBootFlowV02 = 0x44a29; + HalInitialROMCodeGlobalVarV02 = 0x44ae5; + HalResetVsrV02 = 0x44b41; + HalI2CSendRtl8195aV02 = 0x44ce1; + HalI2CSetCLKRtl8195aV02 = 0x44d59; + RtkI2CSendV02 = 0x4508d; + RtkI2CReceiveV02 = 0x459a1; + HalI2COpInitV02 = 0x461ed; + I2CISRHandleV02 = 0x463e9; + RtkSalI2COpInitV02 = 0x46be1; + SpicLoadInitParaFromClockRtl8195AV02 = 0x46c25; + SpiFlashAppV02 = 0x46c85; + SpicInitRtl8195AV02 = 0x46dc5; + SpicEraseFlashRtl8195AV02 = 0x46ea1; + HalTimerIrq2To7HandleV02 = 0x46f5d; + HalTimerIrqRegisterRtl8195aV02 = 0x46fe1; + HalTimerInitRtl8195aV02 = 0x4706d; + HalTimerReadCountRtl8195aV02 = 0x471b5; + HalTimerReLoadRtl8195aV02 = 0x471d1; + HalTimerIrqUnRegisterRtl8195aV02 = 0x4722d; + HalTimerDeInitRtl8195aV02 = 0x472c1; + HalTimerOpInitV02 = 0x472f9; + GPIO_LockV02 = 0x47345; + GPIO_UnLockV02 = 0x47379; + GPIO_Int_Clear_8195aV02 = 0x473a5; + HAL_GPIO_IntCtrl_8195aV02 = 0x473b5; + FindElementIndexV02 = 0x47541; + HalRuartInitRtl8195aV02 = 0x4756d; + DramInit_rom = 0x47619; + ChangeRandSeed_rom = 0x47979; + Sdr_Rand2_rom = 0x47985; + MemTest_rom = 0x479dd; + SdrCalibration_rom = 0x47a45; + SdrControllerInit_rom = 0x47d99; + SDIO_EnterCritical = 0x47e39; + SDIO_ExitCritical = 0x47e85; + SDIO_IRQ_Handler_Rom = 0x47ec5; + SDIO_Interrupt_Init_Rom = 0x47f31; + SDIO_Device_Init_Rom = 0x47f81; + SDIO_Interrupt_DeInit_Rom = 0x48215; + SDIO_Device_DeInit_Rom = 0x48255; + SDIO_Enable_Interrupt_Rom = 0x48281; + SDIO_Disable_Interrupt_Rom = 0x482a1; + SDIO_Clear_ISR_Rom = 0x482c1; + SDIO_Alloc_Rx_Pkt_Rom = 0x482d9; + SDIO_Free_Rx_Pkt_Rom = 0x48331; + SDIO_Recycle_Rx_BD_Rom = 0x48355; + SDIO_RX_IRQ_Handler_BH_Rom = 0x484f1; + SDIO_RxTask_Rom = 0x4851d; + SDIO_Process_H2C_IOMsg_Rom = 0x4856d; + SDIO_Send_C2H_IOMsg_Rom = 0x4859d; + SDIO_Process_RPWM_Rom = 0x485b5; + SDIO_Reset_Cmd_Rom = 0x485e9; + SDIO_Rx_Data_Transaction_Rom = 0x48611; + SDIO_Send_C2H_PktMsg_Rom = 0x48829; + SDIO_Register_Tx_Callback_Rom = 0x488f5; + SDIO_ReadMem_Rom = 0x488fd; + SDIO_WriteMem_Rom = 0x489a9; + SDIO_SetMem_Rom = 0x48a69; + SDIO_TX_Pkt_Handle_Rom = 0x48b29; + SDIO_TX_FIFO_DataReady_Rom = 0x48c69; + SDIO_IRQ_Handler_BH_Rom = 0x48d95; + SDIO_TxTask_Rom = 0x48e9d; + SDIO_TaskUp_Rom = 0x48eed; + SDIO_Boot_Up = 0x48f55; + __rom_c_cut_text_end__ = 0x49070; + __rom_c_cut_rodata_start__ = 0x49070; + BAUDRATE_v02 = 0x49070; + OVSR_v02 = 0x490fc; + DIV_v02 = 0x49188; + OVSR_ADJ_v02 = 0x49214; + SdrDramInfo_rom = 0x492a0; + SdrDramTiming_rom = 0x492b4; + SdrDramModeReg_rom = 0x492e8; + SdrDramDev_rom = 0x49304; + __rom_c_cut_rodata_end__ = 0x49314; + NewVectorTable = 0x10000000; + UserIrqFunTable = 0x10000100; + UserIrqDataTable = 0x10000200; + __rom_bss_start__ = 0x10000300; + CfgSysDebugWarn = 0x10000300; + CfgSysDebugInfo = 0x10000304; + CfgSysDebugErr = 0x10000308; + ConfigDebugWarn = 0x1000030c; + ConfigDebugInfo = 0x10000310; + ConfigDebugErr = 0x10000314; + HalTimerOp = 0x10000318; + GPIOState = 0x10000334; + gTimerRecord = 0x1000034c; + SSI_DBG_CONFIG = 0x10000350; + _pHAL_Gpio_Adapter = 0x10000354; + Timer2To7VectorTable = 0x10000358; + pUartLogCtl = 0x10000384; + UartLogBuf = 0x10000388; + UartLogCtl = 0x10000408; + UartLogHistoryBuf = 0x10000430; + ArgvArray = 0x100006ac; + rom_wlan_ram_map = 0x100006d4; + FalseAlmCnt = 0x100006e0; + ROMInfo = 0x10000720; + DM_CfoTrack = 0x10000738; + rom_libgloss_ram_map = 0x10000760; + __rtl_errno = 0x10000bc4; +} diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c index bd83781b3a..e46be132dd 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c @@ -14,26 +14,30 @@ * limitations under the License. */ #include "rtl8195a.h" -#include "system_8195a.h" -#if defined ( __CC_ARM ) /* ARM Compiler 4/5 */ -extern uint8_t Image$$RW_IRAM1$$ZI$$Base[]; -#define __bss_start__ Image$$RW_IRAM1$$ZI$$Base -extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[]; -#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit -#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler 6 */ -extern uint8_t Image$$RW_IRAM1$$ZI$$Base[]; -#define __bss_start__ Image$$RW_IRAM1$$ZI$$Base -extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[]; -#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit -#elif defined ( __ICCARM__ ) +#if defined(__CC_ARM) +#include "cmsis_armcc.h" +#elif defined(__GNUC__) +#include "cmsis_gcc.h" +#else +#include +#endif + + +#if defined(__CC_ARM) || \ + (defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050) + +extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit; +extern uint8_t Image$$RW_IRAM1$$ZI$$Base[]; +extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[]; +#define __bss_start__ Image$$RW_IRAM1$$ZI$$Base +#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit + +#elif defined (__ICCARM__) + #pragma section=".ram.bss" -#pragma section=".rom.bss" -#pragma section=".ram.start.table" -#pragma section=".ram_image1.bss" -#pragma section=".image2.start.table1" -#pragma section=".image2.start.table2" +extern uint32_t CSTACK$$Limit; uint8_t *__bss_start__; uint8_t *__bss_end__; @@ -42,30 +46,29 @@ void __iar_data_init_app(void) __bss_start__ = (uint8_t *)__section_begin(".ram.bss"); __bss_end__ = (uint8_t *)__section_end(".ram.bss"); } + #else -extern uint8_t __bss_start__[]; -extern uint8_t __bss_end__[]; -extern uint8_t __image1_bss_start__[]; -extern uint8_t __image1_bss_end__[]; -extern uint8_t __image2_entry_func__[]; -extern uint8_t __image2_validate_code__[]; + +extern uint32_t __StackTop; +extern uint8_t __bss_sram1_start__[]; +extern uint8_t __bss_sram1_end__[]; +extern uint8_t __bss_sram2_start__[]; +extern uint8_t __bss_sram2_end__[]; + #endif extern VECTOR_Func NewVectorTable[]; extern void SystemCoreClockUpdate(void); extern void PLAT_Start(void); extern void PLAT_Main(void); -extern HAL_TIMER_OP HalTimerOp; - -IMAGE2_START_RAM_FUN_SECTION const RAM_START_FUNCTION gImage2EntryFun0 = { + +IMAGE2_START_RAM_FUN_SECTION +const RAM_START_FUNCTION gImage2EntryFun0 = { PLAT_Start }; -IMAGE1_VALID_PATTEN_SECTION const uint8_t RAM_IMG1_VALID_PATTEN[] = { - 0x23, 0x79, 0x16, 0x88, 0xff, 0xff, 0xff, 0xff -}; - -IMAGE2_VALID_PATTEN_SECTION const uint8_t RAM_IMG2_VALID_PATTEN[20] = { +IMAGE2_VALID_PATTEN_SECTION +const uint8_t IMAGE2_SIGNATURE[20] = { 'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff, (FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff), (FW_SUBVERSION&0xff), ((FW_SUBVERSION >> 8)&0xff), @@ -93,7 +96,7 @@ void TRAP_NMIHandler(void) #endif } -#if defined ( __ICCARM__ ) +#if defined (__ICCARM__) void __TRAP_HardFaultHandler_Patch(uint32_t addr) { uint32_t cfsr; @@ -102,15 +105,15 @@ void __TRAP_HardFaultHandler_Patch(uint32_t addr) uint32_t stackpc; uint16_t asmcode; - cfsr = HAL_READ32(0xE000ED28, 0x0); + cfsr = __HAL_READ32(0xE000ED28, 0x0); // Violation to memory access protection if (cfsr & 0x82) { - bfar = HAL_READ32(0xE000ED38, 0x0); + bfar = __HAL_READ32(0xE000ED38, 0x0); // invalid access to wifi register, usually happened in LPS 32K or IPS - if (bfar >= WIFI_REG_BASE && bfar < WIFI_REG_BASE + 0x40000) { + if (bfar >= WLAN_BASE && bfar < WLAN_BASE + 0x40000) { //__BKPT(0); @@ -125,18 +128,18 @@ void __TRAP_HardFaultHandler_Patch(uint32_t addr) * However, the fault assembly code (Ex. LDR or ADR) is not actually executed, * So the register value is un-predictable. **/ - stackpc = HAL_READ32(addr, 0x18); - asmcode = HAL_READ16(stackpc, 0); + stackpc = __HAL_READ32(addr, 0x18); + asmcode = __HAL_READ16(stackpc, 0); if ((asmcode & 0xF800) > 0xE000) { // 32-bit instruction, (opcode[15:11] = 0b11111, 0b11110, 0b11101) - HAL_WRITE32(addr, 0x18, stackpc + 4); + __HAL_WRITE32(addr, 0x18, stackpc + 4); } else { // 16-bit instruction - HAL_WRITE32(addr, 0x18, stackpc + 2); + __HAL_WRITE32(addr, 0x18, stackpc + 2); } // clear Hard Fault Status Register - HAL_WRITE32(0xE000ED2C, 0x0, HAL_READ32(0xE000ED2C, 0x0)); + __HAL_WRITE32(0xE000ED2C, 0x0, __HAL_READ32(0xE000ED2C, 0x0)); return; } } @@ -155,8 +158,11 @@ void TRAP_HardFaultHandler_Patch(void) #endif // Override original Interrupt Vector Table -INFRA_START_SECTION void TRAP_OverrideTable(uint32_t stackp) +void TRAP_OverrideTable(uint32_t stackp) { + // Set MSP + __set_MSP(stackp); + // Override NMI Handler NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler; @@ -165,85 +171,59 @@ INFRA_START_SECTION void TRAP_OverrideTable(uint32_t stackp) #endif } -INFRA_START_SECTION void PLAT_Init(void) +// Image2 Entry Function +void PLAT_Start(void) { uint32_t val; - //Set SPS lower voltage +#if defined (__ICCARM__) + __iar_data_init_app(); +#endif + + // Clear RAM BSS +#ifdef __GNUC__ + __memset((void *)__bss_sram1_start__, 0, __bss_sram1_end__ - __bss_sram1_start__); + __memset((void *)__bss_sram2_start__, 0, __bss_sram2_end__ - __bss_sram2_start__); +#else + __memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__); +#endif + +#if defined (__CC_ARM) + TRAP_OverrideTable((uint32_t)&Image$$ARM_LIB_STACK$$ZI$$Limit); +#elif defined (__ICCARM__) + TRAP_OverrideTable((uint32_t)&CSTACK$$Limit); +#elif defined (__GNUC__) + TRAP_OverrideTable((uint32_t)&__StackTop); +#else + TRAP_OverrideTable(0x1FFFFFFC); +#endif + + HalTimerOpInit_Patch(&HalTimerOp); + SystemCoreClockUpdate(); + + // Set SPS lower voltage val = __RTK_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0); val &= 0xf0ffffff; val |= 0x6000000; __RTK_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, val); - - //xtal buffer driving current + + // xtal buffer driving current val = __RTK_CTRL_READ32(REG_SYS_XTAL_CTRL1); val &= ~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1); val |= BIT_SYS_XTAL_DRV_RF1(1); __RTK_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, val); -} -//3 Image 2 -extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n); - -//extern uint32_t mbed_stack_isr_start; -//extern uint32_t mbed_stack_isr_size; -INFRA_START_SECTION void PLAT_Start(void) -{ - u8 isFlashEn; -#if defined ( __ICCARM__ ) - __iar_data_init_app(); -#endif - // Clear RAM BSS - __rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__); - - TRAP_OverrideTable(0x1FFFFFFC); -/* add by Ian --for mbed isr stack address setting */ - __set_MSP(0x1fffffbc); - - -#ifdef CONFIG_SPIC_MODULE - if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT_SOC_FLASH_EN) != 0) { - isFlashEn = 1; - } else { - isFlashEn = 0; - } -#endif + // Initialize SPIC, then disable it for power saving. + if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT_SOC_FLASH_EN) != 0) { + SpicNVMCalLoadAll(); + SpicReadIDRtl8195A(); + SpicDisableRtl8195A(); + } #ifdef CONFIG_TIMER_MODULE - HalTimerOpInit_Patch(&HalTimerOp); + Calibration32k(); #endif - //DBG_8195A("===== Enter Image 2 ====\n"); - - - SystemCoreClockUpdate(); - - if (isFlashEn) { -#if CONFIG_SPIC_EN && SPIC_CALIBRATION_IN_NVM - SpicNVMCalLoadAll(); -#endif - SpicReadIDRtl8195A(); - // turn off SPIC for power saving - SpicDisableRtl8195A(); - } - - - PLAT_Init(); -#ifdef CONFIG_TIMER_MODULE - Calibration32k(); - -#ifdef CONFIG_WDG -#ifdef CONFIG_WDG_TEST - WDGInit(); -#endif //CONFIG_WDG_TEST -#endif //CONFIG_WDG -#endif //CONFIG_TIMER_MODULE - -#ifdef CONFIG_SOC_PS_MODULE - //InitSoCPM(); -#endif - /* GPIOA_7 does not pull high at power on. It causes SDIO Device - * hardware to enable automatically and occupy GPIOA[7:0] */ #ifndef CONFIG_SDIO_DEVICE_EN SDIO_DEV_Disable(); #endif @@ -256,37 +236,41 @@ extern void SVC_Handler(void); extern void PendSV_Handler(void); extern void SysTick_Handler(void); +// The Main App entry point #if defined (__CC_ARM) __asm void ARM_PLAT_Main(void) { - IMPORT SystemInit - IMPORT __main - BL SystemInit - BL __main + IMPORT SystemInit + IMPORT __main + BL SystemInit + BL __main +} +#elif defined (__ICCARM__) +extern void __iar_program_start(void); + +void IAR_PLAT_Main(void) +{ + SystemInit(); + __iar_program_start(); } #endif -extern void __iar_program_start( void ); -// The Main App entry point void PLAT_Main(void) { TRAP_Init((void *)SVC_Handler, (void *)PendSV_Handler, (void *)SysTick_Handler); -#if defined (__ICCARM__) - //IAR_PLAT_Main(); - SystemInit(); - __iar_program_start(); -#elif defined (__CC_ARM) - ARM_PLAT_Main(); - -#elif defined (__GNUC__) - __asm ( - "ldr r0, =SystemInit \n" +#if defined (__CC_ARM) + ARM_PLAT_Main(); +#elif defined (__ICCARM__) + IAR_PLAT_Main(); +#else + __asm ("ldr r0, =SystemInit \n" "blx r0 \n" "ldr r0, =_start \n" "bx r0 \n" ); #endif + // Never reached - for(;;); + for (;;); } diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c new file mode 100644 index 0000000000..811407a514 --- /dev/null +++ b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.c @@ -0,0 +1,154 @@ +/* mbed Microcontroller Library + * Copyright (c) 2013-2017 Realtek Semiconductor Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include +#include + +#include "mbed_wait_api.h" + +#include "rtl8195a.h" +#include "flash_ext.h" + +#define FLASH_TOP 0x200000 +#define FLASH_SECTOR_SIZE 0x1000 +#define FLASH_SECTOR_MASK ~(FLASH_SECTOR_SIZE - 1) +#define OTA_REGION1 0x0b000 +#define OTA_REGION2 0xc0000 +#define TAG_OFS 0xc +#define VER_OFS 0x10 + +#define TAG_DOWNLOAD 0x81950001 +#define TAG_VERIFIED 0x81950003 + +static flash_t flash_obj; + +typedef struct imginfo_s { + uint32_t base; + uint32_t tag; + uint64_t ver; +} imginfo_t; + + +void OTA_GetImageInfo(imginfo_t *info) +{ + uint32_t ver_hi, ver_lo; + + flash_ext_read_word(&flash_obj, info->base + TAG_OFS, &info->tag); + flash_ext_read_word(&flash_obj, info->base + VER_OFS, &ver_lo); + flash_ext_read_word(&flash_obj, info->base + VER_OFS + 4, &ver_hi); + + if (info->tag == TAG_DOWNLOAD) { + info->ver = ((uint64_t)ver_hi << 32) | (uint64_t) ver_lo; + } else { + info->ver = 0; + } +} + +uint32_t OTA_GetBase(void) +{ + static uint32_t ota_base = 0; + imginfo_t region1, region2; + + if (ota_base == OTA_REGION1 || ota_base == OTA_REGION2) { + return ota_base; + } + + region1.base = OTA_REGION1; + region2.base = OTA_REGION2; + + OTA_GetImageInfo(®ion1); + OTA_GetImageInfo(®ion2); + + if (region1.ver >= region2.ver) { + ota_base = region2.base; + } else { + ota_base = region1.base; + } + return ota_base; +} + +uint32_t OTA_MarkUpdateDone(void) +{ + uint32_t addr = OTA_GetBase() + TAG_OFS; + + return flash_ext_write_word(&flash_obj, addr, TAG_DOWNLOAD); +} + +uint32_t OTA_UpdateImage(uint32_t offset, uint32_t len, uint8_t *data) +{ + uint32_t addr, start, end, count, shift; + uint8_t *pdata = data; + uint8_t buf[FLASH_SECTOR_SIZE]; + + start = OTA_GetBase() + offset; + end = start + len; + + if (data == NULL || start > FLASH_TOP || end > FLASH_TOP) { + return 0; + } + + addr = start & FLASH_SECTOR_MASK; + if (addr != start) { + shift = start - addr; + count = MIN(FLASH_SECTOR_SIZE - shift, len); + flash_ext_stream_read(&flash_obj, addr, shift, buf); + memcpy((void *)buf + shift, (void *)pdata, count); + + flash_ext_erase_sector(&flash_obj, addr); + flash_ext_stream_write(&flash_obj, addr, FLASH_SECTOR_SIZE, buf); + addr += FLASH_SECTOR_SIZE; + pdata += count; + } + + while (addr < end) { + printf("OTA: update addr=0x%lx, len=%ld\r\n", addr, len); + count = MIN(FLASH_SECTOR_SIZE, end - addr); + flash_ext_erase_sector(&flash_obj, addr); + flash_ext_stream_write(&flash_obj, addr, count, pdata); + addr += FLASH_SECTOR_SIZE; + pdata += count; + } + return len; +} + +uint32_t OTA_ReadImage(uint32_t offset, uint32_t len, uint8_t *data) +{ + uint32_t addr, endaddr; + + addr = OTA_GetBase() + offset; + endaddr = addr + len; + + if (data == NULL || addr > FLASH_TOP || endaddr > FLASH_TOP) { + return 0; + } + + printf("OTA: read addr=0x%lx\r\n", addr); + return flash_ext_stream_read(&flash_obj, addr, len, data); +} + +void OTA_ResetTarget(void) +{ + __RTK_CTRL_WRITE32(0x14, 0x00000021); + wait(1); + + // write SCB->AIRCR + HAL_WRITE32(0xE000ED00, 0x0C, + (0x5FA << 16) | // VECTKEY + (HAL_READ32(0xE000ED00, 0x0C) & (7 << 8)) | // PRIGROUP + (1 << 2)); // SYSRESETREQ + + // not reached + while (1); +} diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.h b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.h new file mode 100644 index 0000000000..2b978a3236 --- /dev/null +++ b/targets/TARGET_Realtek/TARGET_AMEBA/ota_api.h @@ -0,0 +1,18 @@ +#ifndef MBED_OTA_API_H +#define MBED_OTA_API_H + +#ifdef __cplusplus + extern "C" { +#endif + +extern uint32_t OTA_UpdateImage(uint32_t offset, uint32_t len, uint8_t *data); +extern uint32_t OTA_ReadImage(uint32_t offset, uint32_t len, uint8_t *data); +extern uint32_t OTA_MarkUpdateDone(void); +extern void OTA_ResetTarget(void); + +#ifdef __cplusplus +} +#endif + +#endif /* MBED_OTA_API_H */ + diff --git a/tools/bootloaders/REALTEK_RTL8195AM/ram_1_prepend.bin b/tools/bootloaders/REALTEK_RTL8195AM/ram_1.bin similarity index 79% rename from tools/bootloaders/REALTEK_RTL8195AM/ram_1_prepend.bin rename to tools/bootloaders/REALTEK_RTL8195AM/ram_1.bin index 821a8438c6..5306948efa 100644 Binary files a/tools/bootloaders/REALTEK_RTL8195AM/ram_1_prepend.bin and b/tools/bootloaders/REALTEK_RTL8195AM/ram_1.bin differ diff --git a/tools/targets/REALTEK_RTL8195AM.py b/tools/targets/REALTEK_RTL8195AM.py index 3ff9c7db19..10a67c0fe5 100644 --- a/tools/targets/REALTEK_RTL8195AM.py +++ b/tools/targets/REALTEK_RTL8195AM.py @@ -1,20 +1,7 @@ """ -mbed REALTEK_RTL8195AM elf2bin script -Copyright (c) 2011-2016 Realtek Semiconductor Corp. +Realtek Semiconductor Corp. -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. - -LIBRARIES BUILD +RTL8195A elf2bin script """ import sys, array, struct, os, re, subprocess @@ -24,159 +11,253 @@ from tools.paths import TOOLS_BOOTLOADERS from datetime import datetime # Constant Variables -RAM2_RSVD = 0x3131373835393138 -RAM3_RSVD = 0xFFFFFFFFFFFFFFFF -IMG2_OFFSET = 0x10006000 #default +RAM2_RSVD = 0x00000000 +RAM2_VER = 0x8195FFFF00000000 +RAM2_TAG = 0x81950001 +RAM2_SHA = '0' def write_fixed_width_string(value, width, output): - # cut string to list & reverse - line = [value[i:i+2] for i in range(0, len(value), 2)] - output.write("".join([chr(long(b, 16)) for b in line])) + # cut string to list & reverse + line = [value[i:i+2] for i in range(0, len(value), 2)] + output.write("".join([chr(long(b, 16)) for b in line])) def write_fixed_width_value(value, width, output): - # convert to string - line = format(value, '0%dx' % (width)) - if len(line) > width: - print "[ERROR] value 0x%s cannot fit width %d" % (line, width) - sys.exit(-1) - # cut string to list & reverse - line = [line[i:i+2] for i in range(0, len(line), 2)] - line.reverse() - # convert to write buffer - output.write("".join([chr(long(b, 16)) for b in line])) + # convert to string + line = format(value, '0%dx' % (width)) + if len(line) > width: + print "[ERROR] value 0x%s cannot fit width %d" % (line, width) + sys.exit(-1) + # cut string to list & reverse + line = [line[i:i+2] for i in range(0, len(line), 2)] + line.reverse() + # convert to write buffer + output.write("".join([chr(long(b, 16)) for b in line])) def append_image_file(image, output): - try: - input = open(image, "rb") - output.write(input.read()) - except Exception: - return + input = open(image, "rb") + output.write(input.read()) input.close() -def prepend(image, image_prepend, toolchain, info): - if info['size'] == 0: - return - output = open(image_prepend, "wb") - write_fixed_width_value(info['size'], 8, output) - write_fixed_width_value(info['addr'], 8, output) - if info['img'] == 2 : - write_fixed_width_value(RAM2_RSVD, 16, output) - elif info['img'] == 3 : - write_fixed_width_value(RAM3_RSVD, 16, output) - if os.path.isfile(image): - with open(image, "rb") as input: - if toolchain == "IAR": - input.seek(info['addr']) - elif info['img'] == 3: #toolchain is not IAR - input.seek(info['addr']-IMG2_OFFSET) - output.write(input.read(info['size'])) - else: - image = os.path.join(image, info['name']) - with open(image, "rb") as input: - output.write(input.read(info['size'])) - - output.close() - - -def _parse_section(toolchain, elf, section): - info = {'addr':None, 'size':0}; - if toolchain not in ["GCC_ARM", "ARM_STD", "ARM", "ARM_MICRO", "IAR"]: - print "[ERROR] unsupported toolchain " + toolchain +def write_padding_bytes(output_name, size): + current_size = os.stat(output_name).st_size + padcount = size - current_size + if padcount < 0: + print "[ERROR] image is larger than expected size" sys.exit(-1) - - mapfile = elf.rsplit(".", 1)[0] + ".map" - - with open(mapfile, 'r') as infile: - # Search area to parse - for line in infile: - if toolchain == "GCC_ARM": - # .image2.table 0x[00000000]30000000 0x18 - # 0x[00000000]30000000 __image2_start__ = . - # 0x[00000000]30000000 __image2_entry_func__ = . - match = re.match(r'^' + section + \ - r'\s+0x0{,8}(?P[0-9A-Fa-f]{8})\s+0x(?P[0-9A-Fa-f]+).*$', line) - elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]: - # Memory Map of the image - # Load Region LR_DRAM (Base: 0x30000000, Size: 0x00006a74, Max: 0x00200000, ABSOLUTE) - # Execution Region IMAGE2_TABLE (Base: 0x30000000, Size: 0x00000018, Max: 0xffffffff, ABSOLUTE, FIXED) - # Base Addr Size Type Attr Idx E Section Name Object - # 0x30000000 0x00000004 Data RO 5257 .image2.ram.data rtl8195a_init.o - match = re.match(r'^.*Region\s+' + section + \ - r'\s+\(Base: 0x(?P[0-9A-Fa-f]{8}),\s+Size: 0x(?P[0-9A-Fa-f]+), .*\)$', line) - elif toolchain == "IAR": - # Section Kind Address Size Object - # ------- ---- ------- ---- ------ - # "A3": 0x8470 - # IMAGE2 0x10006000 0x5d18 - # .ram_image2.text 0x10006000 0x5bbc - # .rodata const 0x10006000 0x14 retarget.o [17] - match = re.match(r'^\s+' + section + \ - r'\s+0x(?P[0-9A-Fa-f]{8})\s+0x(?P[0-9A-Fa-f]+)\s+.*$', line) - if match: - info['addr'] = int(match.group("addr"), 16) - try: - info['size'] = int(match.group("size"), 16) - except IndexError: - print "[WARNING] cannot find the size of section " + section - return info + output = open(output_name, "ab") + output.write('\377' * padcount) + output.close() - print "[ERROR] cannot find the address of section " + section - return info +def sha256_checksum(filename, block_size=65536): + sha256 = hashlib.sha256() + with open(filename, 'rb') as f: + for block in iter(lambda: f.read(block_size), b''): + sha256.update(block) + return sha256.hexdigest() -def parse_section(toolchain, elf, sections, img): - img_info = {'name':"", 'addr':None, 'size':0, 'img':img} - for section in sections: - section_info = _parse_section(toolchain, elf, section) - if img_info['addr'] is None or img_info['addr'] > section_info['addr']: - img_info['addr'] = section_info['addr'] - img_info['name'] = section - img_info['size'] = img_info['size'] + section_info['size'] - return img_info +def get_version_by_time(): + secs = int((datetime.now()-datetime(2016,11,1)).total_seconds()) + return RAM2_VER + secs # ---------------------------- # main function # ---------------------------- -def rtl8195a_elf2bin(toolchain, image_elf, image_bin): +def prepend(image, entry, segment, image_ram2, image_ota): + + # parse input arguments + output = open(image_ram2, "wb") + + write_fixed_width_value(os.stat(image).st_size, 8, output) + write_fixed_width_value(int(entry), 8, output) + write_fixed_width_value(int(segment), 8, output) + + RAM2_SHA = sha256_checksum(image) + write_fixed_width_value(RAM2_TAG, 8, output) + write_fixed_width_value(get_version_by_time(), 16, output) + write_fixed_width_string(RAM2_SHA, 64, output) + write_fixed_width_value(RAM2_RSVD, 8, output) + + append_image_file(image, output) + output.close() + + ota = open(image_ota, "wb") + write_fixed_width_value(os.stat(image).st_size, 8, ota) + write_fixed_width_value(int(entry), 8, ota) + write_fixed_width_value(int(segment), 8, ota) + write_fixed_width_value(0xFFFFFFFF, 8, ota) + write_fixed_width_value(get_version_by_time(), 16, ota) + write_fixed_width_string(RAM2_SHA, 64, ota) + write_fixed_width_value(RAM2_RSVD, 8, ota) + + append_image_file(image, ota) + ota.close() + +def find_symbol(toolchain, mapfile, symbol): + ret = None + + HEX = '0x0{,8}(?P[0-9A-Fa-f]{8})' if toolchain == "GCC_ARM": - img2_sections = [".image2.table", ".text", ".data"] - img3_sections = [".sdr_all"] + SYM = re.compile(r'^\s+' + HEX + r'\s+' + symbol + '\r?$') elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]: - img2_sections = [".image2.table", ".text", ".data"] - img3_sections = ["_DRAM_CODE"] + SYM = re.compile(r'^\s+' + HEX + r'\s+0x[0-9A-Fa-f]{8}\s+Code.*\s+i\.' + symbol + r'\s+.*$') elif toolchain == "IAR": - img2_sections = ["IMAGE2"] - img3_sections = ["SDRAM"] + SYM = re.compile(r'^' + symbol + r'\s+' + HEX + '\s+.*$') + + with open(mapfile, 'r') as infile: + for line in infile: + match = re.match(SYM, line) + if match: + ret = match.group("addr") + + if not ret: + print "[ERROR] cannot find the address of symbol " + symbol + return 0 + + return int(ret,16) | 1 + +def parse_load_segment_gcc(image_elf): + # Program Headers: + # Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align + # LOAD 0x000034 0x10006000 0x10006000 0x026bc 0x026bc RW 0x8 + # LOAD 0x0026f0 0x30000000 0x30000000 0x06338 0x06338 RWE 0x4 + segment_list = [] + cmd = 'arm-none-eabi-readelf -l ' + image_elf + for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"): + if not line.startswith(" LOAD"): + continue + segment = line.split() + if len(segment) != 8: + continue + offset = int(segment[1][2:], 16) + addr = int(segment[2][2:], 16) + size = int(segment[4][2:], 16) + if addr != 0 and size != 0: + segment_list.append((offset, addr, size)) + return segment_list + +def parse_load_segment_armcc(image_elf): + # ==================================== + # + # ** Program header #2 + # + # Type : PT_LOAD (1) + # File Offset : 52 (0x34) + # Virtual Addr : 0x30000000 + # Physical Addr : 0x30000000 + # Size in file : 27260 bytes (0x6a7c) + # Size in memory: 42168 bytes (0xa4b8) + # Flags : PF_X + PF_W + PF_R + PF_ARM_ENTRY (0x80000007) + # Alignment : 8 + # + (offset, addr, size) = (0, 0, 0) + segment_list = [] + in_segment = False + cmd = 'fromelf.exe --text -v --only=none ' + image_elf + for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"): + if line == "": + pass + elif line.startswith("** Program header"): + in_segment = True + elif in_segment == False: + pass + elif line.startswith("============"): + if addr != 0 and size != 0: + segment_list.append((offset, addr, size)) + in_segment = False + (offset, addr, size) = (0, 0, 0) + elif line.startswith(" Type"): + if not re.match(r'\s+Type\s+:\s+PT_LOAD\s.*$', line): + in_segment = False + elif line.startswith(" File Offset"): + match = re.match(r'^\s+File Offset\s+:\s+(?P\d+).*$', line) + if match: + offset = int(match.group("offset")) + elif line.startswith(" Virtual Addr"): + match = re.match(r'^\s+Virtual Addr\s+:\s+0x(?P[0-9a-f]+).*$', line) + if match: + addr = int(match.group("addr"), 16) + elif line.startswith(" Size in file"): + match = re.match(r'^\s+Size in file\s+:.*\(0x(?P[0-9a-f]+)\).*$', line) + if match: + size = int(match.group("size"), 16) + return segment_list + + +def parse_load_segment_iar(image_elf): + # SEGMENTS: + # + # Type Offset Virtual Physical File Sz Mem Sz Flags Align + # ---- ------ ------- -------- ------- ------ ----- ----- + # 0: load 0x34 0x10006000 0x10006000 0x26bc 0x26bc 0x6 WR 0x8 + # 1: load 0x26f0 0x30000000 0x30000000 0x6338 0x6338 0x7 XWR 0x4 + # + # SECTIONS: + # + # Name Type Addr Offset Size Aln Lnk Inf ESz Flags + # ---- ---- ---- ------ ---- --- --- --- --- ----- + # 1: .shstrtab strtab 0xfc4d8 0x60 0x4 + # 2: .strtab strtab 0xfc538 0xbb3f 0x4 + + segment_list = [] + in_segment = False + cmd = 'ielfdumparm.exe ' + image_elf + for line in subprocess.check_output(cmd, shell=True, universal_newlines=True).split("\n"): + if line.startswith(" SEGMENTS:"): + in_segment = True + elif in_segment == False: + pass + elif line.startswith(" SECTIONS:"): + break + elif re.match(r'^\s+\w+:\s+load\s+.*$', line): + segment = line.split() + offset = int(segment[2][2:], 16) + addr = int(segment[3][2:], 16) + size = int(segment[5][2:], 16) + if addr != 0 and size != 0: + segment_list.append((offset, addr, size)) + return segment_list + +def parse_load_segment(toolchain, image_elf): + if toolchain == "GCC_ARM": + return parse_load_segment_gcc(image_elf) + elif toolchain in ["ARM_STD", "ARM", "ARM_MICRO"]: + return parse_load_segment_armcc(image_elf) + elif toolchain == "IAR": + return parse_load_segment_iar(image_elf) else: - print("[error] unsupported toolchain") + toolchain - return - image2_info = {'addr':None, 'size':0, 'img':2} - image3_info = {'addr':None, 'size':0, 'img':3} + return [] + +def write_load_segment(image_elf, image_bin, segment): + file_elf = open(image_elf, "rb") + file_bin = open(image_bin, "wb") + for (offset, addr, size) in segment: + file_elf.seek(offset) + # write image header - size & addr + write_fixed_width_value(addr, 8, file_bin) + write_fixed_width_value(size, 8, file_bin) + # write load segment + file_bin.write(file_elf.read(size)) + file_bin.close() + file_elf.close() + +# ---------------------------- +# main function +# ---------------------------- +def rtl8195a_elf2bin(t_self, image_elf, image_bin): + segment = parse_load_segment(t_self.name, image_elf) + write_load_segment(image_elf, image_bin, segment) + image_name = os.path.splitext(image_elf)[0] + image_map = image_name + '.map' - img1_prepend_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1_prepend.bin") - img2_prepend_bin = image_name + '-ram_2_prepend.bin' - img3_prepend_bin = image_name + '-ram_3_prepend.bin' - - old_bin = image_name + '.bin' + ram2_ent = find_symbol(t_self.name, image_map, "PLAT_Start") + ram1_bin = os.path.join(TOOLS_BOOTLOADERS, "REALTEK_RTL8195AM", "ram_1.bin") + ram2_bin = image_name + '-ram_2.bin' + ota_bin = image_name + '-ota.bin' + prepend(image_bin, ram2_ent, len(segment), ram2_bin, ota_bin) - img_info = parse_section(toolchain, image_elf, img2_sections, 2) - prepend(old_bin, img2_prepend_bin, toolchain, img_info) - img_info = parse_section(toolchain, image_elf, img3_sections, 3) - prepend(old_bin, img3_prepend_bin, toolchain, img_info) - - #delete original binary - if os.path.isfile(image_bin): - os.remove(image_bin) - else: - for i in os.listdir(image_bin): - os.remove(os.path.join(image_bin, i)) - os.removedirs(image_bin) - # write output file output = open(image_bin, "wb") - append_image_file(img1_prepend_bin, output) - append_image_file(img2_prepend_bin, output) - append_image_file(img3_prepend_bin, output) + append_image_file(ram1_bin, output) + append_image_file(ram2_bin, output) output.close() - # post built done - diff --git a/tools/targets/__init__.py b/tools/targets/__init__.py index 9d02174234..ce794777b6 100644 --- a/tools/targets/__init__.py +++ b/tools/targets/__init__.py @@ -523,7 +523,7 @@ class RTL8195ACode: @staticmethod def binary_hook(t_self, resources, elf, binf): from tools.targets.REALTEK_RTL8195AM import rtl8195a_elf2bin - rtl8195a_elf2bin(t_self.name, elf, binf) + rtl8195a_elf2bin(t_self, elf, binf) ################################################################################ # Instantiate all public targets