From c9e0c4f6f79ccb5b2cd523f464c89932a8cecb35 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 29 May 2020 16:47:15 +0200 Subject: [PATCH] STM32WB ReadMe quick update See #12975 --- targets/TARGET_STM/TARGET_STM32WB/README.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/targets/TARGET_STM/TARGET_STM32WB/README.md b/targets/TARGET_STM/TARGET_STM32WB/README.md index cc2c530f03..2c4a2e8650 100644 --- a/targets/TARGET_STM/TARGET_STM32WB/README.md +++ b/targets/TARGET_STM/TARGET_STM32WB/README.md @@ -23,6 +23,10 @@ This ST MCU family is dual-core : based on an Arm Cortex-M4 core and an Arm Cort - SRAM2a: 32 KB - SRAM2b: 32 KB +SRAM1 is dedicated for M4 core, and then for mbed-os applications. + +SRAM2 is dedicated for M0 core and inter CPU communication, and then can not be addressed. + # BLE