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PSOC6: minor updates to Cypress HAL

pull/9762/head
Volodymyr Medvid 2019-02-15 14:34:39 +02:00
parent edb944abf0
commit c97f742bd7
8 changed files with 61 additions and 70 deletions
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6
targets/TARGET_Cypress/TARGET_PSOC6/analogin_api.c
View File

@ -173,8 +173,7 @@ uint16_t analogin_read_u16(analogin_t *obj)
if (CY_SAR_PORT_9 != port) { if (CY_SAR_PORT_9 != port) {
/* Connect the SAR Vplus input to the pin directly */ /* Connect the SAR Vplus input to the pin directly */
Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, obj->channel_mask, CY_SAR_SWITCH_CLOSE); Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, obj->channel_mask, CY_SAR_SWITCH_CLOSE);
} } else {
else {
/* Connect the SAR Vplus input to the AMUXA bus */ /* Connect the SAR Vplus input to the AMUXA bus */
Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk, CY_SAR_SWITCH_CLOSE); Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk, CY_SAR_SWITCH_CLOSE);
@ -192,8 +191,7 @@ uint16_t analogin_read_u16(analogin_t *obj)
if (CY_SAR_PORT_9 != port) { if (CY_SAR_PORT_9 != port) {
/* Disconnect the SAR Vplus input from the pin */ /* Disconnect the SAR Vplus input from the pin */
Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, obj->channel_mask, CY_SAR_SWITCH_OPEN); Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, obj->channel_mask, CY_SAR_SWITCH_OPEN);
} } else {
else {
/* Disconnect the AMUXA bus from the pin */ /* Disconnect the AMUXA bus from the pin */
Cy_GPIO_SetHSIOM(portPrt, CY_PIN(obj->pin), HSIOM_SEL_GPIO); Cy_GPIO_SetHSIOM(portPrt, CY_PIN(obj->pin), HSIOM_SEL_GPIO);

33
targets/TARGET_Cypress/TARGET_PSOC6/crc_api.c
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@ -26,11 +26,11 @@
#include "cy_crypto_core_crc.h" #include "cy_crypto_core_crc.h"
static uint32_t crcWidth = 0; static uint32_t crcWidth = 0UL;
static uint32_t crcShift = 0; static uint32_t crcShift = 0UL;
static uint32_t crcXorMask; static uint32_t crcXorMask;
/* Cypress CRYPTO HW supports ANY CRC algorithms from CRC-3 to CRC-32 */ /* Cypress CRYPTO hardware supports any CRC algorithms from CRC-3 to CRC-32 */
bool hal_crc_is_supported(const crc_mbed_config_t *config) bool hal_crc_is_supported(const crc_mbed_config_t *config)
{ {
return (config != NULL); return (config != NULL);
@ -38,20 +38,19 @@ bool hal_crc_is_supported(const crc_mbed_config_t *config)
void hal_crc_compute_partial_start(const crc_mbed_config_t *config) void hal_crc_compute_partial_start(const crc_mbed_config_t *config)
{ {
uint32_t myMask = 0; uint32_t myMask = 0UL;
if (!hal_crc_is_supported(config) || (cy_reserve_crypto(CY_CRYPTO_CRC_HW) != 0)) if (!hal_crc_is_supported(config) || (cy_reserve_crypto(CY_CRYPTO_CRC_HW) != 0U)) {
{
return; return;
} }
crcWidth = config->width; crcWidth = config->width;
crcShift = (uint32_t)(!config->reflect_out) * (crcWidth & 7u); crcShift = (uint32_t)(!config->reflect_out) * (crcWidth & 7U);
if (crcShift) { if (0U != crcShift) {
crcShift = 8u - crcShift; crcShift = 8U - crcShift;
for (uint32_t i = 0; i < crcShift; i++) { for (uint32_t i = 0U; i < crcShift; i++) {
myMask |= 1 << i; myMask |= 1U << i;
} }
crcXorMask = config->final_xor & myMask; crcXorMask = config->final_xor & myMask;
} }
@ -59,7 +58,7 @@ void hal_crc_compute_partial_start(const crc_mbed_config_t *config)
Cy_Crypto_Core_Crc_CalcInit(CRYPTO, config->width, Cy_Crypto_Core_Crc_CalcInit(CRYPTO, config->width,
config->polynomial, config->polynomial,
config->reflect_in, config->reflect_in,
0, 0U,
config->reflect_out, config->reflect_out,
config->final_xor >> crcShift, config->final_xor >> crcShift,
config->initial_xor); config->initial_xor);
@ -67,7 +66,7 @@ void hal_crc_compute_partial_start(const crc_mbed_config_t *config)
void hal_crc_compute_partial(const uint8_t *data, const size_t size) void hal_crc_compute_partial(const uint8_t *data, const size_t size)
{ {
if ((data == NULL) || (size <= 0) || (crcWidth == 0)) { if ((data == NULL) || (size <= 0U) || (crcWidth == 0U)) {
return; return;
} }
@ -76,10 +75,10 @@ void hal_crc_compute_partial(const uint8_t *data, const size_t size)
uint32_t hal_crc_get_result(void) uint32_t hal_crc_get_result(void)
{ {
uint32_t result = 0; uint32_t result = 0UL;
if (crcWidth == 0) { if (crcWidth == 0UL) {
return 0xffffffffu; return 0xFFFFFFFFUL;
} }
Cy_Crypto_Core_Crc_CalcFinish(CRYPTO, crcWidth, &result); Cy_Crypto_Core_Crc_CalcFinish(CRYPTO, crcWidth, &result);
@ -89,7 +88,7 @@ uint32_t hal_crc_get_result(void)
result = result ^ crcXorMask; result = result ^ crcXorMask;
} }
crcWidth = 0; crcWidth = 0UL;
cy_free_crypto(CY_CRYPTO_CRC_HW); cy_free_crypto(CY_CRYPTO_CRC_HW);

25
targets/TARGET_Cypress/TARGET_PSOC6/psoc6_utils.c
View File

@ -370,26 +370,20 @@ int cy_reserve_crypto(cy_en_crypto_submodule_t module_num)
{ {
int result = (-1); int result = (-1);
if (module_num < NUM_CRYPTO_HW) if (module_num < NUM_CRYPTO_HW) {
{
core_util_critical_section_enter(); core_util_critical_section_enter();
if (cy_crypto_reserved_status() == 0) if (cy_crypto_reserved_status() == 0) {
{
/* Enable Crypto IP on demand */ /* Enable Crypto IP on demand */
Cy_Crypto_Core_Enable(CRYPTO); Cy_Crypto_Core_Enable(CRYPTO);
} }
if (module_num == CY_CRYPTO_COMMON_HW) if (module_num == CY_CRYPTO_COMMON_HW) {
{ if (crypto_reservations[module_num] != 1) {
if (crypto_reservations[module_num] != 1)
{
crypto_reservations[module_num] = 1; crypto_reservations[module_num] = 1;
result = 0; result = 0;
} }
} } else {
else
{
crypto_reservations[module_num] = 1; crypto_reservations[module_num] = 1;
result = 0; result = 0;
} }
@ -405,16 +399,13 @@ void cy_free_crypto(cy_en_crypto_submodule_t module_num)
{ {
int result = (-1); int result = (-1);
if (module_num < NUM_CRYPTO_HW) if (module_num < NUM_CRYPTO_HW) {
{
core_util_critical_section_enter(); core_util_critical_section_enter();
if (crypto_reservations[module_num] == 1) if (crypto_reservations[module_num] == 1) {
{
crypto_reservations[module_num] = 0; crypto_reservations[module_num] = 0;
if (cy_crypto_reserved_status() == 0) if (cy_crypto_reserved_status() == 0) {
{
/* Crypto hardware is still in enabled state; to disable: /* Crypto hardware is still in enabled state; to disable:
Cy_Crypto_Core_Disable(CRYPTO) */ Cy_Crypto_Core_Disable(CRYPTO) */
} }

3
targets/TARGET_Cypress/TARGET_PSOC6/psoc6_utils.h
View File

@ -215,8 +215,7 @@ static inline uint32_t gpio_get_cy_drive_mode(PinDirection dir, PinMode mode)
return cymode; return cymode;
} }
typedef enum typedef enum {
{
CY_CRYPTO_TRNG_HW, CY_CRYPTO_TRNG_HW,
CY_CRYPTO_CRC_HW, CY_CRYPTO_CRC_HW,
CY_CRYPTO_VU_HW, CY_CRYPTO_VU_HW,

4
targets/TARGET_Cypress/TARGET_PSOC6/pwmout_api.c
View File

@ -73,7 +73,7 @@ static void pwm_start_32b(pwmout_t *obj, uint32_t new_period, uint32_t new_width
Cy_TCPWM_PWM_SetPeriod0(obj->base, obj->counter_id, obj->period - 1); Cy_TCPWM_PWM_SetPeriod0(obj->base, obj->counter_id, obj->period - 1);
Cy_TCPWM_PWM_SetCompare0(obj->base, obj->counter_id, obj->pulse_width); Cy_TCPWM_PWM_SetCompare0(obj->base, obj->counter_id, obj->pulse_width);
Cy_TCPWM_PWM_Enable(obj->base, obj->counter_id); Cy_TCPWM_PWM_Enable(obj->base, obj->counter_id);
Cy_TCPWM_TriggerStart(obj->base, 1UL << obj->counter_id); Cy_TCPWM_TriggerReloadOrIndex(obj->base, 1UL << obj->counter_id);
} }
static void pwm_start_16b(pwmout_t *obj, uint32_t period, uint32_t width) static void pwm_start_16b(pwmout_t *obj, uint32_t period, uint32_t width)
@ -101,7 +101,7 @@ static void pwm_start_16b(pwmout_t *obj, uint32_t period, uint32_t width)
Cy_TCPWM_PWM_SetPrescaler(obj->base, obj->counter_id, prescaler); Cy_TCPWM_PWM_SetPrescaler(obj->base, obj->counter_id, prescaler);
Cy_TCPWM_PWM_SetCompare0(obj->base, obj->counter_id, width); Cy_TCPWM_PWM_SetCompare0(obj->base, obj->counter_id, width);
Cy_TCPWM_PWM_Enable(obj->base, obj->counter_id); Cy_TCPWM_PWM_Enable(obj->base, obj->counter_id);
Cy_TCPWM_TriggerStart(obj->base, 1UL << obj->counter_id); Cy_TCPWM_TriggerReloadOrIndex(obj->base, 1UL << obj->counter_id);
} }
static void pwm_start(pwmout_t *obj, uint32_t new_period, uint32_t new_pulse_width) static void pwm_start(pwmout_t *obj, uint32_t new_period, uint32_t new_pulse_width)

16
targets/TARGET_Cypress/TARGET_PSOC6/serial_api.c
View File

@ -383,13 +383,16 @@ static void serial_init_peripheral(serial_obj_t *obj)
} }
/*
* Callback function to handle into and out of deep sleep state transitions.
*/
#if DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED #if DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED
static cy_en_syspm_status_t serial_pm_callback(cy_stc_syspm_callback_params_t *params) static cy_en_syspm_status_t serial_pm_callback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode)
{ {
serial_obj_t *obj = (serial_obj_t *)params->context; serial_obj_t *obj = (serial_obj_t *) callbackParams->context;
cy_en_syspm_status_t status = CY_SYSPM_FAIL; cy_en_syspm_status_t status = CY_SYSPM_FAIL;
switch (params->mode) { switch (mode) {
case CY_SYSPM_CHECK_READY: case CY_SYSPM_CHECK_READY:
/* If all data elements are transmitted from the TX FIFO and /* If all data elements are transmitted from the TX FIFO and
* shifter and the RX FIFO is empty: the UART is ready to enter * shifter and the RX FIFO is empty: the UART is ready to enter
@ -432,7 +435,7 @@ static cy_en_syspm_status_t serial_pm_callback(cy_stc_syspm_callback_params_t *p
return status; return status;
} }
#endif /* (DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED) */ #endif /* DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED */
void serial_init(serial_t *obj_in, PinName tx, PinName rx) void serial_init(serial_t *obj_in, PinName tx, PinName rx)
@ -501,7 +504,7 @@ void serial_init(serial_t *obj_in, PinName tx, PinName rx)
if (!Cy_SysPm_RegisterCallback(&obj->pm_callback_handler)) { if (!Cy_SysPm_RegisterCallback(&obj->pm_callback_handler)) {
error("PM callback registration failed!"); error("PM callback registration failed!");
} }
#endif /* (DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED) */ #endif /* DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED */
} }
/* Configure hardware resources */ /* Configure hardware resources */
@ -667,8 +670,9 @@ void serial_set_flow_control(serial_t *obj_in, FlowControl type, PinName rxflow,
serial_obj_t *obj = OBJ_P(obj_in); serial_obj_t *obj = OBJ_P(obj_in);
/* Do not perform pins reservation second time for the same pins */ /* Do not perform pins reservation second time for the same pins */
if ((obj->pin_rts == rxflow) && (obj->pin_cts == txflow)) if ((obj->pin_rts == rxflow) && (obj->pin_cts == txflow)) {
return; return;
}
Cy_SCB_UART_Disable(obj->base, NULL); Cy_SCB_UART_Disable(obj->base, NULL);

12
targets/TARGET_Cypress/TARGET_PSOC6/spi_api.c
View File

@ -237,16 +237,16 @@ static void spi_init_peripheral(spi_obj_t *obj)
/* Callback function to handle into and out of deep sleep state transitions. /* Callback function to handle into and out of deep sleep state transitions.
* *
*/ */
#if DEVICE_SLEEP && DEVICE_LOWPOWERTIMER #if DEVICE_SLEEP && DEVICE_LPTICKER
static cy_en_syspm_status_t spi_pm_callback(cy_stc_syspm_callback_params_t *callback_params) static cy_en_syspm_status_t spi_pm_callback(cy_stc_syspm_callback_params_t *callback_params, cy_en_syspm_callback_mode_t mode)
{ {
cy_stc_syspm_callback_params_t params = *callback_params; cy_stc_syspm_callback_params_t params = *callback_params;
spi_obj_t *obj = (spi_obj_t *)params.context; spi_obj_t *obj = (spi_obj_t *)params.context;
params.context = &obj->context; params.context = &obj->context;
return Cy_SCB_SPI_DeepSleepCallback(&params); return Cy_SCB_SPI_DeepSleepCallback(&params, mode);
} }
#endif /* DEVICE_SLEEP && DEVICE_LOWPOWERTIMER */ #endif /* DEVICE_SLEEP && DEVICE_LPTICKER */
void spi_init(spi_t *obj_in, PinName mosi, PinName miso, PinName sclk, PinName ssel) void spi_init(spi_t *obj_in, PinName mosi, PinName miso, PinName sclk, PinName ssel)
@ -314,7 +314,7 @@ void spi_init(spi_t *obj_in, PinName mosi, PinName miso, PinName sclk, PinName s
obj->div_num = _FLD2VAL(CY_PERI_CLOCK_CTL_DIV_SEL, map); obj->div_num = _FLD2VAL(CY_PERI_CLOCK_CTL_DIV_SEL, map);
obj->div_type = (cy_en_divider_types_t) _FLD2VAL(CY_PERI_CLOCK_CTL_TYPE_SEL, map); obj->div_type = (cy_en_divider_types_t) _FLD2VAL(CY_PERI_CLOCK_CTL_TYPE_SEL, map);
} else { } else {
#if DEVICE_SLEEP && DEVICE_LOWPOWERTIMER #if DEVICE_SLEEP && DEVICE_LPTICKER
/* Register callback once */ /* Register callback once */
obj->pm_callback_handler.callback = spi_pm_callback; obj->pm_callback_handler.callback = spi_pm_callback;
obj->pm_callback_handler.type = CY_SYSPM_DEEPSLEEP; obj->pm_callback_handler.type = CY_SYSPM_DEEPSLEEP;
@ -326,7 +326,7 @@ void spi_init(spi_t *obj_in, PinName mosi, PinName miso, PinName sclk, PinName s
if (!Cy_SysPm_RegisterCallback(&obj->pm_callback_handler)) { if (!Cy_SysPm_RegisterCallback(&obj->pm_callback_handler)) {
error("PM callback registration failed!"); error("PM callback registration failed!");
} }
#endif /* DEVICE_SLEEP && DEVICE_LOWPOWERTIMER */ #endif /* DEVICE_SLEEP && DEVICE_LPTICKER */
} }
/* Configure hardware resources */ /* Configure hardware resources */

12
targets/TARGET_Cypress/TARGET_PSOC6/trng_api.c
View File

@ -24,8 +24,8 @@
#include "cy_crypto_core_trng.h" #include "cy_crypto_core_trng.h"
/* Initialization polynomial values fro True Random Generator */ /* Initialization polynomial values fro True Random Generator */
#define GARO31_INITSTATE (0x04c11db7u) #define GARO31_INITSTATE (0x04c11db7UL)
#define FIRO31_INITSTATE (0x04c11db7u) #define FIRO31_INITSTATE (0x04c11db7UL)
#define MAX_TRNG_BIT_SIZE (32UL) #define MAX_TRNG_BIT_SIZE (32UL)
@ -47,7 +47,7 @@ void trng_free(trng_t *obj)
int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length) int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length)
{ {
int ret = 0; int ret = 0;
*output_length = 0; *output_length = 0U;
/* temporary random data buffer */ /* temporary random data buffer */
uint32_t random; uint32_t random;
@ -59,13 +59,13 @@ int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_l
if (Cy_Crypto_Core_Trng(CRYPTO, GARO31_INITSTATE, FIRO31_INITSTATE, MAX_TRNG_BIT_SIZE, &random) != CY_CRYPTO_SUCCESS) { if (Cy_Crypto_Core_Trng(CRYPTO, GARO31_INITSTATE, FIRO31_INITSTATE, MAX_TRNG_BIT_SIZE, &random) != CY_CRYPTO_SUCCESS) {
ret = -1; ret = -1;
} else { } else {
for (uint8_t i = 0; (i < 4) && (*output_length < length) ; i++) { for (uint8_t i = 0; (i < 4U) && (*output_length < length) ; i++) {
*output++ = ((uint8_t *)&random)[i]; *output++ = ((uint8_t *)&random)[i];
*output_length += 1; *output_length += 1U;
} }
} }
} }
random = 0uL; random = 0UL;
return (ret); return (ret);
} }