mirror of https://github.com/ARMmbed/mbed-os.git
PSOC6: minor updates to Cypress HAL
parent
edb944abf0
commit
c97f742bd7
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@ -44,7 +44,7 @@ const uint32_t SAR_BASE_CLOCK_HZ = 18000000; // 18 MHz or less
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CY_SAR_CHAN_SAMPLE_TIME_0 \
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)
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#define CY_SAR_PORT_9 (9uL)
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#define CY_SAR_PORT_9 (9uL)
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/** Global SAR configuration data, modified as channels are configured.
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*/
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@ -173,11 +173,10 @@ uint16_t analogin_read_u16(analogin_t *obj)
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if (CY_SAR_PORT_9 != port) {
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/* Connect the SAR Vplus input to the pin directly */
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Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, obj->channel_mask, CY_SAR_SWITCH_CLOSE);
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}
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else {
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} else {
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/* Connect the SAR Vplus input to the AMUXA bus */
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Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk, CY_SAR_SWITCH_CLOSE);
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/* Connect the AMUXA bus to the pin */
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Cy_GPIO_SetHSIOM(portPrt, CY_PIN(obj->pin), HSIOM_SEL_AMUXA);
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}
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@ -188,15 +187,14 @@ uint16_t analogin_read_u16(analogin_t *obj)
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} else {
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error("ANALOG IN: measurement failed!");
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}
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if (CY_SAR_PORT_9 != port) {
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/* Disconnect the SAR Vplus input from the pin */
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Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, obj->channel_mask, CY_SAR_SWITCH_OPEN);
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}
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else {
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} else {
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/* Disconnect the AMUXA bus from the pin */
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Cy_GPIO_SetHSIOM(portPrt, CY_PIN(obj->pin), HSIOM_SEL_GPIO);
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/* Disconnect the SAR Vplus input from the AMUXA bus */
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Cy_SAR_SetAnalogSwitch(obj->base, CY_SAR_MUX_SWITCH0, SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk, CY_SAR_SWITCH_OPEN);
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}
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@ -26,11 +26,11 @@
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#include "cy_crypto_core_crc.h"
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static uint32_t crcWidth = 0;
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static uint32_t crcShift = 0;
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static uint32_t crcWidth = 0UL;
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static uint32_t crcShift = 0UL;
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static uint32_t crcXorMask;
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/* Cypress CRYPTO HW supports ANY CRC algorithms from CRC-3 to CRC-32 */
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/* Cypress CRYPTO hardware supports any CRC algorithms from CRC-3 to CRC-32 */
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bool hal_crc_is_supported(const crc_mbed_config_t *config)
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{
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return (config != NULL);
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@ -38,20 +38,19 @@ bool hal_crc_is_supported(const crc_mbed_config_t *config)
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void hal_crc_compute_partial_start(const crc_mbed_config_t *config)
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{
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uint32_t myMask = 0;
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uint32_t myMask = 0UL;
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if (!hal_crc_is_supported(config) || (cy_reserve_crypto(CY_CRYPTO_CRC_HW) != 0))
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{
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if (!hal_crc_is_supported(config) || (cy_reserve_crypto(CY_CRYPTO_CRC_HW) != 0U)) {
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return;
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}
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crcWidth = config->width;
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crcShift = (uint32_t)(!config->reflect_out) * (crcWidth & 7u);
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if (crcShift) {
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crcShift = 8u - crcShift;
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for (uint32_t i = 0; i < crcShift; i++) {
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myMask |= 1 << i;
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crcShift = (uint32_t)(!config->reflect_out) * (crcWidth & 7U);
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if (0U != crcShift) {
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crcShift = 8U - crcShift;
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for (uint32_t i = 0U; i < crcShift; i++) {
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myMask |= 1U << i;
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}
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crcXorMask = config->final_xor & myMask;
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}
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@ -59,7 +58,7 @@ void hal_crc_compute_partial_start(const crc_mbed_config_t *config)
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Cy_Crypto_Core_Crc_CalcInit(CRYPTO, config->width,
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config->polynomial,
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config->reflect_in,
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0,
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0U,
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config->reflect_out,
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config->final_xor >> crcShift,
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config->initial_xor);
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@ -67,7 +66,7 @@ void hal_crc_compute_partial_start(const crc_mbed_config_t *config)
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void hal_crc_compute_partial(const uint8_t *data, const size_t size)
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{
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if ((data == NULL) || (size <= 0) || (crcWidth == 0)) {
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if ((data == NULL) || (size <= 0U) || (crcWidth == 0U)) {
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return;
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}
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@ -76,10 +75,10 @@ void hal_crc_compute_partial(const uint8_t *data, const size_t size)
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uint32_t hal_crc_get_result(void)
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{
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uint32_t result = 0;
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uint32_t result = 0UL;
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if (crcWidth == 0) {
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return 0xffffffffu;
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if (crcWidth == 0UL) {
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return 0xFFFFFFFFUL;
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}
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Cy_Crypto_Core_Crc_CalcFinish(CRYPTO, crcWidth, &result);
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@ -89,7 +88,7 @@ uint32_t hal_crc_get_result(void)
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result = result ^ crcXorMask;
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}
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crcWidth = 0;
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crcWidth = 0UL;
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cy_free_crypto(CY_CRYPTO_CRC_HW);
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@ -360,9 +360,9 @@ static uint8_t crypto_reservations[NUM_CRYPTO_HW] = { 0u };
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static int cy_crypto_reserved_status(void)
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{
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return ((int)(crypto_reservations[CY_CRYPTO_TRNG_HW] |
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crypto_reservations[CY_CRYPTO_CRC_HW] |
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crypto_reservations[CY_CRYPTO_VU_HW] |
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crypto_reservations[CY_CRYPTO_COMMON_HW]));
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crypto_reservations[CY_CRYPTO_CRC_HW] |
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crypto_reservations[CY_CRYPTO_VU_HW] |
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crypto_reservations[CY_CRYPTO_COMMON_HW]));
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}
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@ -370,26 +370,20 @@ int cy_reserve_crypto(cy_en_crypto_submodule_t module_num)
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{
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int result = (-1);
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if (module_num < NUM_CRYPTO_HW)
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{
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if (module_num < NUM_CRYPTO_HW) {
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core_util_critical_section_enter();
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if (cy_crypto_reserved_status() == 0)
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{
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if (cy_crypto_reserved_status() == 0) {
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/* Enable Crypto IP on demand */
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Cy_Crypto_Core_Enable(CRYPTO);
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}
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if (module_num == CY_CRYPTO_COMMON_HW)
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{
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if (crypto_reservations[module_num] != 1)
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{
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if (module_num == CY_CRYPTO_COMMON_HW) {
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if (crypto_reservations[module_num] != 1) {
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crypto_reservations[module_num] = 1;
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result = 0;
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}
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}
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else
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{
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} else {
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crypto_reservations[module_num] = 1;
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result = 0;
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}
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@ -405,16 +399,13 @@ void cy_free_crypto(cy_en_crypto_submodule_t module_num)
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{
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int result = (-1);
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if (module_num < NUM_CRYPTO_HW)
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{
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if (module_num < NUM_CRYPTO_HW) {
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core_util_critical_section_enter();
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if (crypto_reservations[module_num] == 1)
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{
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if (crypto_reservations[module_num] == 1) {
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crypto_reservations[module_num] = 0;
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if (cy_crypto_reserved_status() == 0)
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{
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if (cy_crypto_reserved_status() == 0) {
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/* Crypto hardware is still in enabled state; to disable:
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Cy_Crypto_Core_Disable(CRYPTO) */
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}
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@ -215,8 +215,7 @@ static inline uint32_t gpio_get_cy_drive_mode(PinDirection dir, PinMode mode)
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return cymode;
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}
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typedef enum
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{
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typedef enum {
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CY_CRYPTO_TRNG_HW,
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CY_CRYPTO_CRC_HW,
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CY_CRYPTO_VU_HW,
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@ -73,7 +73,7 @@ static void pwm_start_32b(pwmout_t *obj, uint32_t new_period, uint32_t new_width
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Cy_TCPWM_PWM_SetPeriod0(obj->base, obj->counter_id, obj->period - 1);
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Cy_TCPWM_PWM_SetCompare0(obj->base, obj->counter_id, obj->pulse_width);
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Cy_TCPWM_PWM_Enable(obj->base, obj->counter_id);
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Cy_TCPWM_TriggerStart(obj->base, 1UL << obj->counter_id);
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Cy_TCPWM_TriggerReloadOrIndex(obj->base, 1UL << obj->counter_id);
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}
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static void pwm_start_16b(pwmout_t *obj, uint32_t period, uint32_t width)
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@ -101,7 +101,7 @@ static void pwm_start_16b(pwmout_t *obj, uint32_t period, uint32_t width)
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Cy_TCPWM_PWM_SetPrescaler(obj->base, obj->counter_id, prescaler);
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Cy_TCPWM_PWM_SetCompare0(obj->base, obj->counter_id, width);
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Cy_TCPWM_PWM_Enable(obj->base, obj->counter_id);
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Cy_TCPWM_TriggerStart(obj->base, 1UL << obj->counter_id);
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Cy_TCPWM_TriggerReloadOrIndex(obj->base, 1UL << obj->counter_id);
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}
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static void pwm_start(pwmout_t *obj, uint32_t new_period, uint32_t new_pulse_width)
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@ -383,13 +383,16 @@ static void serial_init_peripheral(serial_obj_t *obj)
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}
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/*
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* Callback function to handle into and out of deep sleep state transitions.
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*/
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#if DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED
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static cy_en_syspm_status_t serial_pm_callback(cy_stc_syspm_callback_params_t *params)
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static cy_en_syspm_status_t serial_pm_callback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode)
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{
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serial_obj_t *obj = (serial_obj_t *)params->context;
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serial_obj_t *obj = (serial_obj_t *) callbackParams->context;
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cy_en_syspm_status_t status = CY_SYSPM_FAIL;
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switch (params->mode) {
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switch (mode) {
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case CY_SYSPM_CHECK_READY:
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/* If all data elements are transmitted from the TX FIFO and
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* shifter and the RX FIFO is empty: the UART is ready to enter
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@ -432,7 +435,7 @@ static cy_en_syspm_status_t serial_pm_callback(cy_stc_syspm_callback_params_t *p
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return status;
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}
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#endif /* (DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED) */
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#endif /* DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED */
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void serial_init(serial_t *obj_in, PinName tx, PinName rx)
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@ -492,16 +495,16 @@ void serial_init(serial_t *obj_in, PinName tx, PinName rx)
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#if DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED
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/* Register callback once */
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obj->pm_callback_handler.callback = serial_pm_callback;
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obj->pm_callback_handler.type = CY_SYSPM_DEEPSLEEP;
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obj->pm_callback_handler.type = CY_SYSPM_DEEPSLEEP;
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obj->pm_callback_handler.skipMode = 0;
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obj->pm_callback_handler.callbackParams = &obj->pm_callback_params;
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obj->pm_callback_params.base = obj->base;
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obj->pm_callback_params.base = obj->base;
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obj->pm_callback_params.context = obj;
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if (!Cy_SysPm_RegisterCallback(&obj->pm_callback_handler)) {
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error("PM callback registration failed!");
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}
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#endif /* (DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED) */
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#endif /* DEVICE_SLEEP && DEVICE_LPTICKER && SERIAL_PM_CALLBACK_ENABLED */
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}
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/* Configure hardware resources */
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@ -666,9 +669,10 @@ void serial_set_flow_control(serial_t *obj_in, FlowControl type, PinName rxflow,
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{
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serial_obj_t *obj = OBJ_P(obj_in);
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/* Do not perform pins reservation second time for the same pins */
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if ((obj->pin_rts == rxflow) && (obj->pin_cts == txflow))
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/* Do not perform pins reservation second time for the same pins */
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if ((obj->pin_rts == rxflow) && (obj->pin_cts == txflow)) {
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return;
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}
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Cy_SCB_UART_Disable(obj->base, NULL);
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@ -237,16 +237,16 @@ static void spi_init_peripheral(spi_obj_t *obj)
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/* Callback function to handle into and out of deep sleep state transitions.
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*
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*/
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#if DEVICE_SLEEP && DEVICE_LOWPOWERTIMER
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static cy_en_syspm_status_t spi_pm_callback(cy_stc_syspm_callback_params_t *callback_params)
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#if DEVICE_SLEEP && DEVICE_LPTICKER
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static cy_en_syspm_status_t spi_pm_callback(cy_stc_syspm_callback_params_t *callback_params, cy_en_syspm_callback_mode_t mode)
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{
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cy_stc_syspm_callback_params_t params = *callback_params;
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spi_obj_t *obj = (spi_obj_t *)params.context;
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params.context = &obj->context;
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return Cy_SCB_SPI_DeepSleepCallback(¶ms);
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return Cy_SCB_SPI_DeepSleepCallback(¶ms, mode);
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}
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#endif /* DEVICE_SLEEP && DEVICE_LOWPOWERTIMER */
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#endif /* DEVICE_SLEEP && DEVICE_LPTICKER */
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void spi_init(spi_t *obj_in, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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@ -314,7 +314,7 @@ void spi_init(spi_t *obj_in, PinName mosi, PinName miso, PinName sclk, PinName s
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obj->div_num = _FLD2VAL(CY_PERI_CLOCK_CTL_DIV_SEL, map);
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obj->div_type = (cy_en_divider_types_t) _FLD2VAL(CY_PERI_CLOCK_CTL_TYPE_SEL, map);
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} else {
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#if DEVICE_SLEEP && DEVICE_LOWPOWERTIMER
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#if DEVICE_SLEEP && DEVICE_LPTICKER
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/* Register callback once */
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obj->pm_callback_handler.callback = spi_pm_callback;
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obj->pm_callback_handler.type = CY_SYSPM_DEEPSLEEP;
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@ -326,7 +326,7 @@ void spi_init(spi_t *obj_in, PinName mosi, PinName miso, PinName sclk, PinName s
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if (!Cy_SysPm_RegisterCallback(&obj->pm_callback_handler)) {
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error("PM callback registration failed!");
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}
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#endif /* DEVICE_SLEEP && DEVICE_LOWPOWERTIMER */
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#endif /* DEVICE_SLEEP && DEVICE_LPTICKER */
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}
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/* Configure hardware resources */
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@ -24,8 +24,8 @@
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#include "cy_crypto_core_trng.h"
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/* Initialization polynomial values fro True Random Generator */
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#define GARO31_INITSTATE (0x04c11db7u)
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#define FIRO31_INITSTATE (0x04c11db7u)
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#define GARO31_INITSTATE (0x04c11db7UL)
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#define FIRO31_INITSTATE (0x04c11db7UL)
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#define MAX_TRNG_BIT_SIZE (32UL)
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@ -47,7 +47,7 @@ void trng_free(trng_t *obj)
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int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length)
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{
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int ret = 0;
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*output_length = 0;
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*output_length = 0U;
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/* temporary random data buffer */
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uint32_t random;
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@ -59,13 +59,13 @@ int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_l
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if (Cy_Crypto_Core_Trng(CRYPTO, GARO31_INITSTATE, FIRO31_INITSTATE, MAX_TRNG_BIT_SIZE, &random) != CY_CRYPTO_SUCCESS) {
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ret = -1;
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} else {
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for (uint8_t i = 0; (i < 4) && (*output_length < length) ; i++) {
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for (uint8_t i = 0; (i < 4U) && (*output_length < length) ; i++) {
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*output++ = ((uint8_t *)&random)[i];
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*output_length += 1;
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*output_length += 1U;
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}
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}
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}
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random = 0uL;
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random = 0UL;
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return (ret);
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}
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