From c94f22c7ad040e749c39a2748ae52906267129c1 Mon Sep 17 00:00:00 2001 From: Maciej Bocianski Date: Mon, 20 Aug 2018 14:09:01 +0200 Subject: [PATCH] mbed_hal-qspi test code refactoring after PR 7783 review - refactoring of status/config register logging code, - make QspiCommand a class, --- TESTS/mbed_hal/qspi/main.cpp | 24 +++++++++----- TESTS/mbed_hal/qspi/qspi_test_utils.cpp | 44 ++++++++++++------------- TESTS/mbed_hal/qspi/qspi_test_utils.h | 9 ++--- 3 files changed, 43 insertions(+), 34 deletions(-) diff --git a/TESTS/mbed_hal/qspi/main.cpp b/TESTS/mbed_hal/qspi/main.cpp index 167e081f19..c783ce967f 100644 --- a/TESTS/mbed_hal/qspi/main.cpp +++ b/TESTS/mbed_hal/qspi/main.cpp @@ -247,13 +247,17 @@ void qspi_write_read_test(void) WAIT_FOR(WRSR_MAX_TIME, qspi); #ifdef QSPI_TEST_LOG_FLASH_STATUS - utest_printf("Status\r\n"); log_register(STATUS_REG, QSPI_STATUS_REG_SIZE, qspi); - utest_printf("Config 0\r\n"); log_register(CONFIG_REG0, QSPI_CONFIG_REG_0_SIZE, qspi); + //utest_printf("Status register:\r\n"); + log_register(STATUS_REG, QSPI_STATUS_REG_SIZE, qspi, "Status register"); + //utest_printf("Config register 0:\r\n"); + log_register(CONFIG_REG0, QSPI_CONFIG_REG_0_SIZE, qspi, "Config register 0"); #ifdef CONFIG_REG1 - utest_printf("Config 1\r\n"); log_register(CONFIG_REG1, QSPI_CONFIG_REG_1_SIZE, qspi); + //utest_printf("Config register 1:\r\n"); + log_register(CONFIG_REG1, QSPI_CONFIG_REG_1_SIZE, qspi, "Config register 1"); #endif #ifdef CONFIG_REG2 - utest_printf("Config 2\r\n"); log_register(CONFIG_REG2, QSPI_CONFIG_REG_2_SIZE, qspi); + //utest_printf("Config register 2:\r\n"); + log_register(CONFIG_REG2, QSPI_CONFIG_REG_2_SIZE, qspi, "Config register 2"); #endif #endif @@ -314,13 +318,17 @@ void qspi_init_free_test(void) flash_init(qspi); #ifdef QSPI_TEST_LOG_FLASH_STATUS - utest_printf("Status\r\n"); log_register(STATUS_REG, QSPI_STATUS_REG_SIZE, qspi); - utest_printf("Config 0\r\n"); log_register(CONFIG_REG0, QSPI_CONFIG_REG_0_SIZE, qspi); + //utest_printf("Status register:\r\n"); + log_register(STATUS_REG, QSPI_STATUS_REG_SIZE, qspi, "Status register"); + //utest_printf("Config register 0:\r\n"); + log_register(CONFIG_REG0, QSPI_CONFIG_REG_0_SIZE, qspi, "Config register 0"); #ifdef CONFIG_REG1 - utest_printf("Config 1\r\n"); log_register(CONFIG_REG1, QSPI_CONFIG_REG_1_SIZE, qspi); + //utest_printf("Config register 1:\r\n"); + log_register(CONFIG_REG1, QSPI_CONFIG_REG_1_SIZE, qspi, "Config register 1"); #endif #ifdef CONFIG_REG2 - utest_printf("Config 2\r\n"); log_register(CONFIG_REG2, QSPI_CONFIG_REG_2_SIZE, qspi); + //utest_printf("Config register 2:\r\n"); + log_register(CONFIG_REG2, QSPI_CONFIG_REG_2_SIZE, qspi, "Config register 2"); #endif #endif diff --git a/TESTS/mbed_hal/qspi/qspi_test_utils.cpp b/TESTS/mbed_hal/qspi/qspi_test_utils.cpp index b7d386fd9d..51a9963882 100644 --- a/TESTS/mbed_hal/qspi/qspi_test_utils.cpp +++ b/TESTS/mbed_hal/qspi/qspi_test_utils.cpp @@ -32,39 +32,39 @@ void QspiCommand::configure(qspi_bus_width_t inst_width, qspi_bus_width_t addr_w qspi_address_size_t addr_size, qspi_alt_size_t alt_size, int dummy_cycles) { - memset(&cmd, 0, sizeof(qspi_command_t) ); - cmd.instruction.disabled = cmd.address.disabled = cmd.alt.disabled = true; + memset(&_cmd, 0, sizeof(qspi_command_t) ); + _cmd.instruction.disabled = _cmd.address.disabled = _cmd.alt.disabled = true; - cmd.instruction.bus_width = inst_width; - cmd.address.bus_width = addr_width; - cmd.address.size = addr_size; - cmd.alt.bus_width = alt_width; - cmd.alt.size = alt_size; - cmd.data.bus_width = data_width; - cmd.dummy_count = dummy_cycles; + _cmd.instruction.bus_width = inst_width; + _cmd.address.bus_width = addr_width; + _cmd.address.size = addr_size; + _cmd.alt.bus_width = alt_width; + _cmd.alt.size = alt_size; + _cmd.data.bus_width = data_width; + _cmd.dummy_count = dummy_cycles; } void QspiCommand::build(int instruction, int address, int alt) { - cmd.instruction.disabled = (instruction == QSPI_NONE); - if (!cmd.instruction.disabled) { - cmd.instruction.value = instruction; + _cmd.instruction.disabled = (instruction == QSPI_NONE); + if (!_cmd.instruction.disabled) { + _cmd.instruction.value = instruction; } - cmd.address.disabled = (address == QSPI_NONE); - if (!cmd.address.disabled) { - cmd.address.value = address; + _cmd.address.disabled = (address == QSPI_NONE); + if (!_cmd.address.disabled) { + _cmd.address.value = address; } - cmd.alt.disabled = (alt == QSPI_NONE); - if (!cmd.alt.disabled) { - cmd.alt.value = alt; + _cmd.alt.disabled = (alt == QSPI_NONE); + if (!_cmd.alt.disabled) { + _cmd.alt.value = alt; } } qspi_command_t* QspiCommand::get() { - return &cmd; + return &_cmd; } @@ -165,7 +165,7 @@ qspi_status_t write_disable(Qspi &qspi) return ((reg[0] & STATUS_BIT_WEL) == 0 ? QSPI_STATUS_OK : QSPI_STATUS_ERROR); } -void log_register(uint32_t cmd, uint32_t reg_size, Qspi &qspi) +void log_register(uint32_t cmd, uint32_t reg_size, Qspi &qspi, const char *str) { qspi_status_t ret; static uint8_t reg[QSPI_MAX_REG_SIZE]; @@ -174,9 +174,9 @@ void log_register(uint32_t cmd, uint32_t reg_size, Qspi &qspi) TEST_ASSERT_EQUAL(QSPI_STATUS_OK, ret); for (uint32_t j = 0; j < reg_size; j++) { - utest_printf("register byte %u data: ", j); + utest_printf("%s byte %u (MSB first): ", str != NULL ? str : "", j); for(int i = 0; i < 8; i++) { - utest_printf("%s ", ((reg[j] & (1 << i)) & 0xFF) == 0 ? "0" : "1"); + utest_printf("%s ", ((reg[j] & (1 << (7 - i))) & 0xFF) == 0 ? "0" : "1"); } utest_printf("\r\n"); } diff --git a/TESTS/mbed_hal/qspi/qspi_test_utils.h b/TESTS/mbed_hal/qspi/qspi_test_utils.h index e26b039071..2a177657cf 100644 --- a/TESTS/mbed_hal/qspi/qspi_test_utils.h +++ b/TESTS/mbed_hal/qspi/qspi_test_utils.h @@ -28,8 +28,8 @@ enum QspiStatus { sUnknown }; -struct QspiCommand { - +class QspiCommand { +public: void configure(qspi_bus_width_t inst_width, qspi_bus_width_t addr_width, qspi_bus_width_t data_width, qspi_bus_width_t alt_width, qspi_address_size_t addr_size, qspi_alt_size_t alt_size, int dummy_cycles = 0); @@ -38,7 +38,8 @@ struct QspiCommand { qspi_command_t * get(); - qspi_command_t cmd; +private: + qspi_command_t _cmd; }; struct Qspi { @@ -122,7 +123,7 @@ qspi_status_t write_enable(Qspi &qspi); qspi_status_t write_disable(Qspi &qspi); -void log_register(uint32_t cmd, uint32_t reg_size, Qspi &qspi); +void log_register(uint32_t cmd, uint32_t reg_size, Qspi &qspi, const char *str = NULL); qspi_status_t dual_enable(Qspi &qspi);