diff --git a/.github/pull_request_template.md b/.github/pull_request_template.md index 95211bb511..48e258a26d 100644 --- a/.github/pull_request_template.md +++ b/.github/pull_request_template.md @@ -1,39 +1,11 @@ -Notes: -- Pull requests will not be accepted until the submitter has agreed to the [contributer agreement](https://github.com/ARMmbed/mbed-os/blob/master/CONTRIBUTING.md). -- This is just a template, so feel free to use/remove the unnecessary things +# Description -## Description +> Detailed changes summary | testing | dependencies +> Good example: https://os.mbed.com/docs/latest/reference/guidelines.html#workflow (Pull request template) -A few sentences describing the overall goals of the pull request's commits. +# Pull request type -## Status - -**READY/IN DEVELOPMENT/HOLD** - -## Migrations - -If this PR changes any APIs or behaviors, give a short description of what *API users* should do when this PR is merged. - -YES | NO - -## Related PRs - -List related PRs against other branches: - -branch | PR ------- | ------ -other_pr_production | [link]() -other_pr_master | [link]() - -## Todos - -- [ ] Tests -- [ ] Documentation - -## Deploy notes - -Notes regarding the deployment of this PR. These should note any required changes in the build environment, tools, compilers and so on. - -## Steps to test or reproduce - -Outline the steps to test or reproduce the PR here. +- [ ] Fix +- [ ] Refactor +- [ ] New Target +- [ ] Feature diff --git a/.travis.yml b/.travis.yml index dcd663c5d3..9de3c6c155 100644 --- a/.travis.yml +++ b/.travis.yml @@ -5,7 +5,7 @@ python: env: global: - > - STATUS=$'curl -so/dev/null --user $MBED_BOT --request POST + STATUS=$'curl -so/dev/null --user "$MBED_BOT" --request POST https://api.github.com/repos/$TRAVIS_REPO_SLUG/statuses/${TRAVIS_PULL_REQUEST_SHA:-$TRAVIS_COMMIT} --data @- << DATA\n{ "state": "$0", @@ -30,7 +30,8 @@ before_install: - sudo ln -s $HOME/.cache/apt /var/cache/apt/archives # Setup ppa to make sure arm-none-eabi-gcc is correct version - sudo add-apt-repository -y ppa:team-gcc-arm-embedded/ppa - - sudo apt-get update -qq + # Loop until update succeeds (timeouts can occur) + - while [ -n "$(sudo apt-get update 2>&1 |grep Failed)" ]; do :; done after_success: - bash -c "$STATUS" success "Local $NAME testing has passed" diff --git a/TESTS/mbed_hal/sleep_manager_racecondition/main.cpp b/TESTS/mbed_hal/sleep_manager_racecondition/main.cpp index fd5b88141f..ed2aa2f345 100644 --- a/TESTS/mbed_hal/sleep_manager_racecondition/main.cpp +++ b/TESTS/mbed_hal/sleep_manager_racecondition/main.cpp @@ -67,12 +67,12 @@ void sleep_manager_irq_test() Ticker ticker1; Timer timer; - ticker1.attach_us(&sleep_manager_locking_irq_test, 500); + ticker1.attach_us(&sleep_manager_locking_irq_test, 1000); - // run this for 5 seconds + // run this for 10 seconds timer.start(); int start = timer.read(); - int end = start + 5; + int end = start + 10; while (timer.read() < end) { sleep_manager_locking_irq_test(); } diff --git a/TESTS/mbedtls/multi/main.cpp b/TESTS/mbedtls/multi/main.cpp index eb34f05dc1..ce823cadcd 100644 --- a/TESTS/mbedtls/multi/main.cpp +++ b/TESTS/mbedtls/multi/main.cpp @@ -23,67 +23,6 @@ #include "mbedtls/sha256.h" -/** - * \name SECTION: Compatibility code - * - * Depending on whether the alternative (hatdware accelerated) hashing - * functions are provided or not, different API should be used for hashing. - * \{ - */ - -#if defined(MBEDTLS_SHA256_ALT) - -/** - * \brief This function starts a SHA-256 checksum calculation. - * - * \deprecated Superseded by mbedtls_sha256_starts_ret() in 2.7.0. - * - * \param ctx The SHA-256 context to initialize. - * \param is224 Determines which function to use. - * - */ -void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, - int is224 ) -{ - mbedtls_sha256_starts_ret( ctx, is224 ); -} - -/** - * \brief This function feeds an input buffer into an ongoing - * SHA-256 checksum calculation. - * - * \deprecated Superseded by mbedtls_sha256_update_ret() in 2.7.0. - * - * \param ctx The SHA-256 context to initialize. - * \param input The buffer holding the data. - * \param ilen The length of the input data. - */ -void mbedtls_sha256_update( mbedtls_sha256_context *ctx, - const unsigned char *input, - size_t ilen ) -{ - mbedtls_sha256_update_ret( ctx, input, ilen ); -} - -/** - * \brief This function finishes the SHA-256 operation, and writes - * the result to the output buffer. - * - * \deprecated Superseded by mbedtls_sha256_finish_ret() in 2.7.0. - * - * \param ctx The SHA-256 context. - * \param output The SHA-224or SHA-256 checksum result. - */ -void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, - unsigned char output[32] ) -{ - mbedtls_sha256_finish_ret( ctx, output ); -} - -#endif /* defined(MBEDTLS_SHA256_ALT) */ - -/* \} name SECTION: Compatibility code */ using namespace utest::v1; diff --git a/TESTS/netsocket/tcp_echo/main.cpp b/TESTS/netsocket/tcp_echo/main.cpp index 13776ebc10..19af7763b5 100644 --- a/TESTS/netsocket/tcp_echo/main.cpp +++ b/TESTS/netsocket/tcp_echo/main.cpp @@ -16,7 +16,7 @@ */ #ifndef MBED_CONF_APP_CONNECT_STATEMENT - #error [NOT_SUPPORTED] No network configuration found for this target. +#error [NOT_SUPPORTED] No network configuration found for this target. #endif #include "mbed.h" @@ -32,18 +32,21 @@ using namespace utest::v1; #define MBED_CONF_APP_TCP_CLIENT_ECHO_BUFFER_SIZE 256 #endif -namespace { - char tx_buffer[MBED_CONF_APP_TCP_CLIENT_ECHO_BUFFER_SIZE] = {0}; - char rx_buffer[MBED_CONF_APP_TCP_CLIENT_ECHO_BUFFER_SIZE] = {0}; +namespace +{ +char tx_buffer[MBED_CONF_APP_TCP_CLIENT_ECHO_BUFFER_SIZE] = {0}; +char rx_buffer[MBED_CONF_APP_TCP_CLIENT_ECHO_BUFFER_SIZE] = {0}; } -void prep_buffer(char *tx_buffer, size_t tx_size) { - for (size_t i=0; iget_ip_address()); +#if defined(MBED_CONF_APP_ECHO_SERVER_ADDR) && defined(MBED_CONF_APP_ECHO_SERVER_PORT) tcp_addr.set_ip_address(MBED_CONF_APP_ECHO_SERVER_ADDR); tcp_addr.set_port(MBED_CONF_APP_ECHO_SERVER_PORT); +#else /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ + char recv_key[] = "host_port"; + char ipbuf[60] = {0}; + char portbuf[16] = {0}; + unsigned int port = 0; + + greentea_send_kv("target_ip", net->get_ip_address()); + greentea_send_kv("host_ip", " "); + greentea_parse_kv(recv_key, ipbuf, sizeof(recv_key), sizeof(ipbuf)); + + greentea_send_kv("host_port", " "); + greentea_parse_kv(recv_key, portbuf, sizeof(recv_key), sizeof(ipbuf)); + sscanf(portbuf, "%u", &port); + + tcp_addr.set_ip_address(ipbuf); + tcp_addr.set_port(port); +#endif /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ // Startup echo threads in parallel - for (int i = 0; i < MBED_CFG_TCP_CLIENT_ECHO_THREADS; i++) { + for (int i = 0; i < MBED_CONF_APP_TCP_CLIENT_ECHO_THREADS; i++) { echoers[i] = new Echo; echoers[i]->start(); } - for (int i = 0; i < MBED_CFG_TCP_CLIENT_ECHO_THREADS; i++) { + for (int i = 0; i < MBED_CONF_APP_TCP_CLIENT_ECHO_THREADS; i++) { echoers[i]->join(); delete echoers[i]; } @@ -140,7 +167,8 @@ void test_tcp_echo_parallel() { } // Test setup -utest::v1::status_t test_setup(const size_t number_of_cases) { +utest::v1::status_t test_setup(const size_t number_of_cases) +{ GREENTEA_SETUP(120, "tcp_echo"); return verbose_test_setup_handler(number_of_cases); } @@ -151,6 +179,7 @@ Case cases[] = { Specification specification(test_setup, cases); -int main() { +int main() +{ return !Harness::run(specification); } diff --git a/TESTS/netsocket/tcp_packet_pressure/main.cpp b/TESTS/netsocket/tcp_packet_pressure/main.cpp index 48980bcf68..e4fe0df937 100644 --- a/TESTS/netsocket/tcp_packet_pressure/main.cpp +++ b/TESTS/netsocket/tcp_packet_pressure/main.cpp @@ -15,12 +15,12 @@ * limitations under the License. */ - #ifndef MBED_CONF_APP_CONNECT_STATEMENT - #error [NOT_SUPPORTED] No network configuration found for this target. - #endif +#ifndef MBED_CONF_APP_CONNECT_STATEMENT +#error [NOT_SUPPORTED] No network configuration found for this target. +#endif #ifndef MBED_EXTENDED_TESTS - #error [NOT_SUPPORTED] Pressure tests are not supported by default +#error [NOT_SUPPORTED] Pressure tests are not supported by default #endif #include "mbed.h" @@ -33,20 +33,20 @@ using namespace utest::v1; -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN 64 +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN 64 #endif -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX 0x80000 +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX 0x80000 #endif -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_SEED -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_SEED 0x6d626564 +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_SEED +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_SEED 0x6d626564 #endif -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG false +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG false #endif #define STRINGIZE(x) STRINGIZE2(x) @@ -54,7 +54,8 @@ using namespace utest::v1; // Simple xorshift pseudorandom number generator -class RandSeq { +class RandSeq +{ private: uint32_t x; uint32_t y; @@ -63,23 +64,26 @@ private: static const int C = 11; public: - RandSeq(uint32_t seed=MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_SEED) + RandSeq(uint32_t seed = MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_SEED) : x(seed), y(seed) {} - uint32_t next(void) { + uint32_t next(void) + { x ^= x << A; x ^= x >> B; x ^= y ^ (y >> C); return x + y; } - void skip(size_t size) { + void skip(size_t size) + { for (size_t i = 0; i < size; i++) { next(); } } - void buffer(uint8_t *buffer, size_t size) { + void buffer(uint8_t *buffer, size_t size) + { RandSeq lookahead = *this; for (size_t i = 0; i < size; i++) { @@ -87,7 +91,8 @@ public: } } - int cmp(uint8_t *buffer, size_t size) { + int cmp(uint8_t *buffer, size_t size) + { RandSeq lookahead = *this; for (size_t i = 0; i < size; i++) { @@ -107,7 +112,8 @@ size_t buffer_size; // Tries to get the biggest buffer possible on the device. Exponentially // grows a buffer until heap runs out of space, and uses half to leave // space for the rest of the program -void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) { +void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) +{ size_t i = min; while (i < max) { void *b = malloc(i); @@ -128,10 +134,11 @@ void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) { } -void test_tcp_packet_pressure() { +void test_tcp_packet_pressure() +{ generate_buffer(&buffer, &buffer_size, - MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN, - MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX); + MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN, + MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX); printf("MBED: Generated buffer %d\r\n", buffer_size); NetworkInterface* net = MBED_CONF_APP_OBJECT_CONSTRUCTION; @@ -141,24 +148,43 @@ void test_tcp_packet_pressure() { printf("MBED: TCPClient IP address is '%s'\n", net->get_ip_address()); TCPSocket sock; +#if defined(MBED_CONF_APP_ECHO_SERVER_ADDR) && defined(MBED_CONF_APP_ECHO_SERVER_PORT) SocketAddress tcp_addr(MBED_CONF_APP_ECHO_SERVER_ADDR, MBED_CONF_APP_ECHO_SERVER_PORT); +#else /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ + char recv_key[] = "host_port"; + char ipbuf[60] = {0}; + char portbuf[16] = {0}; + unsigned int port = 0; + + greentea_send_kv("target_ip", net->get_ip_address()); + greentea_send_kv("host_ip", " "); + greentea_parse_kv(recv_key, ipbuf, sizeof(recv_key), sizeof(ipbuf)); + + greentea_send_kv("host_port", " "); + greentea_parse_kv(recv_key, portbuf, sizeof(recv_key), sizeof(ipbuf)); + sscanf(portbuf, "%u", &port); + + SocketAddress tcp_addr(ipbuf, port); +#endif /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ Timer timer; timer.start(); // Tests exponentially growing sequences - for (size_t size = MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN; - size < MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX; - size *= 2) { + for (size_t size = MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN; + size < MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX; + size *= 2) { err = sock.open(net); TEST_ASSERT_EQUAL(0, err); err = sock.connect(tcp_addr); TEST_ASSERT_EQUAL(0, err); printf("TCP: %s:%d streaming %d bytes\r\n", - tcp_addr.get_ip_address(), tcp_addr.get_port(), size); + tcp_addr.get_ip_address(), tcp_addr.get_port(), size); +#if defined(MBED_CONF_APP_TCP_ECHO_PREFIX) //recv connection prefix message sock.recv(buffer, sizeof(MBED_CONF_APP_TCP_ECHO_PREFIX)); +#endif /* MBED_CONF_APP_TCP_ECHO_PREFIX */ memset(buffer, 0, sizeof(buffer)); sock.set_blocking(false); @@ -182,7 +208,7 @@ void test_tcp_packet_pressure() { int td = sock.send(buffer, chunk_size); if (td > 0) { - if (MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { printf("TCP: tx -> %d\r\n", td); } tx_seq.skip(td); @@ -190,11 +216,11 @@ void test_tcp_packet_pressure() { } else if (td != NSAPI_ERROR_WOULD_BLOCK) { // We may fail to send because of buffering issues, // cut buffer in half - if (window > MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN) { + if (window > MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN) { window /= 2; } - if (MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { printf("TCP: Not sent (%d), window = %d\r\n", td, window); } } @@ -205,7 +231,7 @@ void test_tcp_packet_pressure() { int rd = sock.recv(buffer, buffer_size); TEST_ASSERT(rd > 0 || rd == NSAPI_ERROR_WOULD_BLOCK); if (rd > 0) { - if (MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { printf("TCP: rx <- %d\r\n", rd); } int diff = rx_seq.cmp(buffer, rd); @@ -225,15 +251,16 @@ void test_tcp_packet_pressure() { timer.stop(); printf("MBED: Time taken: %fs\r\n", timer.read()); printf("MBED: Speed: %.3fkb/s\r\n", - 8*(2*MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX - - MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN) / (1000*timer.read())); + 8 * (2 * MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX - + MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN) / (1000 * timer.read())); net->disconnect(); } // Test setup -utest::v1::status_t test_setup(const size_t number_of_cases) { +utest::v1::status_t test_setup(const size_t number_of_cases) +{ GREENTEA_SETUP(120, "tcp_echo"); return verbose_test_setup_handler(number_of_cases); } @@ -244,6 +271,7 @@ Case cases[] = { Specification specification(test_setup, cases); -int main() { +int main() +{ return !Harness::run(specification); } diff --git a/TESTS/netsocket/tcp_packet_pressure_parallel/main.cpp b/TESTS/netsocket/tcp_packet_pressure_parallel/main.cpp index 2c438a92d6..bfd6ed0524 100644 --- a/TESTS/netsocket/tcp_packet_pressure_parallel/main.cpp +++ b/TESTS/netsocket/tcp_packet_pressure_parallel/main.cpp @@ -15,12 +15,12 @@ * limitations under the License. */ - #ifndef MBED_CONF_APP_CONNECT_STATEMENT - #error [NOT_SUPPORTED] No network configuration found for this target. - #endif +#ifndef MBED_CONF_APP_CONNECT_STATEMENT +#error [NOT_SUPPORTED] No network configuration found for this target. +#endif #ifndef MBED_EXTENDED_TESTS - #error [NOT_SUPPORTED] Parallel pressure tests are not supported by default +#error [NOT_SUPPORTED] Parallel pressure tests are not supported by default #endif #include "mbed.h" @@ -33,24 +33,24 @@ using namespace utest::v1; -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN 64 +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN 64 #endif -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX 0x80000 +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX 0x80000 #endif -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_SEED -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_SEED 0x6d626564 +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_SEED +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_SEED 0x6d626564 #endif -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_THREADS -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_THREADS 3 +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_THREADS +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_THREADS 3 #endif -#ifndef MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG -#define MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG false +#ifndef MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG +#define MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG false #endif #define STRINGIZE(x) STRINGIZE2(x) @@ -58,7 +58,8 @@ using namespace utest::v1; // Simple xorshift pseudorandom number generator -class RandSeq { +class RandSeq +{ private: uint32_t x; uint32_t y; @@ -67,23 +68,26 @@ private: static const int C = 11; public: - RandSeq(uint32_t seed=MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_SEED) + RandSeq(uint32_t seed = MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_SEED) : x(seed), y(seed) {} - uint32_t next(void) { + uint32_t next(void) + { x ^= x << A; x ^= x >> B; x ^= y ^ (y >> C); return x + y; } - void skip(size_t size) { + void skip(size_t size) + { for (size_t i = 0; i < size; i++) { next(); } } - void buffer(uint8_t *buffer, size_t size) { + void buffer(uint8_t *buffer, size_t size) + { RandSeq lookahead = *this; for (size_t i = 0; i < size; i++) { @@ -91,7 +95,8 @@ public: } } - int cmp(uint8_t *buffer, size_t size) { + int cmp(uint8_t *buffer, size_t size) + { RandSeq lookahead = *this; for (size_t i = 0; i < size; i++) { @@ -108,7 +113,8 @@ public: // Tries to get the biggest buffer possible on the device. Exponentially // grows a buffer until heap runs out of space, and uses half to leave // space for the rest of the program -void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) { +void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) +{ size_t i = min; while (i < max) { void *b = malloc(i); @@ -136,7 +142,8 @@ Timer timer; Mutex iomutex; // Single instance of a pressure test -class PressureTest { +class PressureTest +{ private: uint8_t *buffer; size_t buffer_size; @@ -146,33 +153,40 @@ private: public: PressureTest(uint8_t *buffer, size_t buffer_size) - : buffer(buffer), buffer_size(buffer_size) { + : buffer(buffer), buffer_size(buffer_size) + { } - void start() { + void start() + { osStatus status = thread.start(callback(this, &PressureTest::run)); TEST_ASSERT_EQUAL(osOK, status); } - void join() { + void join() + { osStatus status = thread.join(); TEST_ASSERT_EQUAL(osOK, status); } - void run() { + void run() + { // Tests exponentially growing sequences - for (size_t size = MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN; - size < MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX; - size *= 2) { + for (size_t size = MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN; + size < MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX; + size *= 2) { int err = sock.open(net); TEST_ASSERT_EQUAL(0, err); err = sock.connect(tcp_addr); TEST_ASSERT_EQUAL(0, err); + +#if defined(MBED_CONF_APP_TCP_ECHO_PREFIX) sock.recv(buffer, sizeof(MBED_CONF_APP_TCP_ECHO_PREFIX)); +#endif /* MBED_CONF_APP_TCP_ECHO_PREFIX */ iomutex.lock(); printf("TCP: %s:%d streaming %d bytes\r\n", - tcp_addr.get_ip_address(), tcp_addr.get_port(), size); + tcp_addr.get_ip_address(), tcp_addr.get_port(), size); iomutex.unlock(); sock.set_blocking(false); @@ -196,7 +210,7 @@ public: int td = sock.send(buffer, chunk_size); if (td > 0) { - if (MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { iomutex.lock(); printf("TCP: tx -> %d\r\n", td); iomutex.unlock(); @@ -206,11 +220,11 @@ public: } else if (td != NSAPI_ERROR_WOULD_BLOCK) { // We may fail to send because of buffering issues, // cut buffer in half - if (window > MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN) { + if (window > MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN) { window /= 2; } - if (MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { iomutex.lock(); printf("TCP: Not sent (%d), window = %d\r\n", td, window); iomutex.unlock(); @@ -223,7 +237,7 @@ public: int rd = sock.recv(buffer, buffer_size); TEST_ASSERT(rd > 0 || rd == NSAPI_ERROR_WOULD_BLOCK); if (rd > 0) { - if (MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_DEBUG) { iomutex.lock(); printf("TCP: rx <- %d\r\n", rd); iomutex.unlock(); @@ -244,21 +258,22 @@ public: } }; -PressureTest *pressure_tests[MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_THREADS]; +PressureTest *pressure_tests[MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_THREADS]; -void test_tcp_packet_pressure_parallel() { +void test_tcp_packet_pressure_parallel() +{ uint8_t *buffer; size_t buffer_size; generate_buffer(&buffer, &buffer_size, - MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN, - MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX); + MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN, + MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX); - size_t buffer_subsize = buffer_size / MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_THREADS; + size_t buffer_subsize = buffer_size / MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_THREADS; printf("MBED: Generated buffer %d\r\n", buffer_size); printf("MBED: Split into %d buffers %d\r\n", - MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_THREADS, - buffer_subsize); + MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_THREADS, + buffer_subsize); net = MBED_CONF_APP_OBJECT_CONSTRUCTION; int err = MBED_CONF_APP_CONNECT_STATEMENT; @@ -266,18 +281,36 @@ void test_tcp_packet_pressure_parallel() { printf("MBED: TCPClient IP address is '%s'\n", net->get_ip_address()); +#if defined(MBED_CONF_APP_ECHO_SERVER_ADDR) && defined(MBED_CONF_APP_ECHO_SERVER_PORT) tcp_addr.set_ip_address(MBED_CONF_APP_ECHO_SERVER_ADDR); tcp_addr.set_port(MBED_CONF_APP_ECHO_SERVER_PORT); +#else /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ + char recv_key[] = "host_port"; + char ipbuf[60] = {0}; + char portbuf[16] = {0}; + unsigned int port = 0; + + greentea_send_kv("target_ip", net->get_ip_address()); + greentea_send_kv("host_ip", " "); + greentea_parse_kv(recv_key, ipbuf, sizeof(recv_key), sizeof(ipbuf)); + + greentea_send_kv("host_port", " "); + greentea_parse_kv(recv_key, portbuf, sizeof(recv_key), sizeof(ipbuf)); + sscanf(portbuf, "%u", &port); + + tcp_addr.set_ip_address(ipbuf); + tcp_addr.set_port(port); +#endif /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ timer.start(); // Startup pressure tests in parallel - for (int i = 0; i < MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_THREADS; i++) { - pressure_tests[i] = new PressureTest(&buffer[i*buffer_subsize], buffer_subsize); + for (int i = 0; i < MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_THREADS; i++) { + pressure_tests[i] = new PressureTest(&buffer[i * buffer_subsize], buffer_subsize); pressure_tests[i]->start(); } - for (int i = 0; i < MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_THREADS; i++) { + for (int i = 0; i < MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_THREADS; i++) { pressure_tests[i]->join(); delete pressure_tests[i]; } @@ -285,16 +318,17 @@ void test_tcp_packet_pressure_parallel() { timer.stop(); printf("MBED: Time taken: %fs\r\n", timer.read()); printf("MBED: Speed: %.3fkb/s\r\n", - MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_THREADS* - 8*(2*MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MAX - - MBED_CFG_TCP_CLIENT_PACKET_PRESSURE_MIN) / (1000*timer.read())); + MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_THREADS * + 8 * (2 * MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MAX - + MBED_CONF_APP_TCP_CLIENT_PACKET_PRESSURE_MIN) / (1000 * timer.read())); net->disconnect(); } // Test setup -utest::v1::status_t test_setup(const size_t number_of_cases) { +utest::v1::status_t test_setup(const size_t number_of_cases) +{ GREENTEA_SETUP(120, "tcp_echo"); return verbose_test_setup_handler(number_of_cases); } @@ -305,6 +339,7 @@ Case cases[] = { Specification specification(test_setup, cases); -int main() { +int main() +{ return !Harness::run(specification); } diff --git a/TESTS/netsocket/udp_echo_parallel/main.cpp b/TESTS/netsocket/udp_echo_parallel/main.cpp index 2a47f5b965..369ac66a30 100644 --- a/TESTS/netsocket/udp_echo_parallel/main.cpp +++ b/TESTS/netsocket/udp_echo_parallel/main.cpp @@ -15,12 +15,12 @@ * limitations under the License. */ - #ifndef MBED_CONF_APP_CONNECT_STATEMENT - #error [NOT_SUPPORTED] No network configuration found for this target. - #endif +#ifndef MBED_CONF_APP_CONNECT_STATEMENT +#error [NOT_SUPPORTED] No network configuration found for this target. +#endif #ifndef MBED_EXTENDED_TESTS - #error [NOT_SUPPORTED] Parallel tests are not supported by default +#error [NOT_SUPPORTED] Parallel tests are not supported by default #endif #include "mbed.h" @@ -33,16 +33,16 @@ using namespace utest::v1; -#ifndef MBED_CFG_UDP_CLIENT_ECHO_BUFFER_SIZE -#define MBED_CFG_UDP_CLIENT_ECHO_BUFFER_SIZE 64 +#ifndef MBED_CONF_APP_UDP_CLIENT_ECHO_BUFFER_SIZE +#define MBED_CONF_APP_UDP_CLIENT_ECHO_BUFFER_SIZE 64 #endif -#ifndef MBED_CFG_UDP_CLIENT_ECHO_TIMEOUT -#define MBED_CFG_UDP_CLIENT_ECHO_TIMEOUT 500 +#ifndef MBED_CONF_APP_UDP_CLIENT_ECHO_TIMEOUT +#define MBED_CONF_APP_UDP_CLIENT_ECHO_TIMEOUT 500 #endif -#ifndef MBED_CFG_UDP_CLIENT_ECHO_THREADS -#define MBED_CFG_UDP_CLIENT_ECHO_THREADS 3 +#ifndef MBED_CONF_APP_UDP_CLIENT_ECHO_THREADS +#define MBED_CONF_APP_UDP_CLIENT_ECHO_THREADS 3 #endif #define STRINGIZE(x) STRINGIZE2(x) @@ -56,28 +56,30 @@ Mutex iomutex; char uuid[48] = {0}; // NOTE: assuming that "id" stays in the single digits -void prep_buffer(int id, char *uuid, char *tx_buffer, size_t tx_size) { +void prep_buffer(int id, char *uuid, char *tx_buffer, size_t tx_size) +{ size_t i = 0; tx_buffer[i++] = '0' + id; tx_buffer[i++] = ' '; - memcpy(tx_buffer+i, uuid, strlen(uuid)); + memcpy(tx_buffer + i, uuid, strlen(uuid)); i += strlen(uuid); tx_buffer[i++] = ' '; - for (; iid = id; this->uuid = uuid; osStatus status = thread.start(callback(this, &Echo::echo)); } - void join() { + void join() + { osStatus status = thread.join(); TEST_ASSERT_EQUAL(osOK, status); } - void echo() { + void echo() + { int success = 0; int err = sock.open(net); TEST_ASSERT_EQUAL(0, err); - sock.set_timeout(MBED_CFG_UDP_CLIENT_ECHO_TIMEOUT); + sock.set_timeout(MBED_CONF_APP_UDP_CLIENT_ECHO_TIMEOUT); for (int i = 0; success < ECHO_LOOPS; i++) { prep_buffer(id, uuid, tx_buffer, sizeof(tx_buffer)); @@ -137,8 +143,8 @@ public: } if ((temp_addr == udp_addr && - n == sizeof(tx_buffer) && - memcmp(rx_buffer, tx_buffer, sizeof(rx_buffer)) == 0)) { + n == sizeof(tx_buffer) && + memcmp(rx_buffer, tx_buffer, sizeof(rx_buffer)) == 0)) { success += 1; iomutex.lock(); printf("[ID:%01d][%02d] success #%d\n", id, i, success); @@ -154,7 +160,7 @@ public: break; } } - sock.set_timeout(MBED_CFG_UDP_CLIENT_ECHO_TIMEOUT); + sock.set_timeout(MBED_CONF_APP_UDP_CLIENT_ECHO_TIMEOUT); } result = success == ECHO_LOOPS; @@ -166,15 +172,17 @@ public: } } - bool get_result() { + bool get_result() + { return result; } }; -Echo *echoers[MBED_CFG_UDP_CLIENT_ECHO_THREADS]; +Echo *echoers[MBED_CONF_APP_UDP_CLIENT_ECHO_THREADS]; -void test_udp_echo_parallel() { +void test_udp_echo_parallel() +{ net = MBED_CONF_APP_OBJECT_CONSTRUCTION; int err = MBED_CONF_APP_CONNECT_STATEMENT; TEST_ASSERT_EQUAL(0, err); @@ -185,18 +193,37 @@ void test_udp_echo_parallel() { } else { printf("UDP client IP Address is %s\n", net->get_ip_address()); +#if defined(MBED_CONF_APP_ECHO_SERVER_ADDR) && defined(MBED_CONF_APP_ECHO_SERVER_PORT) udp_addr.set_ip_address(MBED_CONF_APP_ECHO_SERVER_ADDR); udp_addr.set_port(MBED_CONF_APP_ECHO_SERVER_PORT); +#else /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ + char recv_key[] = "host_port"; + char ipbuf[60] = {0}; + char portbuf[16] = {0}; + unsigned int port = 0; + + greentea_send_kv("target_ip", net->get_ip_address()); + greentea_send_kv("host_ip", " "); + greentea_parse_kv(recv_key, ipbuf, sizeof(recv_key), sizeof(ipbuf)); + + greentea_send_kv("host_port", " "); + greentea_parse_kv(recv_key, portbuf, sizeof(recv_key), sizeof(ipbuf)); + sscanf(portbuf, "%u", &port); + + printf("UDP Connect to %s:%d\r\n", ipbuf, port); + udp_addr.set_ip_address(ipbuf); + udp_addr.set_port(port); +#endif /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ // Startup echo threads in parallel - for (int i = 0; i < MBED_CFG_UDP_CLIENT_ECHO_THREADS; i++) { + for (int i = 0; i < MBED_CONF_APP_UDP_CLIENT_ECHO_THREADS; i++) { echoers[i] = new Echo; echoers[i]->start(i, uuid); } bool result = true; - for (int i = 0; i < MBED_CFG_UDP_CLIENT_ECHO_THREADS; i++) { + for (int i = 0; i < MBED_CONF_APP_UDP_CLIENT_ECHO_THREADS; i++) { echoers[i]->join(); result = result && echoers[i]->get_result(); delete echoers[i]; @@ -209,7 +236,8 @@ void test_udp_echo_parallel() { // Test setup -utest::v1::status_t test_setup(const size_t number_of_cases) { +utest::v1::status_t test_setup(const size_t number_of_cases) +{ GREENTEA_SETUP(120, "udp_echo"); return verbose_test_setup_handler(number_of_cases); } @@ -220,6 +248,7 @@ Case cases[] = { Specification specification(test_setup, cases); -int main() { +int main() +{ return !Harness::run(specification); } diff --git a/TESTS/netsocket/udp_packet_pressure/main.cpp b/TESTS/netsocket/udp_packet_pressure/main.cpp index f3c72b959d..9357092735 100644 --- a/TESTS/netsocket/udp_packet_pressure/main.cpp +++ b/TESTS/netsocket/udp_packet_pressure/main.cpp @@ -15,12 +15,12 @@ * limitations under the License. */ - #ifndef MBED_CONF_APP_CONNECT_STATEMENT - #error [NOT_SUPPORTED] No network configuration found for this target. - #endif +#ifndef MBED_CONF_APP_CONNECT_STATEMENT +#error [NOT_SUPPORTED] No network configuration found for this target. +#endif #ifndef MBED_EXTENDED_TESTS - #error [NOT_SUPPORTED] Pressure tests are not supported by default +#error [NOT_SUPPORTED] Pressure tests are not supported by default #endif #include "mbed.h" @@ -33,24 +33,24 @@ using namespace utest::v1; -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN 64 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN 64 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX 0x80000 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX 0x80000 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT 100 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT 100 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_SEED -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_SEED 0x6d626564 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_SEED +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_SEED 0x6d626564 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG false +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG false #endif #define STRINGIZE(x) STRINGIZE2(x) @@ -58,7 +58,8 @@ using namespace utest::v1; // Simple xorshift pseudorandom number generator -class RandSeq { +class RandSeq +{ private: uint32_t x; uint32_t y; @@ -67,23 +68,26 @@ private: static const int C = 11; public: - RandSeq(uint32_t seed=MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_SEED) + RandSeq(uint32_t seed = MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_SEED) : x(seed), y(seed) {} - uint32_t next(void) { + uint32_t next(void) + { x ^= x << A; x ^= x >> B; x ^= y ^ (y >> C); return x + y; } - void skip(size_t size) { + void skip(size_t size) + { for (size_t i = 0; i < size; i++) { next(); } } - void buffer(uint8_t *buffer, size_t size) { + void buffer(uint8_t *buffer, size_t size) + { RandSeq lookahead = *this; for (size_t i = 0; i < size; i++) { @@ -91,7 +95,8 @@ public: } } - int cmp(uint8_t *buffer, size_t size) { + int cmp(uint8_t *buffer, size_t size) + { RandSeq lookahead = *this; for (size_t i = 0; i < size; i++) { @@ -111,7 +116,8 @@ size_t buffer_size; // Tries to get the biggest buffer possible on the device. Exponentially // grows a buffer until heap runs out of space, and uses half to leave // space for the rest of the program -void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) { +void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) +{ size_t i = min; while (i < max) { void *b = malloc(i); @@ -131,10 +137,11 @@ void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) { TEST_ASSERT(buffer); } -void test_udp_packet_pressure() { +void test_udp_packet_pressure() +{ generate_buffer(&buffer, &buffer_size, - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN, - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX); + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN, + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX); printf("MBED: Generated buffer %d\r\n", buffer_size); NetworkInterface* net = MBED_CONF_APP_OBJECT_CONSTRUCTION; @@ -144,19 +151,36 @@ void test_udp_packet_pressure() { printf("MBED: UDPClient IP address is '%s'\n", net->get_ip_address()); UDPSocket sock; +#if defined(MBED_CONF_APP_ECHO_SERVER_ADDR) && defined(MBED_CONF_APP_ECHO_SERVER_PORT) SocketAddress udp_addr(MBED_CONF_APP_ECHO_SERVER_ADDR, MBED_CONF_APP_ECHO_SERVER_PORT); +#else /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ + char recv_key[] = "host_port"; + char ipbuf[60] = {0}; + char portbuf[16] = {0}; + unsigned int port = 0; + + greentea_send_kv("target_ip", net->get_ip_address()); + greentea_send_kv("host_ip", " "); + greentea_parse_kv(recv_key, ipbuf, sizeof(recv_key), sizeof(ipbuf)); + + greentea_send_kv("host_port", " "); + greentea_parse_kv(recv_key, portbuf, sizeof(recv_key), sizeof(ipbuf)); + sscanf(portbuf, "%u", &port); + + SocketAddress udp_addr(ipbuf, port); +#endif /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ Timer timer; timer.start(); // Tests exponentially growing sequences - for (size_t size = MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN; - size < MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX; - size *= 2) { + for (size_t size = MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN; + size < MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX; + size *= 2) { err = sock.open(net); TEST_ASSERT_EQUAL(0, err); printf("UDP: %s:%d streaming %d bytes\r\n", - udp_addr.get_ip_address(), udp_addr.get_port(), size); + udp_addr.get_ip_address(), udp_addr.get_port(), size); sock.set_blocking(false); @@ -180,7 +204,7 @@ void test_udp_packet_pressure() { int td = sock.sendto(udp_addr, buffer, chunk_size); if (td > 0) { - if (MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { printf("UDP: tx -> %d\r\n", td); } tx_seq.skip(td); @@ -188,11 +212,11 @@ void test_udp_packet_pressure() { } else if (td != NSAPI_ERROR_WOULD_BLOCK) { // We may fail to send because of buffering issues, revert to // last good sequence and cut buffer in half - if (window > MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN) { + if (window > MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN) { window /= 2; } - if (MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { printf("UDP: Not sent (%d), window = %d\r\n", td, window); } } @@ -205,7 +229,7 @@ void test_udp_packet_pressure() { TEST_ASSERT(rd > 0 || rd == NSAPI_ERROR_WOULD_BLOCK); if (rd > 0) { - if (MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { printf("UDP: rx <- %d\r\n", rd); } @@ -213,22 +237,22 @@ void test_udp_packet_pressure() { rx_seq.skip(rd); rx_count += rd; known_time = timer.read_ms(); - if (window < MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX) { - window += MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN; + if (window < MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX) { + window += MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN; } } } else if (timer.read_ms() - known_time > - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT) { + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT) { // Dropped packet or out of order, revert to last good sequence // and cut buffer in half tx_seq = rx_seq; tx_count = rx_count; known_time = timer.read_ms(); - if (window > MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN) { + if (window > MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN) { window /= 2; } - if (MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { printf("UDP: Dropped, window = %d\r\n", window); } } else if (rd == NSAPI_ERROR_WOULD_BLOCK) { @@ -244,15 +268,16 @@ void test_udp_packet_pressure() { timer.stop(); printf("MBED: Time taken: %fs\r\n", timer.read()); printf("MBED: Speed: %.3fkb/s\r\n", - 8*(2*MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX - - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN) / (1000*timer.read())); + 8 * (2 * MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX - + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN) / (1000 * timer.read())); net->disconnect(); } // Test setup -utest::v1::status_t test_setup(const size_t number_of_cases) { +utest::v1::status_t test_setup(const size_t number_of_cases) +{ GREENTEA_SETUP(120, "udp_echo"); return verbose_test_setup_handler(number_of_cases); } @@ -263,6 +288,7 @@ Case cases[] = { Specification specification(test_setup, cases); -int main() { +int main() +{ return !Harness::run(specification); } diff --git a/TESTS/netsocket/udp_packet_pressure_parallel/main.cpp b/TESTS/netsocket/udp_packet_pressure_parallel/main.cpp index e26b8d53fe..9a899bb293 100644 --- a/TESTS/netsocket/udp_packet_pressure_parallel/main.cpp +++ b/TESTS/netsocket/udp_packet_pressure_parallel/main.cpp @@ -15,12 +15,12 @@ * limitations under the License. */ - #ifndef MBED_CONF_APP_CONNECT_STATEMENT - #error [NOT_SUPPORTED] No network configuration found for this target. - #endif +#ifndef MBED_CONF_APP_CONNECT_STATEMENT +#error [NOT_SUPPORTED] No network configuration found for this target. +#endif #ifndef MBED_EXTENDED_TESTS - #error [NOT_SUPPORTED] Parallel pressure tests are not supported by default +#error [NOT_SUPPORTED] Parallel pressure tests are not supported by default #endif #include "mbed.h" @@ -33,28 +33,28 @@ using namespace utest::v1; -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN 64 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN 64 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX 0x80000 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX 0x80000 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT 100 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT 100 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_SEED -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_SEED 0x6d626564 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_SEED +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_SEED 0x6d626564 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_THREADS -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_THREADS 3 +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_THREADS +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_THREADS 3 #endif -#ifndef MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG -#define MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG false +#ifndef MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG +#define MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG false #endif #define STRINGIZE(x) STRINGIZE2(x) @@ -62,7 +62,8 @@ using namespace utest::v1; // Simple xorshift pseudorandom number generator -class RandSeq { +class RandSeq +{ private: uint32_t x; uint32_t y; @@ -71,23 +72,26 @@ private: static const int C = 11; public: - RandSeq(uint32_t seed=MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_SEED) + RandSeq(uint32_t seed = MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_SEED) : x(seed), y(seed) {} - uint32_t next(void) { + uint32_t next(void) + { x ^= x << A; x ^= x >> B; x ^= y ^ (y >> C); return x + y; } - void skip(size_t size) { + void skip(size_t size) + { for (size_t i = 0; i < size; i++) { next(); } } - void buffer(uint8_t *buffer, size_t size) { + void buffer(uint8_t *buffer, size_t size) + { RandSeq lookahead = *this; for (size_t i = 0; i < size; i++) { @@ -95,7 +99,8 @@ public: } } - int cmp(uint8_t *buffer, size_t size) { + int cmp(uint8_t *buffer, size_t size) + { RandSeq lookahead = *this; for (size_t i = 0; i < size; i++) { @@ -111,7 +116,8 @@ public: // Tries to get the biggest buffer possible on the device. Exponentially // grows a buffer until heap runs out of space, and uses half to leave // space for the rest of the program -void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) { +void generate_buffer(uint8_t **buffer, size_t *size, size_t min, size_t max) +{ size_t i = min; while (i < max) { void *b = malloc(i); @@ -139,7 +145,8 @@ Timer timer; Mutex iomutex; // Single instance of a pressure test -class PressureTest { +class PressureTest +{ private: uint8_t *buffer; size_t buffer_size; @@ -149,29 +156,33 @@ private: public: PressureTest(uint8_t *buffer, size_t buffer_size) - : buffer(buffer), buffer_size(buffer_size) { + : buffer(buffer), buffer_size(buffer_size) + { } - void start() { + void start() + { osStatus status = thread.start(callback(this, &PressureTest::run)); TEST_ASSERT_EQUAL(osOK, status); } - void join() { + void join() + { osStatus status = thread.join(); TEST_ASSERT_EQUAL(osOK, status); } - void run() { + void run() + { // Tests exponentially growing sequences - for (size_t size = MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN; - size < MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX; - size *= 2) { + for (size_t size = MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN; + size < MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX; + size *= 2) { int err = sock.open(net); TEST_ASSERT_EQUAL(0, err); iomutex.lock(); printf("UDP: %s:%d streaming %d bytes\r\n", - udp_addr.get_ip_address(), udp_addr.get_port(), size); + udp_addr.get_ip_address(), udp_addr.get_port(), size); iomutex.unlock(); sock.set_blocking(false); @@ -196,7 +207,7 @@ public: int td = sock.sendto(udp_addr, buffer, chunk_size); if (td > 0) { - if (MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { iomutex.lock(); printf("UDP: tx -> %d\r\n", td); iomutex.unlock(); @@ -206,11 +217,11 @@ public: } else if (td != NSAPI_ERROR_WOULD_BLOCK) { // We may fail to send because of buffering issues, revert to // last good sequence and cut buffer in half - if (window > MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN) { + if (window > MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN) { window /= 2; } - if (MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { iomutex.lock(); printf("UDP: Not sent (%d), window = %d\r\n", td, window); iomutex.unlock(); @@ -225,7 +236,7 @@ public: TEST_ASSERT(rd > 0 || rd == NSAPI_ERROR_WOULD_BLOCK); if (rd > 0) { - if (MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { iomutex.lock(); printf("UDP: rx <- %d\r\n", rd); iomutex.unlock(); @@ -235,22 +246,22 @@ public: rx_seq.skip(rd); rx_count += rd; known_time = timer.read_ms(); - if (window < MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX) { - window += MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN; + if (window < MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX) { + window += MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN; } } } else if (timer.read_ms() - known_time > - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT) { + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_TIMEOUT) { // Dropped packet or out of order, revert to last good sequence // and cut buffer in half tx_seq = rx_seq; tx_count = rx_count; known_time = timer.read_ms(); - if (window > MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN) { + if (window > MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN) { window /= 2; } - if (MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { + if (MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_DEBUG) { iomutex.lock(); printf("UDP: Dropped, window = %d\r\n", window); iomutex.unlock(); @@ -267,21 +278,22 @@ public: } }; -PressureTest *pressure_tests[MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_THREADS]; +PressureTest *pressure_tests[MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_THREADS]; -void test_udp_packet_pressure_parallel() { +void test_udp_packet_pressure_parallel() +{ uint8_t *buffer; size_t buffer_size; generate_buffer(&buffer, &buffer_size, - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN, - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX); + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN, + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX); - size_t buffer_subsize = buffer_size / MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_THREADS; + size_t buffer_subsize = buffer_size / MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_THREADS; printf("MBED: Generated buffer %d\r\n", buffer_size); printf("MBED: Split into %d buffers %d\r\n", - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_THREADS, - buffer_subsize); + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_THREADS, + buffer_subsize); net = MBED_CONF_APP_OBJECT_CONSTRUCTION; int err = MBED_CONF_APP_CONNECT_STATEMENT; @@ -289,18 +301,36 @@ void test_udp_packet_pressure_parallel() { printf("MBED: UDPClient IP address is '%s'\n", net->get_ip_address()); +#if defined(MBED_CONF_APP_ECHO_SERVER_ADDR) && defined(MBED_CONF_APP_ECHO_SERVER_PORT) udp_addr.set_ip_address(MBED_CONF_APP_ECHO_SERVER_ADDR); udp_addr.set_port(MBED_CONF_APP_ECHO_SERVER_PORT); +#else /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ + char recv_key[] = "host_port"; + char ipbuf[60] = {0}; + char portbuf[16] = {0}; + unsigned int port = 0; + + greentea_send_kv("target_ip", net->get_ip_address()); + greentea_send_kv("host_ip", " "); + greentea_parse_kv(recv_key, ipbuf, sizeof(recv_key), sizeof(ipbuf)); + + greentea_send_kv("host_port", " "); + greentea_parse_kv(recv_key, portbuf, sizeof(recv_key), sizeof(ipbuf)); + sscanf(portbuf, "%u", &port); + + udp_addr.set_ip_address(ipbuf); + udp_addr.set_port(port); +#endif /* MBED_CONF_APP_ECHO_SERVER_ADDR && MBED_CONF_APP_ECHO_SERVER_PORT */ timer.start(); // Startup pressure tests in parallel - for (int i = 0; i < MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_THREADS; i++) { - pressure_tests[i] = new PressureTest(&buffer[i*buffer_subsize], buffer_subsize); + for (int i = 0; i < MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_THREADS; i++) { + pressure_tests[i] = new PressureTest(&buffer[i * buffer_subsize], buffer_subsize); pressure_tests[i]->start(); } - for (int i = 0; i < MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_THREADS; i++) { + for (int i = 0; i < MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_THREADS; i++) { pressure_tests[i]->join(); delete pressure_tests[i]; } @@ -308,16 +338,17 @@ void test_udp_packet_pressure_parallel() { timer.stop(); printf("MBED: Time taken: %fs\r\n", timer.read()); printf("MBED: Speed: %.3fkb/s\r\n", - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_THREADS* - 8*(2*MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MAX - - MBED_CFG_UDP_CLIENT_PACKET_PRESSURE_MIN) / (1000*timer.read())); + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_THREADS * + 8 * (2 * MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MAX - + MBED_CONF_APP_UDP_CLIENT_PACKET_PRESSURE_MIN) / (1000 * timer.read())); net->disconnect(); } // Test setup -utest::v1::status_t test_setup(const size_t number_of_cases) { +utest::v1::status_t test_setup(const size_t number_of_cases) +{ GREENTEA_SETUP(120, "udp_echo"); return verbose_test_setup_handler(number_of_cases); } @@ -328,6 +359,7 @@ Case cases[] = { Specification specification(test_setup, cases); -int main() { +int main() +{ return !Harness::run(specification); } diff --git a/TESTS/network/wifi/wifi_connect_params_channel_fail.cpp b/TESTS/network/wifi/wifi_connect_params_channel_fail.cpp index ad0d6a0f55..a3c531fd10 100644 --- a/TESTS/network/wifi/wifi_connect_params_channel_fail.cpp +++ b/TESTS/network/wifi/wifi_connect_params_channel_fail.cpp @@ -34,7 +34,7 @@ void wifi_connect_params_channel_fail(void) return; } - nsapi_error_t error = wifi->connect(MBED_CONF_APP_WIFI_SECURE_SSID, MBED_CONF_APP_WIFI_PASSWORD, get_security(), MBED_CONF_APP_WIFI_CH_SECURE); + nsapi_error_t error = wifi->connect(MBED_CONF_APP_WIFI_SECURE_SSID, MBED_CONF_APP_WIFI_PASSWORD, get_security(), MBED_CONF_APP_WIFI_CH_UNSECURE); TEST_ASSERT(error==NSAPI_ERROR_CONNECTION_TIMEOUT || error==NSAPI_ERROR_NO_CONNECTION); } diff --git a/drivers/Ticker.h b/drivers/Ticker.h index c8f1f9deb3..16d552ea7a 100644 --- a/drivers/Ticker.h +++ b/drivers/Ticker.h @@ -71,7 +71,6 @@ public: // When low power ticker is in use, then do not disable deep-sleep. Ticker(const ticker_data_t *data) : TimerEvent(data), _function(0), _lock_deepsleep(true) { - data->interface->init(); #if DEVICE_LOWPOWERTIMER _lock_deepsleep = (data != get_lp_ticker_data()); #endif diff --git a/features/FEATURE_LWIP/lwip-interface/lwip_stack.c b/features/FEATURE_LWIP/lwip-interface/lwip_stack.c index 85f2918986..f1e2c7b9cf 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwip_stack.c +++ b/features/FEATURE_LWIP/lwip-interface/lwip_stack.c @@ -444,9 +444,7 @@ static bool lwip_ppp = false; static nsapi_error_t mbed_set_dhcp(struct netif *lwip_netif) { - if (!lwip_ppp) { - netif_set_up(lwip_netif); - } + netif_set_up(lwip_netif); #if LWIP_DHCP if (lwip_dhcp && lwip_dhcp_has_to_be_set) { diff --git a/features/FEATURE_LWIP/lwip-interface/lwipopts.h b/features/FEATURE_LWIP/lwip-interface/lwipopts.h index 608cc994e7..62600a0bc6 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwipopts.h +++ b/features/FEATURE_LWIP/lwip-interface/lwipopts.h @@ -150,6 +150,14 @@ #ifdef MBED_CONF_LWIP_PBUF_POOL_BUFSIZE #undef PBUF_POOL_BUFSIZE #define PBUF_POOL_BUFSIZE MBED_CONF_LWIP_PBUF_POOL_BUFSIZE +#else +#ifndef PBUF_POOL_BUFSIZE +#if LWIP_IPV6 +#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+20+40+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN) +#elif LWIP_IPV4 +#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+20+20+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN) +#endif +#endif #endif #ifdef MBED_CONF_LWIP_MEM_SIZE diff --git a/features/filesystem/littlefs/littlefs/lfs.c b/features/filesystem/littlefs/littlefs/lfs.c index 9678181fd3..e5cc87434e 100644 --- a/features/filesystem/littlefs/littlefs/lfs.c +++ b/features/filesystem/littlefs/littlefs/lfs.c @@ -278,7 +278,7 @@ static int lfs_alloc_lookahead(void *p, lfs_block_t block) { % (lfs_soff_t)(lfs->cfg->block_count)) + lfs->cfg->block_count) % lfs->cfg->block_count; - if (off < lfs->cfg->lookahead) { + if (off < lfs->free.size) { lfs->free.buffer[off / 32] |= 1U << (off % 32); } @@ -287,18 +287,7 @@ static int lfs_alloc_lookahead(void *p, lfs_block_t block) { static int lfs_alloc(lfs_t *lfs, lfs_block_t *block) { while (true) { - while (true) { - // check if we have looked at all blocks since last ack - if (lfs->free.begin + lfs->free.off == lfs->free.end) { - LFS_WARN("No more free space %ld", lfs->free.end); - return LFS_ERR_NOSPC; - } - - if (lfs->free.off >= lfs_min( - lfs->cfg->lookahead, lfs->cfg->block_count)) { - break; - } - + while (lfs->free.off != lfs->free.size) { lfs_block_t off = lfs->free.off; lfs->free.off += 1; @@ -309,7 +298,15 @@ static int lfs_alloc(lfs_t *lfs, lfs_block_t *block) { } } - lfs->free.begin += lfs_min(lfs->cfg->lookahead, lfs->cfg->block_count); + // check if we have looked at all blocks since last ack + if (lfs->free.off == lfs->free.ack - lfs->free.begin) { + LFS_WARN("No more free space %ld", lfs->free.off + lfs->free.begin); + return LFS_ERR_NOSPC; + } + + lfs->free.begin += lfs->free.size; + lfs->free.size = lfs_min(lfs->cfg->lookahead, + lfs->free.ack - lfs->free.begin); lfs->free.off = 0; // find mask of free blocks from tree @@ -322,7 +319,7 @@ static int lfs_alloc(lfs_t *lfs, lfs_block_t *block) { } static void lfs_alloc_ack(lfs_t *lfs) { - lfs->free.end = lfs->free.begin + lfs->free.off + lfs->cfg->block_count; + lfs->free.ack = lfs->free.off-1 + lfs->free.begin + lfs->cfg->block_count; } @@ -1966,11 +1963,11 @@ int lfs_format(lfs_t *lfs, const struct lfs_config *cfg) { // create free lookahead memset(lfs->free.buffer, 0, lfs->cfg->lookahead/8); lfs->free.begin = 0; + lfs->free.size = lfs_min(lfs->cfg->lookahead, lfs->cfg->block_count); lfs->free.off = 0; - lfs->free.end = lfs->free.begin + lfs->free.off + lfs->cfg->block_count; + lfs_alloc_ack(lfs); // create superblock dir - lfs_alloc_ack(lfs); lfs_dir_t superdir; err = lfs_dir_alloc(lfs, &superdir); if (err) { @@ -2042,10 +2039,11 @@ int lfs_mount(lfs_t *lfs, const struct lfs_config *cfg) { return err; } - // setup free lookahead, rewind so first allocation triggers a scan - lfs->free.begin = -lfs_min(lfs->cfg->lookahead, lfs->cfg->block_count); - lfs->free.off = -lfs->free.begin; - lfs->free.end = lfs->free.begin + lfs->free.off + lfs->cfg->block_count; + // setup free lookahead + lfs->free.begin = 0; + lfs->free.size = 0; + lfs->free.off = 0; + lfs_alloc_ack(lfs); // load superblock lfs_dir_t dir; diff --git a/features/filesystem/littlefs/littlefs/lfs.h b/features/filesystem/littlefs/littlefs/lfs.h index 51d0a86230..7ac660d4c1 100644 --- a/features/filesystem/littlefs/littlefs/lfs.h +++ b/features/filesystem/littlefs/littlefs/lfs.h @@ -239,8 +239,9 @@ typedef struct lfs_superblock { typedef struct lfs_free { lfs_block_t begin; - lfs_block_t end; + lfs_block_t size; lfs_block_t off; + lfs_block_t ack; uint32_t *buffer; } lfs_free_t; diff --git a/features/filesystem/littlefs/littlefs/tests/test_alloc.sh b/features/filesystem/littlefs/littlefs/tests/test_alloc.sh index aaae6551e1..493270d103 100755 --- a/features/filesystem/littlefs/littlefs/tests/test_alloc.sh +++ b/features/filesystem/littlefs/littlefs/tests/test_alloc.sh @@ -266,6 +266,40 @@ tests/test.py << TEST lfs_mkdir(&lfs, "exhaustiondir2") => LFS_ERR_NOSPC; TEST +echo "--- Split dir test ---" +rm -rf blocks +tests/test.py << TEST + lfs_format(&lfs, &cfg) => 0; +TEST +tests/test.py << TEST + lfs_mount(&lfs, &cfg) => 0; + + // create one block whole for half a directory + lfs_file_open(&lfs, &file[0], "bump", LFS_O_WRONLY | LFS_O_CREAT) => 0; + lfs_file_write(&lfs, &file[0], (void*)"hi", 2) => 2; + lfs_file_close(&lfs, &file[0]) => 0; + + lfs_file_open(&lfs, &file[0], "exhaustion", LFS_O_WRONLY | LFS_O_CREAT); + size = strlen("blahblahblahblah"); + memcpy(buffer, "blahblahblahblah", size); + for (lfs_size_t i = 0; + i < (cfg.block_count-6)*(cfg.block_size-8); + i += size) { + lfs_file_write(&lfs, &file[0], buffer, size) => size; + } + lfs_file_close(&lfs, &file[0]) => 0; + + // open whole + lfs_remove(&lfs, "bump") => 0; + + lfs_mkdir(&lfs, "splitdir") => 0; + lfs_file_open(&lfs, &file[0], "splitdir/bump", + LFS_O_WRONLY | LFS_O_CREAT) => 0; + lfs_file_write(&lfs, &file[0], buffer, size) => LFS_ERR_NOSPC; + lfs_file_close(&lfs, &file[0]) => 0; + + lfs_unmount(&lfs) => 0; +TEST echo "--- Results ---" tests/stats.py diff --git a/features/lorawan/lorastack/phy/LoRaPHY.cpp b/features/lorawan/lorastack/phy/LoRaPHY.cpp index 4b1c502a45..47ba84f03d 100644 --- a/features/lorawan/lorastack/phy/LoRaPHY.cpp +++ b/features/lorawan/lorastack/phy/LoRaPHY.cpp @@ -159,7 +159,7 @@ bool LoRaPHY::verify_channel_DR(uint8_t nb_channels, uint16_t* channel_mask, return false; } - for (uint8_t i; i < phy_params.max_channel_cnt; i++) { + for (uint8_t i = 0; i < phy_params.max_channel_cnt; i++) { if (mask_bit_test(channel_mask, i)) { // Check datarate validity for enabled channels if (val_in_range(dr, (channels[i].dr_range.fields.min & 0x0F), diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/TARGET_NUMAKER_PFM_M487/mbedtls_device.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/TARGET_NUMAKER_PFM_M487/mbedtls_device.h index 1043cab9fd..902236ded9 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/TARGET_NUMAKER_PFM_M487/mbedtls_device.h +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/TARGET_NUMAKER_PFM_M487/mbedtls_device.h @@ -24,4 +24,16 @@ #define MBEDTLS_AES_ALT +#define MBEDTLS_ECP_INTERNAL_ALT +/* Support for Weierstrass curves with Jacobi representation */ +//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT +#define MBEDTLS_ECP_ADD_MIXED_ALT +#define MBEDTLS_ECP_DOUBLE_JAC_ALT +#define MBEDTLS_ECP_NORMALIZE_JAC_ALT +#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT +/* Support for curves with Montgomery arithmetic */ +//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT +//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT +//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT + #endif /* MBEDTLS_DEVICE_H */ diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/ecp/ecp_internal_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/ecp/ecp_internal_alt.c new file mode 100644 index 0000000000..f61453a78b --- /dev/null +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/ecp/ecp_internal_alt.c @@ -0,0 +1,807 @@ +/* mbed Microcontroller Library + * Copyright (c) 2016-2018 Nuvoton + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if !defined(MBEDTLS_CONFIG_FILE) +#include "mbedtls/config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +/* Some internal functions are used for Nuvoton internal self-test. + * Remove the static modifier for self-test compile. */ +#if defined(NU_CRYPTO_SELF_TEST) && NU_CRYPTO_SELF_TEST +#define NU_STATIC +#else +#define NU_STATIC static +#endif + +#if defined(MBEDTLS_ECP_C) + +#include "mbedtls/ecp.h" +#include "mbedtls/threading.h" + +#include + +#if !defined(MBEDTLS_ECP_ALT) + +#if defined(MBEDTLS_PLATFORM_C) +#include "mbedtls/platform.h" +#else +#include +#include +#define mbedtls_printf printf +#define mbedtls_calloc calloc +#define mbedtls_free free +#endif + +#if defined(MBEDTLS_ECP_INTERNAL_ALT) + +/* FIXME: We shouldn't define ECP_SHORTWEIERSTRASS here. It is expected ECP_SHORTWEIERSTRASS + * would be defined in mbedtls/ecp.h from ecp.c for our inclusion */ +#define ECP_SHORTWEIERSTRASS + +#include "mbedtls/ecp_internal.h" +#include "mbed_toolchain.h" +#include "mbed_assert.h" +#include "mbed_error.h" +#include "mbed_toolchain.h" +#include "nu_bitutil.h" +#include "crypto-misc.h" + +/* Max key size supported */ +#define NU_ECC_MAXKEYBITS 571 +/* Max ECC big-number words */ +#define NU_ECC_BIGNUM_MAXWORD 18 +/* words in limb */ +#define wiL (sizeof (mbedtls_mpi_uint) / sizeof (uint32_t)) +/* Min MPI limbs for ECC big-number */ +#define NU_ECC_BIGNUM_MINLIMB (NU_ECC_BIGNUM_MAXWORD / wiL) + +/* + * Convert between words and number of limbs + * Divide first in order to avoid potential overflows + */ +#define WORDS_TO_LIMBS(i) ( (i) / wiL + ( (i) % wiL != 0 ) ) + + +#define ECCOP_POINT_MUL (0x0UL << CRPT_ECC_CTL_ECCOP_Pos) +#define ECCOP_MODULE (0x1UL << CRPT_ECC_CTL_ECCOP_Pos) +#define ECCOP_POINT_ADD (0x2UL << CRPT_ECC_CTL_ECCOP_Pos) +#define ECCOP_POINT_DOUBLE (0x3UL << CRPT_ECC_CTL_ECCOP_Pos) + +#define MODOP_DIV (0x0UL << CRPT_ECC_CTL_MODOP_Pos) +#define MODOP_MUL (0x1UL << CRPT_ECC_CTL_MODOP_Pos) +#define MODOP_ADD (0x2UL << CRPT_ECC_CTL_MODOP_Pos) +#define MODOP_SUB (0x3UL << CRPT_ECC_CTL_MODOP_Pos) + +/** + * \brief Check if MPI has been normalized + * + * \param N Input MPI which is to check + * \param P Prime modulus + * + * \return 0 if not normalized, + * 1 if normalized + */ +#define INTERNAL_MPI_IS_NORM(N, P) \ + ((mbedtls_mpi_cmp_int(&N, 0) >= 0) && (mbedtls_mpi_cmp_mpi(&N, &P) < 0)) + + +/** + * \brief Normalize MPI if it is not normalized yet + * + * \param R Holds pointer to normalized MPI (N1 or N2) + * \param N1 Input MPI which is to normalize + * \param N2 Output MPI which holds normalized N1 if N1 is not normalized yet + * \param P Prime modulus + */ +#define INTERNAL_MPI_NORM(R, N1, N2, P) \ + do { \ + if (INTERNAL_MPI_IS_NORM(N1, P)) { \ + *R = &N1; \ + } else { \ + MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(&N2, &N1, &P)); \ + *R = &N2; \ + } \ + } while(0) + +/** + * \brief Configure ECCOP operation, start it, and wait for its completion + * + * \param grp ECP group + * \param R Destination point + * \param m Integer by which to multiply P + * \param P Point to multiply by m + * \param n Integer by which to multiply Q + * \param Q Point to be multiplied by n + * \param eccop ECCOP code. Could be ECCOP_POINT_MUL/ADD/DOUBLE + * Dependent on passed-in eccop, only partial parameters among m/P/n/Q are needed and checked. + * ECCOP_POINT_MUL R = m*P + * ECCOP_POINT_ADD R = P + Q + * ECCOP_POINT_DOUBLE R = 2*P + * + * \return 0 if successful + * + * \note P/Q must be normalized (= affine). R would be normalized. + * + * \note m/n could be negative. + * + * \note ECC accelerator doesn't support R = 0, and we need to detect it additionally. + * For R = P + Q or R = 2*P, we can detect all R = 0 cases. + * For R = m*P, we can detect all R = 0 cases only if grp->N (order) is a prime. + * + * \note According to ECCOP operation, n is unnecessary. But to be consistent with R = m*P + n*Q, + * n is kept with unused modifier. + * + */ +NU_STATIC int internal_run_eccop(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, + const mbedtls_mpi *m, + const mbedtls_ecp_point *P, + MBED_UNUSED const mbedtls_mpi *n, + const mbedtls_ecp_point *Q, + uint32_t eccop); + +/** + * \brief Configure MODOP operation and wait for its completion + * + * \param r Destination MPI + * \param o1 Input MPI for first operand of MODOP + * \param o2 Input MPI for second operand of MODOP + * \param p Prime modulus + * \param pbits Bit number of p + * \param modop ECCOP code. Could be MODOP_ADD/SUB/MUL/DIV + * MODOP_ADD r = o1 + o2 mod p + * MODOP_SUB r = o1 - o2 mod p + * MODOP_MUL r = o1 * o2 mod p + * MODOP_DIV r = o1 / o2 mod p + * + * \return 0 if successful + * + * \note o1/o2 must be normalized (within [0, p - 1]). r would be normalized. + */ +NU_STATIC int internal_run_modop(mbedtls_mpi *r, + const mbedtls_mpi *o1, + const mbedtls_mpi *o2, + const mbedtls_mpi *p, + uint32_t pbits, + uint32_t modop); + +/** + * \brief Import X from ECC registers, little endian + * + * \param X Destination MPI + * \param eccreg Start of input ECC register + * \param eccreg_num Number of input ECC register + * + * \return 0 if successful + * + * \note Destination MPI is always non-negative. + */ +NU_STATIC int internal_mpi_read_eccreg( mbedtls_mpi *X, const volatile uint32_t *eccreg, size_t eccreg_num ); + +/** + * \brief Export X into ECC registers, little endian + * + * \param X Source MPI + * \param eccreg Start of ECC output registers + * \param eccreg_num Number of ECC output registers + * + * \return 0 if successful + * + * \note Source MPI cannot be negative. + * \note Fills the remaining MSB ECC registers with zeros if X doesn't cover all. + */ +NU_STATIC int internal_mpi_write_eccreg( const mbedtls_mpi *X, volatile uint32_t *eccreg, size_t eccreg_num ); + +unsigned char mbedtls_internal_ecp_grp_capable( const mbedtls_ecp_group *grp ) +{ + /* Support only short Weierstrass type + * + * ECP type is checked by referring to mbed-os/features/mbedtls/src/ecp.c > ecp_get_type + */ + if (grp->G.X.p == NULL || grp->G.Y.p == NULL) { + return 0; + } + + return 1; +} + +int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp ) +{ + /* TODO: Change busy-wait with other means to release CPU */ + /* Acquire ownership of ECC accelerator */ + while (! crypto_ecc_acquire()); + + /* Init crypto module */ + crypto_init(); + ECC_ENABLE_INT(); + + return 0; +} + +void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp ) +{ + /* Disable ECC interrupt */ + ECC_DISABLE_INT(); + /* Uninit crypto module */ + crypto_uninit(); + + /* Release ownership of ECC accelerator */ + crypto_ecc_release(); +} + +#if defined(ECP_SHORTWEIERSTRASS) + +#if defined(MBEDTLS_ECP_ADD_MIXED_ALT) +/** + * \brief Addition: R = P + Q, mixed affine-Jacobian coordinates. + * + * The coordinates of Q must be normalized (= affine), + * but those of P don't need to. R is not normalized. + * + * We accept Q->Z being unset (saving memory in tables) as + * meaning 1. + * + * \param grp Pointer to the group representing the curve. + * + * \param R Pointer to a point structure to hold the result. + * + * \param P Pointer to the first summand, given with Jacobian + * coordinates + * + * \param Q Pointer to the second summand, given with affine + * coordinates. + * + * \return 0 if successful. + */ +int mbedtls_internal_ecp_add_mixed( const mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, const mbedtls_ecp_point *P, + const mbedtls_ecp_point *Q ) +{ + int ret; + mbedtls_ecp_point P_, Q_; + + mbedtls_ecp_point_init(&P_); + mbedtls_ecp_point_init(&Q_); + + /* P_ = normalized P */ + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(&P_, P)); + MBEDTLS_MPI_CHK(mbedtls_internal_ecp_normalize_jac(grp, &P_)); + + /* Q_ = normalized Q */ + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(&Q_, Q)); + /* NOTE: We accept Q->Z being unset (saving memory in tables) as meaning 1. + * + * Q->Z.p == NULL ==> Q->Z = 1 + * Q->Z.p != NULL && mbedtls_mpi_cmp_int(&Q->Z, 0) == 0 ==> Q->Z = 0 + * Q->Z.p != NULL && mbedtls_mpi_cmp_int(&Q->Z, 0) != 0 ==> Q->Z = 1 + */ + if (Q->Z.p != NULL && mbedtls_mpi_cmp_int(&Q->Z, 0) == 0) { + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&Q_.Z, 0)); + } else { + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&Q_.Z, 1)); + } + + /* Run ECC point addition: R = P + Q */ + MBEDTLS_MPI_CHK(internal_run_eccop(grp, R, NULL, &P_, NULL, &Q_, ECCOP_POINT_ADD)); + +cleanup: + + mbedtls_ecp_point_free(&Q_); + mbedtls_ecp_point_free(&P_); + + return ret; +} + +#endif + +#if defined(MBEDTLS_ECP_DOUBLE_JAC_ALT) +/** + * \brief Point doubling R = 2 P, Jacobian coordinates. + * + * \param grp Pointer to the group representing the curve. + * + * \param R Pointer to a point structure to hold the result. + * + * \param P Pointer to the point that has to be doubled, given with + * Jacobian coordinates. + * + * \return 0 if successful. + */ +int mbedtls_internal_ecp_double_jac( const mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, const mbedtls_ecp_point *P ) +{ + int ret; + mbedtls_ecp_point P_; + + mbedtls_ecp_point_init(&P_); + + /* P_ = normalized P */ + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(&P_, P)); + MBEDTLS_MPI_CHK(mbedtls_internal_ecp_normalize_jac(grp, &P_)); + + /* Run ECC point doubling: R = 2*P */ + MBEDTLS_MPI_CHK(internal_run_eccop(grp, R, NULL, &P_, NULL, NULL, ECCOP_POINT_DOUBLE)); + +cleanup: + + mbedtls_ecp_point_free(&P_); + + return ret; +} +#endif + +#if defined(MBEDTLS_ECP_NORMALIZE_JAC_ALT) +/** + * \brief Normalize jacobian coordinates so that Z == 0 || Z == 1. + * + * \param grp Pointer to the group representing the curve. + * + * \param pt pointer to the point to be normalised. This is an + * input/output parameter. + * + * \return 0 if successful. + */ +int mbedtls_internal_ecp_normalize_jac( const mbedtls_ecp_group *grp, + mbedtls_ecp_point *pt ) +{ + if (grp == NULL || pt == NULL) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + /* Is a zero point + * + * Z = 0 + */ + if (mbedtls_mpi_cmp_int(&pt->Z, 0) == 0) { + return 0; + } + + /* Is a non-zero point which has been normalized + * + * Z = 1 + * 0 <= X < P + * 0 <= y < P + */ + if (mbedtls_mpi_cmp_int(&pt->Z, 1) == 0 && + mbedtls_mpi_cmp_int(&pt->X, 0) >= 0 && + mbedtls_mpi_cmp_mpi(&pt->X, &grp->P) < 0 && + mbedtls_mpi_cmp_int(&pt->Y, 0) >= 0 && + mbedtls_mpi_cmp_mpi(&pt->Y, &grp->P) < 0) { + return 0; + } + + int ret; + mbedtls_mpi N, Zi, ZZi; + const mbedtls_mpi *Np; + + mbedtls_mpi_init(&N); + mbedtls_mpi_init(&Zi); + mbedtls_mpi_init(&ZZi); + + /* Use INTERNAL_MPI_NORM(Np, N1, N_, P) to get normalized MPI + * + * N_: Holds normalized MPI if the passed-in MPI N1 is not + * Np: Pointer to normalized MPI, which could be N1 or N_ + */ + + /* Zi = 1 / Z */ + mbedtls_mpi_lset(&Zi, 1); + INTERNAL_MPI_NORM(&Np, pt->Z, N, grp->P); + MBEDTLS_MPI_CHK(internal_run_modop(&Zi, &Zi, Np, &grp->P, grp->pbits, MODOP_DIV)); + + /* ZZi = 1 / Z^2 = Zi * Zi */ + MBEDTLS_MPI_CHK(internal_run_modop(&ZZi, &Zi, &Zi, &grp->P, grp->pbits, MODOP_MUL)); + + /* X = X / Z^2 = X * ZZi */ + INTERNAL_MPI_NORM(&Np, pt->X, N, grp->P); + MBEDTLS_MPI_CHK(internal_run_modop(&pt->X, Np, &ZZi, &grp->P, grp->pbits, MODOP_MUL)); + + /* Y = Y / Z^3 = Y * ZZi * Zi */ + INTERNAL_MPI_NORM(&Np, pt->Y, N, grp->P); + MBEDTLS_MPI_CHK(internal_run_modop(&pt->Y, Np, &ZZi, &grp->P, grp->pbits, MODOP_MUL)); + MBEDTLS_MPI_CHK(internal_run_modop(&pt->Y, &pt->Y, &Zi, &grp->P, grp->pbits, MODOP_MUL)); + + /* Z = 1 */ + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&pt->Z, 1)); + +cleanup: + + mbedtls_mpi_free(&ZZi); + mbedtls_mpi_free(&Zi); + mbedtls_mpi_free(&N); + + return ret; +} +#endif + +#if defined(MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT) +/** + * \brief Normalize jacobian coordinates of an array of (pointers to) + * points. + * + * \param grp Pointer to the group representing the curve. + * + * \param T Array of pointers to the points to normalise. + * + * \param t_len Number of elements in the array. + * + * \return 0 if successful. + */ +int mbedtls_internal_ecp_normalize_jac_many(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *T[], size_t t_len) +{ + if (T == NULL || t_len == 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + int ret; + + mbedtls_ecp_point **ecp_point = T; + mbedtls_ecp_point **ecp_point_end = T + t_len; + + for (; ecp_point != ecp_point_end; ecp_point ++) { + MBEDTLS_MPI_CHK(mbedtls_internal_ecp_normalize_jac(grp, *ecp_point)); + } + +cleanup: + + return ret; +} +#endif + +NU_STATIC int internal_run_eccop(const mbedtls_ecp_group *grp, + mbedtls_ecp_point *R, + const mbedtls_mpi *m, + const mbedtls_ecp_point *P, + MBED_UNUSED const mbedtls_mpi *n, + const mbedtls_ecp_point *Q, + uint32_t eccop) +{ + /* Check necessary arguments for all ECC operations */ + if (grp == NULL || R == NULL) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + /* Check grp->P is positive */ + if (mbedtls_mpi_cmp_int(&grp->P, 0) <= 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + /* Check supported maximum key bits */ + if (grp->pbits > NU_ECC_MAXKEYBITS) { + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; + } + + int ret; + bool ecc_done; + + mbedtls_mpi N_; + const mbedtls_mpi *Np; + + mbedtls_mpi_init(&N_); + + /* Use INTERNAL_MPI_NORM(Np, N1, N_, P) to get normalized MPI + * + * N_: Holds normalized MPI if the passed-in MPI N1 is not + * Np: Pointer to normalized MPI, which could be N1 or N_ + */ + + /* Check necessary arguments and handle special cases for specified ECC operation + * + * ECCOP_POINT_MUL R = m*P + * ECCOP_POINT_ADD R = P + Q + * ECCOP_POINT_DOUBLE R = 2*P + * + * ECC accelerator doesn't support R = 0, and we need to detect it. + */ + if (eccop == ECCOP_POINT_MUL) { + /* R = m*P */ + if (m == NULL || P == NULL) { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + /* R = 0*P = 0 or R = P = 0 */ + if (mbedtls_mpi_cmp_int(m, 0) == 0 || mbedtls_mpi_cmp_int(&P->Z, 0) == 0) { + ret = mbedtls_ecp_set_zero(R); + goto cleanup; + } + + /* R = 1*P */ + if (mbedtls_mpi_cmp_int(m, 1) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(R, P)); + MBEDTLS_MPI_CHK(mbedtls_internal_ecp_normalize_jac(grp, R)); + goto cleanup; + } + + /* R = m*P = (multiple of order)*G = 0 */ + /* NOTE: If grp->N (order) is a prime, we could detect R = 0 for all m*P cases + * by just checking if m is a multiple of grp->N. Otherwise, sigh. */ + /* TODO: Find an approach to detecting R = 0 for all m*P cases */ + INTERNAL_MPI_NORM(&Np, *m, N_, grp->N); + if (mbedtls_mpi_cmp_int(Np, 0) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_set_zero(R)); + goto cleanup; + } + + } else if (eccop == ECCOP_POINT_ADD) { + /* R = P + Q */ + if (P == NULL || Q == NULL) { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + /* R = 0 + Q = Q */ + if (mbedtls_mpi_cmp_int(&P->Z, 0) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(R, Q)); + MBEDTLS_MPI_CHK(mbedtls_internal_ecp_normalize_jac(grp, R)); + goto cleanup; + } + + /* R = P + 0 = P */ + if (mbedtls_mpi_cmp_int(&Q->Z, 0) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_copy(R, P)); + MBEDTLS_MPI_CHK(mbedtls_internal_ecp_normalize_jac(grp, R)); + goto cleanup; + } + + /* R = P + Q = P + (-P) = 0 */ + MBEDTLS_MPI_CHK(internal_run_modop(&N_, &P->Y, &Q->Y, &grp->P, grp->pbits, MODOP_ADD)); + if (mbedtls_mpi_cmp_int(&N_, 0) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_set_zero(R)); + goto cleanup; + } + } else if (eccop == ECCOP_POINT_DOUBLE) { + /* R = 2*P */ + if (P == NULL) { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + /* R = 2*0 = 0 */ + if (mbedtls_mpi_cmp_int(&P->Z, 0) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_set_zero(R)); + goto cleanup; + } + + /* R = 2*P = P + P = P + (-P) = 0 */ + MBEDTLS_MPI_CHK(internal_run_modop(&N_, &P->Y, &P->Y, &grp->P, grp->pbits, MODOP_ADD)); + if (mbedtls_mpi_cmp_int(&N_, 0) == 0) { + MBEDTLS_MPI_CHK(mbedtls_ecp_set_zero(R)); + goto cleanup; + } + } else { + ret = MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + goto cleanup; + } + + /* Configure ECC curve coefficients A/B */ + /* Special case for A = -3 */ + if (grp->A.p == NULL) { + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&N_, -3)); + INTERNAL_MPI_NORM(&Np, N_, N_, grp->P); + } else { + INTERNAL_MPI_NORM(&Np, grp->A, N_, grp->P); + } + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_A, NU_ECC_BIGNUM_MAXWORD)); + INTERNAL_MPI_NORM(&Np, grp->B, N_, grp->P); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_B, NU_ECC_BIGNUM_MAXWORD)); + + /* Configure ECC prime modulus */ + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(&grp->P, (uint32_t *) CRPT->ECC_N, NU_ECC_BIGNUM_MAXWORD)); + + /* Configure ECC scalar for point multiplication + * + * Normalize m to within [1, order - 1] which ECCOP_POINT_MUL supports + * Special cases R = 0 should have been detected out above. + */ + if (eccop == ECCOP_POINT_MUL) { + INTERNAL_MPI_NORM(&Np, *m, N_, grp->N); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_K, NU_ECC_BIGNUM_MAXWORD)); + } + + /* Configure ECC point (X1, Y1) */ + INTERNAL_MPI_NORM(&Np, P->X, N_, grp->P); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_X1, NU_ECC_BIGNUM_MAXWORD)); + INTERNAL_MPI_NORM(&Np, P->Y, N_, grp->P); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_Y1, NU_ECC_BIGNUM_MAXWORD)); + + /* Configure ECC points (X2, Y2) */ + if (eccop == ECCOP_POINT_ADD) { + INTERNAL_MPI_NORM(&Np, Q->X, N_, grp->P); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_X2, NU_ECC_BIGNUM_MAXWORD)); + INTERNAL_MPI_NORM(&Np, Q->Y, N_, grp->P); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_Y2, NU_ECC_BIGNUM_MAXWORD)); + } + + crypto_ecc_prestart(); + CRPT->ECC_CTL = (grp->pbits << CRPT_ECC_CTL_CURVEM_Pos) | eccop | CRPT_ECC_CTL_FSEL_Msk | CRPT_ECC_CTL_START_Msk; + ecc_done = crypto_ecc_wait(); + + /* FIXME: Better error code for ECC accelerator error */ + MBEDTLS_MPI_CHK(ecc_done ? 0 : -1); + + /* (X1, Y1) hold the normalized result. */ + MBEDTLS_MPI_CHK(internal_mpi_read_eccreg(&R->X, (uint32_t *) CRPT->ECC_X1, NU_ECC_BIGNUM_MAXWORD)); + MBEDTLS_MPI_CHK(internal_mpi_read_eccreg(&R->Y, (uint32_t *) CRPT->ECC_Y1, NU_ECC_BIGNUM_MAXWORD)); + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&R->Z, 1)); + +cleanup: + + mbedtls_mpi_free(&N_); + + return ret; +} + +NU_STATIC int internal_run_modop(mbedtls_mpi *r, + const mbedtls_mpi *o1, + const mbedtls_mpi *o2, + const mbedtls_mpi *p, + uint32_t pbits, + uint32_t modop) +{ + if (r == NULL || + o1 == NULL || + o2 == NULL || + p == NULL) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + /* Check o1/o2 are not negative */ + if (mbedtls_mpi_cmp_int(o1, 0) < 0 || + mbedtls_mpi_cmp_int(o2, 0) < 0) { + return MBEDTLS_ERR_MPI_NEGATIVE_VALUE; + } + + /* Check p is positive */ + if (mbedtls_mpi_cmp_int(p, 0) <= 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + /* Check supported maximum key bits */ + if (pbits > NU_ECC_MAXKEYBITS) { + return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE; + } + + /* Check MODOP operations are legal */ + if (modop != MODOP_DIV && + modop != MODOP_MUL && + modop != MODOP_ADD && + modop != MODOP_SUB) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + /* Check divisor is not zero in MODOP_DIV operation */ + if (modop == MODOP_DIV && mbedtls_mpi_cmp_int(o2, 0) == 0) { + return MBEDTLS_ERR_ECP_BAD_INPUT_DATA; + } + + int ret; + bool ecc_done; + + mbedtls_mpi N_; + const mbedtls_mpi *Np; + + mbedtls_mpi_init(&N_); + + /* Use INTERNAL_MPI_NORM(Np, N1, N_, P) to get normalized MPI + * + * N_: Holds normalized MPI if the passed-in MPI N1 is not + * Np: Pointer to normalized MPI, which could be N1 or N_ + */ + + if (modop == MODOP_MUL || + modop == MODOP_ADD || + modop == MODOP_SUB) { + INTERNAL_MPI_NORM(&Np, *o1, N_, *p); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_X1, NU_ECC_BIGNUM_MAXWORD)); + INTERNAL_MPI_NORM(&Np, *o2, N_, *p); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_Y1, NU_ECC_BIGNUM_MAXWORD)); + } else if (modop == MODOP_DIV) { + INTERNAL_MPI_NORM(&Np, *o2, N_, *p); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_X1, NU_ECC_BIGNUM_MAXWORD)); + INTERNAL_MPI_NORM(&Np, *o1, N_, *p); + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(Np, (uint32_t *) CRPT->ECC_Y1, NU_ECC_BIGNUM_MAXWORD)); + } else { + MBEDTLS_MPI_CHK(MBEDTLS_ERR_ECP_BAD_INPUT_DATA); + } + + MBEDTLS_MPI_CHK(internal_mpi_write_eccreg(p, (uint32_t *) CRPT->ECC_N, NU_ECC_BIGNUM_MAXWORD)); + + crypto_ecc_prestart(); + CRPT->ECC_CTL = (pbits << CRPT_ECC_CTL_CURVEM_Pos) | (ECCOP_MODULE | modop) | CRPT_ECC_CTL_FSEL_Msk | CRPT_ECC_CTL_START_Msk; + ecc_done = crypto_ecc_wait(); + + /* FIXME: Better error code for ECC accelerator error */ + MBEDTLS_MPI_CHK(ecc_done ? 0 : -1); + + /* X1 holds the result. */ + MBEDTLS_MPI_CHK(internal_mpi_read_eccreg(r, (uint32_t *) CRPT->ECC_X1, NU_ECC_BIGNUM_MAXWORD)); + +cleanup: + + mbedtls_mpi_free(&N_); + + return ret; +} + +#endif // ECP_SHORTWEIERSTRASS + +NU_STATIC int internal_mpi_read_eccreg(mbedtls_mpi *x, const volatile uint32_t *eccreg, size_t eccreg_num) +{ + if (x == NULL) { + return MBEDTLS_ERR_MPI_BAD_INPUT_DATA; + } + + int ret; + size_t i, n; + + for (n = eccreg_num; n > 0; n --) { + if (eccreg[n - 1] != 0) { + break; + } + } + + MBEDTLS_MPI_CHK(mbedtls_mpi_lset(x, 0)); + MBEDTLS_MPI_CHK(mbedtls_mpi_grow(x, WORDS_TO_LIMBS(n))); + + for (i = 0; i < n; i ++) { + x->p[i / wiL] |= ((mbedtls_mpi_uint) eccreg[i]) << ((i % wiL) << 5); + } + +cleanup: + + return ret; +} + +NU_STATIC int internal_mpi_write_eccreg( const mbedtls_mpi *x, volatile uint32_t *eccreg, size_t eccreg_num ) +{ + if (x == NULL) { + return MBEDTLS_ERR_MPI_BAD_INPUT_DATA; + } + + if (mbedtls_mpi_cmp_int(x, 0) < 0) { + return MBEDTLS_ERR_MPI_NEGATIVE_VALUE; + } + + size_t i, n; + + /* How many words needed? */ + n = (mbedtls_mpi_size(x) + sizeof (uint32_t) - 1) / sizeof (uint32_t); + + if (eccreg_num < n) { + return MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL; + } + + /* Fill non-zero part */ + for (i = 0; i < n; i ++) { + eccreg[i] = (uint32_t) (x->p[i / wiL] >> ((i % wiL) << 5)); + } + + /* Zeroize remaining part + * + * crypto_zeroize32() has excluded optimization doubt, so we can safely set H/W registers to 0 via it. + */ + crypto_zeroize32((uint32_t *) eccreg + n, eccreg_num - n); + + return 0; +} + +#endif /* MBEDTLS_ECP_INTERNAL_ALT */ +#endif /* ! MBEDTLS_ECP_ALT */ +#endif /* MBEDTLS_ECP_C */ diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha1_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha1_alt.c index bd83ea03ae..35d7122610 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha1_alt.c +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha1_alt.c @@ -103,40 +103,37 @@ void mbedtls_sha1_clone(mbedtls_sha1_context *dst, /* * SHA-1 context setup */ -int mbedtls_sha1_starts_ret(mbedtls_sha1_context *ctx) +void mbedtls_sha1_starts(mbedtls_sha1_context *ctx) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha1_hw_starts(&ctx->hw_ctx); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha1_sw_starts(&ctx->sw_ctx); } - return 0; } /* * SHA-1 process buffer */ -int mbedtls_sha1_update_ret(mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen) +void mbedtls_sha1_update(mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha1_hw_update(&ctx->hw_ctx, input, ilen); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha1_sw_update(&ctx->sw_ctx, input, ilen); } - return 0; } /* * SHA-1 final digest */ -int mbedtls_sha1_finish_ret(mbedtls_sha1_context *ctx, unsigned char output[20]) +void mbedtls_sha1_finish(mbedtls_sha1_context *ctx, unsigned char output[20]) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha1_hw_finish(&ctx->hw_ctx, output); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha1_sw_finish(&ctx->sw_ctx, output); } - return 0; } void mbedtls_sha1_process(mbedtls_sha1_context *ctx, const unsigned char data[64]) diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha1_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha1_alt.h index f90b335c62..59f519fac9 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha1_alt.h +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha1_alt.h @@ -66,10 +66,8 @@ void mbedtls_sha1_clone( mbedtls_sha1_context *dst, * \brief SHA-1 context setup * * \param ctx context to be initialized - * - * \return 0 if successful */ -int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ); +void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ); /** * \brief SHA-1 process buffer @@ -77,20 +75,16 @@ int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ); * \param ctx SHA-1 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return 0 if successful */ -int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); +void mbedtls_sha1_update( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); /** * \brief SHA-1 final digest * * \param ctx SHA-1 context * \param output SHA-1 checksum result - * - * \return 0 if successful */ -int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx, unsigned char output[20] ); +void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, unsigned char output[20] ); /* Internal use */ void mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[64] ); diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha256_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha256_alt.c index 71b2bfe322..c4e27dfa5f 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha256_alt.c +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha256_alt.c @@ -104,40 +104,37 @@ void mbedtls_sha256_clone(mbedtls_sha256_context *dst, /* * SHA-256 context setup */ -int mbedtls_sha256_starts_ret(mbedtls_sha256_context *ctx, int is224) +void mbedtls_sha256_starts(mbedtls_sha256_context *ctx, int is224) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha256_hw_starts(&ctx->hw_ctx, is224); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha256_sw_starts(&ctx->sw_ctx, is224); } - return 0; } /* * SHA-256 process buffer */ -int mbedtls_sha256_update_ret(mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen) +void mbedtls_sha256_update(mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha256_hw_update(&ctx->hw_ctx, input, ilen); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha256_sw_update(&ctx->sw_ctx, input, ilen); } - return 0; } /* * SHA-256 final digest */ -int mbedtls_sha256_finish_ret(mbedtls_sha256_context *ctx, unsigned char output[32]) +void mbedtls_sha256_finish(mbedtls_sha256_context *ctx, unsigned char output[32]) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha256_hw_finish(&ctx->hw_ctx, output); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha256_sw_finish(&ctx->sw_ctx, output); } - return 0; } void mbedtls_sha256_process(mbedtls_sha256_context *ctx, const unsigned char data[64]) diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha256_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha256_alt.h index aa5217da32..04ff65fd18 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha256_alt.h +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha256_alt.h @@ -67,10 +67,8 @@ void mbedtls_sha256_clone( mbedtls_sha256_context *dst, * * \param ctx context to be initialized * \param is224 0 = use SHA256, 1 = use SHA224 - * - * \return 0 if successful */ -int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ); +void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ); /** * \brief SHA-256 process buffer @@ -78,21 +76,17 @@ int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ); * \param ctx SHA-256 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return 0 if successful */ -int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, const unsigned char *input, - size_t ilen ); +void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *input, + size_t ilen ); /** * \brief SHA-256 final digest * * \param ctx SHA-256 context * \param output SHA-224/256 checksum result - * - * \return 0 if successful */ -int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx, unsigned char output[32] ); +void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, unsigned char output[32] ); /* Internal use */ void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[64] ); diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha512_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha512_alt.c index a2854f8cba..48baf9132f 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha512_alt.c +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha512_alt.c @@ -105,40 +105,37 @@ void mbedtls_sha512_clone(mbedtls_sha512_context *dst, /* * SHA-512 context setup */ -int mbedtls_sha512_starts_ret(mbedtls_sha512_context *ctx, int is384) +void mbedtls_sha512_starts(mbedtls_sha512_context *ctx, int is384) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha512_hw_starts(&ctx->hw_ctx, is384); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha512_sw_starts(&ctx->sw_ctx, is384); } - return 0; } /* * SHA-512 process buffer */ -int mbedtls_sha512_update_ret(mbedtls_sha512_context *ctx, const unsigned char *input, size_t ilen) +void mbedtls_sha512_update(mbedtls_sha512_context *ctx, const unsigned char *input, size_t ilen) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha512_hw_update(&ctx->hw_ctx, input, ilen); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha512_sw_update(&ctx->sw_ctx, input, ilen); } - return 0; } /* * SHA-512 final digest */ -int mbedtls_sha512_finish_ret(mbedtls_sha512_context *ctx, unsigned char output[64]) +void mbedtls_sha512_finish(mbedtls_sha512_context *ctx, unsigned char output[64]) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha512_hw_finish(&ctx->hw_ctx, output); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha512_sw_finish(&ctx->sw_ctx, output); } - return 0; } void mbedtls_sha512_process(mbedtls_sha512_context *ctx, const unsigned char data[128]) diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha512_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha512_alt.h index 1dbd820b6b..afd0294ca3 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha512_alt.h +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha512_alt.h @@ -67,10 +67,8 @@ void mbedtls_sha512_clone( mbedtls_sha512_context *dst, * * \param ctx context to be initialized * \param is384 0 = use SHA512, 1 = use SHA384 - * - * \return 0 if successful */ -int mbedtls_sha512_starts_ret( mbedtls_sha512_context *ctx, int is384 ); +void mbedtls_sha512_starts( mbedtls_sha512_context *ctx, int is384 ); /** * \brief SHA-512 process buffer @@ -78,21 +76,17 @@ int mbedtls_sha512_starts_ret( mbedtls_sha512_context *ctx, int is384 ); * \param ctx SHA-512 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return 0 if successful */ -int mbedtls_sha512_update_ret( mbedtls_sha512_context *ctx, const unsigned char *input, - size_t ilen ); +void mbedtls_sha512_update( mbedtls_sha512_context *ctx, const unsigned char *input, + size_t ilen ); /** * \brief SHA-512 final digest * * \param ctx SHA-512 context * \param output SHA-384/512 checksum result - * - * \return 0 if successful */ -int mbedtls_sha512_finish_ret( mbedtls_sha512_context *ctx, unsigned char output[64] ); +void mbedtls_sha512_finish( mbedtls_sha512_context *ctx, unsigned char output[64] ); /* Internal use */ void mbedtls_sha512_process( mbedtls_sha512_context *ctx, const unsigned char data[128] ); diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.c index bd83ea03ae..35d7122610 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.c +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.c @@ -103,40 +103,37 @@ void mbedtls_sha1_clone(mbedtls_sha1_context *dst, /* * SHA-1 context setup */ -int mbedtls_sha1_starts_ret(mbedtls_sha1_context *ctx) +void mbedtls_sha1_starts(mbedtls_sha1_context *ctx) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha1_hw_starts(&ctx->hw_ctx); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha1_sw_starts(&ctx->sw_ctx); } - return 0; } /* * SHA-1 process buffer */ -int mbedtls_sha1_update_ret(mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen) +void mbedtls_sha1_update(mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha1_hw_update(&ctx->hw_ctx, input, ilen); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha1_sw_update(&ctx->sw_ctx, input, ilen); } - return 0; } /* * SHA-1 final digest */ -int mbedtls_sha1_finish_ret(mbedtls_sha1_context *ctx, unsigned char output[20]) +void mbedtls_sha1_finish(mbedtls_sha1_context *ctx, unsigned char output[20]) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha1_hw_finish(&ctx->hw_ctx, output); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha1_sw_finish(&ctx->sw_ctx, output); } - return 0; } void mbedtls_sha1_process(mbedtls_sha1_context *ctx, const unsigned char data[64]) diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.h index f90b335c62..59f519fac9 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.h +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.h @@ -66,10 +66,8 @@ void mbedtls_sha1_clone( mbedtls_sha1_context *dst, * \brief SHA-1 context setup * * \param ctx context to be initialized - * - * \return 0 if successful */ -int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ); +void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ); /** * \brief SHA-1 process buffer @@ -77,20 +75,16 @@ int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ); * \param ctx SHA-1 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return 0 if successful */ -int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); +void mbedtls_sha1_update( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); /** * \brief SHA-1 final digest * * \param ctx SHA-1 context * \param output SHA-1 checksum result - * - * \return 0 if successful */ -int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx, unsigned char output[20] ); +void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, unsigned char output[20] ); /* Internal use */ void mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[64] ); diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.c index 2ae555b492..b576d7a767 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.c +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.c @@ -104,40 +104,37 @@ void mbedtls_sha256_clone(mbedtls_sha256_context *dst, /* * SHA-256 context setup */ -int mbedtls_sha256_starts_ret(mbedtls_sha256_context *ctx, int is224) +void mbedtls_sha256_starts(mbedtls_sha256_context *ctx, int is224) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha256_hw_starts(&ctx->hw_ctx, is224); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha256_sw_starts(&ctx->sw_ctx, is224); } - return 0; } /* * SHA-256 process buffer */ -int mbedtls_sha256_update_ret(mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen) +void mbedtls_sha256_update(mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha256_hw_update(&ctx->hw_ctx, input, ilen); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha256_sw_update(&ctx->sw_ctx, input, ilen); } - return 0; } /* * SHA-256 final digest */ -int mbedtls_sha256_finish_ret(mbedtls_sha256_context *ctx, unsigned char output[32]) +void mbedtls_sha256_finish(mbedtls_sha256_context *ctx, unsigned char output[32]) { if (ctx->active_ctx == &ctx->hw_ctx) { mbedtls_sha256_hw_finish(&ctx->hw_ctx, output); } else if (ctx->active_ctx == &ctx->sw_ctx) { mbedtls_sha256_sw_finish(&ctx->sw_ctx, output); } - return 0; } void mbedtls_sha256_process(mbedtls_sha256_context *ctx, const unsigned char data[64]) diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.h index aa5217da32..04ff65fd18 100644 --- a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.h +++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.h @@ -67,10 +67,8 @@ void mbedtls_sha256_clone( mbedtls_sha256_context *dst, * * \param ctx context to be initialized * \param is224 0 = use SHA256, 1 = use SHA224 - * - * \return 0 if successful */ -int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ); +void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ); /** * \brief SHA-256 process buffer @@ -78,21 +76,17 @@ int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ); * \param ctx SHA-256 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return 0 if successful */ -int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, const unsigned char *input, - size_t ilen ); +void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *input, + size_t ilen ); /** * \brief SHA-256 final digest * * \param ctx SHA-256 context * \param output SHA-224/256 checksum result - * - * \return 0 if successful */ -int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx, unsigned char output[32] ); +void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, unsigned char output[32] ); /* Internal use */ void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[64] ); diff --git a/features/mbedtls/targets/TARGET_STM/md5_alt.c b/features/mbedtls/targets/TARGET_STM/md5_alt.c index 35af9977e7..40377c43ca 100644 --- a/features/mbedtls/targets/TARGET_STM/md5_alt.c +++ b/features/mbedtls/targets/TARGET_STM/md5_alt.c @@ -90,11 +90,12 @@ void mbedtls_md5_clone( mbedtls_md5_context *dst, *dst = *src; } -int mbedtls_md5_starts_ret( mbedtls_md5_context *ctx ) +void mbedtls_md5_starts( mbedtls_md5_context *ctx ) { /* HASH IP initialization */ if (HAL_HASH_DeInit(&ctx->hhash_md5) != 0) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; + // error found to be returned + return; } /* HASH Configuration */ @@ -102,37 +103,34 @@ int mbedtls_md5_starts_ret( mbedtls_md5_context *ctx ) /* clear CR ALGO value */ HASH->CR &= ~HASH_CR_ALGO_Msk; if (HAL_HASH_Init(&ctx->hhash_md5) != 0) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; + // return error code + return; } if (st_md5_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } -int mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[ST_MD5_BLOCK_SIZE] ) +void mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[ST_MD5_BLOCK_SIZE] ) { if (st_md5_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, (uint8_t *)data, ST_MD5_BLOCK_SIZE) != 0) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; + return; // Return error code here } if (st_md5_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } -int mbedtls_md5_update_ret( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen ) +void mbedtls_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen ) { size_t currentlen = ilen; /* If ilen = 0 : do nothing */ if (currentlen != 0) { if (st_md5_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } // store mechanism to accumulate ST_MD5_BLOCK_SIZE bytes (512 bits) in the HW @@ -149,7 +147,7 @@ int mbedtls_md5_update_ret( mbedtls_md5_context *ctx, const unsigned char *input size_t iter = currentlen / ST_MD5_BLOCK_SIZE; if (iter !=0) { if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, (uint8_t *)(input + ST_MD5_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_MD5_BLOCK_SIZE)) != 0) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; + return; // Return error code here } } // sbuf is completely accumulated, now copy up to 63 remaining bytes @@ -160,20 +158,20 @@ int mbedtls_md5_update_ret( mbedtls_md5_context *ctx, const unsigned char *input } if (st_md5_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } } } -int mbedtls_md5_finish_ret( mbedtls_md5_context *ctx, unsigned char output[16] ) +void mbedtls_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] ) { if (st_md5_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } /* Last accumulation for extra bytes in sbuf_len */ /* This sets HW flags in case mbedtls_md5_update has not been called yet */ if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, ctx->sbuf, ctx->sbuf_len) != 0) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Accumulation error + return; // Return error code here } mbedtls_zeroize( ctx->sbuf, ST_MD5_BLOCK_SIZE); @@ -181,13 +179,11 @@ int mbedtls_md5_finish_ret( mbedtls_md5_context *ctx, unsigned char output[16] ) __HAL_HASH_START_DIGEST(); if (HAL_HASH_MD5_Finish(&ctx->hhash_md5, output, 10)) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Finish error + // error code to be returned } if (st_md5_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } #endif /* MBEDTLS_MD5_ALT */ diff --git a/features/mbedtls/targets/TARGET_STM/md5_alt.h b/features/mbedtls/targets/TARGET_STM/md5_alt.h index fbd181b2d0..7ea0df21e1 100644 --- a/features/mbedtls/targets/TARGET_STM/md5_alt.h +++ b/features/mbedtls/targets/TARGET_STM/md5_alt.h @@ -27,19 +27,6 @@ #include "cmsis.h" #include -/** - * \name SECTION: Temporary compatibility code - * - * This section contains code to be added up stream in Mbed TLS. Once that - * has been provided, this section should be removed as the code will be - * provided elsewhere. - * \{ - */ - -#define MBEDTLS_ERR_MD5_HW_ACCEL_FAILED -0x002F /**< MD5 hardware accelerator failed */ - -/* \} name SECTION: Temporary compatibility code */ - #ifdef __cplusplus extern "C" { #endif @@ -92,10 +79,8 @@ void mbedtls_md5_clone( mbedtls_md5_context *dst, * \brief MD5 context setup * * \param ctx context to be initialized - * - * \return 0 if successful */ -int mbedtls_md5_starts_ret( mbedtls_md5_context *ctx ); +void mbedtls_md5_starts( mbedtls_md5_context *ctx ); /** * \brief MD5 process buffer @@ -103,23 +88,19 @@ int mbedtls_md5_starts_ret( mbedtls_md5_context *ctx ); * \param ctx MD5 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return 0 if successful */ -int mbedtls_md5_update_ret( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen ); +void mbedtls_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen ); /** * \brief MD5 final digest * * \param ctx MD5 context * \param output MD5 checksum result - * - * \return 0 if successful */ -int mbedtls_md5_finish_ret( mbedtls_md5_context *ctx, unsigned char output[16] ); +void mbedtls_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] ); /* Internal use */ -int mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[ST_MD5_BLOCK_SIZE] ); +void mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[ST_MD5_BLOCK_SIZE] ); #ifdef __cplusplus } diff --git a/features/mbedtls/targets/TARGET_STM/sha1_alt.c b/features/mbedtls/targets/TARGET_STM/sha1_alt.c index 3ffe7e084f..37b46c1807 100644 --- a/features/mbedtls/targets/TARGET_STM/sha1_alt.c +++ b/features/mbedtls/targets/TARGET_STM/sha1_alt.c @@ -88,11 +88,12 @@ void mbedtls_sha1_clone( mbedtls_sha1_context *dst, *dst = *src; } -int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ) +void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ) { /* Deinitializes the HASH peripheral */ if (HAL_HASH_DeInit(&ctx->hhash_sha1) == HAL_ERROR) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; + // error found to be returned + return; } /* HASH Configuration */ @@ -100,36 +101,33 @@ int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ) /* clear CR ALGO value */ HASH->CR &= ~HASH_CR_ALGO_Msk; if (HAL_HASH_Init(&ctx->hhash_sha1) == HAL_ERROR) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; + // error found to be returned + return; } if (st_sha1_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } -int mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[ST_SHA1_BLOCK_SIZE] ) +void mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[ST_SHA1_BLOCK_SIZE] ) { if (st_sha1_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } if (HAL_HASH_SHA1_Accumulate(&ctx->hhash_sha1, (uint8_t *) data, ST_SHA1_BLOCK_SIZE) != 0) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; + return; // Return error code } if (st_sha1_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } -int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ) +void mbedtls_sha1_update( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ) { size_t currentlen = ilen; if (st_sha1_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } // store mechanism to accumulate ST_SHA1_BLOCK_SIZE bytes (512 bits) in the HW @@ -148,14 +146,11 @@ int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, const unsigned char *inp // fill buffer and process it memcpy(ctx->sbuf + ctx->sbuf_len, input, (ST_SHA1_BLOCK_SIZE - ctx->sbuf_len)); currentlen -= (ST_SHA1_BLOCK_SIZE - ctx->sbuf_len); - if( mbedtls_sha1_process(ctx, ctx->sbuf) != 0 ) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; - } - + mbedtls_sha1_process(ctx, ctx->sbuf); // Process every input as long as it is %64 bytes, ie 512 bits size_t iter = currentlen / ST_SHA1_BLOCK_SIZE; if (HAL_HASH_SHA1_Accumulate(&ctx->hhash_sha1, (uint8_t *)(input + ST_SHA1_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_SHA1_BLOCK_SIZE)) != 0) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; + return; // Return error code here } // sbuf is completely accumulated, now copy up to 63 remaining bytes ctx->sbuf_len = currentlen % ST_SHA1_BLOCK_SIZE; @@ -164,35 +159,31 @@ int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, const unsigned char *inp } } if (st_sha1_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } -int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx, unsigned char output[20] ) +void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, unsigned char output[20] ) { if (st_sha1_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } /* Last accumulation for extra bytes in sbuf_len */ /* This allows the HW flags to be in place in case mbedtls_sha256_update has not been called yet */ if (HAL_HASH_SHA1_Accumulate(&ctx->hhash_sha1, ctx->sbuf, ctx->sbuf_len) != 0) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; + return; // Return error code here } mbedtls_zeroize(ctx->sbuf, ST_SHA1_BLOCK_SIZE); ctx->sbuf_len = 0; __HAL_HASH_START_DIGEST(); if (HAL_HASH_SHA1_Finish(&ctx->hhash_sha1, output, 10) != 0){ - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; + return; // error code to be returned } if (st_sha1_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } #endif /*MBEDTLS_SHA1_ALT*/ diff --git a/features/mbedtls/targets/TARGET_STM/sha1_alt.h b/features/mbedtls/targets/TARGET_STM/sha1_alt.h index 92802c636e..4db4880bea 100644 --- a/features/mbedtls/targets/TARGET_STM/sha1_alt.h +++ b/features/mbedtls/targets/TARGET_STM/sha1_alt.h @@ -24,18 +24,6 @@ #if defined (MBEDTLS_SHA1_ALT) -/** - * \name SECTION: Temporary compatibility code - * - * This section contains code to be added up stream in Mbed TLS. Once that - * has been provided, this section should be removed as the code will be - * provided elsewhere. - * \{ - */ - -#define MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED -0x0035 /**< SHA-1 hardware accelerator failed */ - -/* \} name SECTION: Temporary compatibility code */ #include "cmsis.h" #include @@ -91,10 +79,8 @@ void mbedtls_sha1_clone( mbedtls_sha1_context *dst, * \brief SHA-1 context setup * * \param ctx context to be initialized - * - * \return 0 if successful */ -int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ); +void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ); /** * \brief SHA-1 process buffer @@ -102,23 +88,19 @@ int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ); * \param ctx SHA-1 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return 0 if successful */ -int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); +void mbedtls_sha1_update( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); /** * \brief SHA-1 final digest * * \param ctx SHA-1 context * \param output SHA-1 checksum result - * - * \return 0 if successful */ -int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx, unsigned char output[20] ); +void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, unsigned char output[20] ); /* Internal use */ -int mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[ST_SHA1_BLOCK_SIZE] ); +void mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[ST_SHA1_BLOCK_SIZE] ); #ifdef __cplusplus } diff --git a/features/mbedtls/targets/TARGET_STM/sha256_alt.c b/features/mbedtls/targets/TARGET_STM/sha256_alt.c index 0bafca8e3b..d5f44042f5 100644 --- a/features/mbedtls/targets/TARGET_STM/sha256_alt.c +++ b/features/mbedtls/targets/TARGET_STM/sha256_alt.c @@ -88,11 +88,12 @@ void mbedtls_sha256_clone( mbedtls_sha256_context *dst, *dst = *src; } -int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ) +void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ) { /* HASH IP initialization */ if (HAL_HASH_DeInit(&ctx->hhash_sha256) == HAL_ERROR) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + // error found to be returned + return; } ctx->is224 = is224; @@ -101,42 +102,39 @@ int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ) /* clear CR ALGO value */ HASH->CR &= ~HASH_CR_ALGO_Msk; if (HAL_HASH_Init(&ctx->hhash_sha256) == HAL_ERROR) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + // error found to be returned + return; } if (st_sha256_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } -int mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[ST_SHA256_BLOCK_SIZE] ) +void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[ST_SHA256_BLOCK_SIZE] ) { if (st_sha256_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } if (ctx->is224 == 0) { if (HAL_HASHEx_SHA256_Accumulate(&ctx->hhash_sha256, (uint8_t *) data, ST_SHA256_BLOCK_SIZE) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + return; // Return error code } } else { if (HAL_HASHEx_SHA224_Accumulate(&ctx->hhash_sha256, (uint8_t *) data, ST_SHA256_BLOCK_SIZE) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + return; // Return error code } } if (st_sha256_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } -int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen ) +void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen ) { size_t currentlen = ilen; if (st_sha256_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } // store mechanism to accumulate ST_SHA256_BLOCK_SIZE bytes (512 bits) in the HW @@ -159,19 +157,17 @@ int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, const unsigned char // fill buffer and process it memcpy(ctx->sbuf + ctx->sbuf_len, input, (ST_SHA256_BLOCK_SIZE - ctx->sbuf_len)); currentlen -= (ST_SHA256_BLOCK_SIZE - ctx->sbuf_len); - if( mbedtls_sha256_process(ctx, ctx->sbuf) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; - } + mbedtls_sha256_process(ctx, ctx->sbuf); // Process every input as long as it is %64 bytes, ie 512 bits size_t iter = currentlen / ST_SHA256_BLOCK_SIZE; if (iter !=0) { if (ctx->is224 == 0) { if (HAL_HASHEx_SHA256_Accumulate(&ctx->hhash_sha256, (uint8_t *)(input + ST_SHA256_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_SHA256_BLOCK_SIZE)) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + return; // Return error code here } } else { if (HAL_HASHEx_SHA224_Accumulate(&ctx->hhash_sha256, (uint8_t *)(input + ST_SHA256_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_SHA256_BLOCK_SIZE)) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + return; // Return error code here } } } @@ -182,26 +178,24 @@ int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, const unsigned char } } if (st_sha256_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } -int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx, unsigned char output[32] ) +void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, unsigned char output[32] ) { if (st_sha256_restore_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; // Hash busy timeout + return; // Return HASH_BUSY timout error here } /* Last accumulation for extra bytes in sbuf_len */ /* This allows the HW flags to be in place in case mbedtls_sha256_update has not been called yet */ if (ctx->is224 == 0) { if (HAL_HASHEx_SHA256_Accumulate(&ctx->hhash_sha256, ctx->sbuf, ctx->sbuf_len) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + return; // Return error code here } } else { if (HAL_HASHEx_SHA224_Accumulate(&ctx->hhash_sha256, ctx->sbuf, ctx->sbuf_len) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + return; // Return error code here } } @@ -211,18 +205,16 @@ int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx, unsigned char output if (ctx->is224 == 0) { if (HAL_HASHEx_SHA256_Finish(&ctx->hhash_sha256, output, 10) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + return; // Return error code here } } else { if (HAL_HASHEx_SHA224_Finish(&ctx->hhash_sha256, output, 10) != 0) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; + return; // Return error code here } } if (st_sha256_save_hw_context(ctx) != 1) { - return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED; // Hash busy timeout + return; // return HASH_BUSY timeout Error here } - - return 0; } #endif /*MBEDTLS_SHA256_ALT*/ diff --git a/features/mbedtls/targets/TARGET_STM/sha256_alt.h b/features/mbedtls/targets/TARGET_STM/sha256_alt.h index 131a925527..b2ae7a3c29 100644 --- a/features/mbedtls/targets/TARGET_STM/sha256_alt.h +++ b/features/mbedtls/targets/TARGET_STM/sha256_alt.h @@ -27,19 +27,6 @@ #include "cmsis.h" #include -/** - * \name SECTION: Temporary compatibility code - * - * This section contains code to be added up stream in Mbed TLS. Once that - * has been provided, this section should be removed as the code will be - * provided elsewhere. - * \{ - */ - -#define MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED -0x0037 /**< SHA-256 hardware accelerator failed */ - -/* \} name SECTION: Temporary compatibility code */ - #ifdef __cplusplus extern "C" { #endif @@ -93,10 +80,8 @@ void mbedtls_sha256_clone( mbedtls_sha256_context *dst, * * \param ctx context to be initialized * \param is224 0 = use SHA256, 1 = use SHA224 - * - * \return 0 if successful */ -int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ); +void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ); /** * \brief SHA-256 process buffer @@ -104,10 +89,8 @@ int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ); * \param ctx SHA-256 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return 0 if successful */ -int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, const unsigned char *input, +void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen ); /** @@ -115,13 +98,11 @@ int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, const unsigned char * * \param ctx SHA-256 context * \param output SHA-224/256 checksum result - * - * \return 0 if successful */ -int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx, unsigned char output[32] ); +void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, unsigned char output[32] ); /* Internal use */ -int mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[ST_SHA256_BLOCK_SIZE] ); +void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[ST_SHA256_BLOCK_SIZE] ); #ifdef __cplusplus } diff --git a/features/mbedtls/targets/TARGET_Silicon_Labs/crypto_sha.c b/features/mbedtls/targets/TARGET_Silicon_Labs/crypto_sha.c index 2a6da9871b..64d0398923 100644 --- a/features/mbedtls/targets/TARGET_Silicon_Labs/crypto_sha.c +++ b/features/mbedtls/targets/TARGET_Silicon_Labs/crypto_sha.c @@ -234,7 +234,7 @@ void mbedtls_sha256_clone( mbedtls_sha256_context *dst, /* * SHA-256 context setup */ -int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ) +void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ) { ctx->total[0] = 0; ctx->total[1] = 0; @@ -246,8 +246,6 @@ int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ) ctx->is224 = false; memcpy(ctx->state, init_state_sha256, sizeof(ctx->state)); } - - return 0; } void mbedtls_sha256_process( mbedtls_sha256_context *ctx, @@ -259,15 +257,15 @@ void mbedtls_sha256_process( mbedtls_sha256_context *ctx, /* * SHA-256 process buffer */ -int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, - const unsigned char *input, - size_t ilen ) +void mbedtls_sha256_update( mbedtls_sha256_context *ctx, + const unsigned char *input, + size_t ilen ) { size_t fill; uint32_t left; if( ilen == 0 ) { - return 0; + return; } left = ctx->total[0] & 0x3F; @@ -298,20 +296,17 @@ int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, if( ilen > 0 ) { memcpy( (void *) (ctx->buffer + left), input, ilen ); } - - return 0; } /* * SHA-256 final digest */ -int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx, - unsigned char output[32] ) +void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, + unsigned char output[32] ) { uint32_t last, padn; uint32_t high, low; unsigned char msglen[8]; - int err; high = ( ctx->total[0] >> 29 ) | ( ctx->total[1] << 3 ); @@ -323,21 +318,12 @@ int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx, last = ctx->total[0] & 0x3F; padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); - err = mbedtls_sha256_update_ret( ctx, sha_padding, padn ); - if( err != 0 ) { - return err; - } - - err = mbedtls_sha256_update_ret( ctx, msglen, 8 ); - if( err != 0 ) { - return err; - } + mbedtls_sha256_update( ctx, sha_padding, padn ); + mbedtls_sha256_update( ctx, msglen, 8 ); for ( size_t i = 0; i < (ctx->is224 ? 28 : 32); i+=4) { *((uint32_t*)(&output[i])) = __REV(ctx->state[i >> 2]); } - - return 0; } #endif /* #if defined(MBEDTLS_SHA256_ALT) && defined(MBEDTLS_SHA256_C) */ @@ -380,16 +366,12 @@ void mbedtls_sha1_clone( mbedtls_sha1_context *dst, * \brief SHA-1 context setup * * \param ctx context to be initialized - * - * \return \c 0 if successful - * */ -int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ) +void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ) { ctx->total[0] = 0; ctx->total[1] = 0; memcpy(ctx->state, init_state_sha1, 32); - return 0; } /** @@ -398,19 +380,16 @@ int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ) * \param ctx SHA-1 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return \c 0 if successful - * */ -int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, - const unsigned char *input, - size_t ilen ) +void mbedtls_sha1_update( mbedtls_sha1_context *ctx, + const unsigned char *input, + size_t ilen ) { size_t fill; uint32_t left; if( ilen == 0 ) { - return 0; + return; } left = ctx->total[0] & 0x3F; @@ -441,8 +420,6 @@ int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, if( ilen > 0 ) { memcpy( (void *) (ctx->buffer + left), input, ilen ); } - - return 0; } /** @@ -450,17 +427,13 @@ int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, * * \param ctx SHA-1 context * \param output SHA-1 checksum result - * - * \return \c 0 if successful - * */ -int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx, - unsigned char output[20] ) +void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, + unsigned char output[20] ) { uint32_t last, padn; uint32_t high, low; unsigned char msglen[8]; - int err; high = ( ctx->total[0] >> 29 ) | ( ctx->total[1] << 3 ); @@ -472,21 +445,12 @@ int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx, last = ctx->total[0] & 0x3F; padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); - err = mbedtls_sha1_update_ret( ctx, sha_padding, padn ); - if( err != 0 ) { - return err; - } - - err = mbedtls_sha1_update_ret( ctx, msglen, 8 ); - if( err != 0 ) { - return err; - } + mbedtls_sha1_update( ctx, sha_padding, padn ); + mbedtls_sha1_update( ctx, msglen, 8 ); for ( size_t i = 0; i < 20; i+=4) { *((uint32_t*)(&output[i])) = __REV(ctx->state[i >> 2]); } - - return 0; } /* Internal use */ diff --git a/features/mbedtls/targets/TARGET_Silicon_Labs/sha1_alt.h b/features/mbedtls/targets/TARGET_Silicon_Labs/sha1_alt.h index 62f6f2fde9..891b0655c8 100644 --- a/features/mbedtls/targets/TARGET_Silicon_Labs/sha1_alt.h +++ b/features/mbedtls/targets/TARGET_Silicon_Labs/sha1_alt.h @@ -78,11 +78,8 @@ void mbedtls_sha1_clone( mbedtls_sha1_context *dst, * \brief SHA-1 context setup * * \param ctx context to be initialized - * - * \return \c 0 if successful - * */ -int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ); +void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ); /** * \brief SHA-1 process buffer @@ -90,22 +87,16 @@ int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx ); * \param ctx SHA-1 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return \c 0 if successful - * */ -int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); +void mbedtls_sha1_update( mbedtls_sha1_context *ctx, const unsigned char *input, size_t ilen ); /** * \brief SHA-1 final digest * * \param ctx SHA-1 context * \param output SHA-1 checksum result - * - * \return \c 0 if successful - * */ -int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx, unsigned char output[20] ); +void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, unsigned char output[20] ); /* Internal use */ void mbedtls_sha1_process( mbedtls_sha1_context *ctx, const unsigned char data[64] ); diff --git a/features/mbedtls/targets/TARGET_Silicon_Labs/sha256_alt.h b/features/mbedtls/targets/TARGET_Silicon_Labs/sha256_alt.h index bf9e61f804..5a7bf9a676 100644 --- a/features/mbedtls/targets/TARGET_Silicon_Labs/sha256_alt.h +++ b/features/mbedtls/targets/TARGET_Silicon_Labs/sha256_alt.h @@ -84,11 +84,8 @@ void mbedtls_sha256_clone( mbedtls_sha256_context *dst, * * \param ctx context to be initialized * \param is224 0 = use SHA256, 1 = use SHA224 - * - * \return \c 0 if successful - * */ -int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ); +void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, int is224 ); /** * \brief SHA-256 process buffer @@ -96,22 +93,17 @@ int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 ); * \param ctx SHA-256 context * \param input buffer holding the data * \param ilen length of the input data - * - * \return \c 0 if successful - * */ -int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen ); +void mbedtls_sha256_update( mbedtls_sha256_context *ctx, const unsigned char *input, + size_t ilen ); /** * \brief SHA-256 final digest * * \param ctx SHA-256 context * \param output SHA-224/256 checksum result - * - * \return \c 0 if successful - * */ -int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx, unsigned char output[32] ); +void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, unsigned char output[32] ); /* Internal use */ void mbedtls_sha256_process( mbedtls_sha256_context *ctx, const unsigned char data[64] ); diff --git a/features/mbedtls/targets/hash_wrappers.c b/features/mbedtls/targets/hash_wrappers.c deleted file mode 100644 index b397906cb3..0000000000 --- a/features/mbedtls/targets/hash_wrappers.c +++ /dev/null @@ -1,356 +0,0 @@ -#include "mbedtls/md2.h" -#include "mbedtls/md4.h" -#include "mbedtls/md5.h" -#include "mbedtls/sha1.h" -#include "mbedtls/sha256.h" -#include "mbedtls/sha512.h" - -#if defined(MBEDTLS_MD2_C) && defined(MBEDTLS_MD2_ALT) - -/** - * \brief MD2 context setup - * - * \deprecated Superseded by mbedtls_md2_starts_ret() in 2.7.0 - * - * \param ctx context to be initialized - * - * \warning MD2 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md2_starts( mbedtls_md2_context *ctx ) -{ - mbedtls_md2_starts_ret( ctx ); -} - -/** - * \brief MD2 process buffer - * - * \deprecated Superseded by mbedtls_md2_update_ret() in 2.7.0 - * - * \param ctx MD2 context - * \param input buffer holding the data - * \param ilen length of the input data - * - * \warning MD2 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md2_update( mbedtls_md2_context *ctx, - const unsigned char *input, - size_t ilen ) -{ - mbedtls_md2_update_ret( ctx, input, ilen ); -} - -/** - * \brief MD2 final digest - * - * \deprecated Superseded by mbedtls_md2_finish_ret() in 2.7.0 - * - * \param ctx MD2 context - * \param output MD2 checksum result - * - * \warning MD2 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md2_finish( mbedtls_md2_context *ctx, - unsigned char output[16] ) -{ - mbedtls_md2_finish_ret( ctx, output ); -} - -#endif /* defined(MBEDTLS_MD2_ALT) */ - -#if defined(MBEDTLS_MD4_C) && defined(MBEDTLS_MD4_ALT) - -/** - * \brief MD4 context setup - * - * \deprecated Superseded by mbedtls_md4_starts_ret() in 2.7.0 - * - * \param ctx context to be initialized - * - * \warning MD4 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md4_starts( mbedtls_md4_context *ctx ) -{ - mbedtls_md4_starts_ret( ctx ); -} - -/** - * \brief MD4 process buffer - * - * \deprecated Superseded by mbedtls_md4_update_ret() in 2.7.0 - * - * \param ctx MD4 context - * \param input buffer holding the data - * \param ilen length of the input data - * - * \warning MD4 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md4_update( mbedtls_md4_context *ctx, - const unsigned char *input, - size_t ilen ) -{ - mbedtls_md4_update_ret( ctx, input, ilen ); -} - -/** - * \brief MD4 final digest - * - * \deprecated Superseded by mbedtls_md4_finish_ret() in 2.7.0 - * - * \param ctx MD4 context - * \param output MD4 checksum result - * - * \warning MD4 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md4_finish( mbedtls_md4_context *ctx, - unsigned char output[16] ) -{ - mbedtls_md4_finish_ret( ctx, output ); -} - -#endif /* defined(MBEDTLS_MD4_ALT) */ - -#if defined(MBEDTLS_MD5_C) && defined(MBEDTLS_MD5_ALT) - -/** - * \brief MD5 context setup - * - * \deprecated Superseded by mbedtls_md5_starts_ret() in 2.7.0 - * - * \param ctx context to be initialized - * - * \warning MD5 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md5_starts( mbedtls_md5_context *ctx ) -{ - mbedtls_md5_starts_ret( ctx ); -} - -/** - * \brief MD5 process buffer - * - * \deprecated Superseded by mbedtls_md5_update_ret() in 2.7.0 - * - * \param ctx MD5 context - * \param input buffer holding the data - * \param ilen length of the input data - * - * \warning MD5 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md5_update( mbedtls_md5_context *ctx, - const unsigned char *input, - size_t ilen ) -{ - mbedtls_md5_update_ret( ctx, input, ilen ); -} - -/** - * \brief MD5 final digest - * - * \deprecated Superseded by mbedtls_md5_finish_ret() in 2.7.0 - * - * \param ctx MD5 context - * \param output MD5 checksum result - * - * \warning MD5 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_md5_finish( mbedtls_md5_context *ctx, - unsigned char output[16] ) -{ - mbedtls_md5_finish_ret( ctx, output ); -} - -#endif /* defined(MBEDTLS_MD5_ALT) */ - -#if defined(MBEDTLS_SHA1_C) && defined(MBEDTLS_SHA1_ALT) - -/** - * \brief SHA-1 context setup - * - * \deprecated Superseded by mbedtls_sha1_starts_ret() in 2.7.0 - * - * \param ctx The SHA-1 context to be initialized. - * - * \warning SHA-1 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_sha1_starts( mbedtls_sha1_context *ctx ) -{ - mbedtls_sha1_starts_ret( ctx ); -} - -/** - * \brief SHA-1 process buffer - * - * \deprecated Superseded by mbedtls_sha1_update_ret() in 2.7.0 - * - * \param ctx The SHA-1 context. - * \param input The buffer holding the input data. - * \param ilen The length of the input data. - * - * \warning SHA-1 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_sha1_update( mbedtls_sha1_context *ctx, - const unsigned char *input, - size_t ilen ) -{ - mbedtls_sha1_update_ret( ctx, input, ilen ); -} - -/** - * \brief SHA-1 final digest - * - * \deprecated Superseded by mbedtls_sha1_finish_ret() in 2.7.0 - * - * \param ctx The SHA-1 context. - * \param output The SHA-1 checksum result. - * - * \warning SHA-1 is considered a weak message digest and its use - * constitutes a security risk. We recommend considering - * stronger message digests instead. - * - */ -void mbedtls_sha1_finish( mbedtls_sha1_context *ctx, - unsigned char output[20] ) -{ - mbedtls_sha1_finish_ret( ctx, output ); -} - -#endif /* defined(MBEDTLS_SHA1_ALT) */ - -#if defined(MBEDTLS_SHA256_C) && defined(MBEDTLS_SHA256_ALT) - -/** - * \brief This function starts a SHA-256 checksum calculation. - * - * \deprecated Superseded by mbedtls_sha256_starts_ret() in 2.7.0. - * - * \param ctx The SHA-256 context to initialize. - * \param is224 Determines which function to use. - *
  • 0: Use SHA-256.
    • - *
  • 1: Use SHA-224.
- */ -void mbedtls_sha256_starts( mbedtls_sha256_context *ctx, - int is224 ) -{ - mbedtls_sha256_starts_ret( ctx, is224 ); -} - -/** - * \brief This function feeds an input buffer into an ongoing - * SHA-256 checksum calculation. - * - * \deprecated Superseded by mbedtls_sha256_update_ret() in 2.7.0. - * - * \param ctx The SHA-256 context to initialize. - * \param input The buffer holding the data. - * \param ilen The length of the input data. - */ -void mbedtls_sha256_update( mbedtls_sha256_context *ctx, - const unsigned char *input, - size_t ilen ) -{ - mbedtls_sha256_update_ret( ctx, input, ilen ); -} - -/** - * \brief This function finishes the SHA-256 operation, and writes - * the result to the output buffer. - * - * \deprecated Superseded by mbedtls_sha256_finish_ret() in 2.7.0. - * - * \param ctx The SHA-256 context. - * \param output The SHA-224or SHA-256 checksum result. - */ -void mbedtls_sha256_finish( mbedtls_sha256_context *ctx, - unsigned char output[32] ) -{ - mbedtls_sha256_finish_ret( ctx, output ); -} - -#endif /* defined(MBEDTLS_SHA256_ALT) */ - -#if defined(MBEDTLS_SHA512_C) && defined(MBEDTLS_SHA512_ALT) - -/** - * \brief This function starts a SHA-384 or SHA-512 checksum - * calculation. - * - * \deprecated Superseded by mbedtls_sha512_starts_ret() in 2.7.0 - * - * \param ctx The SHA-512 context to initialize. - * \param is384 Determines which function to use. - *
  • 0: Use SHA-512.
    • - *
  • 1: Use SHA-384.
- */ -void mbedtls_sha512_starts( mbedtls_sha512_context *ctx, - int is384 ) -{ - mbedtls_sha512_starts_ret( ctx, is384 ); -} - -/** - * \brief This function feeds an input buffer into an ongoing - * SHA-512 checksum calculation. - * - * \deprecated Superseded by mbedtls_sha512_update_ret() in 2.7.0 - * - * \param ctx The SHA-512 context. - * \param input The buffer holding the data. - * \param ilen The length of the input data. - */ -void mbedtls_sha512_update( mbedtls_sha512_context *ctx, - const unsigned char *input, - size_t ilen ) -{ - mbedtls_sha512_update_ret( ctx, input, ilen ); -} - -/** - * \brief This function finishes the SHA-512 operation, and writes - * the result to the output buffer. - * - * \deprecated Superseded by mbedtls_sha512_finish_ret() in 2.7.0 - * - * \param ctx The SHA-512 context. - * \param output The SHA-384 or SHA-512 checksum result. - */ -void mbedtls_sha512_finish( mbedtls_sha512_context *ctx, - unsigned char output[64] ) -{ - mbedtls_sha512_finish_ret( ctx, output ); -} - -#endif /* defined(MBEDTLS_SHA512_ALT) */ - diff --git a/features/netsocket/cellular/generic_modem_driver/PPPCellularInterface.cpp b/features/netsocket/cellular/generic_modem_driver/PPPCellularInterface.cpp index fe64baa819..996e78b2d4 100644 --- a/features/netsocket/cellular/generic_modem_driver/PPPCellularInterface.cpp +++ b/features/netsocket/cellular/generic_modem_driver/PPPCellularInterface.cpp @@ -702,6 +702,9 @@ nsapi_error_t PPPCellularInterface::connect() * mbed_ppp_init() is a blocking call, it will block until * connected, or timeout after 30 seconds*/ retcode = nsapi_ppp_connect(_fh, callback(this, &PPPCellularInterface::ppp_status_cb), _uname, _pwd, _stack); + if (retcode == NSAPI_ERROR_OK && _connect_is_blocking) { + _connect_status = NSAPI_STATUS_GLOBAL_UP; + } } while ((_connect_status == NSAPI_STATUS_CONNECTING && _connect_is_blocking) && apn_config && *apn_config); diff --git a/platform/FilePath.cpp b/platform/FilePath.cpp index 0260986989..ee348993f5 100644 --- a/platform/FilePath.cpp +++ b/platform/FilePath.cpp @@ -18,9 +18,10 @@ namespace mbed { FilePath::FilePath(const char* file_path) : file_name(NULL), fb(NULL) { - if ((file_path[0] != '/') || (file_path[1] == 0)) return; + // skip slashes + file_path += strspn(file_path, "/"); - const char* file_system = &file_path[1]; + const char* file_system = file_path; file_name = file_system; int len = 0; while (true) { @@ -36,6 +37,7 @@ FilePath::FilePath(const char* file_path) : file_name(NULL), fb(NULL) { file_name++; } + MBED_ASSERT(len != 0); fb = FileBase::lookup(file_system, len); } diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/us_ticker.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/us_ticker.c index dc6ab710f4..e4796608a0 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/us_ticker.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/us_ticker.c @@ -83,10 +83,15 @@ void us_ticker_clear_interrupt(void) void us_ticker_set_interrupt(timestamp_t timestamp) { + uint32_t now_us, delta_us; + + now_us = us_ticker_read(); + delta_us = timestamp >= now_us ? timestamp - now_us : (uint32_t)((uint64_t)timestamp + 0xFFFFFFFF - now_us); + uint32_t delta = timestamp - us_ticker_read(); PIT_StopTimer(PIT, kPIT_Chnl_3); PIT_StopTimer(PIT, kPIT_Chnl_2); - PIT_SetTimerPeriod(PIT, kPIT_Chnl_3, (uint32_t)delta); + PIT_SetTimerPeriod(PIT, kPIT_Chnl_3, (uint32_t)delta_us); PIT_EnableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable); PIT_StartTimer(PIT, kPIT_Chnl_3); PIT_StartTimer(PIT, kPIT_Chnl_2); diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/api/lp_ticker.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/api/lp_ticker.c index 7b57feaf47..996bf22f53 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/api/lp_ticker.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/api/lp_ticker.c @@ -135,7 +135,7 @@ void lp_ticker_set_interrupt(timestamp_t timestamp) lptmr_schedule = 0; now_us = lp_ticker_read(); - delta_us = timestamp > now_us ? timestamp - now_us : (uint32_t)((uint64_t)timestamp + 0xFFFFFFFF - now_us); + delta_us = timestamp >= now_us ? timestamp - now_us : (uint32_t)((uint64_t)timestamp + 0xFFFFFFFF - now_us); /* Checking if LPTRM can handle this sleep */ delta_ticks = USEC_TO_COUNT(delta_us, CLOCK_GetFreq(kCLOCK_Er32kClk)); diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/flash_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/flash_api.c index 8329a2c9be..be592b8b36 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/flash_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/flash_api.c @@ -36,56 +36,134 @@ * */ -#include "flash_api.h" +#if DEVICE_FLASH + +#include "hal/flash_api.h" +#include "hal/lp_ticker_api.h" + +#include "nrf_drv_common.h" #include "nrf_nvmc.h" #include "nrf_soc.h" -#include "nrf_sdm.h" -#if DEVICE_FLASH +#define WORD_WRITE_TIMEOUT_US (1 * 1000) // Max. value from datasheet: 338 us +#define PAGE_ERASE_TIMEOUT_US (200 * 1000) // Max. value from datasheet: 89.7 ms + +/* Macro for testing if the SoftDevice is active, regardless of whether the + * application is build with the SoftDevice or not. + */ +#if defined(SOFTDEVICE_PRESENT) +#include "nrf_sdm.h" +static uint8_t wrapper(void) { + uint8_t softdevice_is_enabled; + ret_code_t result = sd_softdevice_is_enabled(&softdevice_is_enabled); + return ((result == NRF_SUCCESS) && (softdevice_is_enabled == 1)); +} +#define NRF_HAL_SD_IS_ENABLED() wrapper() +#else +#define NRF_HAL_SD_IS_ENABLED() 0 +#endif int32_t flash_init(flash_t *obj) { (void)(obj); - uint8_t sd_enabled; - if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) { - return -1; + + /* Initialize low power ticker. Used for timeouts. */ + static bool first_init = true; + + if (first_init) { + first_init = false; + lp_ticker_init(); } + return 0; } int32_t flash_free(flash_t *obj) { (void)(obj); + return 0; } int32_t flash_erase_sector(flash_t *obj, uint32_t address) { (void)(obj); - uint8_t sd_enabled; - if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) { - return -1; + + /* Return value defaults to error. */ + uint32_t result = NRF_ERROR_BUSY; + + if (NRF_HAL_SD_IS_ENABLED()) { + + /* Convert address to page number. */ + uint32_t page_number = address / NRF_FICR->CODEPAGESIZE; + + /* Setup stop watch for timeout. */ + uint32_t start_us = lp_ticker_read(); + uint32_t now_us = start_us; + + /* Retry if flash is busy until timeout is reached. */ + while (((now_us - start_us) < PAGE_ERASE_TIMEOUT_US) && + (result == NRF_ERROR_BUSY)) { + + result = sd_flash_page_erase(page_number); + + /* Read timeout timer. */ + now_us = lp_ticker_read(); + } + + } else { + + /* Raw API doesn't return error code, assume success. */ + nrf_nvmc_page_erase(address); + result = NRF_SUCCESS; } - nrf_nvmc_page_erase(address); - return 0; + + /* Convert Nordic error code to mbed HAL error code. */ + return (result == NRF_SUCCESS) ? 0 : -1; } int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size) { - uint8_t sd_enabled; - if ((sd_softdevice_is_enabled(&sd_enabled) == NRF_SUCCESS) && sd_enabled == 1) { - return -1; + (void)(obj); + + /* Return value defaults to error. */ + uint32_t result = NRF_ERROR_BUSY; + + /* Convert size to words. */ + uint32_t words = size / sizeof(uint32_t); + + if (NRF_HAL_SD_IS_ENABLED()) { + + /* Setup stop watch for timeout. */ + uint32_t start_us = lp_ticker_read(); + uint32_t now_us = start_us; + + /* Retry if flash is busy until timeout is reached. */ + while (((now_us - start_us) < (words * WORD_WRITE_TIMEOUT_US)) && + (result == NRF_ERROR_BUSY)) { + + result = sd_flash_write((uint32_t *) address, (const uint32_t *) data, words); + + /* Read timeout timer. */ + now_us = lp_ticker_read(); + } + + } else { + /* We will use *_words function to speed up flashing code. Word means 32bit -> 4B + * or sizeof(uint32_t). + */ + nrf_nvmc_write_words(address, (const uint32_t *) data, words); + result = NRF_SUCCESS; } - /* We will use *_words function to speed up flashing code. Word means 32bit -> 4B - * or sizeof(uint32_t). - */ - nrf_nvmc_write_words(address, (const uint32_t *) data, (size / sizeof(uint32_t))); - return 0; + + /* Convert Nordic error code to mbed HAL error code. */ + return (result == NRF_SUCCESS) ? 0 : -1; } uint32_t flash_get_size(const flash_t *obj) { (void)(obj); + /* Just count flash size. */ return NRF_FICR->CODESIZE * NRF_FICR->CODEPAGESIZE; } @@ -93,10 +171,12 @@ uint32_t flash_get_size(const flash_t *obj) uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) { (void)(obj); + /* Test if passed address is in flash space. */ if (address < flash_get_size(obj)) { return NRF_FICR->CODEPAGESIZE; } + /* Something goes wrong, return invalid size error code. */ return MBED_FLASH_INVALID_SIZE; } @@ -104,11 +184,15 @@ uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) uint32_t flash_get_page_size(const flash_t *obj) { (void)(obj); - return NRF_FICR->CODEPAGESIZE; + + /* Return minimum writeable size. Note that this is different from the erase page size. */ + return 4; } uint32_t flash_get_start_address(const flash_t *obj) { + (void)(obj); + return 0; } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/gpio_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/gpio_api.c index 9e12311e8e..5af6ab6dc1 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/gpio_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/gpio_api.c @@ -112,7 +112,7 @@ static void gpiote_pin_uninit(uint8_t pin) if ((m_gpio_cfg[pin].direction == PIN_OUTPUT) && (!m_gpio_cfg[pin].used_as_irq)) { nrf_drv_gpiote_out_uninit(pin); } - else { + else if (m_gpio_cfg[pin].used_as_irq) { nrf_drv_gpiote_in_uninit(pin); } } diff --git a/targets/TARGET_NUVOTON/TARGET_M480/crypto/crypto-misc.c b/targets/TARGET_NUVOTON/TARGET_M480/crypto/crypto-misc.c index 808bfd38b8..87af3a9271 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/crypto/crypto-misc.c +++ b/targets/TARGET_NUVOTON/TARGET_M480/crypto/crypto-misc.c @@ -30,6 +30,8 @@ static uint16_t crypto_aes_avail = 1; static uint16_t crypto_des_avail = 1; /* Track if SHA H/W is available */ static uint16_t crypto_sha_avail = 1; +/* Track if ECC H/W is available */ +static uint16_t crypto_ecc_avail = 1; /* Crypto (AES, DES, SHA, etc.) init counter. Crypto's keeps active as it is non-zero. */ static uint16_t crypto_init_counter = 0U; @@ -37,12 +39,18 @@ static uint16_t crypto_init_counter = 0U; static bool crypto_submodule_acquire(uint16_t *submodule_avail); static void crypto_submodule_release(uint16_t *submodule_avail); +/* Crypto done flags */ +#define CRYPTO_DONE_OK BIT0 /* Done with OK */ +#define CRYPTO_DONE_ERR BIT1 /* Done with error */ + /* Track if PRNG H/W operation is done */ static volatile uint16_t crypto_prng_done; /* Track if AES H/W operation is done */ static volatile uint16_t crypto_aes_done; /* Track if DES H/W operation is done */ static volatile uint16_t crypto_des_done; +/* Track if ECC H/W operation is done */ +static volatile uint16_t crypto_ecc_done; static void crypto_submodule_prestart(volatile uint16_t *submodule_done); static bool crypto_submodule_wait(volatile uint16_t *submodule_done); @@ -96,7 +104,16 @@ void crypto_uninit(void) /* Implementation that should never be optimized out by the compiler */ void crypto_zeroize(void *v, size_t n) { - volatile unsigned char *p = (unsigned char*) v; + volatile unsigned char *p = (volatile unsigned char*) v; + while (n--) { + *p++ = 0; + } +} + +/* Implementation that should never be optimized out by the compiler */ +void crypto_zeroize32(uint32_t *v, size_t n) +{ + volatile uint32_t *p = (volatile uint32_t*) v; while (n--) { *p++ = 0; } @@ -132,6 +149,16 @@ void crypto_sha_release(void) crypto_submodule_release(&crypto_sha_avail); } +bool crypto_ecc_acquire(void) +{ + return crypto_submodule_acquire(&crypto_ecc_avail); +} + +void crypto_ecc_release(void) +{ + crypto_submodule_release(&crypto_ecc_avail); +} + void crypto_prng_prestart(void) { crypto_submodule_prestart(&crypto_prng_done); @@ -162,6 +189,16 @@ bool crypto_des_wait(void) return crypto_submodule_wait(&crypto_des_done); } +void crypto_ecc_prestart(void) +{ + crypto_submodule_prestart(&crypto_ecc_done); +} + +bool crypto_ecc_wait(void) +{ + return crypto_submodule_wait(&crypto_ecc_done); +} + bool crypto_dma_buff_compat(const void *buff, size_t buff_size, size_t size_aligned_to) { uint32_t buff_ = (uint32_t) buff; @@ -236,20 +273,47 @@ static bool crypto_submodule_wait(volatile uint16_t *submodule_done) /* Ensure while loop above and subsequent code are not reordered */ __DSB(); - return true; + if ((*submodule_done & CRYPTO_DONE_OK)) { + /* Done with OK */ + return true; + } else if ((*submodule_done & CRYPTO_DONE_ERR)) { + /* Done with error */ + return false; + } + + return false; } /* Crypto interrupt handler */ void CRYPTO_IRQHandler() { - if (PRNG_GET_INT_FLAG()) { - crypto_prng_done = 1; + uint32_t intsts; + + if ((intsts = PRNG_GET_INT_FLAG()) != 0) { + /* Done with OK */ + crypto_prng_done |= CRYPTO_DONE_OK; + /* Clear interrupt flag */ PRNG_CLR_INT_FLAG(); - } else if (AES_GET_INT_FLAG()) { - crypto_aes_done = 1; + } else if ((intsts = AES_GET_INT_FLAG()) != 0) { + /* Done with OK */ + crypto_aes_done |= CRYPTO_DONE_OK; + /* Clear interrupt flag */ AES_CLR_INT_FLAG(); - } else if (TDES_GET_INT_FLAG()) { - crypto_des_done = 1; + } else if ((intsts = TDES_GET_INT_FLAG()) != 0) { + /* Done with OK */ + crypto_des_done |= CRYPTO_DONE_OK; + /* Clear interrupt flag */ TDES_CLR_INT_FLAG(); + } else if ((intsts = ECC_GET_INT_FLAG()) != 0) { + /* Check interrupt flags */ + if (intsts & CRPT_INTSTS_ECCIF_Msk) { + /* Done with OK */ + crypto_ecc_done |= CRYPTO_DONE_OK; + } else if (intsts & CRPT_INTSTS_ECCEIF_Msk) { + /* Done with error */ + crypto_ecc_done |= CRYPTO_DONE_ERR; + } + /* Clear interrupt flag */ + ECC_CLR_INT_FLAG(); } } diff --git a/targets/TARGET_NUVOTON/TARGET_M480/crypto/crypto-misc.h b/targets/TARGET_NUVOTON/TARGET_M480/crypto/crypto-misc.h index f2cc89797f..9aa1ff8121 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/crypto/crypto-misc.h +++ b/targets/TARGET_NUVOTON/TARGET_M480/crypto/crypto-misc.h @@ -30,6 +30,7 @@ void crypto_uninit(void); /* Clear buffer to zero * Implementation that should never be optimized out by the compiler */ void crypto_zeroize(void *v, size_t n); +void crypto_zeroize32(uint32_t *v, size_t n); /* Acquire/release ownership of AES H/W */ /* NOTE: If "acquire" succeeds, "release" must be done to pair it. */ @@ -46,6 +47,11 @@ void crypto_des_release(void); bool crypto_sha_acquire(void); void crypto_sha_release(void); +/* Acquire/release ownership of ECC H/W */ +/* NOTE: If "acquire" succeeds, "release" must be done to pair it. */ +bool crypto_ecc_acquire(void); +void crypto_ecc_release(void); + /* Flow control between crypto/xxx start and crypto/xxx ISR * * crypto_xxx_prestart/crypto_xxx_wait encapsulate control flow between crypto/xxx start and crypto/xxx ISR. @@ -67,6 +73,8 @@ void crypto_aes_prestart(void); bool crypto_aes_wait(void); void crypto_des_prestart(void); bool crypto_des_wait(void); +void crypto_ecc_prestart(void); +bool crypto_ecc_wait(void); /* Check if buffer can be used for crypto DMA. It has the following requirements: diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/crypto-misc.c b/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/crypto-misc.c index 808bfd38b8..c9cdc1098e 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/crypto-misc.c +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/crypto-misc.c @@ -37,6 +37,10 @@ static uint16_t crypto_init_counter = 0U; static bool crypto_submodule_acquire(uint16_t *submodule_avail); static void crypto_submodule_release(uint16_t *submodule_avail); +/* Crypto done flags */ +#define CRYPTO_DONE_OK BIT0 /* Done with OK */ +#define CRYPTO_DONE_ERR BIT1 /* Done with error */ + /* Track if PRNG H/W operation is done */ static volatile uint16_t crypto_prng_done; /* Track if AES H/W operation is done */ @@ -96,7 +100,7 @@ void crypto_uninit(void) /* Implementation that should never be optimized out by the compiler */ void crypto_zeroize(void *v, size_t n) { - volatile unsigned char *p = (unsigned char*) v; + volatile unsigned char *p = (volatile unsigned char*) v; while (n--) { *p++ = 0; } @@ -236,20 +240,36 @@ static bool crypto_submodule_wait(volatile uint16_t *submodule_done) /* Ensure while loop above and subsequent code are not reordered */ __DSB(); - return true; + if ((*submodule_done & CRYPTO_DONE_OK)) { + /* Done with OK */ + return true; + } else if ((*submodule_done & CRYPTO_DONE_ERR)) { + /* Done with error */ + return false; + } + + return false; } /* Crypto interrupt handler */ void CRYPTO_IRQHandler() { - if (PRNG_GET_INT_FLAG()) { - crypto_prng_done = 1; + uint32_t intsts; + + if ((intsts = PRNG_GET_INT_FLAG()) != 0) { + /* Done with OK */ + crypto_prng_done |= CRYPTO_DONE_OK; + /* Clear interrupt flag */ PRNG_CLR_INT_FLAG(); - } else if (AES_GET_INT_FLAG()) { - crypto_aes_done = 1; + } else if ((intsts = AES_GET_INT_FLAG()) != 0) { + /* Done with OK */ + crypto_aes_done |= CRYPTO_DONE_OK; + /* Clear interrupt flag */ AES_CLR_INT_FLAG(); - } else if (TDES_GET_INT_FLAG()) { - crypto_des_done = 1; + } else if ((intsts = TDES_GET_INT_FLAG()) != 0) { + /* Done with OK */ + crypto_des_done |= CRYPTO_DONE_OK; + /* Clear interrupt flag */ TDES_CLR_INT_FLAG(); } } diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/clock_config.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/clock_config.c index cea986a6c0..8f393722c6 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/clock_config.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/clock_config.c @@ -1,9 +1,12 @@ /* + * The Clear BSD License * Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP + * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: + * are permitted (subject to the limitations in the disclaimer below) provided + * that the following conditions are met: * * o Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. @@ -16,6 +19,7 @@ * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * + * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -45,11 +49,11 @@ /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL ***************************** !!ClocksProfile product: Clocks v1.0 -processor: LPC54618J512 -package_id: LPC54618J512ET180 +processor: LPC54628J512 +package_id: LPC54628J512ET180 mcu_data: ksdk2_0 processor_version: 0.0.0 -board: LPCXpresso54618 +board: LPCXpresso54628 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/ #include "fsl_power.h" @@ -244,5 +248,65 @@ void BOARD_BootClockPLL180M(void) CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch System clock to SYS PLL 180MHz */ /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BootClockPLL180M_CORE_CLOCK; + SystemCoreClock = BOARD_BOOTCLOCKPLL180M_CORE_CLOCK; } + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL220M ********************* + ******************************************************************************/ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockPLL220M +called_from_default_init: true +outputs: +- {id: FRO12M_clock.outFreq, value: 12 MHz} +- {id: FROHF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 220 MHz} +- {id: SYSPLL_clock.outFreq, value: 220 MHz} +- {id: System_clock.outFreq, value: 220 MHz} +settings: +- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS} +- {id: SYSCON.M_MULT.scale, value: '110', locked: true} +- {id: SYSCON.N_DIV.scale, value: '3', locked: true} +- {id: SYSCON.PDEC.scale, value: '2', locked: true} +- {id: SYSCON_PDRUNCFG0_PDEN_SYS_PLL_CFG, value: Power_up} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ + +/******************************************************************************* + * Variables for BOARD_BootClockPLL220M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockPLL220M configuration + ******************************************************************************/ +void BOARD_BootClockPLL220M(void) +{ + /*!< Set up the clock sources */ + /*!< Set up FRO */ + POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */ + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally + being below the voltage for current speed */ + POWER_SetVoltageForFreq(220000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ + CLOCK_SetFLASHAccessCyclesForFreq(220000000U); /*!< Set FLASH wait states for core */ + + /*!< Set up SYS PLL */ + const pll_setup_t pllSetup = { + .pllctrl = SYSCON_SYSPLLCTRL_SELI(34U) | SYSCON_SYSPLLCTRL_SELP(31U) | SYSCON_SYSPLLCTRL_SELR(0U), + .pllmdec = (SYSCON_SYSPLLMDEC_MDEC(13243U)), + .pllndec = (SYSCON_SYSPLLNDEC_NDEC(1U)), + .pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)), + .pllRate = 220000000U, + .flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP + }; + CLOCK_AttachClk(kFRO12M_to_SYS_PLL); /*!< Set sys pll clock source*/ + CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired value */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL */ + SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(0U)); /*!< Switch MAINCLKSELA to FRO12M even it is not used for MAINCLKSELB */ + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKPLL220M_CORE_CLOCK; +} + diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/clock_config.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/clock_config.h index f9cdab4d95..e79c9b156e 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/clock_config.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/clock_config.h @@ -1,9 +1,12 @@ /* + * The Clear BSD License * Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP + * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: + * are permitted (subject to the limitations in the disclaimer below) provided + * that the following conditions are met: * * o Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. @@ -16,6 +19,7 @@ * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * + * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -122,7 +126,7 @@ void BOARD_BootClockFROHF96M(void); /******************************************************************************* * Definitions for BOARD_BootClockPLL180M configuration ******************************************************************************/ -#define BOARD_BootClockPLL180M_CORE_CLOCK 180000000U /*!< Core clock frequency:180000000Hz */ +#define BOARD_BOOTCLOCKPLL180M_CORE_CLOCK 180000000U /*!< Core clock frequency:180000000Hz */ /******************************************************************************* * API for BOARD_BootClockPLL180M configuration @@ -140,5 +144,30 @@ void BOARD_BootClockPLL180M(void); #if defined(__cplusplus) } #endif /* __cplusplus*/ -#endif /* _CLOCK_CONFIG_H_ */ +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL220M ********************* + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockPLL220M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKPLL220M_CORE_CLOCK 220000000U /*!< Core clock frequency:220000000Hz */ + +/******************************************************************************* + * API for BOARD_BootClockPLL220M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockPLL220M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +#endif /* _CLOCK_CONFIG_H_ */ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/mbed_overrides.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/mbed_overrides.c index b727924a6a..a17af3a634 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/mbed_overrides.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_FF_LPC546XX/mbed_overrides.c @@ -40,7 +40,12 @@ // called before main void mbed_sdk_init() { - BOARD_BootClockFROHF48M(); + if (SYSCON->DEVICE_ID0 == 0xFFF54628) { + /* LPC54628 runs at a higher core speed */ + BOARD_BootClockPLL220M(); + } else { + BOARD_BootClockFROHF48M(); + } } // Change the NMI pin to an input. This allows NMI pin to diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/clock_config.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/clock_config.c index cea986a6c0..8f393722c6 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/clock_config.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/clock_config.c @@ -1,9 +1,12 @@ /* + * The Clear BSD License * Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP + * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: + * are permitted (subject to the limitations in the disclaimer below) provided + * that the following conditions are met: * * o Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. @@ -16,6 +19,7 @@ * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * + * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -45,11 +49,11 @@ /* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL ***************************** !!ClocksProfile product: Clocks v1.0 -processor: LPC54618J512 -package_id: LPC54618J512ET180 +processor: LPC54628J512 +package_id: LPC54628J512ET180 mcu_data: ksdk2_0 processor_version: 0.0.0 -board: LPCXpresso54618 +board: LPCXpresso54628 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/ #include "fsl_power.h" @@ -244,5 +248,65 @@ void BOARD_BootClockPLL180M(void) CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch System clock to SYS PLL 180MHz */ /* Set SystemCoreClock variable. */ - SystemCoreClock = BOARD_BootClockPLL180M_CORE_CLOCK; + SystemCoreClock = BOARD_BOOTCLOCKPLL180M_CORE_CLOCK; } + +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL220M ********************* + ******************************************************************************/ +/* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* +!!Configuration +name: BOARD_BootClockPLL220M +called_from_default_init: true +outputs: +- {id: FRO12M_clock.outFreq, value: 12 MHz} +- {id: FROHF_clock.outFreq, value: 48 MHz} +- {id: MAIN_clock.outFreq, value: 220 MHz} +- {id: SYSPLL_clock.outFreq, value: 220 MHz} +- {id: System_clock.outFreq, value: 220 MHz} +settings: +- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS} +- {id: SYSCON.M_MULT.scale, value: '110', locked: true} +- {id: SYSCON.N_DIV.scale, value: '3', locked: true} +- {id: SYSCON.PDEC.scale, value: '2', locked: true} +- {id: SYSCON_PDRUNCFG0_PDEN_SYS_PLL_CFG, value: Power_up} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ + +/******************************************************************************* + * Variables for BOARD_BootClockPLL220M configuration + ******************************************************************************/ +/******************************************************************************* + * Code for BOARD_BootClockPLL220M configuration + ******************************************************************************/ +void BOARD_BootClockPLL220M(void) +{ + /*!< Set up the clock sources */ + /*!< Set up FRO */ + POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */ + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally + being below the voltage for current speed */ + POWER_SetVoltageForFreq(220000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ + CLOCK_SetFLASHAccessCyclesForFreq(220000000U); /*!< Set FLASH wait states for core */ + + /*!< Set up SYS PLL */ + const pll_setup_t pllSetup = { + .pllctrl = SYSCON_SYSPLLCTRL_SELI(34U) | SYSCON_SYSPLLCTRL_SELP(31U) | SYSCON_SYSPLLCTRL_SELR(0U), + .pllmdec = (SYSCON_SYSPLLMDEC_MDEC(13243U)), + .pllndec = (SYSCON_SYSPLLNDEC_NDEC(1U)), + .pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)), + .pllRate = 220000000U, + .flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP + }; + CLOCK_AttachClk(kFRO12M_to_SYS_PLL); /*!< Set sys pll clock source*/ + CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired value */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL */ + SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(0U)); /*!< Switch MAINCLKSELA to FRO12M even it is not used for MAINCLKSELB */ + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKPLL220M_CORE_CLOCK; +} + diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/clock_config.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/clock_config.h index f9cdab4d95..e79c9b156e 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/clock_config.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/clock_config.h @@ -1,9 +1,12 @@ /* + * The Clear BSD License * Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP + * All rights reserved. * * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: + * are permitted (subject to the limitations in the disclaimer below) provided + * that the following conditions are met: * * o Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. @@ -16,6 +19,7 @@ * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * + * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -122,7 +126,7 @@ void BOARD_BootClockFROHF96M(void); /******************************************************************************* * Definitions for BOARD_BootClockPLL180M configuration ******************************************************************************/ -#define BOARD_BootClockPLL180M_CORE_CLOCK 180000000U /*!< Core clock frequency:180000000Hz */ +#define BOARD_BOOTCLOCKPLL180M_CORE_CLOCK 180000000U /*!< Core clock frequency:180000000Hz */ /******************************************************************************* * API for BOARD_BootClockPLL180M configuration @@ -140,5 +144,30 @@ void BOARD_BootClockPLL180M(void); #if defined(__cplusplus) } #endif /* __cplusplus*/ -#endif /* _CLOCK_CONFIG_H_ */ +/******************************************************************************* + ******************** Configuration BOARD_BootClockPLL220M ********************* + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockPLL220M configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKPLL220M_CORE_CLOCK 220000000U /*!< Core clock frequency:220000000Hz */ + +/******************************************************************************* + * API for BOARD_BootClockPLL220M configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockPLL220M(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +#endif /* _CLOCK_CONFIG_H_ */ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/mbed_overrides.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/mbed_overrides.c index 39418e8eab..ccce4750c5 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/mbed_overrides.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/TARGET_LPCXpresso/mbed_overrides.c @@ -56,7 +56,12 @@ uint32_t FLASHIAP_ReadUid(uint32_t *addr) // called before main void mbed_sdk_init() { - BOARD_BootClockFROHF48M(); + if (SYSCON->DEVICE_ID0 == 0xFFF54628) { + /* LPC54628 runs at a higher core speed */ + BOARD_BootClockPLL220M(); + } else { + BOARD_BootClockFROHF48M(); + } } // Change the NMI pin to an input. This allows NMI pin to diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54618_features.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54618_features.h deleted file mode 100755 index 02e279d078..0000000000 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54618_features.h +++ /dev/null @@ -1,231 +0,0 @@ -/* -** ################################################################### -** Version: rev. 1.1, 2016-11-25 -** Build: b170112 -** -** Abstract: -** Chip specific module features. -** -** Copyright (c) 2016 Freescale Semiconductor, Inc. -** Copyright 2016 - 2017 NXP -** Redistribution and use in source and binary forms, with or without modification, -** are permitted provided that the following conditions are met: -** -** o Redistributions of source code must retain the above copyright notice, this list -** of conditions and the following disclaimer. -** -** o Redistributions in binary form must reproduce the above copyright notice, this -** list of conditions and the following disclaimer in the documentation and/or -** other materials provided with the distribution. -** -** o Neither the name of the copyright holder nor the names of its -** contributors may be used to endorse or promote products derived from this -** software without specific prior written permission. -** -** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -** -** http: www.nxp.com -** mail: support@nxp.com -** -** Revisions: -** - rev. 1.0 (2016-08-12) -** Initial version. -** - rev. 1.1 (2016-11-25) -** Update CANFD and Classic CAN register. -** Add MAC TIMERSTAMP registers. -** -** ################################################################### -*/ - -#ifndef _LPC54618_FEATURES_H_ -#define _LPC54618_FEATURES_H_ - -/* SOC module features */ - -/* @brief ADC availability on the SoC. */ -#define FSL_FEATURE_SOC_ADC_COUNT (1) -/* @brief ASYNC_SYSCON availability on the SoC. */ -#define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1) -/* @brief CRC availability on the SoC. */ -#define FSL_FEATURE_SOC_CRC_COUNT (1) -/* @brief DMA availability on the SoC. */ -#define FSL_FEATURE_SOC_DMA_COUNT (1) -/* @brief DMIC availability on the SoC. */ -#define FSL_FEATURE_SOC_DMIC_COUNT (1) -/* @brief FLEXCOMM availability on the SoC. */ -#define FSL_FEATURE_SOC_FLEXCOMM_COUNT (10) -/* @brief GINT availability on the SoC. */ -#define FSL_FEATURE_SOC_GINT_COUNT (2) -/* @brief GPIO availability on the SoC. */ -#define FSL_FEATURE_SOC_GPIO_COUNT (1) -/* @brief I2C availability on the SoC. */ -#define FSL_FEATURE_SOC_I2C_COUNT (10) -/* @brief I2S availability on the SoC. */ -#define FSL_FEATURE_SOC_I2S_COUNT (2) -/* @brief INPUTMUX availability on the SoC. */ -#define FSL_FEATURE_SOC_INPUTMUX_COUNT (1) -/* @brief IOCON availability on the SoC. */ -#define FSL_FEATURE_SOC_IOCON_COUNT (1) -/* @brief MRT availability on the SoC. */ -#define FSL_FEATURE_SOC_MRT_COUNT (1) -/* @brief PINT availability on the SoC. */ -#define FSL_FEATURE_SOC_PINT_COUNT (1) -/* @brief RTC availability on the SoC. */ -#define FSL_FEATURE_SOC_RTC_COUNT (1) -/* @brief SCT availability on the SoC. */ -#define FSL_FEATURE_SOC_SCT_COUNT (1) -/* @brief SPI availability on the SoC. */ -#define FSL_FEATURE_SOC_SPI_COUNT (10) -/* @brief SPIFI availability on the SoC. */ -#define FSL_FEATURE_SOC_SPIFI_COUNT (1) -/* @brief SYSCON availability on the SoC. */ -#define FSL_FEATURE_SOC_SYSCON_COUNT (1) -/* @brief CTIMER availability on the SoC. */ -#define FSL_FEATURE_SOC_CTIMER_COUNT (5) -/* @brief USART availability on the SoC. */ -#define FSL_FEATURE_SOC_USART_COUNT (10) -/* @brief USB availability on the SoC. */ -#define FSL_FEATURE_SOC_USB_COUNT (1) -/* @brief UTICK availability on the SoC. */ -#define FSL_FEATURE_SOC_UTICK_COUNT (1) -/* @brief WWDT availability on the SoC. */ -#define FSL_FEATURE_SOC_WWDT_COUNT (1) -/* @brief USBFSH availability on the SoC. */ -#define FSL_FEATURE_SOC_USBFSH_COUNT (1) -/* @brief USBHSD availability on the SoC. */ -#define FSL_FEATURE_SOC_USBHSD_COUNT (1) -/* @brief USBHSH availability on the SoC. */ -#define FSL_FEATURE_SOC_USBHSH_COUNT (1) -/* @brief EEPROM availability on the SoC. */ -#define FSL_FEATURE_SOC_EEPROM_COUNT (1) -/* @brief EMC availability on the SoC. */ -#define FSL_FEATURE_SOC_EMC_COUNT (1) -/* @brief ENET availability on the SoC. */ -#define FSL_FEATURE_SOC_LPC_ENET_COUNT (1) -/* @brief SDIF availability on the SoC. */ -#define FSL_FEATURE_SOC_SDIF_COUNT (1) -/* @brief SMARTCARD availability on the SoC. */ -#define FSL_FEATURE_SOC_SMARTCARD_COUNT (2) -/* @brief LCD availability on the SoC. */ -#define FSL_FEATURE_SOC_LCD_COUNT (1) -/* @brief CAN availability on the SoC. */ -#define FSL_FEATURE_SOC_LPC_CAN_COUNT (2) -/* @brief SHA availability on the SoC. */ -#define FSL_FEATURE_SOC_SHA_COUNT (0) -/* @brief AES availability on the SoC. */ -#define FSL_FEATURE_SOC_AES_COUNT (0) -/* @brief RIT availability on the SoC. */ -#define FSL_FEATURE_SOC_RIT_COUNT (1) -/* @brief FMC availability on the SoC. */ -#define FSL_FEATURE_SOC_FMC_COUNT (1) -/* @brief RNG availability on the SoC. */ -#define FSL_FEATURE_SOC_LPC_RNG_COUNT (1) - -/* CAN module features */ - -/* @brief Support CANFD or not */ -#define FSL_FEATURE_CAN_SUPPORT_CANFD (1) - -/* DMA module features */ - -/* @brief Number of channels */ -#define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (30) - -/* EEPROM module features */ - -/* @brief Size of the EEPROM */ -#define FSL_FEATURE_EEPROM_SIZE (0x00004000) -/* @brief Base address of the EEPROM */ -#define FSL_FEATURE_EEPROM_BASE_ADDRESS (0x40108000) -/* @brief Page count of the EEPROM */ -#define FSL_FEATURE_EEPROM_PAGE_COUNT (128) -/* @brief Command number for eeprom program */ -#define FSL_FEATURE_EEPROM_PROGRAM_CMD (6) -/* @brief EEPROM internal clock freqency */ -#define FSL_FEATURE_EEPROM_INTERNAL_FREQ (1500000) - -/* IOCON module features */ - -/* @brief Func bit field width */ -#define FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH (4) - -/* PINT module features */ - -/* @brief Number of connected outputs */ -#define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (8) - -/* SCT module features */ - -/* @brief Number of events */ -#define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10) -/* @brief Number of states */ -#define FSL_FEATURE_SCT_NUMBER_OF_STATES (10) -/* @brief Number of match capture */ -#define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10) - -/* SDIF module features */ - -/* @brief FIFO depth, every location is a WORD */ -#define FSL_FEATURE_SDIF_FIFO_DEPTH_64_32BITS (64) -/* @brief Max DMA buffer size */ -#define FSL_FEATURE_SDIF_INTERNAL_DMA_MAX_BUFFER_SIZE (4096) -/* @brief Max source clock in HZ */ -#define FSL_FEATURE_SDIF_MAX_SOURCE_CLOCK (52000000) - -/* SPIFI module features */ - -/* @brief SPIFI start address */ -#define FSL_FEATURE_SPIFI_START_ADDR (0x10000000) -/* @brief SPIFI end address */ -#define FSL_FEATURE_SPIFI_END_ADDR (0x17FFFFFF) - -/* SYSCON module features */ - -/* @brief Pointer to ROM IAP entry functions */ -#define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205) -/* @brief Flash page size in bytes */ -#define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256) -/* @brief Flash sector size in bytes */ -#define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768) -/* @brief Flash size in bytes */ -#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (524288) - -/* USB module features */ - -/* @brief Size of the USB dedicated RAM */ -#define FSL_FEATURE_USB_USB_RAM (0x00002000) -/* @brief Base address of the USB dedicated RAM */ -#define FSL_FEATURE_USB_USB_RAM_BASE_ADDRESS (0x40100000) - -/* USBFSH module features */ - -/* @brief Size of the USB dedicated RAM */ -#define FSL_FEATURE_USBFSH_USB_RAM (0x00002000) -/* @brief Base address of the USB dedicated RAM */ -#define FSL_FEATURE_USBFSH_USB_RAM_BASE_ADDRESS (0x40100000) - -/* USBHSD module features */ - -/* @brief Size of the USB dedicated RAM */ -#define FSL_FEATURE_USBHSD_USB_RAM (0x00002000) -/* @brief Base address of the USB dedicated RAM */ -#define FSL_FEATURE_USBHSD_USB_RAM_BASE_ADDRESS (0x40100000) - -/* USBHSH module features */ - -/* @brief Size of the USB dedicated RAM */ -#define FSL_FEATURE_USBHSH_USB_RAM (0x00002000) -/* @brief Base address of the USB dedicated RAM */ -#define FSL_FEATURE_USBHSH_USB_RAM_BASE_ADDRESS (0x40100000) - -#endif /* _LPC54618_FEATURES_H_ */ - diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54618.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54628.h old mode 100755 new mode 100644 similarity index 99% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54618.h rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54628.h index 358d93ddb7..50bbe5a024 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54618.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54628.h @@ -1,33 +1,31 @@ /* ** ################################################################### -** Processors: LPC54618J512BD208 -** LPC54618J512ET180 -** +** Processor: LPC54628J512ET180 ** Compilers: Keil ARM C/C++ Compiler ** GNU C Compiler ** IAR ANSI C/C++ Compiler for ARM ** MCUXpresso Compiler ** -** Reference manual: LPC54S60x/LPC5460x User manual Rev.0.9 7 Nov 2016 -** Version: rev. 1.1, 2016-11-25 -** Build: b170214 +** Reference manual: LPC546xx User manual Rev.1.9 5 June 2017 +** Version: rev. 1.2, 2017-06-08 +** Build: b170609 ** ** Abstract: -** CMSIS Peripheral Access Layer for LPC54618 +** CMSIS Peripheral Access Layer for LPC54628 ** ** Copyright 1997-2016 Freescale Semiconductor, Inc. ** Copyright 2016-2017 NXP ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** -** o Redistributions of source code must retain the above copyright notice, this list +** 1. Redistributions of source code must retain the above copyright notice, this list ** of conditions and the following disclaimer. ** -** o Redistributions in binary form must reproduce the above copyright notice, this +** 2. Redistributions in binary form must reproduce the above copyright notice, this ** list of conditions and the following disclaimer in the documentation and/or ** other materials provided with the distribution. ** -** o Neither the name of the copyright holder nor the names of its +** 3. Neither the name of the copyright holder nor the names of its ** contributors may be used to endorse or promote products derived from this ** software without specific prior written permission. ** @@ -51,27 +49,31 @@ ** - rev. 1.1 (2016-11-25) ** Update CANFD and Classic CAN register. ** Add MAC TIMERSTAMP registers. +** - rev. 1.2 (2017-06-08) +** Remove RTC_CTRL_RTC_OSC_BYPASS. +** SYSCON_ARMTRCLKDIV rename to SYSCON_ARMTRACECLKDIV. +** Remove RESET and HALT from SYSCON_AHBCLKDIV. ** ** ################################################################### */ /*! - * @file LPC54618.h - * @version 1.1 - * @date 2016-11-25 - * @brief CMSIS Peripheral Access Layer for LPC54618 + * @file LPC54628.h + * @version 1.2 + * @date 2017-06-08 + * @brief CMSIS Peripheral Access Layer for LPC54628 * - * CMSIS Peripheral Access Layer for LPC54618 + * CMSIS Peripheral Access Layer for LPC54628 */ -#ifndef _LPC54618_H_ -#define _LPC54618_H_ /**< Symbol preventing repeated inclusion */ +#ifndef _LPC54628_H_ +#define _LPC54628_H_ /**< Symbol preventing repeated inclusion */ /** Memory map major version (memory maps with equal major version number are * compatible) */ #define MCU_MEM_MAP_VERSION 0x0100U /** Memory map minor version */ -#define MCU_MEM_MAP_VERSION_MINOR 0x0001U +#define MCU_MEM_MAP_VERSION_MINOR 0x0002U /* ---------------------------------------------------------------------------- @@ -181,29 +183,13 @@ typedef enum IRQn { #define __FPU_PRESENT 1 /**< Defines if an FPU is present or not */ #include "core_cm4.h" /* Core Peripheral Access Layer */ -#include "system_LPC54618.h" /* Device specific configuration file */ +#include "system_LPC54628.h" /* Device specific configuration file */ /*! * @} */ /* end of group Cortex_Core_Configuration */ -/* ---------------------------------------------------------------------------- - -- Mapping Information - ---------------------------------------------------------------------------- */ - -/*! - * @addtogroup Mapping_Information Mapping Information - * @{ - */ - -/** Mapping Information */ - -/*! - * @} - */ /* end of group Mapping_Information */ - - /* ---------------------------------------------------------------------------- -- Device Peripheral Access Layer ---------------------------------------------------------------------------- */ @@ -7729,6 +7715,137 @@ typedef struct { */ /* end of group SDIF_Peripheral_Access_Layer */ +/* ---------------------------------------------------------------------------- + -- SHA Peripheral Access Layer + ---------------------------------------------------------------------------- */ + +/*! + * @addtogroup SHA_Peripheral_Access_Layer SHA Peripheral Access Layer + * @{ + */ + +/** SHA - Register Layout Typedef */ +typedef struct { + __IO uint32_t CTRL; /**< Control register, offset: 0x0 */ + __IO uint32_t STATUS; /**< Status register, offset: 0x4 */ + __IO uint32_t INTENSET; /**< Interrupt Enable register, offset: 0x8 */ + __IO uint32_t INTENCLR; /**< Interrupt Clear register, offset: 0xC */ + __IO uint32_t MEMCTRL; /**< Memory Control register, offset: 0x10 */ + __IO uint32_t MEMADDR; /**< Memory Address register, offset: 0x14 */ + uint8_t RESERVED_0[8]; + __IO uint32_t INDATA; /**< Input Data register, offset: 0x20 */ + __IO uint32_t ALIAS[7]; /**< Alias register, array offset: 0x24, array step: 0x4 */ + __I uint32_t DIGEST[8]; /**< Digest register, array offset: 0x40, array step: 0x4 */ +} SHA_Type; + +/* ---------------------------------------------------------------------------- + -- SHA Register Masks + ---------------------------------------------------------------------------- */ + +/*! + * @addtogroup SHA_Register_Masks SHA Register Masks + * @{ + */ + +/*! @name CTRL - Control register */ +#define SHA_CTRL_MODE_MASK (0x3U) +#define SHA_CTRL_MODE_SHIFT (0U) +#define SHA_CTRL_MODE(x) (((uint32_t)(((uint32_t)(x)) << SHA_CTRL_MODE_SHIFT)) & SHA_CTRL_MODE_MASK) +#define SHA_CTRL_NEW_MASK (0x10U) +#define SHA_CTRL_NEW_SHIFT (4U) +#define SHA_CTRL_NEW(x) (((uint32_t)(((uint32_t)(x)) << SHA_CTRL_NEW_SHIFT)) & SHA_CTRL_NEW_MASK) +#define SHA_CTRL_DMA_MASK (0x100U) +#define SHA_CTRL_DMA_SHIFT (8U) +#define SHA_CTRL_DMA(x) (((uint32_t)(((uint32_t)(x)) << SHA_CTRL_DMA_SHIFT)) & SHA_CTRL_DMA_MASK) + +/*! @name STATUS - Status register */ +#define SHA_STATUS_WAITING_MASK (0x1U) +#define SHA_STATUS_WAITING_SHIFT (0U) +#define SHA_STATUS_WAITING(x) (((uint32_t)(((uint32_t)(x)) << SHA_STATUS_WAITING_SHIFT)) & SHA_STATUS_WAITING_MASK) +#define SHA_STATUS_DIGEST_MASK (0x2U) +#define SHA_STATUS_DIGEST_SHIFT (1U) +#define SHA_STATUS_DIGEST(x) (((uint32_t)(((uint32_t)(x)) << SHA_STATUS_DIGEST_SHIFT)) & SHA_STATUS_DIGEST_MASK) +#define SHA_STATUS_ERROR_MASK (0x4U) +#define SHA_STATUS_ERROR_SHIFT (2U) +#define SHA_STATUS_ERROR(x) (((uint32_t)(((uint32_t)(x)) << SHA_STATUS_ERROR_SHIFT)) & SHA_STATUS_ERROR_MASK) + +/*! @name INTENSET - Interrupt Enable register */ +#define SHA_INTENSET_WAITING_MASK (0x1U) +#define SHA_INTENSET_WAITING_SHIFT (0U) +#define SHA_INTENSET_WAITING(x) (((uint32_t)(((uint32_t)(x)) << SHA_INTENSET_WAITING_SHIFT)) & SHA_INTENSET_WAITING_MASK) +#define SHA_INTENSET_DIGEST_MASK (0x2U) +#define SHA_INTENSET_DIGEST_SHIFT (1U) +#define SHA_INTENSET_DIGEST(x) (((uint32_t)(((uint32_t)(x)) << SHA_INTENSET_DIGEST_SHIFT)) & SHA_INTENSET_DIGEST_MASK) +#define SHA_INTENSET_ERROR_MASK (0x4U) +#define SHA_INTENSET_ERROR_SHIFT (2U) +#define SHA_INTENSET_ERROR(x) (((uint32_t)(((uint32_t)(x)) << SHA_INTENSET_ERROR_SHIFT)) & SHA_INTENSET_ERROR_MASK) + +/*! @name INTENCLR - Interrupt Clear register */ +#define SHA_INTENCLR_WAITING_MASK (0x1U) +#define SHA_INTENCLR_WAITING_SHIFT (0U) +#define SHA_INTENCLR_WAITING(x) (((uint32_t)(((uint32_t)(x)) << SHA_INTENCLR_WAITING_SHIFT)) & SHA_INTENCLR_WAITING_MASK) +#define SHA_INTENCLR_DIGEST_MASK (0x2U) +#define SHA_INTENCLR_DIGEST_SHIFT (1U) +#define SHA_INTENCLR_DIGEST(x) (((uint32_t)(((uint32_t)(x)) << SHA_INTENCLR_DIGEST_SHIFT)) & SHA_INTENCLR_DIGEST_MASK) +#define SHA_INTENCLR_ERROR_MASK (0x4U) +#define SHA_INTENCLR_ERROR_SHIFT (2U) +#define SHA_INTENCLR_ERROR(x) (((uint32_t)(((uint32_t)(x)) << SHA_INTENCLR_ERROR_SHIFT)) & SHA_INTENCLR_ERROR_MASK) + +/*! @name MEMCTRL - Memory Control register */ +#define SHA_MEMCTRL_MASTER_MASK (0x1U) +#define SHA_MEMCTRL_MASTER_SHIFT (0U) +#define SHA_MEMCTRL_MASTER(x) (((uint32_t)(((uint32_t)(x)) << SHA_MEMCTRL_MASTER_SHIFT)) & SHA_MEMCTRL_MASTER_MASK) +#define SHA_MEMCTRL_COUNT_MASK (0x7FF0000U) +#define SHA_MEMCTRL_COUNT_SHIFT (16U) +#define SHA_MEMCTRL_COUNT(x) (((uint32_t)(((uint32_t)(x)) << SHA_MEMCTRL_COUNT_SHIFT)) & SHA_MEMCTRL_COUNT_MASK) + +/*! @name MEMADDR - Memory Address register */ +#define SHA_MEMADDR_BASEADDR_MASK (0xFFFFFFFFU) +#define SHA_MEMADDR_BASEADDR_SHIFT (0U) +#define SHA_MEMADDR_BASEADDR(x) (((uint32_t)(((uint32_t)(x)) << SHA_MEMADDR_BASEADDR_SHIFT)) & SHA_MEMADDR_BASEADDR_MASK) + +/*! @name INDATA - Input Data register */ +#define SHA_INDATA_DATA_MASK (0xFFFFFFFFU) +#define SHA_INDATA_DATA_SHIFT (0U) +#define SHA_INDATA_DATA(x) (((uint32_t)(((uint32_t)(x)) << SHA_INDATA_DATA_SHIFT)) & SHA_INDATA_DATA_MASK) + +/*! @name ALIAS - Alias register */ +#define SHA_ALIAS_DATA_MASK (0xFFFFFFFFU) +#define SHA_ALIAS_DATA_SHIFT (0U) +#define SHA_ALIAS_DATA(x) (((uint32_t)(((uint32_t)(x)) << SHA_ALIAS_DATA_SHIFT)) & SHA_ALIAS_DATA_MASK) + +/* The count of SHA_ALIAS */ +#define SHA_ALIAS_COUNT (7U) + +/*! @name DIGEST - Digest register */ +#define SHA_DIGEST_DIGEST_MASK (0xFFFFFFFFU) +#define SHA_DIGEST_DIGEST_SHIFT (0U) +#define SHA_DIGEST_DIGEST(x) (((uint32_t)(((uint32_t)(x)) << SHA_DIGEST_DIGEST_SHIFT)) & SHA_DIGEST_DIGEST_MASK) + +/* The count of SHA_DIGEST */ +#define SHA_DIGEST_COUNT (8U) + + +/*! + * @} + */ /* end of group SHA_Register_Masks */ + + +/* SHA - Peripheral instance base addresses */ +/** Peripheral SHA0 base address */ +#define SHA0_BASE (0x400A4000u) +/** Peripheral SHA0 base pointer */ +#define SHA0 ((SHA_Type *)SHA0_BASE) +/** Array initializer of SHA peripheral base addresses */ +#define SHA_BASE_ADDRS { SHA0_BASE } +/** Array initializer of SHA peripheral base pointers */ +#define SHA_BASE_PTRS { SHA0 } + +/*! + * @} + */ /* end of group SHA_Peripheral_Access_Layer */ + + /* ---------------------------------------------------------------------------- -- SMARTCARD Peripheral Access Layer ---------------------------------------------------------------------------- */ @@ -12406,5 +12523,5 @@ typedef struct { */ /* end of group SDK_Compatibility_Symbols */ -#endif /* _LPC54618_H_ */ +#endif /* _LPC54628_H_ */ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54628_features.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54628_features.h new file mode 100644 index 0000000000..47e7aa8aed --- /dev/null +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/LPC54628_features.h @@ -0,0 +1,653 @@ +/* +** ################################################################### +** Version: rev. 1.2, 2017-06-08 +** Build: b170609 +** +** Abstract: +** Chip specific module features. +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2017 NXP +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** +** 1. Redistributions of source code must retain the above copyright notice, this list +** of conditions and the following disclaimer. +** +** 2. Redistributions in binary form must reproduce the above copyright notice, this +** list of conditions and the following disclaimer in the documentation and/or +** other materials provided with the distribution. +** +** 3. Neither the name of the copyright holder nor the names of its +** contributors may be used to endorse or promote products derived from this +** software without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.nxp.com +** mail: support@nxp.com +** +** Revisions: +** - rev. 1.0 (2016-08-12) +** Initial version. +** - rev. 1.1 (2016-11-25) +** Update CANFD and Classic CAN register. +** Add MAC TIMERSTAMP registers. +** - rev. 1.2 (2017-06-08) +** Remove RTC_CTRL_RTC_OSC_BYPASS. +** SYSCON_ARMTRCLKDIV rename to SYSCON_ARMTRACECLKDIV. +** Remove RESET and HALT from SYSCON_AHBCLKDIV. +** +** ################################################################### +*/ + +#ifndef _LPC54628_FEATURES_H_ +#define _LPC54628_FEATURES_H_ + +/* SOC module features */ + +/* @brief ACMP availability on the SoC. */ +#define FSL_FEATURE_SOC_ACMP_COUNT (0) +/* @brief ADC availability on the SoC. */ +#define FSL_FEATURE_SOC_ADC_COUNT (1) +/* @brief ADC12 availability on the SoC. */ +#define FSL_FEATURE_SOC_ADC12_COUNT (0) +/* @brief ADC16 availability on the SoC. */ +#define FSL_FEATURE_SOC_ADC16_COUNT (0) +/* @brief ADC_5HC availability on the SoC. */ +#define FSL_FEATURE_SOC_ADC_5HC_COUNT (0) +/* @brief AES availability on the SoC. */ +#define FSL_FEATURE_SOC_AES_COUNT (0) +/* @brief AFE availability on the SoC. */ +#define FSL_FEATURE_SOC_AFE_COUNT (0) +/* @brief AGC availability on the SoC. */ +#define FSL_FEATURE_SOC_AGC_COUNT (0) +/* @brief AIPS availability on the SoC. */ +#define FSL_FEATURE_SOC_AIPS_COUNT (0) +/* @brief AIPSTZ availability on the SoC. */ +#define FSL_FEATURE_SOC_AIPSTZ_COUNT (0) +/* @brief ANATOP availability on the SoC. */ +#define FSL_FEATURE_SOC_ANATOP_COUNT (0) +/* @brief AOI availability on the SoC. */ +#define FSL_FEATURE_SOC_AOI_COUNT (0) +/* @brief APBH availability on the SoC. */ +#define FSL_FEATURE_SOC_APBH_COUNT (0) +/* @brief ASMC availability on the SoC. */ +#define FSL_FEATURE_SOC_ASMC_COUNT (0) +/* @brief ASRC availability on the SoC. */ +#define FSL_FEATURE_SOC_ASRC_COUNT (0) +/* @brief ASYNC_SYSCON availability on the SoC. */ +#define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1) +/* @brief ATX availability on the SoC. */ +#define FSL_FEATURE_SOC_ATX_COUNT (0) +/* @brief AXBS availability on the SoC. */ +#define FSL_FEATURE_SOC_AXBS_COUNT (0) +/* @brief BCH availability on the SoC. */ +#define FSL_FEATURE_SOC_BCH_COUNT (0) +/* @brief BLEDP availability on the SoC. */ +#define FSL_FEATURE_SOC_BLEDP_COUNT (0) +/* @brief BOD availability on the SoC. */ +#define FSL_FEATURE_SOC_BOD_COUNT (0) +/* @brief CAAM availability on the SoC. */ +#define FSL_FEATURE_SOC_CAAM_COUNT (0) +/* @brief CADC availability on the SoC. */ +#define FSL_FEATURE_SOC_CADC_COUNT (0) +/* @brief CALIB availability on the SoC. */ +#define FSL_FEATURE_SOC_CALIB_COUNT (0) +/* @brief CAN availability on the SoC. */ +#define FSL_FEATURE_SOC_LPC_CAN_COUNT (2) +/* @brief CAU availability on the SoC. */ +#define FSL_FEATURE_SOC_CAU_COUNT (0) +/* @brief CAU3 availability on the SoC. */ +#define FSL_FEATURE_SOC_CAU3_COUNT (0) +/* @brief CCM availability on the SoC. */ +#define FSL_FEATURE_SOC_CCM_COUNT (0) +/* @brief CCM_ANALOG availability on the SoC. */ +#define FSL_FEATURE_SOC_CCM_ANALOG_COUNT (0) +/* @brief CHRG availability on the SoC. */ +#define FSL_FEATURE_SOC_CHRG_COUNT (0) +/* @brief CMP availability on the SoC. */ +#define FSL_FEATURE_SOC_CMP_COUNT (0) +/* @brief CMT availability on the SoC. */ +#define FSL_FEATURE_SOC_CMT_COUNT (0) +/* @brief CNC availability on the SoC. */ +#define FSL_FEATURE_SOC_CNC_COUNT (0) +/* @brief COP availability on the SoC. */ +#define FSL_FEATURE_SOC_COP_COUNT (0) +/* @brief CRC availability on the SoC. */ +#define FSL_FEATURE_SOC_CRC_COUNT (1) +/* @brief CS availability on the SoC. */ +#define FSL_FEATURE_SOC_CS_COUNT (0) +/* @brief CSI availability on the SoC. */ +#define FSL_FEATURE_SOC_CSI_COUNT (0) +/* @brief CT32B availability on the SoC. */ +#define FSL_FEATURE_SOC_CT32B_COUNT (0) +/* @brief CTI availability on the SoC. */ +#define FSL_FEATURE_SOC_CTI_COUNT (0) +/* @brief CTIMER availability on the SoC. */ +#define FSL_FEATURE_SOC_CTIMER_COUNT (5) +/* @brief DAC availability on the SoC. */ +#define FSL_FEATURE_SOC_DAC_COUNT (0) +/* @brief DAC32 availability on the SoC. */ +#define FSL_FEATURE_SOC_DAC32_COUNT (0) +/* @brief DCDC availability on the SoC. */ +#define FSL_FEATURE_SOC_DCDC_COUNT (0) +/* @brief DCP availability on the SoC. */ +#define FSL_FEATURE_SOC_DCP_COUNT (0) +/* @brief DDR availability on the SoC. */ +#define FSL_FEATURE_SOC_DDR_COUNT (0) +/* @brief DDRC availability on the SoC. */ +#define FSL_FEATURE_SOC_DDRC_COUNT (0) +/* @brief DDRC_MP availability on the SoC. */ +#define FSL_FEATURE_SOC_DDRC_MP_COUNT (0) +/* @brief DDR_PHY availability on the SoC. */ +#define FSL_FEATURE_SOC_DDR_PHY_COUNT (0) +/* @brief DMA availability on the SoC. */ +#define FSL_FEATURE_SOC_DMA_COUNT (1) +/* @brief DMAMUX availability on the SoC. */ +#define FSL_FEATURE_SOC_DMAMUX_COUNT (0) +/* @brief DMIC availability on the SoC. */ +#define FSL_FEATURE_SOC_DMIC_COUNT (1) +/* @brief DRY availability on the SoC. */ +#define FSL_FEATURE_SOC_DRY_COUNT (0) +/* @brief DSPI availability on the SoC. */ +#define FSL_FEATURE_SOC_DSPI_COUNT (0) +/* @brief ECSPI availability on the SoC. */ +#define FSL_FEATURE_SOC_ECSPI_COUNT (0) +/* @brief EDMA availability on the SoC. */ +#define FSL_FEATURE_SOC_EDMA_COUNT (0) +/* @brief EEPROM availability on the SoC. */ +#define FSL_FEATURE_SOC_EEPROM_COUNT (1) +/* @brief EIM availability on the SoC. */ +#define FSL_FEATURE_SOC_EIM_COUNT (0) +/* @brief EMC availability on the SoC. */ +#define FSL_FEATURE_SOC_EMC_COUNT (1) +/* @brief EMVSIM availability on the SoC. */ +#define FSL_FEATURE_SOC_EMVSIM_COUNT (0) +/* @brief ENC availability on the SoC. */ +#define FSL_FEATURE_SOC_ENC_COUNT (0) +/* @brief ENET availability on the SoC. */ +#define FSL_FEATURE_SOC_LPC_ENET_COUNT (1) +/* @brief EPDC availability on the SoC. */ +#define FSL_FEATURE_SOC_EPDC_COUNT (0) +/* @brief EPIT availability on the SoC. */ +#define FSL_FEATURE_SOC_EPIT_COUNT (0) +/* @brief ESAI availability on the SoC. */ +#define FSL_FEATURE_SOC_ESAI_COUNT (0) +/* @brief EWM availability on the SoC. */ +#define FSL_FEATURE_SOC_EWM_COUNT (0) +/* @brief FB availability on the SoC. */ +#define FSL_FEATURE_SOC_FB_COUNT (0) +/* @brief FGPIO availability on the SoC. */ +#define FSL_FEATURE_SOC_FGPIO_COUNT (0) +/* @brief FLASH availability on the SoC. */ +#define FSL_FEATURE_SOC_FLASH_COUNT (0) +/* @brief FLEXCAN availability on the SoC. */ +#define FSL_FEATURE_SOC_FLEXCAN_COUNT (0) +/* @brief FLEXCOMM availability on the SoC. */ +#define FSL_FEATURE_SOC_FLEXCOMM_COUNT (10) +/* @brief FLEXIO availability on the SoC. */ +#define FSL_FEATURE_SOC_FLEXIO_COUNT (0) +/* @brief FLEXRAM availability on the SoC. */ +#define FSL_FEATURE_SOC_FLEXRAM_COUNT (0) +/* @brief FLEXSPI availability on the SoC. */ +#define FSL_FEATURE_SOC_FLEXSPI_COUNT (0) +/* @brief FMC availability on the SoC. */ +#define FSL_FEATURE_SOC_FMC_COUNT (1) +/* @brief FSKDT availability on the SoC. */ +#define FSL_FEATURE_SOC_FSKDT_COUNT (0) +/* @brief FSP availability on the SoC. */ +#define FSL_FEATURE_SOC_FSP_COUNT (0) +/* @brief FTFA availability on the SoC. */ +#define FSL_FEATURE_SOC_FTFA_COUNT (0) +/* @brief FTFE availability on the SoC. */ +#define FSL_FEATURE_SOC_FTFE_COUNT (0) +/* @brief FTFL availability on the SoC. */ +#define FSL_FEATURE_SOC_FTFL_COUNT (0) +/* @brief FTM availability on the SoC. */ +#define FSL_FEATURE_SOC_FTM_COUNT (0) +/* @brief FTMRA availability on the SoC. */ +#define FSL_FEATURE_SOC_FTMRA_COUNT (0) +/* @brief FTMRE availability on the SoC. */ +#define FSL_FEATURE_SOC_FTMRE_COUNT (0) +/* @brief FTMRH availability on the SoC. */ +#define FSL_FEATURE_SOC_FTMRH_COUNT (0) +/* @brief GINT availability on the SoC. */ +#define FSL_FEATURE_SOC_GINT_COUNT (2) +/* @brief GPC availability on the SoC. */ +#define FSL_FEATURE_SOC_GPC_COUNT (0) +/* @brief GPC_PGC availability on the SoC. */ +#define FSL_FEATURE_SOC_GPC_PGC_COUNT (0) +/* @brief GPIO availability on the SoC. */ +#define FSL_FEATURE_SOC_GPIO_COUNT (1) +/* @brief GPMI availability on the SoC. */ +#define FSL_FEATURE_SOC_GPMI_COUNT (0) +/* @brief GPT availability on the SoC. */ +#define FSL_FEATURE_SOC_GPT_COUNT (0) +/* @brief HSADC availability on the SoC. */ +#define FSL_FEATURE_SOC_HSADC_COUNT (0) +/* @brief I2C availability on the SoC. */ +#define FSL_FEATURE_SOC_I2C_COUNT (10) +/* @brief I2S availability on the SoC. */ +#define FSL_FEATURE_SOC_I2S_COUNT (2) +/* @brief ICS availability on the SoC. */ +#define FSL_FEATURE_SOC_ICS_COUNT (0) +/* @brief IEE availability on the SoC. */ +#define FSL_FEATURE_SOC_IEE_COUNT (0) +/* @brief IEER availability on the SoC. */ +#define FSL_FEATURE_SOC_IEER_COUNT (0) +/* @brief IGPIO availability on the SoC. */ +#define FSL_FEATURE_SOC_IGPIO_COUNT (0) +/* @brief II2C availability on the SoC. */ +#define FSL_FEATURE_SOC_II2C_COUNT (0) +/* @brief INPUTMUX availability on the SoC. */ +#define FSL_FEATURE_SOC_INPUTMUX_COUNT (1) +/* @brief INTMUX availability on the SoC. */ +#define FSL_FEATURE_SOC_INTMUX_COUNT (0) +/* @brief IOCON availability on the SoC. */ +#define FSL_FEATURE_SOC_IOCON_COUNT (1) +/* @brief IOMUXC availability on the SoC. */ +#define FSL_FEATURE_SOC_IOMUXC_COUNT (0) +/* @brief IOMUXC_GPR availability on the SoC. */ +#define FSL_FEATURE_SOC_IOMUXC_GPR_COUNT (0) +/* @brief IOMUXC_LPSR availability on the SoC. */ +#define FSL_FEATURE_SOC_IOMUXC_LPSR_COUNT (0) +/* @brief IOMUXC_LPSR_GPR availability on the SoC. */ +#define FSL_FEATURE_SOC_IOMUXC_LPSR_GPR_COUNT (0) +/* @brief IOMUXC_SNVS availability on the SoC. */ +#define FSL_FEATURE_SOC_IOMUXC_SNVS_COUNT (0) +/* @brief IPWM availability on the SoC. */ +#define FSL_FEATURE_SOC_IPWM_COUNT (0) +/* @brief IRQ availability on the SoC. */ +#define FSL_FEATURE_SOC_IRQ_COUNT (0) +/* @brief IUART availability on the SoC. */ +#define FSL_FEATURE_SOC_IUART_COUNT (0) +/* @brief KBI availability on the SoC. */ +#define FSL_FEATURE_SOC_KBI_COUNT (0) +/* @brief KPP availability on the SoC. */ +#define FSL_FEATURE_SOC_KPP_COUNT (0) +/* @brief L2CACHEC availability on the SoC. */ +#define FSL_FEATURE_SOC_L2CACHEC_COUNT (0) +/* @brief LCD availability on the SoC. */ +#define FSL_FEATURE_SOC_LCD_COUNT (1) +/* @brief LCDC availability on the SoC. */ +#define FSL_FEATURE_SOC_LCDC_COUNT (0) +/* @brief LCDIF availability on the SoC. */ +#define FSL_FEATURE_SOC_LCDIF_COUNT (0) +/* @brief LDO availability on the SoC. */ +#define FSL_FEATURE_SOC_LDO_COUNT (0) +/* @brief LLWU availability on the SoC. */ +#define FSL_FEATURE_SOC_LLWU_COUNT (0) +/* @brief LMEM availability on the SoC. */ +#define FSL_FEATURE_SOC_LMEM_COUNT (0) +/* @brief LPADC availability on the SoC. */ +#define FSL_FEATURE_SOC_LPADC_COUNT (0) +/* @brief LPCMP availability on the SoC. */ +#define FSL_FEATURE_SOC_LPCMP_COUNT (0) +/* @brief LPDAC availability on the SoC. */ +#define FSL_FEATURE_SOC_LPDAC_COUNT (0) +/* @brief LPI2C availability on the SoC. */ +#define FSL_FEATURE_SOC_LPI2C_COUNT (0) +/* @brief LPIT availability on the SoC. */ +#define FSL_FEATURE_SOC_LPIT_COUNT (0) +/* @brief LPSCI availability on the SoC. */ +#define FSL_FEATURE_SOC_LPSCI_COUNT (0) +/* @brief LPSPI availability on the SoC. */ +#define FSL_FEATURE_SOC_LPSPI_COUNT (0) +/* @brief LPTMR availability on the SoC. */ +#define FSL_FEATURE_SOC_LPTMR_COUNT (0) +/* @brief LPTPM availability on the SoC. */ +#define FSL_FEATURE_SOC_LPTPM_COUNT (0) +/* @brief LPUART availability on the SoC. */ +#define FSL_FEATURE_SOC_LPUART_COUNT (0) +/* @brief LTC availability on the SoC. */ +#define FSL_FEATURE_SOC_LTC_COUNT (0) +/* @brief MAILBOX availability on the SoC. */ +#define FSL_FEATURE_SOC_MAILBOX_COUNT (0) +/* @brief MC availability on the SoC. */ +#define FSL_FEATURE_SOC_MC_COUNT (0) +/* @brief MCG availability on the SoC. */ +#define FSL_FEATURE_SOC_MCG_COUNT (0) +/* @brief MCGLITE availability on the SoC. */ +#define FSL_FEATURE_SOC_MCGLITE_COUNT (0) +/* @brief MCM availability on the SoC. */ +#define FSL_FEATURE_SOC_MCM_COUNT (0) +/* @brief MIPI_CSI2 availability on the SoC. */ +#define FSL_FEATURE_SOC_MIPI_CSI2_COUNT (0) +/* @brief MIPI_DSI availability on the SoC. */ +#define FSL_FEATURE_SOC_MIPI_DSI_COUNT (0) +/* @brief MIPI_DSI_HOST availability on the SoC. */ +#define FSL_FEATURE_SOC_MIPI_DSI_HOST_COUNT (0) +/* @brief MMAU availability on the SoC. */ +#define FSL_FEATURE_SOC_MMAU_COUNT (0) +/* @brief MMCAU availability on the SoC. */ +#define FSL_FEATURE_SOC_MMCAU_COUNT (0) +/* @brief MMDC availability on the SoC. */ +#define FSL_FEATURE_SOC_MMDC_COUNT (0) +/* @brief MMDVSQ availability on the SoC. */ +#define FSL_FEATURE_SOC_MMDVSQ_COUNT (0) +/* @brief MPU availability on the SoC. */ +#define FSL_FEATURE_SOC_MPU_COUNT (0) +/* @brief MRT availability on the SoC. */ +#define FSL_FEATURE_SOC_MRT_COUNT (1) +/* @brief MSCAN availability on the SoC. */ +#define FSL_FEATURE_SOC_MSCAN_COUNT (0) +/* @brief MSCM availability on the SoC. */ +#define FSL_FEATURE_SOC_MSCM_COUNT (0) +/* @brief MTB availability on the SoC. */ +#define FSL_FEATURE_SOC_MTB_COUNT (0) +/* @brief MTBDWT availability on the SoC. */ +#define FSL_FEATURE_SOC_MTBDWT_COUNT (0) +/* @brief MU availability on the SoC. */ +#define FSL_FEATURE_SOC_MU_COUNT (0) +/* @brief NFC availability on the SoC. */ +#define FSL_FEATURE_SOC_NFC_COUNT (0) +/* @brief OCOTP availability on the SoC. */ +#define FSL_FEATURE_SOC_OCOTP_COUNT (0) +/* @brief OPAMP availability on the SoC. */ +#define FSL_FEATURE_SOC_OPAMP_COUNT (0) +/* @brief OSC availability on the SoC. */ +#define FSL_FEATURE_SOC_OSC_COUNT (0) +/* @brief OSC32 availability on the SoC. */ +#define FSL_FEATURE_SOC_OSC32_COUNT (0) +/* @brief OTFAD availability on the SoC. */ +#define FSL_FEATURE_SOC_OTFAD_COUNT (0) +/* @brief PCC availability on the SoC. */ +#define FSL_FEATURE_SOC_PCC_COUNT (0) +/* @brief PCIE_PHY_CMN availability on the SoC. */ +#define FSL_FEATURE_SOC_PCIE_PHY_CMN_COUNT (0) +/* @brief PCIE_PHY_TRSV availability on the SoC. */ +#define FSL_FEATURE_SOC_PCIE_PHY_TRSV_COUNT (0) +/* @brief PDB availability on the SoC. */ +#define FSL_FEATURE_SOC_PDB_COUNT (0) +/* @brief PGA availability on the SoC. */ +#define FSL_FEATURE_SOC_PGA_COUNT (0) +/* @brief PINT availability on the SoC. */ +#define FSL_FEATURE_SOC_PINT_COUNT (1) +/* @brief PIT availability on the SoC. */ +#define FSL_FEATURE_SOC_PIT_COUNT (0) +/* @brief PMC availability on the SoC. */ +#define FSL_FEATURE_SOC_PMC_COUNT (0) +/* @brief PMU availability on the SoC. */ +#define FSL_FEATURE_SOC_PMU_COUNT (0) +/* @brief PORT availability on the SoC. */ +#define FSL_FEATURE_SOC_PORT_COUNT (0) +/* @brief PROP availability on the SoC. */ +#define FSL_FEATURE_SOC_PROP_COUNT (0) +/* @brief PWM availability on the SoC. */ +#define FSL_FEATURE_SOC_PWM_COUNT (0) +/* @brief PWT availability on the SoC. */ +#define FSL_FEATURE_SOC_PWT_COUNT (0) +/* @brief PXP availability on the SoC. */ +#define FSL_FEATURE_SOC_PXP_COUNT (0) +/* @brief QDEC availability on the SoC. */ +#define FSL_FEATURE_SOC_QDEC_COUNT (0) +/* @brief QuadSPI availability on the SoC. */ +#define FSL_FEATURE_SOC_QuadSPI_COUNT (0) +/* @brief RCM availability on the SoC. */ +#define FSL_FEATURE_SOC_RCM_COUNT (0) +/* @brief RDC availability on the SoC. */ +#define FSL_FEATURE_SOC_RDC_COUNT (0) +/* @brief RDC_SEMAPHORE availability on the SoC. */ +#define FSL_FEATURE_SOC_RDC_SEMAPHORE_COUNT (0) +/* @brief RFSYS availability on the SoC. */ +#define FSL_FEATURE_SOC_RFSYS_COUNT (0) +/* @brief RFVBAT availability on the SoC. */ +#define FSL_FEATURE_SOC_RFVBAT_COUNT (0) +/* @brief RIT availability on the SoC. */ +#define FSL_FEATURE_SOC_RIT_COUNT (1) +/* @brief RNG availability on the SoC. */ +#define FSL_FEATURE_SOC_LPC_RNG_COUNT (1) +/* @brief RNGB availability on the SoC. */ +#define FSL_FEATURE_SOC_RNGB_COUNT (0) +/* @brief ROM availability on the SoC. */ +#define FSL_FEATURE_SOC_ROM_COUNT (0) +/* @brief ROMC availability on the SoC. */ +#define FSL_FEATURE_SOC_ROMC_COUNT (0) +/* @brief RSIM availability on the SoC. */ +#define FSL_FEATURE_SOC_RSIM_COUNT (0) +/* @brief RTC availability on the SoC. */ +#define FSL_FEATURE_SOC_RTC_COUNT (1) +/* @brief SCG availability on the SoC. */ +#define FSL_FEATURE_SOC_SCG_COUNT (0) +/* @brief SCI availability on the SoC. */ +#define FSL_FEATURE_SOC_SCI_COUNT (0) +/* @brief SCT availability on the SoC. */ +#define FSL_FEATURE_SOC_SCT_COUNT (1) +/* @brief SDHC availability on the SoC. */ +#define FSL_FEATURE_SOC_SDHC_COUNT (0) +/* @brief SDIF availability on the SoC. */ +#define FSL_FEATURE_SOC_SDIF_COUNT (1) +/* @brief SDIO availability on the SoC. */ +#define FSL_FEATURE_SOC_SDIO_COUNT (0) +/* @brief SDMA availability on the SoC. */ +#define FSL_FEATURE_SOC_SDMA_COUNT (0) +/* @brief SDMAARM availability on the SoC. */ +#define FSL_FEATURE_SOC_SDMAARM_COUNT (0) +/* @brief SDMABP availability on the SoC. */ +#define FSL_FEATURE_SOC_SDMABP_COUNT (0) +/* @brief SDMACORE availability on the SoC. */ +#define FSL_FEATURE_SOC_SDMACORE_COUNT (0) +/* @brief SDMCORE availability on the SoC. */ +#define FSL_FEATURE_SOC_SDMCORE_COUNT (0) +/* @brief SDRAM availability on the SoC. */ +#define FSL_FEATURE_SOC_SDRAM_COUNT (0) +/* @brief SEMA4 availability on the SoC. */ +#define FSL_FEATURE_SOC_SEMA4_COUNT (0) +/* @brief SEMA42 availability on the SoC. */ +#define FSL_FEATURE_SOC_SEMA42_COUNT (0) +/* @brief SHA availability on the SoC. */ +#define FSL_FEATURE_SOC_SHA_COUNT (1) +/* @brief SIM availability on the SoC. */ +#define FSL_FEATURE_SOC_SIM_COUNT (0) +/* @brief SJC availability on the SoC. */ +#define FSL_FEATURE_SOC_SJC_COUNT (0) +/* @brief SLCD availability on the SoC. */ +#define FSL_FEATURE_SOC_SLCD_COUNT (0) +/* @brief SMARTCARD availability on the SoC. */ +#define FSL_FEATURE_SOC_SMARTCARD_COUNT (2) +/* @brief SMC availability on the SoC. */ +#define FSL_FEATURE_SOC_SMC_COUNT (0) +/* @brief SNVS availability on the SoC. */ +#define FSL_FEATURE_SOC_SNVS_COUNT (0) +/* @brief SPBA availability on the SoC. */ +#define FSL_FEATURE_SOC_SPBA_COUNT (0) +/* @brief SPDIF availability on the SoC. */ +#define FSL_FEATURE_SOC_SPDIF_COUNT (0) +/* @brief SPI availability on the SoC. */ +#define FSL_FEATURE_SOC_SPI_COUNT (10) +/* @brief SPIFI availability on the SoC. */ +#define FSL_FEATURE_SOC_SPIFI_COUNT (1) +/* @brief SPM availability on the SoC. */ +#define FSL_FEATURE_SOC_SPM_COUNT (0) +/* @brief SRC availability on the SoC. */ +#define FSL_FEATURE_SOC_SRC_COUNT (0) +/* @brief SYSCON availability on the SoC. */ +#define FSL_FEATURE_SOC_SYSCON_COUNT (1) +/* @brief TEMPMON availability on the SoC. */ +#define FSL_FEATURE_SOC_TEMPMON_COUNT (0) +/* @brief TMR availability on the SoC. */ +#define FSL_FEATURE_SOC_TMR_COUNT (0) +/* @brief TPM availability on the SoC. */ +#define FSL_FEATURE_SOC_TPM_COUNT (0) +/* @brief TRGMUX availability on the SoC. */ +#define FSL_FEATURE_SOC_TRGMUX_COUNT (0) +/* @brief TRIAMP availability on the SoC. */ +#define FSL_FEATURE_SOC_TRIAMP_COUNT (0) +/* @brief TRNG availability on the SoC. */ +#define FSL_FEATURE_SOC_TRNG_COUNT (0) +/* @brief TSC availability on the SoC. */ +#define FSL_FEATURE_SOC_TSC_COUNT (0) +/* @brief TSI availability on the SoC. */ +#define FSL_FEATURE_SOC_TSI_COUNT (0) +/* @brief TSTMR availability on the SoC. */ +#define FSL_FEATURE_SOC_TSTMR_COUNT (0) +/* @brief UART availability on the SoC. */ +#define FSL_FEATURE_SOC_UART_COUNT (0) +/* @brief USART availability on the SoC. */ +#define FSL_FEATURE_SOC_USART_COUNT (10) +/* @brief USB availability on the SoC. */ +#define FSL_FEATURE_SOC_USB_COUNT (1) +/* @brief USBHS availability on the SoC. */ +#define FSL_FEATURE_SOC_USBHS_COUNT (0) +/* @brief USBDCD availability on the SoC. */ +#define FSL_FEATURE_SOC_USBDCD_COUNT (0) +/* @brief USBFSH availability on the SoC. */ +#define FSL_FEATURE_SOC_USBFSH_COUNT (1) +/* @brief USBHSD availability on the SoC. */ +#define FSL_FEATURE_SOC_USBHSD_COUNT (1) +/* @brief USBHSDCD availability on the SoC. */ +#define FSL_FEATURE_SOC_USBHSDCD_COUNT (0) +/* @brief USBHSH availability on the SoC. */ +#define FSL_FEATURE_SOC_USBHSH_COUNT (1) +/* @brief USBNC availability on the SoC. */ +#define FSL_FEATURE_SOC_USBNC_COUNT (0) +/* @brief USBPHY availability on the SoC. */ +#define FSL_FEATURE_SOC_USBPHY_COUNT (0) +/* @brief USB_HSIC availability on the SoC. */ +#define FSL_FEATURE_SOC_USB_HSIC_COUNT (0) +/* @brief USB_OTG availability on the SoC. */ +#define FSL_FEATURE_SOC_USB_OTG_COUNT (0) +/* @brief USBVREG availability on the SoC. */ +#define FSL_FEATURE_SOC_USBVREG_COUNT (0) +/* @brief USDHC availability on the SoC. */ +#define FSL_FEATURE_SOC_USDHC_COUNT (0) +/* @brief UTICK availability on the SoC. */ +#define FSL_FEATURE_SOC_UTICK_COUNT (1) +/* @brief VIU availability on the SoC. */ +#define FSL_FEATURE_SOC_VIU_COUNT (0) +/* @brief VREF availability on the SoC. */ +#define FSL_FEATURE_SOC_VREF_COUNT (0) +/* @brief VFIFO availability on the SoC. */ +#define FSL_FEATURE_SOC_VFIFO_COUNT (0) +/* @brief WDOG availability on the SoC. */ +#define FSL_FEATURE_SOC_WDOG_COUNT (0) +/* @brief WKPU availability on the SoC. */ +#define FSL_FEATURE_SOC_WKPU_COUNT (0) +/* @brief WWDT availability on the SoC. */ +#define FSL_FEATURE_SOC_WWDT_COUNT (1) +/* @brief XBAR availability on the SoC. */ +#define FSL_FEATURE_SOC_XBAR_COUNT (0) +/* @brief XBARA availability on the SoC. */ +#define FSL_FEATURE_SOC_XBARA_COUNT (0) +/* @brief XBARB availability on the SoC. */ +#define FSL_FEATURE_SOC_XBARB_COUNT (0) +/* @brief XCVR availability on the SoC. */ +#define FSL_FEATURE_SOC_XCVR_COUNT (0) +/* @brief XRDC availability on the SoC. */ +#define FSL_FEATURE_SOC_XRDC_COUNT (0) +/* @brief XTALOSC availability on the SoC. */ +#define FSL_FEATURE_SOC_XTALOSC_COUNT (0) +/* @brief XTALOSC24M availability on the SoC. */ +#define FSL_FEATURE_SOC_XTALOSC24M_COUNT (0) +/* @brief ZLL availability on the SoC. */ +#define FSL_FEATURE_SOC_ZLL_COUNT (0) + +/* CAN module features */ + +/* @brief Support CANFD or not */ +#define FSL_FEATURE_CAN_SUPPORT_CANFD (1) + +/* DMA module features */ + +/* @brief Number of channels */ +#define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (30) + +/* EEPROM module features */ + +/* @brief Size of the EEPROM */ +#define FSL_FEATURE_EEPROM_SIZE (0x00004000) +/* @brief Base address of the EEPROM */ +#define FSL_FEATURE_EEPROM_BASE_ADDRESS (0x40108000) +/* @brief Page count of the EEPROM */ +#define FSL_FEATURE_EEPROM_PAGE_COUNT (128) +/* @brief Command number for eeprom program */ +#define FSL_FEATURE_EEPROM_PROGRAM_CMD (6) +/* @brief EEPROM internal clock freqency */ +#define FSL_FEATURE_EEPROM_INTERNAL_FREQ (1500000) + +/* IOCON module features */ + +/* @brief Func bit field width */ +#define FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH (4) + +/* PINT module features */ + +/* @brief Number of connected outputs */ +#define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (8) + +/* SCT module features */ + +/* @brief Number of events */ +#define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10) +/* @brief Number of states */ +#define FSL_FEATURE_SCT_NUMBER_OF_STATES (10) +/* @brief Number of match capture */ +#define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10) + +/* SDIF module features */ + +/* @brief FIFO depth, every location is a WORD */ +#define FSL_FEATURE_SDIF_FIFO_DEPTH_64_32BITS (64) +/* @brief Max DMA buffer size */ +#define FSL_FEATURE_SDIF_INTERNAL_DMA_MAX_BUFFER_SIZE (4096) +/* @brief Max source clock in HZ */ +#define FSL_FEATURE_SDIF_MAX_SOURCE_CLOCK (52000000) + +/* SPIFI module features */ + +/* @brief SPIFI start address */ +#define FSL_FEATURE_SPIFI_START_ADDR (0x10000000) +/* @brief SPIFI end address */ +#define FSL_FEATURE_SPIFI_END_ADDR (0x17FFFFFF) + +/* SYSCON module features */ + +/* @brief Pointer to ROM IAP entry functions */ +#define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205) +/* @brief Flash page size in bytes */ +#define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256) +/* @brief Flash sector size in bytes */ +#define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768) +/* @brief Flash size in bytes */ +#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (524288) + +/* USB module features */ + +/* @brief Size of the USB dedicated RAM */ +#define FSL_FEATURE_USB_USB_RAM (0x00002000) +/* @brief Base address of the USB dedicated RAM */ +#define FSL_FEATURE_USB_USB_RAM_BASE_ADDRESS (0x40100000) + +/* USBFSH module features */ + +/* @brief Size of the USB dedicated RAM */ +#define FSL_FEATURE_USBFSH_USB_RAM (0x00002000) +/* @brief Base address of the USB dedicated RAM */ +#define FSL_FEATURE_USBFSH_USB_RAM_BASE_ADDRESS (0x40100000) + +/* USBHSD module features */ + +/* @brief Size of the USB dedicated RAM */ +#define FSL_FEATURE_USBHSD_USB_RAM (0x00002000) +/* @brief Base address of the USB dedicated RAM */ +#define FSL_FEATURE_USBHSD_USB_RAM_BASE_ADDRESS (0x40100000) + +/* USBHSH module features */ + +/* @brief Size of the USB dedicated RAM */ +#define FSL_FEATURE_USBHSH_USB_RAM (0x00002000) +/* @brief Base address of the USB dedicated RAM */ +#define FSL_FEATURE_USBHSH_USB_RAM_BASE_ADDRESS (0x40100000) + +#endif /* _LPC54628_FEATURES_H_ */ + diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54618J512.sct b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct similarity index 86% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54618J512.sct rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct index f6a981b2c3..bfc66f00b0 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54618J512.sct +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/LPC54628J512.sct @@ -1,30 +1,28 @@ #! armcc -E /* ** ################################################################### -** Processors: LPC54618J512BD208 -** LPC54618J512ET180 -** +** Processor: LPC54628J512ET180 ** Compiler: Keil ARM C/C++ Compiler -** Reference manual: LPC54S60x/LPC5460x User manual Rev.0.9 7 Nov 2016 -** Version: rev. 1.1, 2016-11-25 -** Build: b161227 +** Reference manual: LPC546xx User manual Rev.1.9 5 June 2017 +** Version: rev. 1.2, 2017-06-08 +** Build: b170821 ** ** Abstract: ** Linker file for the Keil ARM C/C++ Compiler ** -** Copyright (c) 2016 Freescale Semiconductor, Inc. -** Copyright 2016 - 2017 NXP +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2017 NXP ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** -** o Redistributions of source code must retain the above copyright notice, this list +** 1. Redistributions of source code must retain the above copyright notice, this list ** of conditions and the following disclaimer. ** -** o Redistributions in binary form must reproduce the above copyright notice, this +** 2. Redistributions in binary form must reproduce the above copyright notice, this ** list of conditions and the following disclaimer in the documentation and/or ** other materials provided with the distribution. ** -** o Neither the name of the copyright holder nor the names of its +** 3. Neither the name of the copyright holder nor the names of its ** contributors may be used to endorse or promote products derived from this ** software without specific prior written permission. ** diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/lib_power.ar b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/lib_power.ar index 2cab4e5e68..d6b9a21481 100755 Binary files a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/lib_power.ar and b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/lib_power.ar differ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/startup_LPC54618.S b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/startup_LPC54628.S similarity index 98% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/startup_LPC54618.S rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/startup_LPC54628.S index 6ebe3baf63..15ea5aba94 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/startup_LPC54618.S +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_ARM_STD/startup_LPC54628.S @@ -1,24 +1,24 @@ ;/***************************************************************************** -; * @file: startup_LPC54618.s +; * @file: startup_LPC54628.s ; * @purpose: CMSIS Cortex-M4 Core Device Startup File for the -; * LPC54618 -; * @version: 1.1 -; * @date: 2016-11-25 +; * LPC54628 +; * @version: 1.2 +; * @date: 2017-6-8 ; * -; * Copyright 1997 - 2016 Freescale Semiconductor, Inc. -; * Copyright 2016 - 2017 NXP +; * Copyright 1997-2016 Freescale Semiconductor, Inc. +; * Copyright 2016-2017 NXP ; * ; * Redistribution and use in source and binary forms, with or without modification, ; * are permitted provided that the following conditions are met: ; * -; * o Redistributions of source code must retain the above copyright notice, this list +; * 1. Redistributions of source code must retain the above copyright notice, this list ; * of conditions and the following disclaimer. ; * -; * o Redistributions in binary form must reproduce the above copyright notice, this +; * 2. Redistributions in binary form must reproduce the above copyright notice, this ; * list of conditions and the following disclaimer in the documentation and/or ; * other materials provided with the distribution. ; * -; * o Neither the name of the copyright holder nor the names of its +; * 3. Neither the name of the copyright holder nor the names of its ; * contributors may be used to endorse or promote products derived from this ; * software without specific prior written permission. ; * diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54618J512.ld b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld similarity index 98% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54618J512.ld rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld index 47aaf97795..76428b3d59 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54618J512.ld +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/LPC54628J512.ld @@ -1,9 +1,9 @@ /* ** ################################################################### -** Processors: LPC54618J512 +** Processors: LPC54628J512 ** ** Compiler: GNU C Compiler -** Reference manual: LPC54618 Series Reference Manual, Rev. 0 , 06/2017 +** Reference manual: LPC54628 Series Reference Manual, Rev. 0 , 06/2017 ** Version: rev. 1.0, 2017-6-06 ** Build: b161214 ** diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/libpower.a b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/libpower.a index 4503c05633..eb36a34f54 100755 Binary files a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/libpower.a and b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/libpower.a differ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/startup_LPC54618.S b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/startup_LPC54628.S similarity index 99% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/startup_LPC54618.S rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/startup_LPC54628.S index b801b02922..66a0ae6fd6 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/startup_LPC54618.S +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_GCC_ARM/startup_LPC54628.S @@ -1,7 +1,7 @@ /* ---------------------------------------------------------------------------------------*/ -/* @file: startup_LPC54618.S */ +/* @file: startup_LPC54628.S */ /* @purpose: CMSIS Cortex-M4 Core Device Startup File */ -/* LPC54618 */ +/* LPC54628 */ /* @version: 1.0 */ /* @date: 2017-6-6 */ /* @build: b161214 */ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54618J512.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf similarity index 89% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54618J512.icf rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf index eb219474d9..c0d6fba266 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54618J512.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf @@ -1,29 +1,27 @@ /* ** ################################################################### -** Processors: LPC54618J512BD208 -** LPC54618J512ET180 -** +** Processor: LPC54628J512ET180 ** Compiler: IAR ANSI C/C++ Compiler for ARM -** Reference manual: LPC54S60x/LPC5460x User manual Rev.0.9 7 Nov 2016 -** Version: rev. 1.1, 2016-11-25 -** Build: b161227 +** Reference manual: LPC546xx User manual Rev.1.9 5 June 2017 +** Version: rev. 1.2, 2017-06-08 +** Build: b170821 ** ** Abstract: ** Linker file for the IAR ANSI C/C++ Compiler for ARM ** -** Copyright (c) 2016 Freescale Semiconductor, Inc. -** Copyright 2016 - 2017 NXP +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2017 NXP ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** -** o Redistributions of source code must retain the above copyright notice, this list +** 1. Redistributions of source code must retain the above copyright notice, this list ** of conditions and the following disclaimer. ** -** o Redistributions in binary form must reproduce the above copyright notice, this +** 2. Redistributions in binary form must reproduce the above copyright notice, this ** list of conditions and the following disclaimer in the documentation and/or ** other materials provided with the distribution. ** -** o Neither the name of the copyright holder nor the names of its +** 3. Neither the name of the copyright holder nor the names of its ** contributors may be used to endorse or promote products derived from this ** software without specific prior written permission. ** diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/lib_power.a b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/lib_power.a index 755b29878d..ffb36aa1c0 100755 Binary files a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/lib_power.a and b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/lib_power.a differ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/startup_LPC54618.S b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/startup_LPC54628.S similarity index 98% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/startup_LPC54618.S rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/startup_LPC54628.S index 442949881a..402ab485f5 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/startup_LPC54618.S +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/startup_LPC54628.S @@ -1,25 +1,25 @@ ;/***************************************************************************** -; * @file: startup_LPC54618.s +; * @file: startup_LPC54628.s ; * @purpose: CMSIS Cortex-M4 Core Device Startup File -; * LPC54618 -; * @version: 1.1 -; * @date: 2016-11-25 +; * LPC54628 +; * @version: 1.2 +; * @date: 2017-6-8 ; *---------------------------------------------------------------------------- ; * -; * Copyright 1997 - 2016 Freescale Semiconductor. -; * Copyright 2016 - 2017 NXP +; * Copyright 1997-2016 Freescale Semiconductor, Inc. +; * Copyright 2016-2017 NXP ; * ; Redistribution and use in source and binary forms, with or without modification, ; are permitted provided that the following conditions are met: ; -; o Redistributions of source code must retain the above copyright notice, this list +; 1. Redistributions of source code must retain the above copyright notice, this list ; of conditions and the following disclaimer. ; -; o Redistributions in binary form must reproduce the above copyright notice, this +; 2. Redistributions in binary form must reproduce the above copyright notice, this ; list of conditions and the following disclaimer in the documentation and/or ; other materials provided with the distribution. ; -; o Neither the name of the copyright holder nor the names of its +; 3. Neither the name of the copyright holder nor the names of its ; contributors may be used to endorse or promote products derived from this ; software without specific prior written permission. ; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/fsl_device_registers.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/fsl_device_registers.h index aff433895d..c5513e8bf9 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/fsl_device_registers.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/fsl_device_registers.h @@ -1,20 +1,25 @@ /* - * Copyright (c) 2014 - 2016, Freescale Semiconductor, Inc. - * Copyright 2016 - 2017 NXP - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: + * The Clear BSD License + * Copyright 2014-2016 Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + * All rights reserved. * - * o Redistributions of source code must retain the above copyright notice, this list + * Redistribution and use in source and binary forms, with or without modification, + * are permitted (subject to the limitations in the disclaimer below) provided + * that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. * - * o Redistributions in binary form must reproduce the above copyright notice, this + * 2. Redistributions in binary form must reproduce the above copyright notice, this * list of conditions and the following disclaimer in the documentation and/or * other materials provided with the distribution. * - * o Neither the name of the copyright holder nor the names of its + * 3. Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * + * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -36,14 +41,14 @@ * * The CPU macro should be declared in the project or makefile. */ -#if (defined(CPU_LPC54618J512BD208) || defined(CPU_LPC54618J512ET180)) +#if (defined(CPU_LPC54628J512ET180)) -#define LPC54618_SERIES +#define LPC54628_SERIES /* CMSIS-style register definitions */ -#include "LPC54618.h" +#include "LPC54628.h" /* CPU specific feature definitions */ -#include "LPC54618_features.h" +#include "LPC54628_features.h" #else #error "No valid CPU defined!" diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54618.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54628.c old mode 100755 new mode 100644 similarity index 93% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54618.c rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54628.c index 51e13ce43b..1477bf8e22 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54618.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54628.c @@ -1,16 +1,14 @@ /* ** ################################################################### -** Processors: LPC54618J512BD208 -** LPC54618J512ET180 -** +** Processor: LPC54628J512ET180 ** Compilers: Keil ARM C/C++ Compiler ** GNU C Compiler ** IAR ANSI C/C++ Compiler for ARM ** MCUXpresso Compiler ** -** Reference manual: LPC54S60x/LPC5460x User manual Rev.0.9 7 Nov 2016 -** Version: rev. 1.1, 2016-11-25 -** Build: b170214 +** Reference manual: LPC546xx User manual Rev.1.9 5 June 2017 +** Version: rev. 1.2, 2017-06-08 +** Build: b170609 ** ** Abstract: ** Provides a system configuration function and a global variable that @@ -22,14 +20,14 @@ ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** -** o Redistributions of source code must retain the above copyright notice, this list +** 1. Redistributions of source code must retain the above copyright notice, this list ** of conditions and the following disclaimer. ** -** o Redistributions in binary form must reproduce the above copyright notice, this +** 2. Redistributions in binary form must reproduce the above copyright notice, this ** list of conditions and the following disclaimer in the documentation and/or ** other materials provided with the distribution. ** -** o Neither the name of the copyright holder nor the names of its +** 3. Neither the name of the copyright holder nor the names of its ** contributors may be used to endorse or promote products derived from this ** software without specific prior written permission. ** @@ -53,15 +51,19 @@ ** - rev. 1.1 (2016-11-25) ** Update CANFD and Classic CAN register. ** Add MAC TIMERSTAMP registers. +** - rev. 1.2 (2017-06-08) +** Remove RTC_CTRL_RTC_OSC_BYPASS. +** SYSCON_ARMTRCLKDIV rename to SYSCON_ARMTRACECLKDIV. +** Remove RESET and HALT from SYSCON_AHBCLKDIV. ** ** ################################################################### */ /*! - * @file LPC54618 - * @version 1.1 - * @date 2016-11-25 - * @brief Device specific configuration file for LPC54618 (implementation file) + * @file LPC54628 + * @version 1.2 + * @date 2017-06-08 + * @brief Device specific configuration file for LPC54628 (implementation file) * * Provides a system configuration function and a global variable that contains * the system frequency. It configures the device and initializes the oscillator diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54618.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54628.h old mode 100755 new mode 100644 similarity index 81% rename from targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54618.h rename to targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54628.h index edcefbd0ed..d49274151b --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54618.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/system_LPC54628.h @@ -1,35 +1,33 @@ /* ** ################################################################### -** Processors: LPC54618J512BD208 -** LPC54618J512ET180 -** +** Processor: LPC54628J512ET180 ** Compilers: Keil ARM C/C++ Compiler ** GNU C Compiler ** IAR ANSI C/C++ Compiler for ARM ** MCUXpresso Compiler ** -** Reference manual: LPC54S60x/LPC5460x User manual Rev.0.9 7 Nov 2016 -** Version: rev. 1.1, 2016-11-25 -** Build: b161227 +** Reference manual: LPC546xx User manual Rev.1.9 5 June 2017 +** Version: rev. 1.2, 2017-06-08 +** Build: b170609 ** ** Abstract: ** Provides a system configuration function and a global variable that ** contains the system frequency. It configures the device and initializes ** the oscillator (PLL) that is part of the microcontroller device. ** -** Copyright (c) 2016 Freescale Semiconductor, Inc. -** Copyright 2016 - 2017 NXP +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2017 NXP ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** -** o Redistributions of source code must retain the above copyright notice, this list +** 1. Redistributions of source code must retain the above copyright notice, this list ** of conditions and the following disclaimer. ** -** o Redistributions in binary form must reproduce the above copyright notice, this +** 2. Redistributions in binary form must reproduce the above copyright notice, this ** list of conditions and the following disclaimer in the documentation and/or ** other materials provided with the distribution. ** -** o Neither the name of the copyright holder nor the names of its +** 3. Neither the name of the copyright holder nor the names of its ** contributors may be used to endorse or promote products derived from this ** software without specific prior written permission. ** @@ -53,23 +51,27 @@ ** - rev. 1.1 (2016-11-25) ** Update CANFD and Classic CAN register. ** Add MAC TIMERSTAMP registers. +** - rev. 1.2 (2017-06-08) +** Remove RTC_CTRL_RTC_OSC_BYPASS. +** SYSCON_ARMTRCLKDIV rename to SYSCON_ARMTRACECLKDIV. +** Remove RESET and HALT from SYSCON_AHBCLKDIV. ** ** ################################################################### */ /*! - * @file LPC54618 - * @version 1.1 - * @date 2016-11-25 - * @brief Device specific configuration file for LPC54618 (header file) + * @file LPC54628 + * @version 1.2 + * @date 2017-06-08 + * @brief Device specific configuration file for LPC54628 (header file) * * Provides a system configuration function and a global variable that contains * the system frequency. It configures the device and initializes the oscillator * (PLL) that is part of the microcontroller device. */ -#ifndef _SYSTEM_LPC54618_H_ -#define _SYSTEM_LPC54618_H_ /**< Symbol preventing repeated inclusion */ +#ifndef _SYSTEM_LPC54628_H_ +#define _SYSTEM_LPC54628_H_ /**< Symbol preventing repeated inclusion */ #ifdef __cplusplus extern "C" { @@ -118,4 +120,4 @@ void SystemCoreClockUpdate (void); } #endif -#endif /* _SYSTEM_LPC54618_H_ */ +#endif /* _SYSTEM_LPC54628_H_ */ diff --git a/targets/targets.json b/targets/targets.json index 1561c94a7c..8f611e2a21 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -710,6 +710,12 @@ "lse_available": { "help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used", "value": "1" + }, + "stdio_uart_tx": { + "help": "default TX STDIO pins is defined in PinNames.h file, but it can be overridden" + }, + "stdio_uart_rx": { + "help": "default RX STDIO pins is defined in PinNames.h file, but it can be overridden" } }, "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"] @@ -740,17 +746,17 @@ "release_versions": ["2", "5"], "device_name" : "LPC54114J256BD64" }, - "MCU_LPC546XX": { + "MCU_LPC546XX": { "core": "Cortex-M4F", "supported_toolchains": ["ARM", "IAR", "GCC_ARM"], "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPCXpresso", "LPC", "LPC546XX"], "is_disk_virtual": true, - "macros": ["CPU_LPC54618J512ET180", "FSL_RTOS_MBED"], + "macros": ["CPU_LPC54628J512ET180", "FSL_RTOS_MBED"], "inherits": ["Target"], "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"], "features": ["LWIP"], "release_versions": ["2", "5"], - "device_name" : "LPC54618J512ET180" + "device_name" : "LPC54628J512ET180" }, "LPC546XX": { "supported_form_factors": ["ARDUINO"], @@ -1103,14 +1109,6 @@ "device_name": "STM32F412ZG", "bootloader_supported": true, "config": { - "stdio_uart_tx": { - "help": "Value PB_6", - "value": "PB_6" - }, - "stdio_uart_rx": { - "help": "Value PB_7", - "value": "PB_7" - }, "clock_source": { "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI", "value": "USE_PLL_HSI", @@ -1954,14 +1952,6 @@ "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.", "value": 1, "macro_name": "MODEM_ON_BOARD_UART" - }, - "stdio_uart_tx": { - "help": "Value PB_6", - "value": "PB_6" - }, - "stdio_uart_rx": { - "help": "Value PB_7", - "value": "PB_7" } }, "overrides": { @@ -2007,16 +1997,12 @@ "hse_value": { "value": "24000000", "macro_name": "HSE_VALUE" - }, - "stdio_uart_tx": { - "help": "Value PA_2", - "value": "PA_2" - }, - "stdio_uart_rx": { - "help": "Value PA_3", - "value": "PA_3" } }, + "overrides": { + "stdio_uart_tx": "PA_2", + "stdio_uart_rx": "PA_3" + }, "supported_toolchains": ["ARM", "GCC_ARM", "IAR"], "device_has_add": ["ANALOGOUT", "FLASH"], "release_versions": ["5"], @@ -2060,28 +2046,32 @@ "supported_form_factors": ["ARDUINO"], "release_versions": ["5"], "config": { - "stdio_uart_tx": { - "help": "Value: D8(default) or D1", - "value": "D8" + "stdio_uart_tx_help": { + "help": "Value: D8(default) or D1" }, - "stdio_uart_rx": { - "help": "Value: D2(default) or D0", - "value": "D2" + "stdio_uart_rx_help": { + "help": "Value: D2(default) or D0" } + }, + "overrides": { + "stdio_uart_tx": "D8", + "stdio_uart_rx": "D2" } }, "MBED_CONNECT_ODIN": { "inherits": ["MODULE_UBLOX_ODIN_W2"], "release_versions": ["5"], "config": { - "stdio_uart_tx": { - "help": "Value: PA_9(default) or PD_8", - "value": "PA_9" + "stdio_uart_tx_help": { + "help": "Value: PA_9(default) or PD_8" }, - "stdio_uart_rx": { - "help": "Value: PA_10(default) or PD_9", - "value": "PA_10" + "stdio_uart_rx_help": { + "help": "Value: PA_10(default) or PD_9" } + }, + "overrides": { + "stdio_uart_tx": "PA_9", + "stdio_uart_rx": "PA_10" } }, "MTB_UBLOX_ODIN_W2": { @@ -3481,7 +3471,7 @@ "supported_form_factors": ["ARDUINO"], "inherits": ["MCU_NRF52"], "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"], - "device_has_add": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"], + "device_has_add": ["ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "FLASH"], "release_versions": ["2", "5"], "device_name": "nRF52832_xxAA" }, diff --git a/tools/arm_pack_manager/__init__.py b/tools/arm_pack_manager/__init__.py index 822a477405..e33b3495d1 100644 --- a/tools/arm_pack_manager/__init__.py +++ b/tools/arm_pack_manager/__init__.py @@ -163,10 +163,18 @@ class Cache () : """ try: pack = self.pack_from_cache(device) - algo_itr = (pack.open(path) for path in device['algorithm'].keys()) - algo_bin = algo_itr.next() - flm_file = algo_bin.read() - return PackFlashAlgo(flm_file).sector_sizes + ret = [] + for filename in device['algorithm'].keys(): + try: + flm = pack.open(filename) + flash_alg = PackFlashAlgo(flm.read()) + sectors = [(flash_alg.flash_start + offset, size) + for offset, size in flash_alg.sector_sizes] + ret.extend(sectors) + except Exception: + pass + ret.sort(key=lambda sector: sector[0]) + return ret except Exception: return None diff --git a/tools/arm_pack_manager/aliases.json b/tools/arm_pack_manager/aliases.json index 6c7443852e..78e2c26ff2 100644 --- a/tools/arm_pack_manager/aliases.json +++ b/tools/arm_pack_manager/aliases.json @@ -1 +1 @@ -{"nRF51 PCA10028": "nRF51422_xxAC", "SAM4L-EK": "ATSAM4LC4C", "Apollo1 EVB": "APOLLO512-KBR", "NuTiny-SDK-M451": "M453VG6AE", "NuTiny-SDK-M0518": "M0518SD2AE", "STM32L073Z-EVAL": "STM32L073VZ", "TLE9879 EvalKit": "TLE9879QXA40", "STM32F401C-Discovery": "STM32F401VC", "NuTiny-SDK-M051": "M0516LDE", "TWR-K21D50M": "MK21DN512Axxx5", "MCB11C14": "LPC11C14FBD48/301", "TWR-K21F120M": "MK21FN1M0Axxx12", "STM32303E-EVAL": "STM32F303VE", "SAMD51-XPRO": "ATSAMD51P20A", "XMC4500 Relax Kit": "XMC4500-F100x1024", "TWR-K22F120M": "MK22FN512xxx12", "MCB1200": "LPC1227FBD64/301", "DB-MAX71637": "MAX71637", "XMC 2Go": "XMC1100-Q024x0064", "EFM32TG-STK3300": "EFM32TG840F32", "STM32H743I-EVAL": "STM32H743XI", "V2M-MPS3 (IoT)": "IOTKit_CM33_MPS3", "NUCLEO-L152RE": "STM32L152RE", "Colibri-VF61": "MVF61NN15xxxx50", "V2M-MPS2 (IoT)": "IOTKit_ARMv8MML", "FRDM-KW40Z": "MKW40Z160xxx4", "NuTiny-SDK-NM1200": "NM1200LBAE", "TWR-K70F120M": "MK70FN1M0xxx12", "STM32F769I-Discovery": "STM32F769NIHx", "HVP-KV46F150M": "MKV46F256xxx16", "S32K148-EVB": "S32K148UAxxxLQx", "MCBSTM32F400": "STM32F407IG", "SAML21-XPRO": "ATSAML21J18A", "AC33M4064/3064 MINI B/D": "AC33M4064", "SAMA5D2-XULT": "ATSAMA5D27", "Apollo EVK": "APOLLO512-KBR", "NuTiny-SDK-NUC505": "NUC505YO13Y", "NuTiny-SDK-M058S": "M058SSAN", "TRK-KEA8": "SKEAZN8xxx4", "NUCLEO-F446RE": "STM32F446RE", "Z32F0642100KITG": "Z32F06423AKE", "MCB54110": "LPC54114J256BD64", "STM32L496G-Discovery": "STM32L496AGIx", "NuTiny-SDK-NANO112": "NANO112VC2AN", "Z32F1280100KITG": "Z32F12811ARS", "NuTiny-SDK-NUC472": "NUC472HI8AE", "EFM32GG-DK3750": "EFM32GG990F1024", "Colibri-VF50": "MVF50NN15xxxx40", "MCBSTM32F200": "STM32F207IG", "FRDM-KL46Z": "MKL46Z256xxx4", "HVP-KV58F": "MKV58F1M0xxx24", "EVAL-ADuCM322EBZ": "ADuCM322", "MCBTMPM360": "TMPM362F10FG", "TWR-VF65GS10": "MVF61NS15xxxx50", "NuTiny-SDK-NANO103": "NANO103SD3AE", "MCBNUC1xx": "NUC140VE3AN", "Z32F0640100KITG": "Z32F06410AES", "LPCXpresso54114": "LPC54114J256", "Colibri-iMX7": "MCIMX7D7", "NuTiny-SDK-Mini55": "Mini54XZAE", "NuTiny-SDK-Mini57": "Mini57TDE", "FRDM-KE15Z": "MKE15Z256xxx7", "NuTiny-SDK-Mini51": "Mini54LDE", "NuTiny-SDK-NANO100BN": "NANO130KE3BN", "NuTiny-SDK-Mini58": "Mini58LDE", "XMC1400 Boot Kit": "XMC1402-Q040x0128", "FRDM-K28F": "MK28FN2M0xxx15", "NuTiny-SDK-NUC131": "NUC131SD2AE", "TRK-KEA64": "SKEAZN64xxx2", "SAM3N-EK": "ATSAM3N4C", "XMC1200 Boot Kit": "XMC1201-T038x0200", "N5 Starter Kit": "nRF51422_xxAA", "Core031C_Board": "MM32x031", "EFM32HG-SLSTK3400A": "EFM32HG322F64", "EVAL-ADuCM320EBZ": "ADuCM320", "ADSP-CM419F EZ-BOARD M4": "ADSP-CM419F-BCZ_M4", "XMC4700 Relax Kit": "XMC4700-F144x2048", "SAMG55-XPRO": "ATSAMG55J19", "Fixed Virtual Platform": "ARMCA5", "SAMHA1G16A-XPRO": "ATSAMHA1G16A", "FRDM-KE06Z": "MKE06Z128xxx4", "NUCLEO-F072RB": "STM32F072RB", "HVP-KV11Z75M": "MKV11Z128xxx7", "MCB1700": "LPC1758", "MCBTWRK60": "MK60DN512xxx10", "FRDM-K32W042": "K32W042S1M2xxx", "HVP-KV31F120M": "MKV31F512xxx12", "NuTiny-SDK-NUC029AE": "NUC029FAE", "NuTiny-SDK-M0564": "M0564VG4AE", "EV-COG-AD4050LZ": "ADuCM4x50", "FRDM-K20D50M": "MK20DX128xxx5", "STM32756G-EVAL": "STM32F756NGHx", "SAM4L-XPRO": "ATSAM4LC4C", "FRDM-KL43Z": "MKL43Z256xxx4", "nRF52 PCA10036": "nRF52832_xxAA", "TWR-KV11Z75M": "MKV11Z128xxx7", "NuTiny-SDK-NUC029AN": "NUC029TAN", "LPCXpresso54102": "LPC54102J512", "FRDM-KL02Z": "MKL02Z32xxx4", "XMC4800 Automation Board": "XMC4800-E196x2048", "STM32L-Discovery": "STM32L152RB", "IMX7-PHYBOARD-ZETA": "MCIMX7D7", "XMC1100 Boot Kit": "XMC1100-T038x0064", "TWR-KV46F150M": "MKV46F256xxx16", "Koala EVM": "STM32F429II", "EFM32WG-STK3800": "EFM32WG990F256", "MCB1313": "LPC1313FBD48", "NuTiny-SDK-M480": "M487JIDAE", "TWR-K65F180M": "MK65FN2M0xxx18", "EB_TMPM369FDFG": "TMPM369FDFG", "TS-R-IN32M3-EC": "R-IN32M3-EC", "STM32F429I-Discovery": "STM32F429ZI", "TWR-KV10Z32": "MKV10Z32xxx7", "NUCLEO-F091RC": "STM32F091RC", "LinkIt 2523 development board": "MT2523x", "SAMV71-XULTRA": "ATSAMV71Q21", "FRDM-KW41Z": "MKW41Z512xxx4", "TWR-KL43Z48M": "MKL43Z256xxx4", "STM32373C-EVAL": "STM32F373VC", "MCIMX6SX-SABRE": "MCIMX6X1", "NuTiny-SDK-NUC100": "NUC100VE3DN", "FRDM-KV31F": "MKV31F512xxx12", "STM32F746G-Discovery": "STM32F746NGHx", "TWR-KL28Z72M": "MKL28Z512xxx7", "nRF52 PCA10040": "nRF52832_xxAA", "MCBSTM32C": "STM32F107VC", "FRDM-KL03Z": "MKL03Z32xxx4", "MCBSTM32E": "STM32F103ZG", "NUCLEO-F401RE": "STM32F401RE", "MAPS-KS22": "MKS22FN256xxx12", "AC33MA384A MINI B/D": "AC33MA384A", "SAML22-XPRO": "ATSAML22N18A", "XMC4800 Relax EtherCAT Kit": "XMC4800-F144x2048", "iMX7-Dual-COM": "MCIMX7D7", "TRK-KEA128": "SKEAZ128xxx4", "TLE984x Eval.Board Rev1.4": "TLE9844QX", "SAM4S-EK": "SAM4S16C", "TWR-K20D50M": "MK20DX128xxx5", "STM32F3-Discovery": "STM32F303VC", "TWR-KE18F": "MKE18F512xxx16", "LPCXpresso1125": "LPC1125JBD48/303", "STM32F4-Discovery": "STM32F407VG", "CMSIS_RTOS_Tutorial": "STM32F103RB", "SAM3X-EK": "ATSAM3X8H", "STM32303C-EVAL": "STM32F303VC", "RTK772100-GENMAI": "R7S72100", "SN32F760 Starter Kit Rev1_1": "SN32F76*", "Core103R_Board": "MM32x103", "SAM3S-EK": "ATSAM3S4C", "Apollo2 EVB": "AMAPH1KK-KBR", "TWR-KW21D256": "MKW21D256xxx5", "FRDM-KE04Z": "MKE04Z8xxx4", "NuTiny-SDK-NUC123": "NUC123SD4AN0", "TWR-K24F120M": "MK24FN256xxx12", "Apollo2 EVK": "AMAPH1KK-KBR", "LPC4330-Xplorer": "LPC4330", "NuTiny-SDK-NUC126": "NUC126VG4AE", "MCBTMPM330": "TMPM330FDFG", "NUCLEO-L476RG": "STM32L476RG", "Bulb Board": "S6E1A12B0A", "MCB1800": "LPC1850", "EFM32GG-STK3700": "EFM32GG990F1024", "GD32150C-START": "GD32F150C8", "AC33GA256 MINI B/D": "AC33GA256", "TS-R-IN32M3-CL": "R-IN32M3-CL", "STM32072B-EVAL": "STM32F072VB", "SN32F770 Starter Kit Rev1_0": "SN32F70*B", "STM32F334-Discovery": "STM32F334C8", "EVAL-ADuCM320iQSPZ": "ADuCM320i", "STM32L4R9I-EVAL": "STM32L4R9AIIx", "AC33M8128/6128 MINI B/D": "AC33M8128", "SAM4S-XPRO": "ATSAM4SD32C", "HEXIWEAR": "MK64FN1M0xxx12", "SAME70-XPLD": "ATSAME70Q21", "A33G527/526 MINI B/D": "A33G52x", "TWR-KM34Z50MV3": "MKM34Z128Axxx5", "PAC52XX EVK": "PAC52XX", "XMC4500 CPU Board - General Purpose (CPU_45A)": "XMC4500-F144x1024", "NuTiny-SDK-NUC122": "NUC122SD2AN", "Z32F3840100KITG": "Z32F38412ALS", "LPCXpresso54608": "LPC54608J512", "MCIMX7ULP-EVK": "MCIMX7U5", "LPC824 LPCXpresso": "LPC824M201JHI33", "FRDM-KL25Z": "MKL25Z128xxx4", "STM32F030-Discovery": "STM32F030R8", "EFM32ZG-STK3200": "EFM32ZG222F32", "NuTiny-SDK-NUC240": "NUC240VE3AE", "NuTiny-SDK-M2351": "M2351KIAAE", "NuTiny-SDK-NUC121": "NUC121SC2AE", "STM32F769I-EVAL": "STM32F769NIHx", "TWR-KM34Z50": "MKM34Z128xxx5", "nRF51 PCA20006": "nRF51822_xxaa", "TS-R-IN32M4-CL2": "R-IN32M4-CL2", "HVP-KE18F": "MKE18F512xxx16", "QN908XDK": "QN9080A", "EVAL-ADICUP3029": "ADuCM3029", "SAM4C-EK": "ATSAM4C16C", "FRDM-KV11Z": "MKV11Z128xxx7", "TWR-KV31F120M": "MKV31F512xxx12", "MCB1500": "LPC1549JBD100", "TWR-K80F150M": "MK80FN256xxx15", "FRDM-K82F": "MK82FN256xxx15", "STM32L476G-EVAL": "STM32L476ZG", "MCIMX7D-SABRE": "MCIMX7D7", "STM32F051-Discovery": "STM32F051R8", "NUCLEO-L053R8": "STM32L053R8", "FRDM-K64F": "MK64FN1M0VLL12", "TLE9869 EvalKit": "TLE9869QXA20", "LPC84x LPCXpresso": "LPC845M301JBD64", "DK-TM4C129x": "TM4C129XNCZAD", "S32K144-EVB": "S32K144UAT0xxxx", "ADSP-CM419F EZ-BOARD": "ADSP-CM419F", "SAMD20-XPRO": "ATSAMD20J18", "STM32091C-EVAL": "STM32F091VC", "SAM4E-EK": "SAM4E16C", "MCB1343": "LPC1343FBD48", "TWR-KV58F220M": "MKV58F1M0xxx24", "XMC4500 CPU Board - General Purpose (CPU_45B)": "XMC4500-E144x1024", "FRDM-KL28Z": "MKL28Z512xxx7", "ADuCM4050 EZ-KIT": "ADuCM4050", "LPCXpresso54618": "LPC54618J512", "SN32F100 Starter Kit": "SN32F10*", "SAM3U-EK": "ATSAM3U4E", "ADSP-CM419F EZ-BOARD M0": "ADSP-CM419F-BCZ_M0", "ADuCM3029 EZ-KIT": "ADuCM3029", "LPC812 LPCXpresso": "LPC812M101JDH20", "NuTiny-SDK-NUC200": "NUC220VE3AN", "STM32F072-Discovery": "STM32F072RB", "FRDM-KL82Z": "MKL81Z128xxx7", "XMC1300 Boot Kit": "XMC1302-T038x0200", "LPC1788-32 Developers Kit": "LPC1788", "NuTiny-SDK-NUC2201": "NUC2201LE3AE", "MCBTMPM395": "TMPM395FWAXBG", "SN32F707B Starter Kit Rev1_0": "SN32F70*B", "BMSKTOPASM369": "TMPM369FDFG", "uVision Simulator": "ARMCM0", "NuTiny-SDK-NANO100AN": "NANO100VD3AN", "TWR-K60D100M": "MK60DN512xxx10", "TWR-K20D72M": "MK20DX256xxx7", "EV-COG-AD3029LZ": "ADuCM3029", "nRF51 PCA10031": "nRF51422_xxAC", "EK-TM4C1294XL": "TM4C1294NCPDT", "SK-FM3-176PMC-ETHERNET": "MB9BFD18T", "LPC4088-32 Developers Kit": "LPC4088FET208", "FRDM-KW36": "MKW36A512xxx4", "LinkIt 7687 development board": "MT7687F", "XMC4500 Relax Lite Kit": "XMC4500-F100x1024", "FRDM-K66F": "MK66FN2M0xxx18", "iMX6-SoloX-COM": "MCIMX6X4", "STM32L053-Discovery": "STM32L053C8", "LPCXpresso11U68": "LPC11U68JBD100", "XMC4400 CPU Board - General Purpose (CPU_44A)": "XMC4400-F100x512", "LPCXpresso54628": "LPC54628J512", "NUCLEO-F103RB": "STM32F103RB", "SAMC21N-XPRO": "ATSAMC21N18A", "FRDM-KE02Z40M": "MKE02Z64xxx4", "NUCLEO-F030R8": "STM32F030R8", "MCB9B500": "MB9BF506R", "V2M-MPS2": "DS_CM3", "FRDM-KL27Z": "MKL27Z64xxx4", "AC30M1464 MINI B/D": "AC30M1464", "XMC4300 Relax Kit": "XMC4300-F100x256", "TWR-KL82Z72M": "MKL82Z128xxx7", "TS-R-IN32M3-CEC": "R-IN32M3-EC", "NuTiny-SDK-M0519": "M0519VE3AE", "TWR-K64F120M": "MK64FN1M0xxx12", "MCB4300": "LPC4350", "iMX7-Meerkat-96Boards": "MCIMX7D7", "XMC4200 CPU Board - Actuator (CPU_42A)": "XMC4200-F64x256", "EVAL-ADuCM360MKZ": "ADuCM360"} \ No newline at end of file +{"nRF51 PCA10028": "nRF51422_xxAC", "SAM4L-EK": "ATSAM4LC4C", "HVP-KV31F120M": "MKV31F512xxx12", "Apollo1 EVB": "APOLLO512-KBR", "NuTiny-SDK-M451": "M453VG6AE", "NuTiny-SDK-M0518": "M0518SD2AE", "STM32L073Z-EVAL": "STM32L073VZ", "TLE9879 EvalKit": "TLE9879QXA40", "STM32F401C-Discovery": "STM32F401VC", "NuTiny-SDK-M051": "M0516LDE", "TWR-K21D50M": "MK21DN512Axxx5", "MCB11C14": "LPC11C14FBD48/301", "TWR-K21F120M": "MK21FN1M0Axxx12", "STM32303E-EVAL": "STM32F303VE", "SAMD51-XPRO": "ATSAMD51P20A", "XMC4500 Relax Kit": "XMC4500-F100x1024", "TWR-K22F120M": "MK22FN512xxx12", "MCB1200": "LPC1227FBD64/301", "DB-MAX71637": "MAX71637", "XMC 2Go": "XMC1100-Q024x0064", "EFM32TG-STK3300": "EFM32TG840F32", "STM32H743I-EVAL": "STM32H743XI", "V2M-MPS3 (IoT)": "IOTKit_CM33_MPS3", "NUCLEO-L152RE": "STM32L152RE", "Colibri-VF61": "MVF61NN15xxxx50", "V2M-MPS2 (IoT)": "IOTKit_ARMv8MML", "FRDM-KW40Z": "MKW40Z160xxx4", "EFM32GG-DK3750": "EFM32GG990F1024", "TWR-K70F120M": "MK70FN1M0xxx12", "STM32F769I-Discovery": "STM32F769NIHx", "TWR-KE18F": "MKE18F512xxx16", "S32K148-EVB": "S32K148UAxxxLQx", "EV-COG-AD3029LZ": "ADuCM3029", "MCBSTM32F400": "STM32F407IG", "SAML21-XPRO": "ATSAML21J18A", "AC33M4064/3064 MINI B/D": "AC33M4064", "SAMA5D2-XULT": "ATSAMA5D27", "Apollo EVK": "APOLLO512-KBR", "NuTiny-SDK-NUC505": "NUC505YO13Y", "NuTiny-SDK-M058S": "M058SSAN", "TRK-KEA8": "SKEAZN8xxx4", "MCB1700": "LPC1758", "Z32F0642100KITG": "Z32F06423AKE", "MCB54110": "LPC54114J256BD64", "STM32L496G-Discovery": "STM32L496AGIx", "NuTiny-SDK-NANO112": "NANO112VC2AN", "Z32F1280100KITG": "Z32F12811ARS", "NuTiny-SDK-NUC472": "NUC472HI8AE", "EK-TM4C1294XL": "TM4C1294NCPDT", "SN32F100 Starter Kit": "SN32F10*", "Colibri-VF50": "MVF50NN15xxxx40", "MCBSTM32F200": "STM32F207IG", "FRDM-KL46Z": "MKL46Z256xxx4", "HVP-KE18F": "MKE18F512xxx16", "HVP-KV58F": "MKV58F1M0xxx24", "HVP-KV46F150M": "MKV46F256xxx16", "FRDM-K22F": "MK22FN512xxx12", "EVAL-ADuCM322EBZ": "ADuCM322", "MCBTMPM360": "TMPM362F10FG", "TWR-VF65GS10": "MVF61NS15xxxx50", "NuTiny-SDK-NANO103": "NANO103SD3AE", "MCBNUC1xx": "NUC140VE3AN", "Z32F0640100KITG": "Z32F06410AES", "LPCXpresso54114": "LPC54114J256", "Colibri-iMX7": "MCIMX7D7", "NuTiny-SDK-Mini55": "Mini54XZAE", "NuTiny-SDK-Mini57": "Mini57TDE", "SAM3S-EK": "ATSAM3S4C", "NuTiny-SDK-Mini51": "Mini54LDE", "NuTiny-SDK-NANO100BN": "NANO130KE3BN", "NuTiny-SDK-Mini58": "Mini58LDE", "XMC1400 Boot Kit": "XMC1402-Q040x0128", "FRDM-K28F": "MK28FN2M0xxx15", "NuTiny-SDK-NUC131": "NUC131SD2AE", "TRK-KEA64": "SKEAZN64xxx2", "XMC1200 Boot Kit": "XMC1201-T038x0200", "N5 Starter Kit": "nRF51422_xxAA", "Core031C_Board": "MM32x031", "EFM32HG-SLSTK3400A": "EFM32HG322F64", "EVAL-ADuCM320EBZ": "ADuCM320", "ADSP-CM419F EZ-BOARD M4": "ADSP-CM419F-BCZ_M4", "EFM32ZG-STK3200": "EFM32ZG222F32", "SAMG55-XPRO": "ATSAMG55J19", "Fixed Virtual Platform": "ARMCA5", "FRDM-KE06Z": "MKE06Z128xxx4", "NUCLEO-F072RB": "STM32F072RB", "NuTiny-SDK-NUC100": "NUC100VE3DN", "MCBTWRK60": "MK60DN512xxx10", "FRDM-K32W042": "K32W042S1M2xxx", "NuTiny-SDK-NUC121": "NUC121SC2AE", "NuTiny-SDK-NUC029AE": "NUC029FAE", "NuTiny-SDK-M0564": "M0564VG4AE", "XMC4800 Automation Board": "XMC4800-E196x2048", "ADuCM4050 EZ-KIT": "ADuCM4050", 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"SVD/EFM32GG11B/EFM32GG11B420F2048IQ64.svd", "processor": {"fpu": "1", "endianness": "Little-endian", "clock": "50000000"}}, "LM3S2410": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "sectors": [[0, 1024]], "algorithm": {"Flash/LM3S_128.FLM": {"default": "1", "ramsize": null, "size": "0x00018000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s2u93.h", "define": "LM3S2U93"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00008000"}, "IROM1": {"start": "0x00000000", "size": "0x00018000"}}, "debug": "SVD\\lm3s2410.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}, "NUC100RD1BN": {"core": "Cortex-M0", "vendor": "Nuvoton:18", "sectors": [[0, 512], [1048576, 512], [3145728, 8]], "algorithm": {"Flash/NUC100_CFG.FLM": {"default": "0", "ramsize": null, "size": "0x00000004", "ramstart": null, "start": "0x00300000"}, "Flash/NUC100_LD_4.FLM": {"default": "0", "ramsize": null, "size": "0x1000", "ramstart": null, "start": "0x00100000"}, "Flash/NUC100_AP_64.FLM": {"default": "1", "ramsize": null, "size": "0x10000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.1.2.0.pack", "compile": {"header": "Device\\NUC100\\Include\\NUC100Series.h"}, "pdsc_file": "http://www.nuvoton.com/hq/enu/Documents/KEILSoftwarePack/Nuvoton.NuMicro_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x1000"}, "IROM1": {"start": "0x00000000", "size": "0x10000"}}, "debug": "SVD\\Nuvoton\\NUC100BN_v1.svd", "processor": {"fpu": "FPU", "endianness": "Configurable", "clock": "50000000"}}, "LM3S6110": {"core": "Cortex-M3", "vendor": "Texas Instruments:16", "sectors": [[0, 1024]], "algorithm": {"Flash/LM3S_64.FLM": {"default": "1", "ramsize": null, "size": "0x00010000", "ramstart": null, "start": "0x00000000"}}, "debug-interface": [], "pack_file": "http://www.keil.com/pack/Keil.LM3S_DFP.1.1.0.pack", "compile": {"header": "Device\\Include\\lm3s6965.h", "define": "LM3S6965"}, "pdsc_file": "http://www.keil.com/pack/Keil.LM3S_DFP.pdsc", "memory": {"IRAM1": {"start": "0x20000000", "size": "0x00004000"}, "IROM1": {"start": "0x00000000", "size": "0x00010000"}}, "debug": "SVD\\lm3s6110.svd", "processor": {"fpu": "0", "endianness": "Little-endian", "clock": "25000000"}}} \ No newline at end of file diff --git a/tools/export/e2studio/__init__.py b/tools/export/e2studio/__init__.py index 9ca5f6a089..f37565b5b1 100644 --- a/tools/export/e2studio/__init__.py +++ b/tools/export/e2studio/__init__.py @@ -37,5 +37,5 @@ class E2Studio(GNUARMEclipse): self.gen_file('e2studio/launch.tmpl', jinja_ctx, '%s OpenOCD.launch' % self.project_name, trim_blocks=True, lstrip_blocks=True) self.gen_file('gnuarmeclipse/.project.tmpl', jinja_ctx, '.project', trim_blocks=True, lstrip_blocks=True) - self.gen_file('gnuarmeclipse/mbedignore.tmpl', jinja_ctx, '.mbedignore') + self.gen_file_nonoverwrite('gnuarmeclipse/mbedignore.tmpl', jinja_ctx, '.mbedignore') self.gen_file('gnuarmeclipse/makefile.targets.tmpl', jinja_ctx, 'makefile.targets', trim_blocks=True, lstrip_blocks=True) diff --git a/tools/export/exporters.py b/tools/export/exporters.py index 62652672d2..c4d9e198ee 100644 --- a/tools/export/exporters.py +++ b/tools/export/exporters.py @@ -2,7 +2,7 @@ import os from abc import abstractmethod, ABCMeta import logging -from os.path import join, dirname, relpath, basename, realpath, normpath +from os.path import join, dirname, relpath, basename, realpath, normpath, exists from itertools import groupby from jinja2 import FileSystemLoader, StrictUndefined from jinja2.environment import Environment @@ -130,7 +130,34 @@ class Exporter(object): source_files.extend(getattr(self.resources, key)) return list(set([os.path.dirname(src) for src in source_files])) + def gen_file_dest(self, target_file): + """Generate the project file location in an exported project""" + return join(self.export_dir, target_file) + def gen_file(self, template_file, data, target_file, **kwargs): + """Generates a project file from a template using jinja""" + target_text = self._gen_file_inner(template_file, data, target_file, **kwargs) + target_path = self.gen_file_dest(target_file) + logging.debug("Generating: %s", target_path) + open(target_path, "w").write(target_text) + self.generated_files += [target_path] + + def gen_file_nonoverwrite(self, template_file, data, target_file, **kwargs): + """Generates a project file from a template using jinja""" + target_text = self._gen_file_inner(template_file, data, target_file, **kwargs) + target_path = self.gen_file_dest(target_file) + if exists(target_path): + with open(target_path) as fdin: + old_text = fdin.read() + if target_text not in old_text: + with open(target_path, "a") as fdout: + fdout.write(target_text) + else: + logging.debug("Generating: %s", target_path) + open(target_path, "w").write(target_text) + self.generated_files += [target_path] + + def _gen_file_inner(self, template_file, data, target_file, **kwargs): """Generates a project file from a template using jinja""" jinja_loader = FileSystemLoader( os.path.dirname(os.path.abspath(__file__))) @@ -139,6 +166,7 @@ class Exporter(object): template = jinja_environment.get_template(template_file) target_text = template.render(data) + return target_text target_path = join(self.export_dir, target_file) logging.debug("Generating: %s", target_path) diff --git a/tools/export/gnuarmeclipse/__init__.py b/tools/export/gnuarmeclipse/__init__.py index 7d822821a9..c0f05f03d7 100644 --- a/tools/export/gnuarmeclipse/__init__.py +++ b/tools/export/gnuarmeclipse/__init__.py @@ -293,7 +293,8 @@ class GNUARMEclipse(Exporter): '.cproject', trim_blocks=True, lstrip_blocks=True) self.gen_file('gnuarmeclipse/makefile.targets.tmpl', jinja_ctx, 'makefile.targets', trim_blocks=True, lstrip_blocks=True) - self.gen_file('gnuarmeclipse/mbedignore.tmpl', jinja_ctx, '.mbedignore') + self.gen_file_nonoverwrite('gnuarmeclipse/mbedignore.tmpl', jinja_ctx, + '.mbedignore') print print 'Done. Import the \'{0}\' project in Eclipse.'.format(self.project_name) diff --git a/tools/export/iar/iar_definitions.json b/tools/export/iar/iar_definitions.json index c6c6b90300..a4c29003f9 100644 --- a/tools/export/iar/iar_definitions.json +++ b/tools/export/iar/iar_definitions.json @@ -83,7 +83,7 @@ "LPC54114J256BD64": { "OGChipSelectEditMenu": "LPC54114J256_M4\tNXP LPC54114J256_M4" }, - "LPC54618J512ET180": { + "LPC54628J512ET180": { "OGChipSelectEditMenu": "LPC54618J512\tNXP LPC54618J512" }, "STM32F072RB": { diff --git a/tools/export/mcuxpresso/LPC546XX_cproject.tmpl b/tools/export/mcuxpresso/LPC546XX_cproject.tmpl index bb2a0d674a..f470f9d738 100644 --- a/tools/export/mcuxpresso/LPC546XX_cproject.tmpl +++ b/tools/export/mcuxpresso/LPC546XX_cproject.tmpl @@ -2,8 +2,8 @@ {% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?> <TargetConfig> -<Properties property_3="NXP" property_4="LPC54608J512" property_count="5" version="70200"/> -<infoList vendor="NXP"><info chip="LPC54608J512" name="LPC54608J512"><chip><name>LPC54608J512</name> +<Properties property_3="NXP" property_4="LPC54628J512" property_count="5" version="70200"/> +<infoList vendor="NXP"><info chip="LPC54628J512" name="LPC54628J512"><chip><name>LPC54628J512</name> <family>LPC546xx</family> <vendor>NXP</vendor> <memory can_program="true" id="Flash" is_ro="true" size="512" type="Flash"/> @@ -97,10 +97,10 @@ <processor><name gcc_name="cortex-m4">Cortex-M4</name> <family>Cortex-M</family> </processor> -<link href="LPC54608_internal_peripheral.xml" show="embed" type="simple"/> +<link href="LPC54628_internal_peripheral.xml" show="embed" type="simple"/> </info> </infoList> </TargetConfig>{% endblock %} -{% block sdk_name %}SDK_2.x_LPCXpresso54608{% endblock %} -{% block sdk_version %}2.2.0{% endblock %} +{% block sdk_name %}SDK_2.x_LPCXpresso54628{% endblock %} +{% block sdk_version %}2.3.0{% endblock %} diff --git a/tools/export/mcuxpresso/__init__.py b/tools/export/mcuxpresso/__init__.py index 6d219496ab..f145c61cbd 100644 --- a/tools/export/mcuxpresso/__init__.py +++ b/tools/export/mcuxpresso/__init__.py @@ -224,7 +224,8 @@ class MCUXpresso(GNUARMEclipse): '.cproject', trim_blocks=True, lstrip_blocks=True) self.gen_file('mcuxpresso/makefile.targets.tmpl', jinja_ctx, 'makefile.targets', trim_blocks=True, lstrip_blocks=True) - self.gen_file('mcuxpresso/mbedignore.tmpl', jinja_ctx, '.mbedignore') + self.gen_file_nonoverwrite('mcuxpresso/mbedignore.tmpl', jinja_ctx, + '.mbedignore') print print 'Done. Import the \'{0}\' project in Eclipse.'.format(self.project_name) diff --git a/tools/export/nb/__init__.py b/tools/export/nb/__init__.py index 5e73c6fca3..8b9174bfa5 100644 --- a/tools/export/nb/__init__.py +++ b/tools/export/nb/__init__.py @@ -268,7 +268,8 @@ class GNUARMNetbeans(Exporter): self.gen_file('nb/configurations.tmpl', jinja_ctx, 'nbproject/configurations.xml') self.gen_file('nb/project.tmpl', jinja_ctx, 'nbproject/project.xml') - self.gen_file('nb/mbedignore.tmpl', jinja_ctx, '.mbedignore') + self.gen_file_nonoverwrite('nb/mbedignore.tmpl', jinja_ctx, + '.mbedignore') self.gen_file('nb/Makefile.tmpl', jinja_ctx, 'Makefile') print diff --git a/tools/make.py b/tools/make.py index 99b2cfd6bb..cf893672ca 100644 --- a/tools/make.py +++ b/tools/make.py @@ -19,6 +19,7 @@ limitations under the License. TEST BUILD & RUN """ from __future__ import print_function +from builtins import str import sys import json from time import sleep diff --git a/tools/project.py b/tools/project.py index ff59f5b9d4..3aef27a606 100644 --- a/tools/project.py +++ b/tools/project.py @@ -221,7 +221,7 @@ def main(): if options.update_packs: from tools.arm_pack_manager import Cache cache = Cache(True, True) - cache.cache_descriptors() + cache.cache_everything() # Target if not options.mcu: diff --git a/tools/toolchains/__init__.py b/tools/toolchains/__init__.py index c73ca5457c..d64aba3093 100644 --- a/tools/toolchains/__init__.py +++ b/tools/toolchains/__init__.py @@ -727,6 +727,7 @@ class mbedToolchain: resources.file_basepath[file_path] = base_path if self.is_ignored(relpath(file_path, base_path)): + resources.ignore_dir(relpath(file_path, base_path)) return _, ext = splitext(file_path) diff --git a/tools/toolchains/gcc.py b/tools/toolchains/gcc.py index def90ad877..dfc83b8bc4 100644 --- a/tools/toolchains/gcc.py +++ b/tools/toolchains/gcc.py @@ -26,8 +26,7 @@ class GCC(mbedToolchain): LIBRARY_EXT = '.a' STD_LIB_NAME = "lib%s.a" - DIAGNOSTIC_PATTERN = re.compile('((?P[^:]+):(?P\d+):)(\d+:)? (?Pwarning|[eE]rror|fatal error): (?P.+)') - INDEX_PATTERN = re.compile('(?P\s*)\^') + DIAGNOSTIC_PATTERN = re.compile('((?P[^:]+):(?P\d+):)(?P\d+):? (?Pwarning|[eE]rror|fatal error): (?P.+)') def __init__(self, target, notify=None, macros=None, silent=False, extra_verbose=False, build_profile=None, @@ -125,21 +124,12 @@ class GCC(mbedToolchain): 'severity': match.group('severity').lower(), 'file': match.group('file'), 'line': match.group('line'), - 'col': 0, + 'col': match.group('col'), 'message': match.group('message'), 'text': '', 'target_name': self.target.name, 'toolchain_name': self.name } - elif msg is not None: - # Determine the warning/error column by calculating the ^ position - match = self.INDEX_PATTERN.match(line) - if match is not None: - msg['col'] = len(match.group('col')) - self.cc_info(msg) - msg = None - else: - msg['text'] += line+"\n" if msg is not None: self.cc_info(msg)